Artículos de revistas: "Isolated gate driver"

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Gras, David, Christophe Pautrel, Amir Fanaei, Gregory Thepaut, Maxime Chabert, Fabien Laplace y Gonzalo Picun. "Highly Integrated and Isolated Universal Half-Bridge Power Gate Driver and Associated Flyback Power Supply for High Temperature and High Reliability Applications". Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2014, HITEC (1 de enero de 2014): 000206–13. http://dx.doi.org/10.4071/hitec-wp12.

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In this paper we present a highly integrated, high-temperature isolated, half-bridge power gate driver demo board, based on turnkey X-REL chipset: XTR26010 (High-Temperature Intelligent Gate Driver), XTR40010 (High-Temperature Isolated Two Channel Transceiver), XTR30010 (High-Temperature PWM Controller), and XTR2N0825 (High-Temperature 80V N-Channel Power MOSFET). The XTR26010 is the key circuit in this chipset for power gate drive application. The XTR26010 circuit has been designed with a high focus in offering a robust, reliable and efficient solution for driving a large variety of high-temperature, high-voltage, and high-efficiency power transistors (SiC, GaN, Si) existing in the market. Furthermore, the XTR26010 circuit implements an unprecedented functionality for high-temperature drivers allowing safe operation at system level by preventing any cross-conduction between high-side and low-side switches, through isolated communication between high-side and low-side drivers. The XTR40010 is used for isolated data communication between a microcontroller or a PWM controller with the power driver (XTR26010). For supplying the half-bridge gate driver, a compact isolated flyback power supply has been developed thanks to the versatile voltage mode PWM controller XTR30010 and the XT2N0825 N-Channel MOSFET. The full system has been successfully tested while driving different brands of SiC MOSFETs up to Ta=200°C, 600kHz of switching frequency and 600V high-voltage bus (limited by isolation transformers used). The demo board presented can be easily modified to drive other SiC and GaN transistors available in the market. The 200°C limitation of the demo board is due to passives, PCB material, and the solder paste used. However, all X-REL active circuits have been qualified within specifications well above 230°C.

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Matalata, Hendi y Rozlinda Dewi. "Desain Rangkaian Gate Driver Analog untuk Dual Mosfet Drivers". Jurnal Ilmiah Universitas Batanghari Jambi 21, n.º 2 (4 de julio de 2021): 714. http://dx.doi.org/10.33087/jiubj.v21i2.1534.

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Switching techniques have been continued to develop, including sinusoidal PWM, space vector PWM, current tracking PWM, harmonic elimination PWM and others. Each method has advantages and disadvantages, but the most commonly used methods are sinusoidal PWM and space vector PWM. PWM that is generated using a microcontroller or analog IC component generally has a maximum voltage value of 5V. To strengthen the PWM wave, a gate-driver circuit is needed, so that the PWM control wave is able to move the IGBT / MOSFET. On this paper, the design of gate driver circuit use An analog IC, which starts from the generation of two waves, namely a sinusoidal wave and a DC source to be compared (Comparator) so that it can produce a PWM wave. Then this PWM wave is isolated using an optocoupler and MOSFET driver IC to limit interference in the switching process on high power supplies. Based on the results, it can be cancluded PWM control wave output from the gate-driver circuit is isolated from the system intended for designing a power converter and other applications.

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3

Kuo, Hsuan-Yu y Jau-Jr Lin. "Development of Miniaturized Monolithic Isolated Gate Driver". Advances in Science, Technology and Engineering Systems Journal 6, n.º 5 (septiembre de 2021): 177–84. http://dx.doi.org/10.25046/aj060520.

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4

Garcia, Jorge, Sarah Saeed, Emre Gurpinar y Alberto Castellazzi. "A Study of Integrated Signal and Power Transfer for Compact Isolated SiC MOSFET Gate-Drivers". Electronics 10, n.º 2 (13 de enero de 2021): 159. http://dx.doi.org/10.3390/electronics10020159.

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This work discusses a novel set of alternate implementations of isolated gate driver circuits for power electronic transistors. The proposed topologies for the driver have been designed specifically for SiC power MOSFET. Three different solutions are discussed, all of them providing the required gate turn-on and turn-off command signal with galvanic isolation, but also supplying power to the secondary side of the driver by means of magnetic transformers. The resulting solutions, all of them implemented with simple circuitry, enable the integration of the driver into the power cell, allowing for theoretical higher power density values in the final system. The principle of operation of the different solutions is discussed, and then the main relevant implementation details are presented. After that, the operation of the circuits is demonstrated experimentally, by testing a set of prototypes of these drivers. This provides a comprehensive design example that assesses the feasibility of the proposed solutions. Finally, the main results of the performance of the three gate drivers, on an SiC MOSFET-based prototype are presented and compared.

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5

Doucet, Jean-Christophe, Aimad Saib, Christian Mourad, François Piette, Etienne Vanzieleghem y Pierre Delatte. "HADES®: a High-Temperature Isolated Gate Driver Solution for SiC-based Multi-kW Converters". Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2011, HITEN (1 de enero de 2011): 000145–51. http://dx.doi.org/10.4071/hiten-paper3-jcdoucet.

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This paper presents HADES® Gate Driver, a new solution that efficiently drives Silicon-Carbide (SiC) devices in multi-kW converters. It discusses how it allows taking full advantage of SiC technology by placing the gate driver circuits very close to the power transistors: The resulting lower parasitic inductances enable faster switching times and subsequently higher efficiency. Higher operating temperature for both the gate driver and the power transistors also translate into considerable reduction of complexity, size and weight of the system, in particular of the cooling systems. Finally, the paper describes how HADES® reference design is built from a new chipset especially developed for this purpose and designed to operate up to 225°C: THEMIS, ATLAS and RHEA.

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6

Muhammad, Khairul Safuan y Dylan Dah-Chuan Lu. "Magnetically Isolated Gate Driver With Leakage Inductance Immunity". IEEE Transactions on Power Electronics 29, n.º 4 (abril de 2014): 1567–72. http://dx.doi.org/10.1109/tpel.2013.2279548.

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7

Zhao, Weichuan, Sohrab Ghafoor, Gijs Willem Lagerweij, Gert Rietveld, Peter Vaessen y Mohamad Ghaffarian Niasar. "Comprehensive Investigation of Promising Techniques to Enhance the Voltage Sharing among SiC MOSFET Strings, Supported by Experimental and Simulation Validations". Electronics 13, n.º 8 (13 de abril de 2024): 1481. http://dx.doi.org/10.3390/electronics13081481.

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This paper comprehensively reviews several techniques that address the static and dynamic voltage balancing of series-connected MOSFETs. The effectiveness of these techniques was validated through simulations and experiments. Dynamic voltage-balancing techniques include gate signal delay adjustment methods, passive snubbers, passive clamping circuits, and hybrid solutions. Based on the experimental results, the advantages and disadvantages of each technique are investigated. Combining the gate-balancing core method with an RC snubber, which has proven both technically and commercially attractive, provides a robust solution. If the components are sorted and binned, voltage-balancing techniques may not be necessary, further enhancing the commercial viability of series-connected MOSFETs. An investigation of gate driver topologies yields one crucial conclusion: magnetically isolated gate drivers offer a simple and cost-effective solution for high-frequency (HF) applications (2.5–50 kHz) above 8 kV with an increased number of series devices. Below 8 kV, it is advantageous to move the isolation barrier from the gate drive IC to an optocoupler and isolated supply, allowing for a simple design with commercially available components.

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8

Mayorga, J. Valle, C. Gutshall, K. Phan, I. Escorcia, H. A. Mantooth, B. Reese, M. Schupbach y A. Lostetter. "High Temperature Silicon-on-Insulator Gate Driver for SiC-FET Power Modules". Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2011, HITEN (1 de enero de 2011): 000152–58. http://dx.doi.org/10.4071/hiten-paper4-jmayorga.

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SiC power semiconductors have the capability of greatly outperforming Si-based power devices. Faster switching and smaller on-state losses coupled with higher voltage blocking and temperature capabilities, make SiC a very attractive semiconductor for high performance, high power density power modules. However, the temperature capabilities and increased power density are fully utilized only when the gate driver is placed next to the SiC devices. This requires the gate driver to successfully operate under these extreme conditions with reduced or no heat sinking requirements, allowing the full realization of a high efficiency, high power density SiC power module. In addition, since SiC devices are usually connected in a half or full bridge configuration, the gate driver should provide electrical isolation between the high and low voltage sections of the driver itself. This paper presents a 225 degrees Celsius operable, Silicon-On-Insulator (SOI) high voltage isolated gate driver IC for SiC devices. The IC was designed and fabricated in a 1 μm, partially depleted, CMOS process. The presented gate driver consists of a primary and a secondary side which are electrically isolated by the use of a transformer. The gate driver IC has been tested at a switching frequency of 200 kHz at 225 degrees Celsius while exhibiting a dv/dt noise immunity of at least 45 kV/μs.

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9

Makki, Loreine, Marc Anthony Mannah, Christophe Batard, Nicolas Ginot y Julien Weckbrodt. "Investigating the Shielding Effect of Pulse Transformer Operation in Isolated Gate Drivers for SiC MOSFETs". Energies 14, n.º 13 (27 de junio de 2021): 3866. http://dx.doi.org/10.3390/en14133866.

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Wide-bandgap technology evolution compels the advancement of efficient pulse-width gate-driver devices. Integrated enhanced gate-driver planar transformers are a source of electromagnetic disturbances due to inter-winding capacitances, which serve as a route to common-mode(CM) currents. This paper will simulate, via ANSYS Q3D Extractor, the unforeseen parasitic effects of a pulse planar transformer integrated in a SiC MOSFET gate-driver card. Moreover, the pulse transformer will be ameliorated by adding distinctive shielding layers aiming to suppress CM noise effects and endure high dv/dt occurrences intending to validate experimental tests. The correlation between stray capacitance and dv/dt immunity results after shielding insertion will be reported.

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10

Sugano, Ryoko, Yuchong Sun y Hiroo Sekiya. "High-frequency resonant gate driver with isolated class-E amplifier". Nonlinear Theory and Its Applications, IEICE 9, n.º 3 (2018): 358–73. http://dx.doi.org/10.1587/nolta.9.358.

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11

BRAMBILLA, ANGELO. "SNUBBER BEHAVIOR AND DESIGN IN FLYBACK CONVERTERS FOR ISOLATED IGBT DRIVERS". Journal of Circuits, Systems and Computers 05, n.º 03 (septiembre de 1995): 523–29. http://dx.doi.org/10.1142/s0218126695000321.

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When flyback converters are connected to floating loads, voltage swings at the output can give rise to spikes which pass through the flyback transformer stray capacitor. This happens when flyback converters supply IGBT floating gate drivers. These voltage spikes can interfere with the correct behavior of the gate driver. In order to reduce the transformer stray capacitance, the two windings must be wound on the opposite sides of the core. However, this reduces the coupling factor of the transformer by increasing its leakage inductance and snubbers must be employed in some cases. This paper deals with snubber design and behavior for flyback converter applications. Since it is shown that snubbers transfer the energy through the flyback transformer, they should be designed in a different way with respect to conventional applications.

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12

Zhang, Zhiliang, Fei-Fei Li y Yan-Fei Liu. "A High-Frequency Dual-Channel Isolated Resonant Gate Driver With Low Gate Drive Loss for ZVS Full-Bridge Converters". IEEE Transactions on Power Electronics 29, n.º 6 (junio de 2014): 3077–90. http://dx.doi.org/10.1109/tpel.2013.2272662.

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13

Serban, Emanuel, Mohammad Ali Saket y Martin Ordonez. "High-Performance Isolated Gate-Driver Power Supply With Integrated Planar Transformer". IEEE Transactions on Power Electronics 36, n.º 10 (octubre de 2021): 11409–20. http://dx.doi.org/10.1109/tpel.2021.3070053.

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14

Garcia, Jorge, Sara Saeed, Emre Gurpinar, Alberto Castellazzi y Pablo Garcia. "Self-Powering High Frequency Modulated SiC Power MOSFET Isolated Gate Driver". IEEE Transactions on Industry Applications 55, n.º 4 (julio de 2019): 3967–77. http://dx.doi.org/10.1109/tia.2019.2910789.

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15

Ahmed Rmila, Salahaldein y Simon S. Ang. "A High-Input Voltage Two-Phase Series-Capacitor DC-DC Buck Converter". Journal of Electrical and Computer Engineering 2020 (8 de junio de 2020): 1–15. http://dx.doi.org/10.1155/2020/9464727.

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A high-input voltage 2-phase series-capacitor (2-pscB) DC-DC buck converter is theoretically analyzed, designed, and implemented. A new design approach for an automatic current sharing scheme was presented for a 2-phase series-capacitor synchronous buck converter. The series-capacitor voltage is used to achieve current sharing between phases without a current sensing circuit or external control loop as each phase inductor charges and discharges the series capacitor to maintain its average capacitor voltage constant. A novel isolated gate driver circuit to accommodate an energy storage capacitor is proposed to deliver isolated gate voltages to the switching transistors. An I2 control scheme that uses only one feedback path control for the four gate drivers is proposed to enable higher voltage conversion. An experimental 110-12 V 6 A load prototype converter was designed, and its current sharing characteristics were experimentally verified.

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16

Chen, Changnan, Pichao Pan, Jiebin Gu y Xinxin Li. "A High-Voltage-Isolated MEMS Quad–Solenoid Transformer with Specific Insulation Barriers for Miniaturized Galvanically Isolated Power Applications". Micromachines 15, n.º 2 (31 de enero de 2024): 228. http://dx.doi.org/10.3390/mi15020228.

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The paper reports on high voltage (HV)-isolated MEMS quad–solenoid transformers for compact isolated gate drivers and bias power supplies. The component is wafer-level fabricated via a novel MEMS micro-casting technique, where the tightly coupled quad–solenoid chip consists of monolithically integrated 3D inductive coils and an inserted ferrite magnetic core for high-efficiency isolated power transmission through electromagnetic coupling. The proposed HV-isolated transformer demonstrates a high inductance value of 743.2 nH, along with a small DC resistance of only 0.39 Ω in a compact footprint of 6 mm2, making it achieve a very high inductance integration density (123.9 nH/mm2) and the ratio of L/R (1906 nH/Ω). More importantly, with embedded ultra-thick serpentine-shaped (S-shaped) SiO2 isolation barriers that completely separate the primary and secondary windings, an over 2 kV breakdown voltage is obtained. In addition, the HV-isolated transformer chips exhibit a superior power transfer efficiency of over 80% and ultra-high dual-phase saturation current of 1.4 A, thereby covering most practical cases in isolated, integrated bias power supplies such as high-efficiency high-voltage-isolated gate driver solutions.

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17

Chen, Lei, Caihui Zhu, Jiaming Zheng, Jian Qiu, Hui Zhao y Kefu Liu. "A Flexible Solid-State Marx Modulator Module Based on Discrete Magnetic Coupling Drivers". Electronics 12, n.º 18 (10 de septiembre de 2023): 3831. http://dx.doi.org/10.3390/electronics12183831.

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With the increasing and deepening application of high-voltage nanosecond solid-state pulse generators in biological, industrial, and environmental fields, the development of existing pulse generators faces many challenges, such as fixed pulse shapes, the usage of isolated driver power supplies, lower power density, and limited output electrical performance. Hence, a novel high-frequency multilevel nanosecond modular solid-state Marx modulator (SSMM) based on discrete magnetic coupling gate drivers is proposed. The gate voltage of the two MOSFETs can be rapidly synchronized at a high repetition frequency to achieve an amplitude-controlled gate voltage within 100 ns. The feasibility of the driver was verified by PSpice simulation and prototype testing. Moreover, a stackable SSMM module (S2M3) structure is proposed to solve the problem of common-mode interference conducted through the driver, which improves the reusability, scalability, and redundancy of modulators. The characteristic parameters of the developed 14-stage S2M3 are as follows: an output voltage amplitude of 5.45 kV with a 100 ns–50 ms width, a minimum rise time of approximately 18 ns, and a continuous repetition frequency of 100 kHz. S2M3 has the ability to change the pulse shape, and the pulse frequency can reach 2.8 MHz within the burst.

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18

Picun, Gonzalo, Khalil El-Falahi, Christophe Pautrel, Yoann Duse, Nicolas Joubert, Anaud Anotta, Georget Lemoyne et al. "More than Drivers in Motor Drives: Closing the Loop". Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2015, HiTEN (1 de enero de 2015): 000179–88. http://dx.doi.org/10.4071/hiten-session5-paper5_3.

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This paper presents the problematic associated to the design of a complete motor drive, exposing all available and missing blocks at this moment. We proceed by dividing the power drive into basic functions – control, different power supplies, isolated communication, controller interfacing, current monitoring – and we present for each of these functions an implementation example. Implementation examples shown are based on high-temperature X-REL parts such as XTR26020 Isolated Intelligent Gate Driver, XTR40010 Isolated Two Channel Transceiver, XTR30010 PWM Controller, XTR70010 and XTR70020 Low-dropout Linear Regulators and XTR50010 Bidirectional Multichannel Level Translator. A drive solution based on the XTR26020, presented for the first time in this paper, is explained and compared against previous art. Main characteristics of the new linear regulator XTR70020 are presented, showing the best-in-class dropout voltage, which outperforms the closest competitor by a factor of three. For all parts featured, tests results at an ambient temperature up to 230°C (even higher in some cases) are presented.

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19

Rothmund, Daniel, Dominik Bortis y Johann W. Kolar. "Highly Compact Isolated Gate Driver With Ultrafast Overcurrent Protection for 10 kV SiC MOSFETs". CPSS Transactions on Power Electronics and Applications 3, n.º 4 (diciembre de 2018): 278–91. http://dx.doi.org/10.24295/cpsstpea.2018.00028.

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20

Zan, Xin y Al-Thaddeus Avestruz. "Isolated Ultrafast Gate Driver with Variable Duty Cycle for Pulse and VHF Power Electronics". IEEE Transactions on Power Electronics 35, n.º 12 (diciembre de 2020): 12678–85. http://dx.doi.org/10.1109/tpel.2020.2999481.

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21

Wu, Qunfang, Qin Wang, Jinyi Zhu y Xiao Lan. "Dual-Channel Push–Pull Isolated Resonant Gate Driver for High-Frequency ZVS Full-Bridge Converters". IEEE Transactions on Power Electronics 34, n.º 5 (mayo de 2019): 4019–24. http://dx.doi.org/10.1109/tpel.2018.2873192.

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22

Rashmi, Ruchi y Shweta Jagtap. "Design of symmetrical half-bridge converter with a series coupling capacitor". World Journal of Engineering 17, n.º 5 (30 de junio de 2020): 609–20. http://dx.doi.org/10.1108/wje-09-2019-0280.

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Purpose With the advancement of technology, size, cost, and losses of the switched mode power supply (SMPS) have been decreasing. However, due to the high frequency switching, design of magnetic drives and isolation circuits are becoming a crucial factor in SMPS. This paper presents design criteria, procedure and implementation of AC-DC half bridge (HB) converter with lower cost, smaller size and lower voltage stress on the power switch. Design/Methodology/approach The HB converter is designed in a symmetrical mode with a series coupling capacitor. Isolated power supplies are used for the converter and control circuit. Further, a transformer based isolated gate driver is used to drive both MOSFETs. The control IC works in voltage control mode to regulate voltage by controlling the duty cycle of the MOSFETs. Findings Control characteristics and performance of the HB converter is simulated using the MATLAB software and prototype of 170 W HB converter is built to validate the analytical results under variable load current and source voltage. The power quality and variation of load voltage at 2 A, 5 A, 7 A are reported. Originality/value This paper presents the design of a low-cost HB converter in a symmetrical mode which saves the additional cost of symmetric correction circuit normally required in asymmetrical mode design. This paper also focuses on the selection of primary and secondary side switch, series coupling capacitor, commuting diode, isolated drive and charge equalizer resistor.

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23

Naik, B. Satish, S. Shan, L. Umanand y B. Subba Reddy. "A Novel Wide Duty Cycle Range Wide Band High Frequency Isolated Gate Driver for Power Converters". IEEE Transactions on Industry Applications 54, n.º 1 (enero de 2018): 437–46. http://dx.doi.org/10.1109/tia.2017.2764850.

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Lu, Xiaozhuang, Lixing Zhou, Zhanwu Yao y Junhua Qin. "FPGA-Based Implementation of Reverse Electrical Pulse Stress and Measurement system for Gallium Nitride High-Electron-Mobility Transistors". Journal of Physics: Conference Series 2524, n.º 1 (1 de junio de 2023): 012018. http://dx.doi.org/10.1088/1742-6596/2524/1/012018.

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Abstract This paper presents a pulse electrical stress and measurement system of GaN high-electron-mobility transistors based on FPGA to apply the electrical stress accurately in the form of square wave pulses and switch to the measuring state in time. The design processes for the FPGA program, software system, and hardware circuit are discussed. The system uses a bipolar isolated gate driver to apply pulses of electrical stress to the gate of GaN HEMTs. The mode switch circuit is used to switch from “stress mode” to “measuring mode” to realize the measuring of electrical parameters of the device under test after stress. The system can achieve electrical pulse stress and assist in analyzing the degradation mechanism of GaN HEMTs.

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Spataro, Simone, Egidio Ragonese, Nunzio Spina y Giuseppe Palmisano. "A GaN-Integrated Galvanically Isolated Data Link Based on RF Planar Coupling With Voltage Combining for Gate-Driver Applications". IEEE Access 12 (2024): 48530–39. http://dx.doi.org/10.1109/access.2024.3383535.

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Majima, Hideaki, Hiroaki Ishihara, Katsuyuki Ikeuchi, Toshiyuki Ogawa, Yuichi Sawahara, Tatsuhiro Ogawa, Satoshi Takaya, Kohei Onizuka y Osamu Watanabe. "Cascoded GaN half-bridge with 17 MHz wide-band galvanically isolated current sensor". Japanese Journal of Applied Physics 61, SC (21 de febrero de 2022): SC1052. http://dx.doi.org/10.35848/1347-4065/ac4446.

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Abstract A cascoded GaN half-bridge with a wide-band galvanically isolated current sensor is proposed. A 650 V depletion-mode GaN field-effect transistor is switched by a low-propagation-delay gate driver in active-mode. The standby and active modes are switched by a 25 V N-ch laterally diffused MOS (LDMOS). The current sensor uses the LDMOS as a shunt resistor, gm-cell-based sense amplifier and a mixer-based isolation amplifier for wider bandwidth. PVT variations of on-resistance of the current-detecting MOSFET are compensated using a reference MOSFET. A digital calibration loop across the isolation is formed to keep the current sensor gain constant within ± 1.5 % across the whole temperature range. The wide-band current sensor can measure the power device switching current. In this study, a cascoded GaN half-bridge switching and inductor current sensing using low-side and high-side device current are demonstrated. The proposed techniques show the possibility of implementing a GaN half-bridge module with an isolated current sensor in a package.

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Nguyen, The Van, Jean-Christophe Crebier y Pierre-Olivier Jeannin. "Design and Investigation of an Isolated Gate Driver Using CMOS Integrated Circuit and HF Transformer for Interleaved DC/DC Converter". IEEE Transactions on Industry Applications 49, n.º 1 (enero de 2013): 189–97. http://dx.doi.org/10.1109/tia.2012.2229254.

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Ragonese, Egidio, Nunzio Spina, Alessandro Parisi y Giuseppe Palmisano. "An Experimental Comparison of Galvanically Isolated DC-DC Converters: Isolation Technology and Integration Approach". Electronics 10, n.º 10 (15 de mayo de 2021): 1186. http://dx.doi.org/10.3390/electronics10101186.

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This paper reviews state-of-the-art approaches for galvanically isolated DC-DC converters based on radio frequency (RF) micro-transformer coupling. Isolation technology, integration level and fabrication issues are analyzed to highlight the pros and cons of fully integrated (i.e., two chips) and multichip systems-in-package (SiP) implementations. Specifically, two different basic isolation technologies are compared, which exploit thick-oxide integrated and polyimide standalone transformers, respectively. To this aim, previously available results achieved on a fully integrated isolation technology (i.e., thick-oxide integrated transformer) are compared with the experimental performance of a DC-DC converter for 20-V gate driver applications, specifically designed and implemented by exploiting a stand-alone polyimide transformer. The comparison highlights that similar performance in terms of power efficiency can be achieved at lower output power levels (i.e., about 200 mW), while the fully integrated approach is more effective at higher power levels with a better power density. On the other hand, the stand-alone polyimide transformer approach allows higher technology flexibility for the active circuitry while being less expensive and suitable for reinforced isolation.

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Kołodziejski, Wojciech, Jacek Jasielski, Stanisław W. Kuta, Grzegorz Szerszeń y Witold Machowski. "Review and comparison of methods for limiting leakage currents in single-phase transformerless PV inverter topologies". Science, Technology and Innovation 16, n.º 3-4 (31 de marzo de 2023): 1–19. http://dx.doi.org/10.55225/sti.477.

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Transformerless inverters are widely used in different photovoltaic nonisolated ac module applications, mainly in grid-tied photovoltaic (PV) generation systems, due to the benefits of achieving high efficiency over a wide load range, and low cost. Various transformerless inverter topologies have been proposed to meet the safety requirement of low ground leakage currents, such as specified in the VDE-4105 standard and low-output ac-current distortion. Topology modifications of transformerless full bridge inverters are designed to balance and maintain a constant common mode output voltage, thereby eliminating or reducing leakage currents. This article reviews and compares the different methods for limiting leakage currents in known topologies of the full-bridge transformerless inverters, such as: H4, H5, H6, HERIC, and their improvements. The main topologies and strategies used to reduce the leakage current in transformerless schemes are summarized, highlighting advantages and disadvantages and establishing points of comparison with similar topologies. To compare the properties of different medium to high power inverters, PV inverter topologies were implemented using IGBTs and tested with the same components, same simulation parameters in PSPICE to evaluate their performance in terms of energy efficiency and leakage current characteristics. The detailed power stage operating principles, extended PWM modulator, and integrated universal gate driver with galvanic isolation in the transmission path of control signal for all IGBTs of the inverter, as well isolated and floating bias power supply for gate drivers are described.

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Hong, Kuo-Bin, Chun-Yen Peng, Wei-Cheng Lin, Kuan-Lun Chen, Shih-Chen Chen, Hao-Chung Kuo, Edward Yi Chang y Chun-Hsiung Lin. "Thermal Analysis of Flip-Chip Bonding Designs for GaN Power HEMTs with an On-Chip Heat-Spreading Layer". Micromachines 14, n.º 3 (23 de febrero de 2023): 519. http://dx.doi.org/10.3390/mi14030519.

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In this work, we demonstrated the thermal analysis of different flip-chip bonding designs for high power GaN HEMT developed for power electronics applications, such as power converters or photonic driver applications, with large gate periphery and chip size, as well as an Au metal heat-spreading layer deposited on top of a planarized dielectric/passivation layer above the active region. The Au bump patterns can be designed with high flexibility to provide more efficient heat dissipation from the large GaN HEMT chips to an AlN package substrate heat sink with no constraint in the alignment between the HEMT cells and the thermal conduction bumps. Steady-state thermal simulations were conducted to study the channel temperatures of GaN HEMTs with various Au bump patterns at different levels of current and voltage loadings, and the results were compared with the conventional face-up GaN die bonding on an AlN package substrate. The simulations were started from a single finger isolated HEMT cell and then extended to multiple fingers HEMT cells (total gate width > 40 mm) to investigate the “thermal cross-talk” effect from neighboring devices. Thermal analysis of the GaN HEMT under pulse operation was also performed to better reflect the actual conditions in power conversion or pulsed laser driver applications. Our analysis provides a combinational assessment of power GaN HEMT dies under a working condition (e.g., 1MHz, 25% duty cycle) with different flip chip packaging schemes. The analysis indicated that the channel temperature rise (∆T) of a HEMT cell in operation can be reduced by 44~46% by changing from face-up die bonding to a flip-chip bonding scheme with an optimized bump pattern design.

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31

Jeng, Shyr-Long, Chih-Chiang Wu y Wei-Hua Chieng. "Gallium Nitride Electrical Characteristics Extraction and Uniformity Sorting". Journal of Nanomaterials 2015 (2015): 1–15. http://dx.doi.org/10.1155/2015/478375.

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This study examined the output electrical characteristics—current-voltage (I-V) output, threshold voltage, and parasitic capacitance—of novel gallium nitride (GaN) power transistors. Experimental measurements revealed that both enhanced- and depletion-mode GaN field-effect transistors (FETs) containing different components of identical specifications yielded varied turn-off impedance; hence, the FET quality was inconsistent. Establishing standardized electrical measurements can provide necessary information for designers, and measuring transistor electrical characteristics establishes its equivalent-circuit model for circuit simulations. Moreover, high power output requires multiple parallel power transistors, and sorting the difference between similar electrical characteristics is critical in a power system. An isolated gate driver detection method is proposed for sorting the uniformity from the option of the turn-off characteristic. In addition, an equivalent-circuit model for GaN FETs is established on the basis of the measured electrical characteristics and verified experimentally.

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32

Thakre, Kishor, Kanungo Barada Mohanty, Vinaya Sagar Kommukuri y Aditi Chatterjee. "New Topology for Asymmetrical Multilevel Inverter: An Effort to Reduced Device Count". Journal of Circuits, Systems and Computers 27, n.º 04 (6 de diciembre de 2017): 1850055. http://dx.doi.org/10.1142/s021812661850055x.

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Nowadays, multilevel inverters (MLI) are receiving remarkable attention due to salient features like less voltage stress on switches and low total harmonic distortion (THD) in output voltage. However, the required switch count increases with number of voltage levels. This paper presents a new topology for asymmetric multilevel inverter as a fundamental block. Each block generates 13-level output voltage using eight switches and four unequal dc voltage sources. The proposed configuration offers special features such as reduced number of switches, isolated dc sources, cost economy, less complex and modular structure than other similar contemporary topologies. Moreover, significant reduction in voltage stress on the circuit switches can be achieved. Comparative studies of proposed topology with the conventional and recent topologies have been presented in terms of power switches, gate driver circuit requirement, isolated dc voltage sources and total standing voltage. Multicarrier-based sinusoidal pulse width modulation (SPWM) scheme is adopted for generating switching signals using dSPACE real-time controller. In addition, proposed topology offers a fewer number of ON-state switches that lead to reduction in power loss. The proposed topology is validated through simulation and experimental implementation.

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Prathaban, Arumbu Venkadasamy, Karthikeyan Dhandapani y Ahamed Ibrahim Soni Abubakar. "Compact Thirteen-Level Inverter for PV Applications". Energies 15, n.º 8 (12 de abril de 2022): 2808. http://dx.doi.org/10.3390/en15082808.

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In renewable energy source applications, multilevel inverters with lower power components have become more popular in recent decades. This work exhibits a novel topology for high-quality output in PV applications, along with low-power switches and isolated dc sources. The core module of the suggested design may create a 13-level output waveform with two unequal voltage source values. The cascaded structure is intended to boost the voltage levels, and the related parameters are obtained analytically. The even and odd levels of voltage can be created natively without the usage of an additional H bridge circuit. Furthermore, the switches, gate driver circuits, dc sources, and standing voltage are fewer in number when compared to other recent topologies. Power losses and cost comparisons are calculated and given in monetary terms. This new research supports the idea that nearest level control (NLC) is used as a modulation scheme in the simulation modeling and experimental validation of the proposed topology.

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Wu, Chih-Chiang, Ching-Yao Liu, Guo-Bin Wang, Yueh-Tsung Shieh, Wei-Hua Chieng y Edward-Yi Chang. "A New GaN-Based Device, P-Cascode GaN HEMT, and Its Synchronous Buck Converter Circuit Realization". Energies 14, n.º 12 (11 de junio de 2021): 3477. http://dx.doi.org/10.3390/en14123477.

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This paper attempts to disclose a new GaN-based device, called the P-Cascode GaN HEMT, which uses only a single gate driver to control both the D-mode GaN and PMOS transistors. The merit of this synchronous buck converter is that it can reduce the circuit complexity of the synchronous buck converter, which is widely used to provide non-isolated power for low-voltage and high-current supply to system chips; therefore, the power conversion efficiency of the converter can be improved. In addition, the high side switch using a single D-mode GaN HEMT, which has no body diode, can prevent the bi-directional flow and thus reduce the power loss and cost compared to a design based on a series of two opposite MOSFETs. The experiment shows that the proposed P-Cascode GaN HEMT efficiency is above 98% when it operates at 500 kHz with 6 W output. With the input voltage at 12 V, the synchronous buck converter provides an adjustable regulated output voltage from 1.2 V to 10 V while delivering a maximum output current of 2 A.

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35

Mohanty, Kanungo Barada, Kishor Thakre, Aditi Chatterjee, Ashwini Kumar Nayak y Vinaya Sagar Kommukuri. "Reduction in components using modified topology for asymmetrical multilevel inverter". World Journal of Engineering 16, n.º 1 (11 de febrero de 2019): 71–77. http://dx.doi.org/10.1108/wje-01-2017-0010.

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Purpose This study aims to propose a modified topology for an asymmetric multilevel inverter as a basic module that generates 13-level output voltage waveform. The basic module consists of eight switches (unidirectional and bidirectional switch) and four DC voltage sources with unequal magnitudes. The proposed topology reduces the number of switches, isolated DC sources, cost and size of the circuit significantly as compared to other topologies. In addition, the proposed circuit provides a modular structure for a multilevel inverter. Design/methodology/approach The proposed configuration is implemented through simulation and hardware development of a single-phase 13-level inverter prototype. A multicarrier-based pulse width modulation scheme is adopted for generating switching signals by using dSPACE real-time controller. Findings To demonstrate the advantages of the proposed configuration, a comparative analysis is carried out with other multilevel topologies in terms of number of switches, gate driver circuits, on-state switches and blocking voltage on the switches. The comparison results confirmed that the proposed configuration requires less number of components for the same number of voltage levels. Moreover, the peak inverse voltage on switches and losses is lower in the proposed configuration. Originality/value In the available literature, numerous topologies are presented with main emphasis on the reduced components count. In this study, the authors proposed a new topology for an asymmetrical source configuration. The performance of the proposed topology under steady-state and dynamic conditions is evaluated using simulation and experimental implementation.

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36

Jasielski, Jacek y Stanisław Kuta. "Applied methods of power supply and galvanic isolation of gate drivers of power transistors in bridging end stages of Class D amplifiers and inverters". Science, Technology and Innovation 2, n.º 1 (28 de junio de 2018): 31–41. http://dx.doi.org/10.5604/01.3001.0012.1413.

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Various methods used for a floating high-side gate drive power supply and galvanic isolation of the Class-D amplifiers and different DC-AC or DC-DC converters have been reviewed and evaluated in the paper. On the basis of the literature, the bootstrap floating supply and self-boost charge pump topology for a gate drive high-side power supply, as well as control signal isolated systems with optically-isolated signals or with capacitive signal isolation have been described and compared. New topologies of the Class-BD amplifiers with Common-Mode (CM) free outputs using PSC PWM - Phase Shifted Carrier Pulse Width presented in the paper, shows that almost all gate drivers of the output stage transistors require floating power supply and galvanic isolation of the control signals. In the case of such circuits with multi-level PWM output, the most reliable and robust method for the floating gate drive power supply and galvanic isolation is self-boost charge pump topology with capacitive control signal isolation. Correct operation of the output stage of the proposed Class-BD amplifiers as well as the PWM modulator and self-boost charge pump topologies with capacitive control signal isolation have been verified using intensive Pspice simulation.

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37

Pathak, Medha, Lisa Kurtz, Francesco Tombola y Ehud Isacoff. "The Cooperative Voltage Sensor Motion that Gates a Potassium Channel". Journal of General Physiology 125, n.º 1 (28 de diciembre de 2004): 57–69. http://dx.doi.org/10.1085/jgp.200409197.

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The four arginine-rich S4 helices of a voltage-gated channel move outward through the membrane in response to depolarization, opening and closing gates to generate a transient ionic current. Coupling of voltage sensing to gating was originally thought to operate with the S4s moving independently from an inward/resting to an outward/activated conformation, so that when all four S4s are activated, the gates are driven to open or closed. However, S4 has also been found to influence the cooperative opening step (Smith-Maxwell et al., 1998a), suggesting a more complex mechanism of coupling. Using fluorescence to monitor structural rearrangements in a Shaker channel mutant, the ILT channel (Ledwell and Aldrich, 1999), that energetically isolates the steps of activation from the cooperative opening step, we find that opening is accompanied by a previously unknown and cooperative movement of S4. This gating motion of S4 appears to be coupled to the internal S6 gate and to two forms of slow inactivation. Our results suggest that S4 plays a direct role in gating. While large transmembrane rearrangements of S4 may be required to unlock the gating machinery, as proposed before, it appears to be the gating motion of S4 that drives the gates to open and close.

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38

Peracchia, Camillo y Lillian Mae Leverone Peracchia. "Calmodulin-Connexin Partnership in Gap Junction Channel Regulation-Calmodulin-Cork Gating Model". International Journal of Molecular Sciences 22, n.º 23 (2 de diciembre de 2021): 13055. http://dx.doi.org/10.3390/ijms222313055.

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In the past four decades numerous findings have indicated that gap junction channel gating is mediated by intracellular calcium concentrations ([Ca2+i]) in the high nanomolar range via calmodulin (CaM). We have proposed a CaM-based gating model based on evidence for a direct CaM role in gating. This model is based on the following: CaM inhibitors and the inhibition of CaM expression to prevent chemical gating. A CaM mutant with higher Ca2+ sensitivity greatly increases gating sensitivity. CaM co-localizes with connexins. Connexins have high-affinity CaM-binding sites. Connexin mutants paired to wild type connexins have a higher gating sensitivity, which is eliminated by the inhibition of CaM expression. Repeated trans-junctional voltage (Vj) pulses progressively close channels by the chemical/slow gate (CaM’s N-lobe). At the single channel level, the gate closes and opens slowly with on-off fluctuations. Internally perfused crayfish axons lose gating competency but recover it by the addition of Ca-CaM to the internal perfusion solution. X-ray diffraction data demonstrate that isolated gap junctions are gated at the cytoplasmic end by a particle of the size of a CaM lobe. We have proposed two types of CaM-driven gating: “Ca-CaM-Cork” and “CaM-Cork”. In the first, the gating involves Ca2+-induced CaM activation. In the second, the gating occurs without a [Ca2+]i rise.

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39

Petruhanov, Vadim N. y Alexander N. Pechen. "Quantum Control Landscapes for Generation of H and T Gates in an Open Qubit with Both Coherent and Environmental Drive". Photonics 10, n.º 11 (27 de octubre de 2023): 1200. http://dx.doi.org/10.3390/photonics10111200.

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An important problem in quantum computation is the generation of single-qubit quantum gates such as Hadamard (H) and π/8 (T) gates, which are components of a universal set of gates. Qubits in experimental realizations of quantum computing devices are interacting with their environment. While the environment is often considered as an obstacle leading to a decrease in the gate fidelity, in some cases, it can be used as a resource. Here, we consider the problem of the optimal generation of H and T gates using coherent control and the environment as a resource acting on the qubit via incoherent control. For this problem, we studied the quantum control landscape, which represents the behavior of the infidelity as a functional of the controls. We considered three landscapes, with infidelities defined by steering between two, three (via Goerz–Reich–Koch approach), and four matrices in the qubit Hilbert space. We observed that, for the H gate, which is a Clifford gate, for all three infidelities, the distributions of minimal values obtained with a gradient search have a simple form with just one peak. However, for the T gate, which is a non-Clifford gate, the situation is surprisingly different—this distribution for the infidelity defined by two matrices also has one peak, whereas distributions for the infidelities defined by three and four matrices have two peaks, which might indicate the possible existence of two isolated minima in the control landscape. It is important that, among these three infidelities, only those defined with three and four matrices guarantee the closeness of the generated gate to a target and can be used as a good measure of closeness. We studied sets of optimized solutions for the most general and previously unexplored case of coherent and incoherent controls acting together and discovered that they form sub-manifolds in the control space, and unexpectedly, in some cases, two isolated sub-manifolds.

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40

Hui, S. Y., S. C. Tang y Henry Shu-Hung Chung. "Optimal operation of coreless PCB transformer-isolated gate drive circuits with wide switching frequency range". IEEE Transactions on Power Electronics 14, n.º 3 (mayo de 1999): 506–14. http://dx.doi.org/10.1109/63.761694.

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41

Peracchia, C. y S. J. Girsch. "Functional modulation of cell coupling: evidence for a calmodulin-driven channel gate". American Journal of Physiology-Heart and Circulatory Physiology 248, n.º 6 (1 de junio de 1985): H765—H782. http://dx.doi.org/10.1152/ajpheart.1985.248.6.h765.

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Much of the capacity of tissues to respond to signals as well integrated systems is due to the existence of direct cell-to-cell communication pathways. This type of communication, usually referred to as cell coupling, is based on the presence of cell-to-cell channels permeable to ions, metabolites, and regulatory compounds. The cell-to-cell channels are located at specialized regions of cell contact known as gap junctions or communicating junctions. An important aspect of cell coupling is channel permeability modulation. In recent years this feature of cell coupling has received a great deal of attention, most efforts being aimed at identifying uncoupling treatments and uncoupling agents and at determining the elements of the channel gating mechanism. This review focuses on recent studies suggesting the participation of calmodulin-like proteins in channel gating and on the application of in vitro approaches to cell coupling research-the study of permeability and gating of cell-to-cell channels incorporated into liposomes and the determination of conformational changes in isolated channel protein.

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42

Hu, Bo Xue, He Li, Zhuo Wei, Ya Feng Wang, Diang Xing, Ri Sha Na y Jin Wang. "An Auxiliary Power Supply for Gate Drive of Medium Voltage SiC Devices in High Voltage Applications". Materials Science Forum 924 (junio de 2018): 836–40. http://dx.doi.org/10.4028/www.scientific.net/msf.924.836.

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A high-reliability auxiliary power supply (APS) for gate drive circuits is crucial to utilization of emerging medium voltage (MV ≥ 10 kV) Silicon Carbide (SiC) devices in high voltage applications. This paper proposes an active voltage divider based APS with lower arm voltage regulation. The proposed APS circuit is targeting the application of MV SiC devices in modular multilevel converters (MMCs). It can harvest energy from a MV (≥ 7 kV) dc bus to provide an isolated low voltage output to gate drive circuits of MV SiC devices. Compared to existing APS solutions, it can achieve a high input voltage (≥ 7 kV) with simple circuit structure and control scheme. In this paper, the working principle of the proposed APS is presented and a circuit design example is shown. A circuit prototype with 7 kV input and 15 V/10 W output has been built and tested to verify the effectiveness of the proposed solution.

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Spro, Ole Christian, Pierre Lefranc, Sanghyeon Park, Juan M. Rivas-Davila, Dimosthenis Peftitsis, Ole-Morten Midtgard y Tore Undeland. "Optimized Design of Multi-MHz Frequency Isolated Auxiliary Power Supply for Gate Drivers in Medium-Voltage Converters". IEEE Transactions on Power Electronics 35, n.º 9 (septiembre de 2020): 9494–509. http://dx.doi.org/10.1109/tpel.2020.2972977.

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44

USLU-OZKUCUK, Gonca. "TRIAC Based Isolated AC Load Drive Equivalent Circuit Design of Solid-State Relay". Eurasia Proceedings of Science Technology Engineering and Mathematics 26 (30 de diciembre de 2023): 183–89. http://dx.doi.org/10.55549/epstem.1409469.

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Electronic main boards generally provide the supply and control functions of a system. All electronic main boards include inputs and outputs and are designed according to the design requirements. In this study, a safe and low-cost switching mode power supply (SMPS) board is designed using a flyback converter topology to drive the AC and DC outputs. The triode for alternating current (TRIAC)-based safe and low-cost main board includes a flyback configured transformer with additional winding for driving the TRIAC as an AC output switch in noise immune quadrants II and III. TRIAC is used to switch AC outputs instead of a relay, and the isolation distances of the safety criteria are provided by an optocoupler. In this way, the relay usage is over, and one TRIAC and one optocoupler do the same work that is done by one relay. In this way, the cost of the AC output switch decreases. In addition, the number of AC switches covering the area on the printed-circuit board (PCB) of the mainboard decreases. The flyback topology is designed with half-wave rectified and the transformer is designed with extra winding for producing negative voltage with respect to primer reference for providing negative gate current of TRIAC. TRIAC-based AC output switched, safe, and low-cost main boards can be used for white good main boards, automation (PLC) applications, and automotive electronic control systems. This study provides cost-effective solutions in these areas.

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45

Hernández-García, C., T. Popmintchev, M. M. Murnane, H. C. Kapteyn, L. Plaja, A. Becker y A. Jaron-Becker. "Isolated broadband attosecond pulse generation with near- and mid-infrared driver pulses via time-gated phase matching". Optics Express 25, n.º 10 (11 de mayo de 2017): 11855. http://dx.doi.org/10.1364/oe.25.011855.

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Choudhury, Subhashree, Mohit Bajaj, Taraprasanna Dash, Salah Kamel y Francisco Jurado. "Multilevel Inverter: A Survey on Classical and Advanced Topologies, Control Schemes, Applications to Power System and Future Prospects". Energies 14, n.º 18 (13 de septiembre de 2021): 5773. http://dx.doi.org/10.3390/en14185773.

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In recent years, multilevel inverters (MLIs) have emerged to be the most empowered power transformation technology for numerous operations such as renewable energy resources (RERs), flexible AC transmission systems (FACTS), electric motor drives, etc. MLI has gained popularity in medium- to high-power operations because of numerous merits such as minimum harmonic contents, less dissipation of power from power electronic switches, and less electromagnetic interference (EMI) at the receiving end. The MLI possesses many essential advantages in comparison to a conventional two-level inverter, such as voltage profile enhancement, increased efficiency of the overall system, the capability of high-quality output generation with the reduced switching frequency, decreased total harmonic distortions (THD) without reducing the power of the inverter and use of very low ratings of the device. Although classical MLIs find their use in various vital key areas, newer MLI configurations have an expanding concern to the limited count of power electronic devices, gate drivers, and isolated DC sources. In this review article, an attempt has been made to focus on various aspects of MLIs such as different configurations, modulation techniques, the concept of new reduced switch count MLI topologies, applications regarding interface with renewable energy, motor drives, and FACTS controller. Further, deep insights for future prospective towards hassle-free addition of MLI technology towards more enhanced application for various fields of the power system have also been discussed. This article is believed to be extremely helpful for academics, researchers, and industrialists working in the direction of MLI technology.

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47

Díaz-Martín, Cristian, Eladio Durán, Salvador P. Litrán, José Luis Álvarez y Jorge Semião. "Single-Switch Non-Isolated Resonant DC-DC Converter for Single-Input Dual-Output Applications". Applied Sciences 13, n.º 15 (30 de julio de 2023): 8798. http://dx.doi.org/10.3390/app13158798.

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This paper describes a new configuration of Cuk and SEPIC (Single-Ended Primary Converter) ZVS-QR (zero-voltage switching quasi-resonant) combination DC-DC converter for bipolar output with a single switch. The proposed topology employs a single ground-referenced power switch, which simplifies the gate drive design with a single L-C resonant network and provides a bipolar output voltage with good regulation, acceptable efficiency and a step-down/up conversion ratio. This configuration provides dual-output voltage by switching the power switch to zero voltage, which is an interesting alternative for many applications where small size, light weight and high power density are very important aspects. In order to verify its performance, a SEPIC–Cuk Combination ZVS-QR prototype with a cost-effective commercial resonant controller was designed and tested. The experimental results show that the proposed combined topology is suitable for Single-Input Dual-Output (SIDO) applications.

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48

Hitzemann, Moritz, Martin Lippmann, Jonas Trachte, Alexander Nitschke, Olaf Burckhardt y Stefan Zimmermann. "Wireless Low-Power Transfer for Galvanically Isolated High-Voltage Applications". Electronics 11, n.º 6 (16 de marzo de 2022): 923. http://dx.doi.org/10.3390/electronics11060923.

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For various applications, such as gate drivers for transistors, wireless chargers for mobile devices and cars, and isolated measurement equipment, an isolated DC power supply for electronic components is required. In this work, a new concept for an isolated power supply with insulation strength of 50 kV and power transmission of up to 60 W to supply measurement equipment with 12 or 24 V is presented. Furthermore, high overall efficiency of 82.5% at 55 W is achieved. Feasibility is demonstrated in a real application powering data acquisition electronics at high reference potential. Our new concept uses a coreless printed circuit board (PCB) transformer (15 cm × 10 cm × 4 cm and a weight of 480 g) designed for maximum efficiency via a coil layout and close proximity of adjacent coils on one PCB while reaching high isolation strength via the PCB material and potted coils. To increase efficiency, we investigated different coil geometries at different frequencies. A low-cost design consisting of two Qi charging coils mounted on one PCB is compared with our integrated PCB transformers manufactured from a four-layer PCB with ferrites applied on the outside. With this new design, high isolation voltages are possible while reaching high transformer efficiency of up to 90%.

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Bhattacharya, Shilpi, Prabal Deb, Sujit K. Biswas y Ambarnath Banerjee. "Open-Delta VSC Based Voltage Controller in Isolated Power Systems". International Journal of Power Electronics and Drive Systems (IJPEDS) 6, n.º 2 (1 de junio de 2015): 376. http://dx.doi.org/10.11591/ijpeds.v6.i2.pp376-386.

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<p>This paper proposes a reduced switch Open-Delta (OD-VSC) voltage controller for an standalone asynchronous generator (SAG), also known as the self-excited induction generator (SEIG),used in constant power applications such as pico hydro uncontrolled turbine driven isolated induction generator (IAG) for feeding three-phase loads. The proposed reduced switch voltage controller is used to regulate and control the generator terminal voltage as it is subjected to voltage drops, dips or flickers when the isolated power system is subjected to various critical loads. Generally this purpose is carried out by a STATCOM comprising of a three-leg six-switch inverter structure. Here, in this work the DSTATCOM is realized using a three-leg four-switch insulated gate bipolar transistor (IGBT)-based current controlled voltage-sourced converter (CC-VSC) and a self-supporting dc bus containing two split capacitors. The proposed generating system along with the controller is modeled and simulated in MATLAB along with Simulink and power system blockset (PSB) toolboxes. The system is simulated and the capability of the isolated generating system along with the reduced switch based voltage controller is presented here where the generator feeds linear and non-linear loads are investigated.</p>

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50

Li, Meiye, Meiying Li, Xiaoxia Hu y Ge Li. "Research on Anomie Behavior of Drivers on Non-physical Isolated Urban Road Based on Game Theory". MATEC Web of Conferences 259 (2019): 03004. http://dx.doi.org/10.1051/matecconf/201925903004.

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In order to overtake motor vehicles ahead, some motor vehicles tend to enter non-motorized lane illegally on non-physical isolated urban road, which cause a negative influence on non-motor vehicles. In this paper, this anomie behavior is studied by headway distribution function, fluid dynamics model and game theory. Utilize headway distribution function to calculate the probability of critical gap required for motor vehicles entering non- motorized lanes, and fluid mechanics model to analysis delay. After that, considering critical gap, delay, management expense and fine for anomie behavior, the time value functions of drivers and cyclists are established and regarded as the payment functions in mixed strategy Nash equilibrium. Finally, according to the result of Nash equilibrium, two optimal probability models are put forward. Under different circumstances of non-motor vehicle flow, motor vehicle speed, management expense and fine for anomie behavior, the first model quantified the optimal probability that drivers commit anomie behavior and the second model quantified the optimal probability that traffic department implements management. Furthermore, models can provide references for the management of anomie behavior on non-physical isolated urban road.

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