Tesis sobre el tema "ICS"
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Sepúlveda, S. Diego. "ICS: — Industrias Creativas Santiago". Tesis, Universidad de Chile, 2012. http://repositorio.uchile.cl/handle/2250/100417.
Texto completoKwon, Dongwon. "Piezoelectric kinetic energy-harvesting ics". Diss., Georgia Institute of Technology, 2013. http://hdl.handle.net/1853/47571.
Texto completoВолотка, В. С. "Analysis of reability of ics states". Thesis, ANALYSIS OF REABILITY OF ICS STATES, 2014. http://openarchive.nure.ua/handle/document/2082.
Texto completoMonzer, Mohamad-Houssein. "Model-based IDS design pour ICS". Thesis, Université Grenoble Alpes, 2020. http://www.theses.fr/2020GRALT056.
Texto completoIndustrial systems present security risks related to their IT vulnerabilities. These systems, spread over the world, continue to be targets of attacks. While Industrial systems share common vulnerabilities with IT systems, they tend to have more constraints due to the interaction between cyber and physical systems.Intrusion detection systems give visibility to the system and are considered as one of the solutions to detect targeting attacks. Hence, it seems relevant to rely on a physical model of the cyber-physical system to obtain an intrusion detection system (IDS) for industrial systems. Most IDSs are based on rules that define how possible attacks are detected. These rules are generally used to either describe possible attack scenarios on the systems or used to describe the normal system behavior of the system. However, manually creating and maintaining rules for a complex system can prove to be a very tedious and difficult task.This thesis proposes a solution to model ICS and to design specific IDS for industrial systems. A model-based IDS rule generator is also proposed, which converts a system model into anomaly-based IDS rules. Finally, the effectiveness of the generated rules is evaluated
Sidor, Peter. "Návrh infrastruktury ICS pro průmyslový podnik". Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2017. http://www.nusl.cz/ntk/nusl-316693.
Texto completoCEFFA, NICOLÒ GIOVANNI. "MICROFLUIDIC FLOW MAPPING WITH SPIM-ICS". Doctoral thesis, Università degli Studi di Milano-Bicocca, 2018. http://hdl.handle.net/10281/198978.
Texto completoMy goal was to perform space and time mapping of blood flow in biological samples (Zebrafish embryos), being able to collect wide images (hundreds of microns), but still resolving them at a μm level; moreover hemodynamics is a fast process, that requires very high frequency sampling (tens to hundreds of Hz) in order to be resolved. The general biological motivation is that the progression of a wide number of diseases is affected directly by the blood circulation (an important example is cancer and its metastases), so that I want to devise an test methods to quantitatively map blood flow in different conditions, both for diagnosis and study of pathologies evolution . The approach I followed in my work is to employ Light Sheet Fluorescence Microscopy (LSFM) technique (also known as Selective-Plane Illumination Microscopy, SPIM) and a fast-acquisition, high efficiency camera, in order to achieve the minimum spatio-temporal resolution required (microns in space, 4ms in time). Acting on illumination profile, it is in fact possible to engineer a sheet of light to select just a thin (μm size) slice of the sample, so that fluorescence signals coming from just that plane can be measured in a 90° collection geometry. The CCD camera employed is an EMCCD, fabricated with a very advanced technology, capable of extremely high efficiency detection (quantum efficiency up to 95%), thus allowing very fast acquisition speeds. The last step was to fabricate samples and sample holder specifically designed to work with SPIM geometry, to achieve high transparency. Much work has been devoted to the study and manipulation of cross-correlation based algorithms, employed to retrieve flow parameters: being based on noise analysis, it is capable of excellent performances even in the most intricate biological situation I tried to investigate. The description of theoretical and practical aspects of my setup is the core of Chapter 2: I describe Single Plane Illumination Microscopy, focusing on a Physical Optics description of illumination and detection profiles. Then I will describe the practical implementation of two microscopes, one for in-vitro and one for in-vivo testing, showing an experimental evaluation of useful parameter derived in the previous section. The second part of the chapter is dedicated to the analysis of Cross-Correlation methods, providing both a solid presentation of all the techniques employed for image analysis, and also serving as an introduction for chapter 6, where an extension of these methods will be presented. Finally I will cover basic fluid dynamics to introduce a simple lumped circuit model, deriving the fundamental equation (Poiseuille flow in square channels) employed to describe in-vitro flows. Chapter 3 will describe material and methods, dealing with PDMS based microstructures, liposomes fabrication, and Zebrafish embryos description. In Chapter 4 I will summarize the results of the study of both in-vitro and in-vivo time-varying flows. Here I show a a first powerful application of temporal cross-correlation techniques coupled with large field of view images, which allows high resolution (both in time and space) mapping of flows. In Chapter 5 I will present related investigations, based on Image spatio-temporal correlations, in which I focused on in-vivo hemodynamics, in particular mapping blood flow in branched vessels in zebrafish embryos. Chapter 6 focuses on the most recent part of my work, that is to explore a way to break the "plane restriction" that seems to be intrinsically present when employing SPIM based microscopy. I will show that correlative methods can be extended allowing to retrieve 3D flow information, without any change in the hardware, as happens, for example, in optical tomography or micro-PIV. Finally Chapter 7 is dedicated to conclusions and future outlook.
Grosch, Eva. "Funktionelle Magnetresonanztomographie (MRT) und klinischer ICS-Score". Diss., lmu, 2004. http://nbn-resolving.de/urn:nbn:de:bvb:19-31778.
Texto completoPanth, Shreepad Amar. "Physical design methodologies for monolithic 3D ICs". Diss., Georgia Institute of Technology, 2015. http://hdl.handle.net/1853/53542.
Texto completoVáňa, Martin. "Kybernetické prostředí pro systémy typu ICS/SCADA". Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2019. http://www.nusl.cz/ntk/nusl-400894.
Texto completoSchenkel, Michael. "Substrate current effects in smart power ICs". [S.l. : s.n.], 2003. http://e-collection.ethbib.ethz.ch/ecol-pool/diss/fulltext/eth14925.pdf.
Texto completoÁvila, Eliana de Souza. "A poet(h)ics of intercultural dissonance". Florianópolis, SC, 2002. http://repositorio.ufsc.br/xmlui/handle/123456789/82531.
Texto completoMade available in DSpace on 2012-10-19T15:54:42Z (GMT). No. of bitstreams: 1 197661.pdf: 24376555 bytes, checksum: d64a0778d8a12b5e9970b8d70188540b (MD5)
Análise da poética intercultural de Elizabeth Bishop, elaborando uma percepção expansiva de dissonância ou choque cultural, que problematiza os próprios termos através dos quais o pensamento antitético reduz a realidade experiencial. Demonstra inter-relações entre os textos teórico-críticos de Bishop, que engajam sua crise com a concepção linear do tempo narrativo, e a concepção de 'dissonância emancipatória' ou atonal elaborada por Arnold Schöenberg. Demonstra que os mapeamentos de dissonância cultural feitos por Bishop no Brasil desafiam seus próprios modelos esteticistas e solucionistas (lineares, teleológicas) de representação (especificamente, os modelos de transculturalismo e autenticismo), ao se recusarem a resolver a alteridade (do outro e do eu) na uniformidade (consonância), ou mesmo a dissolver seus conflitos, fixando a alteridade num 'passado atemporal' (sic), primitivizado. Examina a crise (a crítica) textual de consciência social e de gênero no corpus brasileiro de Bishop, argumentando que ele se torna valioso justamente porque a autora fracassa, e de modo perturbador, em realizar seu projeto de produzir resolução sobre suas percepções dissonantes da realidade. Engaja uma política irredutível ou ética de leitura que recusa reduzir o texto intercultural de Bishop a seus discursos solipsistas, pelos quais até mesmo atos aparentemente democráticos convergem dissimuladamente com dinâmicas totalitárias.
Salah, Ben Romdhane Mohamed. "Design synthesis of application-specification ICs for DSP". Diss., Georgia Institute of Technology, 1995. http://hdl.handle.net/1853/15392.
Texto completoDavis, Robert Brent. "The law and econom(etr)ics of corruption". Thesis, The University of Sydney, 2014. http://hdl.handle.net/2123/13372.
Texto completoHehemann, Ingo. "Schnelle optoelektronische ICs für sichtbares Licht in CMOS-Technologie". [S.l. : s.n.], 2004. http://deposit.ddb.de/cgi-bin/dokserv?idn=971485003.
Texto completoMoradi, Monfared Sahar. "Dynamical models for the Ion Channel Switch (ICS) biosensor". Thesis, University of British Columbia, 2010. http://hdl.handle.net/2429/27805.
Texto completoLee, Young-Joon. "CAD methodologies for low power and reliable 3D ICs". Diss., Georgia Institute of Technology, 2013. http://hdl.handle.net/1853/47635.
Texto completoJung, Moongon. "Low power and reliable design methodologies for 3D ICs". Diss., Georgia Institute of Technology, 2014. http://hdl.handle.net/1853/51824.
Texto completoGibson, David A., Newton B. Penrose y Ralph B. Jr Wade. "HSTSS-DAC CUSTOM ICS IMPACT ON 2.75" MISSILE TELEMETRY". International Foundation for Telemetering, 1999. http://hdl.handle.net/10150/608742.
Texto completoWe analyze several telemetry data acquisition systems to gage the system impact of denser custom ICs being developed under the HSTSS-DAC project. Our baseline is a telemetry system recently developed at Eglin AFB to support 16 analog input channels, signal conditioning and encoding for Pulse Code Modulation (PCM) using Commercial Off-the- Shelf (COTS) ICs. The data acquisition portion of the system occupies three double-sided, round circuit cards, each 2.3" in diameter. A comparable system using HSTSS-DAC custom Ics will occupy only one side of one card - a factor of six-volume reduction compared to the COTS approach.
Aymerich, Gubern Joan. "Low-power read-out ICs for smart electrochemical sensors". Doctoral thesis, Universitat Politècnica de Catalunya, 2021. http://hdl.handle.net/10803/671918.
Texto completoEn els últims anys s’ha produït una ràpida expansió dels sensors electroquímics en comparació amb altres tecnologies químiques de sensat gràcies al seu potencial per generar dispositius analítics precisos, selectius, miniaturitzats i econòmics. Aquestes característiques satisfan l’actual creixent demanda de sistemes de sensat d’un sol ús, on la usabilitat, la portabilitat i el preu són els factors més importants, permetent detectar evidència analítica per qualsevol persona, en qualsevol lloc i en qualsevol moment, sense limitacions en termes de calibratge o de temps de vida útil. En particular, un dispositiu electroquímic ha d’incloure una interfície electrònica intel·ligent aparellada per estimular específicament la cèl·lula electroquímica, adquirir senyals, realitzar la conversió de dades i comunicar les mesures a través d’una interfície digital estàndard, tot sota restriccions severes de mida, cost i potencia consumida. Aquesta tesi descriu el desenvolupament d’una nova plataforma de detecció electroquímica, econòmica, d’un sol ús, d’alt rendiment i fàcil d’utilitzar, que combina la intel·ligència de circuits integrats CMOS amb la flexibilitat de l’electrònica impresa. Es presenten dues realitzacions de circuits integrats de lectura en tecnologies CMOS de65-nm i 0.18-µmamb un consum de l’ordre de µW, específicament optimitzades per ala polarització potenciostàtica i la lectura amperometria de sensors electroquímics. Les interfícies proposades ofereixen implementacions CMOS molt elegants i compactes, ja que reutilitzen les propietats dinàmiques del mateix sensor per implementar moduladors Delta-Sigma (ΔΣM) mixtes en temps continu. Les topologies inclouen potenciostats diferencials per ampliar el seu rang. A més, permeten aconseguir un límit baix de detecció mitjançant la implementació d’un nou mecanisme de cancel·lació del soroll de baixa freqüència pro-vinent de la retroalimentació digital-analògic del modulador ΔΣM electroquímic. El xip inclou una interfície digital estàndard basada en I2C per controlar l’extensa configuració del sistema i també per reduir el nombre de connexions externes de cara al seu muntatge de baix cost sobre substrats flexibles. Es presenten resultats experimentals de les proves tant elèctriques com electroquímiques i es comparen amb altres interfícies de sensors electroquímics d’última generació. Finalment, es proposa una interfície híbrida rendible, on s’imprimeix directament el sen-sor electroquímic sobre un substrat PEN flexible que també allotja la interfície CMOS integrada de lectura a nivell de dau de silici sense encapsular. Els tres elèctrodes del sensor i tota la connectivitat s’aconsegueixen gràcies a la tecnologia d’impressió d’injecció de tinta de baix cost. Així mateix, s’investiguen els adhesius conductors anisotròpics com un enfocament emergent per al contacte mecànic i elèctric entre la matriu del circuit integrat CMOS i les tintes conductores per tal d’obtenir un dispositiu sensorial electroquímic flexible d’un sol ús.
AIELLO, ORAZIO. "Susceptibility to EMI of ICs for Power MOS Monitoring". Doctoral thesis, Politecnico di Torino, 2013. http://hdl.handle.net/11583/2506258.
Texto completoPiazza, Francesco. "Low power RF-receiver front-end ICs for mobile communications /". Zürich, 2000. http://e-collection.ethbib.ethz.ch/show?type=diss&nr=13669.
Texto completoKaya, Idris. "Ein kräftegesteuerter Platzierer für 3D-ICs mit Berücksichtigung vertikaler Durchkontaktierungen". [S.l. : s.n.], 2004. http://deposit.ddb.de/cgi-bin/dokserv?idn=973168471.
Texto completoZaveri, Jesal. "Electrical and fluidic interconnect design and technology for 3D ICS". Thesis, Georgia Institute of Technology, 2011. http://hdl.handle.net/1853/39550.
Texto completoZhang, Yue. "Hybrid microfluidic cooling and thermal isolation technologies for 3D ICs". Diss., Georgia Institute of Technology, 2015. http://hdl.handle.net/1853/53539.
Texto completoChia, Mark P. C. "Efficient critical area extraction for photolithographically defined patterns on ICs". Thesis, University of Edinburgh, 2002. http://hdl.handle.net/1842/13371.
Texto completoFonseca, Luís Carlos Costa. "SISTEMA MULTIAGENTES PARA NEGOCIAÇÃO NO AMBIENTE ICS DE COMÉRCIO ELETRÔNICO". Universidade Federal do Maranhão, 2003. http://tedebc.ufma.br:8080/jspui/handle/tede/325.
Texto completoThis work is part of a major project called ICS (Intelliget Commerce System) that has as it´s main goal to develop an Intelligent Negotiation System for Eletronic Business on the B2B category wich is being developed at UFMA (Maranhão s Federal University) under the Coordination of Prof. Dr. Sofiane Labidi. In this work we will specifically see the basic architecture proposed for the system, the technologies that bases it and in a more detailed way we will see the negotiation between sofware agents beyond its applications in the proposed system. In this context, we intend, to propose and develop a system that can automatize the negotiation mechanisms - purchase and sale of products and services - making the interactions between companies faster, more sophisticated and efficient, and thus increase even more the profits of this business. Being so, we present the ICS (Intelligent Commerce Sysrtem) as an Eletronic Business System based on Mobile Software Agent s technology that follows the OMG MASIF2 of OMG standard(OMG, 2000). Three important features of ICS are emphasized: the eletronic commerce lifecycle, the user modeling and the proposed ontologies on each of the lifecycle´s phase. Thus the ICS aims to get as end item of the negotiation, the best opportunities of purchase and sale of products and services, thus providing, a decision making support system.
Este trabalho faz parte de um projeto maior chamado ICS (Intelliget Commerce System) e que tem como objetivo desenvolver um Ambiente Inteligente de Negociação para Comércio Eletrônico na categoria B2B e que está sendo desenvolvido na UFMA (Universidade Federal do Maranhão) sob a Orientação do Prof. Dr. Sofiane Labidi. Neste trabalho trataremos especificamente da arquitetura básica proposta para o sistema, as tecnologias que o fundamentam e de forma mais detalhada trataremos da negociação entre agentes de software além das suas aplicações no sistema ora proposto. Neste contexto, pretendemos, propor e implementar um sistema que possa automatizar os mecanismos de negociação - compra e venda de produtos e serviços - tornando as interações entre empresas mais sofisticadas, rápidas e eficientes, e assim incrementar ainda mais os lucros deste ramo de negócio. Sendo assim, nós apresentamos o ICS (Intelligent Commerce Sysrtem) como um sistema de Comércio Eletrônico baseado na tecnologia de Agentes Móveis seguindo o padrão MASIF1 da OMG (OMG, 2000). Três importantes características do ICS são enfatizadas: ciclo de vida do comércio eletrônico, modelagem do usuário e as ontologias propostas para cada fase do ciclo de vida. Assim o ICS visa obter como produto final da negociação, as melhores oportunidades de compra e venda de produtos e serviços, provendo assim, um sistema de suporte à tomada de decisão.
Bastos, Filho Othon de Carvalho. "MODELAGEM DO USUÁRIO PARA O SISTEMA ICS DE COMÉRCIO ELETRÔNICO". Universidade Federal do Maranhão, 2003. http://tedebc.ufma.br:8080/jspui/handle/tede/327.
Texto completoThe Electronic Commerce (E-commerce) grew very in recent years. This type of Commerce, call also digital or virtual commerce, is characterized for the increasing capacity of supply, global competition, increasing, with this, the expectations of the consumers, thus causing, one high competition between the companies, who very change of fast form the businesses and the way to operate. Being that, it can be perceived that the companies who will not be ready for the changes, in a short period had been it stops backwards in the world of the businesses. The Electronic Commerce allows that such changes can be supported in one it scales global, making possible a bigger efficiency and flexibility, this occurs by means of the agility in taking care of to the necessities and expectations of the customers. For this new paradigm, it currently starts if to legalize the business-oriented call Intelligence (Business Intelligence), whose purpose is to manage the knowledge in the age of the global competition and the communications on-line.
O Comércio Eletrônico (E-commerce) cresceu muito nos últimos anos. Esse tipo de Comércio, chamado também comércio digital ou virtual, caracteriza-se pela crescente capacidade de fornecimento, competição global, aumentando, com isso, as expectativas dos consumidores, causando assim, uma alta concorrência entre as empresas, que mudam de forma muito rápida os negócios e o modo de operar. Sendo que, pode-se perceber que as empresas que não estiverem prontas para as mudanças, em um curto período ficaram para trás no mundo dos negócios. O Comércio Eletrônico permite que tais mudanças possam ser suportadas em uma escala global, possibilitando uma maior eficiência e flexibilidade, isto ocorre por meio da agilidade em atender às necessidades e expectativas dos clientes. Para este novo paradigma, começa atualmente a se formalizar a chamada Inteligência de Negócios (Business Intelligence), cuja finalidade é gerenciar os conhecimentos na era da competição global e das comunicações on-line.
Faísca, Carlos Manuel dos Santos Alves Ferreira. "Uma política de desbaste para a biblioteca do ICS/UL". Master's thesis, Faculdade de Ciências Sociais e Humanas, Universidade Nova de Lisboa, 2010. http://hdl.handle.net/10362/9078.
Texto completoEste relatório de estágio estuda o desbaste com o objectivo final da definição de uma política de desbaste para a colecção de monografias da Biblioteca do ICS/UL. A primeira parte consiste na revisão da literatura sobre o desbaste; a segunda, tem um carácter empírico, através do estudo da ocupação actual do espaço na Biblioteca do ICS/UL e da avaliação das colecções de monografias. Como consequência natural, e de acordo com os estudos previamente realizados, surge então a definição de uma política de desbaste, onde se encontram definidos, entre outras questões, os critérios de desbaste. Dentro da mesma lógica de trabalho, são elaboradas sugestões sobre o destino dos itens alvo de desbaste. São também abordadas outras vertentes do âmbito da gestão de colecções e que podem influenciar decisivamente o desbaste, como a gestão de doações e a política de aquisições.
Sundaresan, Vijay. "Architectural Synthesis Techniques for Design of Correct and Secure ICs". University of Cincinnati / OhioLINK, 2008. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1217424117.
Texto completoHanna, Drew E. "Developing RRAM-Based Approaches for Security and Provisioning of ICs". University of Cincinnati / OhioLINK, 2021. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1617108121648124.
Texto completoAbdulrazzaq, Mohammed y Yuan Wei. "Industrial Control System (ICS) Network Asset Identification and Risk Management". Thesis, Högskolan i Halmstad, Akademin för informationsteknologi, 2018. http://urn.kb.se/resolve?urn=urn:nbn:se:hh:diva-38198.
Texto completoSharmin, Afsana. "EMBEDDED COOLING OF HIGH PERFORMANCE ICS USING NOVEL NANOSTRUCTURED THERMOELECTRICS". OpenSIUC, 2013. https://opensiuc.lib.siu.edu/theses/1308.
Texto completoSane, Hemant. "Power supply noise analysis for 3D ICs using through-silicon-vias". Thesis, Georgia Institute of Technology, 2010. http://hdl.handle.net/1853/33875.
Texto completoSu, Yinmei [Verfasser]. "Multi-functional Monolithic ICs for 94GHz Transmitters on Silicon / Yinmei Su". Ulm : Universität Ulm. Fakultät für Ingenieurwissenschaften und Informatik, 2015. http://d-nb.info/1065309724/34.
Texto completoMusabeyoglu, Ahmet Can. "A zero-voltage switching technique for high frequency buck converter ICs". Thesis, Massachusetts Institute of Technology, 2017. http://hdl.handle.net/1721.1/113122.
Texto completoThis electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.
Cataloged from student-submitted PDF version of thesis.
Includes bibliographical references (pages 59-60).
This thesis explores a zero-voltage switching (ZVS) method that can be used to decrease the frequency dependent losses in a buck converter. The specific application for this thesis was a buck converter IC with an input voltage of up to 42V. The method utilizes the addition of an auxiliary circuit composed of a helper inductor and two helper power MOSFETs that compliment the switching transition of a conventional synchronous buck converter topology. It is shown in this thesis that by using the described topology, the switching losses of the high-side power MOSFET in a synchronous buck converter can be reduced by up to 45%. Furthermore, it is shown that a similar helper circuit could be used to reduce the gate drive losses for both power MOSFETs in a synchronous buck converter by up to 60%. Since the method requires the use of an additional helper inductor with a small value (10-50 nH), various methods to integrate this inductor into an IC package are investigated. 0.35[mu]m BiCMOS technology was used to simulate and analyze the merits of the described topology and compare it to the LT8697, a hard-switched synchronous buck converter IC.
by Ahmet Can Musabeyoglu.
M. Eng.
Almeida, Carlos Roberto Baluz. "COMPOSIÇÃO DE WEB SERVICES SEMÂNTICOS NO AMBIENTE ICS DE COMÉRCIO ELETRÔNICO". Universidade Federal do Maranhão, 2004. http://tedebc.ufma.br:8080/jspui/handle/tede/363.
Texto completoThe ICS (Intelligent Commerce System), a developing project of the Intelligent Systems Lab (LSI) at Federal University of Maranhão (UFMA), under Prof. Dr. Sofiane Labidi´s supervision, is a project that has the objective of develop an Electronic Commerce System, in the B2B (Business to Business) category, effectively intelligent. It is based in the technology of intelligent mobile agents and has five phases in its life cycle: User Modeling, Matchmaking, Negotiation, Contract Formation and Contract Fulfillment. The Matchmaking is the process in which agents that represent traders (buyers and sellers), that are interested in the exchange of economic values, are put in touch with their potential business counterparts. The enrichment of the matchmaking process is the main focus of this work. Nowadays in the ICS, the matchmaking process only matches simple services. Our contribution is to enrich the actual matchmaking process allowing the composition of services, that is, simple services can add its capacities and form complex services with the goal to return a greater number of positive responses. To do this, we use ontologies allied to AI planning techniques to provide the discovery of complementary services and the posterior composition of them to elaborate more complex services.
O ICS (Intelligent Commerce System), projeto atualmente em desenvolvimento no Laboratório de Sistemas Inteligentes (LSI) na Universidade Federal do Maranhão (UFMA) sob a orientação do Prof. Dr. Sofiane Labidi, é um projeto que tem como objetivo desenvolver um Sistema de Comércio Eletrônico, na categoria B2B, efetivamente Inteligente. Ele é baseado na tecnologia de agentes móveis inteligentes e possui cinco fases no seu ciclo de vida: Modelagem do Usuário, Matchmaking, Negociação, Formação de Contrato e Cumprimento do Contrato. O Matchmaking é o processo no qual agentes representando negociantes (compradores e vendedores), que possuem interesse na troca de valores econômicos, são colocados em contato com seus potenciais parceiros de negócios. O enriquecimento do processo de matchmaking é o foco principal deste trabalho. Atualmente no ICS o processo de matchmaking somente emparceira serviços simples. Nossa contribuição é enriquecer o processo de matching atualmente em uso no ICS permitindo a composição de serviços, ou seja, serviços simples somam suas capacidades e formam serviços complexos com a finalidade de retornar maior número de respostas positivas. Para isso utilizamos ontologias aliadas às técnicas de planejamento automático para proporcionar a descoberta de serviços complementares e posterior composição dos mesmos para elaboração de serviços mais complexos.
Gnawali, Krishna Prasad. "EMERGING MEMORY-BASED DESIGNS AND RESILIENCY TO RADIATION EFFECTS IN ICS". OpenSIUC, 2020. https://opensiuc.lib.siu.edu/dissertations/1863.
Texto completoVieira, Marco Manuel Santos. "PICSEL: Portable ICS Extensible Lab". Master's thesis, 2020. http://hdl.handle.net/10451/48330.
Texto completoCritical infrastructures such as electric power grids, nuclear plants, oil and gas refineries, transportations systems or pharmaceutical industries, play an increasingly important role in our lives due to technological advancement and the precision industry. Traditionally, most of these infrastructures, also called industrial control systems (ICS), are large-scale cyber-physical systems (CPS) which all use supervisory control and data acquisition (SCADA). Over recent years, malicious actors have realized the importance and impact of these infrastructures. Combining this with the deprivation of security features in ICS resulted in a large quantity of high value targets just waiting to be exploited. Since these systems are based on equipment with a really long lifetime and, in most of the cases, have an extremely high availability requirement, its important to, somehow, gather information and perform security tests in order to protect these infrastructures, without compromising a live operation. Normally these infrastructures are very complex and often have a remarkable diversity of equipment, communication protocols and transmission technologies. This thesis presents a portable testbed, PICSEL, which was designed and developed to achieve the following goals: to be a portable testbed testing existing exploits and new security solutions whilst exploring new vulnerabilities within the equipment or the environment. Several requirements were considered in the design of the testbed: for instance, choosing the equipment that allowed for more environment configurations; choosing power supplies that support additional equipment; and designing a static electrical diagram based on each device’s requirements. With these requirements, the testbed must be able to support different types of equipment and architectures, allowing for applications in multiple industries, inside which it can be easily reconfigured. The thesis describes the testbed architecture and discusses the design decisions, presenting two test scenarios that were studied and implemented using PICSEL. In each of these test scenarios, different attacks were performed validating each of the PICSEL goals. Testing known vulnerabilities, testing exploits in the wild and exporting information from PICSEL equipment to an external tool were very important steps to validate the results. Therefore, this thesis provides proof of concept confirming the key value of a modular and reconfigurable testbed, PICSEL.
Santos, Rodolfo Miguel Pinto Leite Brunner. "Desenho e implementação da plataforma ICS". Master's thesis, 2008. http://hdl.handle.net/10216/59610.
Texto completoSantos, Rodolfo Miguel Pinto Leite Brunner. "Desenho e implementação da plataforma ICS". Dissertação, 2008. http://hdl.handle.net/10216/59610.
Texto completoNassif-Khalil, Sameh G. "Super junction LDMOSTs for smart power ICs". 2004. http://link.library.utoronto.ca/eir/EIRdetail.cfm?Resources__ID=94660&T=F.
Texto completoKüting, Jan Teichmann Peter. "Entwurf eines Demonstrator-ICs für HF-Baublöcke /". 2008. http://www.gbv.de/dms/ilmenau/abs/570375959kueti.txt.
Texto completoHo, Cheng-Yeh y 何承曄. "A TSV Delay Meter for 3D ICs". Thesis, 2010. http://ndltd.ncl.edu.tw/handle/82584110256095042380.
Texto completo國立交通大學
電子研究所
98
The manufacturing cost of the advanced process technology rises rapidly; on the other hand, the design complexity of modern designs also increases. To conquer the high cost of a large scale design, the stacked 3D IC is developed. Through-silicon-vias (TSVs) are widely used for vertical interconnection between layers in 3D ICs. Due to process variation, even when a signal passes through two different paths composed of the same series of TSVs, these two paths may incur a delay difference and affect the accuracy of a synchronous system. In this thesis, we present a TSV Delay Meter for calculating delay difference between two paths by HSpice with TSMC 90nm CMOS process. Our results show that the maximum resolution of the meter is about 0.74ps and the simulated delay errors are lower than 0.74ps as well. Hence, the TSV Delay Meter can precisely detect delay difference.
Barreiros, Pedro Miguel França. "Exploring security controls for ICS/SCADA environments". Master's thesis, 2020. http://hdl.handle.net/10451/48398.
Texto completoOs Sistemas de Controlo Industriais (ICS) estão a começar a fundir-se com as soluções de IT, por forma a promover a interconectividade. Embora isto traga inúmeros benefícios de uma perspetiva de controlo, os ICS apresentam uma falta de mecanismos de segurança que consigam evitar possíveis ameaças informáticas, quando comparados aos comuns sistemas de informação [29], [64]. Dada a natureza crítica destes sistemas, e a ocorrências recentes de ciberataques desastrosos, a segurança ´e um tópico que deve ser incentivado. À luz deste problema, na presente dissertação apresentamos uma avaliação de possíveis aplicações e controlos de segurança a serem implantados nestes ambientes críticos e a implementação de uma solução de segurança extensível que dá resposta a certos ataques focados em sistemas industriais, capaz de ser implantada em qualquer rede industrial que permita a sua ligação. Com o auxilio de uma framework extensivel e portátil para testes de ICS, e outros ambientes industriais de testes, foi possível analisar diferentes cenários de ameaças, implantar mecanismos de segurança para os detetar e avaliar os resultados, com o intuito de fornecer uma ideia de como empregar estes mecanismos da melhor maneira possível num ambiente real de controlo industrial.
Industrial Control Systems (ICS) are beginning to merge with IT solutions, in order to promote inter-connectivity. Although this brings countless benefits from a control perspective, ICS have been lacking in security mechanisms to ward off potential cyber threats, when compared to common information systems [29], [64]. Given the critical nature of these systems, and the recent occurrences of disastrous cyber-attacks, security is a topic that should be encouraged. In light of this problem, in this dissertation we present an assessment of possible security applications and controls that can be deployed in these critical environments and the implementation of an extensible security solution that responds to certain attacks focused on industrial systems, capable of being deployed in any industrial network that allows its connection. With the help of an extensible and portable framework for ICS testing, and other industrial testing environments, it was possible to analyze different threat scenarios, implement security mechanisms to detect them and evaluate the results in order to provide an idea on how to employ these mechanisms as best as possible in a real industrial control environment, without compromising it’s process.
Correia, Ana Luísa Marques. "Adaptação portuguesa da ICS (Insomnia Catastrophizing Scale)". Master's thesis, 2019. http://hdl.handle.net/10773/29007.
Texto completoThe aim of the current study was to develop the first translation and adaptation of the ICS (Insomnia Catastrophizing Scale) of Jansson-Fröjmark, Harvey and Flink (2012, 2019) into the European Portuguese, as well as to study its psychometric properties. The ICS evaluates the catastrophic thoughts related with insomnia symptoms during sleeping time (ICS-N) and during daytime functioning (ICS-D). Besides, the ICS comprises 17 items in a Likert scale ranging from 0 to 5 points. In this study, it was recruited a community-based sample of 802 Portuguese participants, aged ≥ 18 years, where approximately 80% of the sample were females and 20% males. The results showed that the scale has good internal consistency values for both the ICS-N (α=0,93) and ICS-D (α=0,95) subscales. The Principal Axis Factoring suggested the presence of a single factor in both measured scales. It was also observed a large correlation between the two subscales (r=0,79), suggesting that they measure related constructs. Additionally, it was considered that the gender variable could moderate the association between the catastrophization and insomnia severity. In this line, it was verified a moderate to large correlation coeficient among ICS-N and ICS-D and ISI (Insomnia Severity Index) for males and females. Posteriorly, the sample was divided in two groups labeled “Insomnia” (n=170) and “no Insomnia” (n=632). For that purpose, the cut-off point of 14 of the ISI - based on European Portuguese population - was used. For all the items of each one of the subscales, it was observed that “insomnia” individuals presented higher scores than “no insomnia” group. Finally, the ROC (Receiver Operating Characteristics) curves were computed for the subscales, extracting the cut-off points based on optimal sensitivity (ICS-N=75,9%; ICS-D=65,9%) and specificity ICS-N=75,6%; ICS-D=77,8%) values. Overall, these findings show similarities with the few published studies with ICS. The ICS seems to be a promising psychological assessment measure to be used in clinical and research settings.
Mestrado em Psicologia da Saúde e Reabilitação Neuropsicológica
Cheng, Wen-Chieh y 鄭文傑. "PWM Controller ICs for DC-DC Converter". Thesis, 2007. http://ndltd.ncl.edu.tw/handle/49547821618673899875.
Texto completo大葉大學
資訊工程學系碩士班
95
This thesis describes two complete PWM controller IC for switching power converters. One is analog PWM controller IC and another is digital PWM controller IC. Due to rapid development of CMOS technologies, more and more transistors can be fabricated on a single chip. Consumer electronic products also have been developed rapidly in these years. The power management ICs such as the highly efficient low-voltage switch-mode DC-DC converters are mandatory in these devices for maximizing the system run time. The analog-control scheme for the switching converters is developed for a long time, and it is a very mature technique. The digital-control scheme for the switching DC-DC converters also has been discussed in these years. The advantages and disadvantages between these two architectures are treated in this thesis. The key building blocks of analog PWM controller IC are two-stage operational amplifier, voltage-controlled oscillator and hysteretic comparator. The key building blocks of digital PWM controller IC are A/D converter, compensator and DPWM. These two controller ICs have been fabricated with TSMC 0.35um 2P4M 3.3V/5V Mixed Signal CMOS process through CIC. The chip size of APWM is about 0.35*0.37mm2. The chip size of A/D converter is about 0.555*0.555mm2. The chip size of DPWM is about 0.65*0.56mm2.
Hsiao, Ching-Min y 蕭敬民. "Study of TFT-LCD Source Driver ICs". Thesis, 2014. http://ndltd.ncl.edu.tw/handle/69684110095831438411.
Texto completo國立暨南國際大學
電機工程學系
101
To improve the image quality of the display, high-resolution and high-color-depth source driver ICs are required. Achieving a higher resolution, more output channels of the source driver are needed. Extending color depth for the source driver requires high digital-to-analog converter’s (DAC’s) bit number, leading to an increase of DAC’s area. Since each output channel of the source driver needs one DAC, a source driver generally includes hundreds of DACs which occupy most silicon die size. Hence, there is a great demand for high-resolution, high-color-depth but low-cost source driver ICs. This study proposes three area-efficient DACs for LCD source driver ICs in different applications. For the small-size LCD panel, a quasi-pipeline DAC is proposed to implement a 9-bit source driver IC with high conversion rate. To minimize the charge injection error, we also utilize bootstrapped switches in the proposed DAC. Using 0.35-μm CMOS technology, a 30-channel source driver with quasi-pipeline DACs is implemented to validate the proposed DAC’s performance. The maximum DNL and INL are measured as 0.25 LSB and 0.33 LSB, respectively. The averaged data conversion time is 16 ns per channel. The Figure of Merit (FoM) of the proposed DAC is 0.2 pJ/bit-mm2, which is smaller (by a factor of 3-39) than that of prior arts. The measured results indicate that the proposed 9-bit quasi-pipeline DAC is highly suitable for small-format 16-million-color LCD source driver ICs. For the medium-size LCD application, we propose a 10-bit DAC with interpolation technique for compact LCD column driver ICs. The proposed DAC combines a 6-bit RDAC and a 4-bit DAC-embedded op with 1.6-bit current-mode interpolation cells. The 6-bit RDAC uses a one-voltage selector instead of a two-voltage selector; therefore, it requires a smaller silicon die area for the voltage selector than conventional ones. Fewer differential pairs are required for the voltage interpolation because the DAC-embedded op uses 1.6-bit interpolation cells with binary-weighted reference voltages. This reduces the silicon die area further. The 10-bit DAC prototype is realized in 0.35-μm CMOS technology with the worst DNL/INL of 0.45/0.93 LSB. The 10-bit DAC occupies only 64 % of the conventional 8-bit RDAC area. For the large-size LCD application, a 10-bit switched-capacitor voltage-summing DAC is introduced. This 10-bit DAC consists of a 3-bit RDAC and an 8-voltage switched-capacitor summer with high driving capability. The switched-capacitor summer adds up the output voltage of the 3-bit RDAC and the products of the input digital bit value and the corresponding binary-weighted voltage from bits 3 to 9. The 10-bit DAC prototype is realized using 0.35-μm/0.5-μm CMOS technology, with the worst-case DNL/INL at 0.76/1.56 LSB. The die area per channel is 35 μm × 410 μm, which is more compact than state-of-the-art circuits implemented with the same technology. The settling time to reach 0.2% tolerance of the final voltage is only 5 μs, smaller than that of previous switched-capacitor (cyclic) DACs.
De, Paola Francesco Maria. "Silicon as Smart Package for Photonic ICs". Tesi di dottorato, 2003. http://www.fedoa.unina.it/123/1/De_Paola.pdf.
Texto completoYao, Terry. "Transmitter front-end ICs for 60-GHz radio". 2006. http://link.library.utoronto.ca/eir/EIRdetail.cfm?Resources__ID=442049&T=F.
Texto completoAyazianmavi, Sahar. "Photovoltaic (PV) and fully-integrated implantable CMOS ICs". Thesis, 2012. http://hdl.handle.net/2152/ETD-UT-2012-05-5527.
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