Literatura académica sobre el tema "High level Synthesi"
Crea una cita precisa en los estilos APA, MLA, Chicago, Harvard y otros
Consulte las listas temáticas de artículos, libros, tesis, actas de conferencias y otras fuentes académicas sobre el tema "High level Synthesi".
Junto a cada fuente en la lista de referencias hay un botón "Agregar a la bibliografía". Pulsa este botón, y generaremos automáticamente la referencia bibliográfica para la obra elegida en el estilo de cita que necesites: APA, MLA, Harvard, Vancouver, Chicago, etc.
También puede descargar el texto completo de la publicación académica en formato pdf y leer en línea su resumen siempre que esté disponible en los metadatos.
Artículos de revistas sobre el tema "High level Synthesi"
Rajan, S. P., M. Fujita, K. Yuan y M. T.-C. Lee. "ATM switch design by high-level modeling, formal verification and high-level synthesi". ACM Transactions on Design Automation of Electronic Systems 3, n.º 4 (octubre de 1998): 554–62. http://dx.doi.org/10.1145/296333.296342.
Texto completoYang, Hae-Chan, Sang-Jun Park, Kwoan-Young Park, Jae-Hyun Sa y Tae-Hwan Kim. "High-level Synthesis Design and Implementation of an Efficient Capsule Network Inference System in an FPGA". Journal of the Institute of Electronics and Information Engineers 58, n.º 11 (30 de noviembre de 2021): 39–47. http://dx.doi.org/10.5573/ieie.2021.58.11.39.
Texto completoBolton, Martin. "High-level synthesis". Microprocessors and Microsystems 18, n.º 8 (octubre de 1994): 489. http://dx.doi.org/10.1016/0141-9331(94)90097-3.
Texto completoPawlak, Adam. "High-level synthesis". Microprocessing and Microprogramming 35, n.º 1-5 (septiembre de 1992): 261. http://dx.doi.org/10.1016/0165-6074(92)90325-2.
Texto completoYAMAMOTO, Takahiro. "Safety assessment of high-level nuclear waste disposal in Japan from the standpoint of geology". Synthesiology English edition 4, n.º 4 (2012): 202–11. http://dx.doi.org/10.5571/syntheng.4.202.
Texto completoRavi, Selvaraj y M. Joseph. "High-Level Test Synthesis". ACM Transactions on Design Automation of Electronic Systems 19, n.º 4 (agosto de 2014): 1–27. http://dx.doi.org/10.1145/2627754.
Texto completoEwering, Christian y Gunter Gerhardt. "PASS: High level synthesis". Microprocessing and Microprogramming 30, n.º 1-5 (agosto de 1990): 103–8. http://dx.doi.org/10.1016/0165-6074(90)90225-x.
Texto completoXing, Xianwu y Ching Chuen Jong. "Floorplan-Driven Multivoltage High-Level Synthesis". VLSI Design 2009 (6 de septiembre de 2009): 1–10. http://dx.doi.org/10.1155/2009/156751.
Texto completoDossis, M. "High-level Synthesis Integrated Verification". Engineering, Technology & Applied Science Research 5, n.º 5 (4 de octubre de 2015): 864–70. http://dx.doi.org/10.48084/etasr.596.
Texto completoGajski, D. D. y L. Ramachandran. "Introduction to high-level synthesis". IEEE Design & Test of Computers 11, n.º 4 (1994): 44–54. http://dx.doi.org/10.1109/54.329454.
Texto completoTesis sobre el tema "High level Synthesi"
Amarasinghe, V. Kosala I. "Distributed high-level synthesis". Thesis, University of Southampton, 2005. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.438696.
Texto completoLanger, Jan. "High-Level-Synthese von Operationseigenschaften". Doctoral thesis, Universitätsbibliothek Chemnitz, 2011. http://nbn-resolving.de/urn:nbn:de:bsz:ch1-qucosa-79059.
Texto completoThe complete verification approach using special operation properties is an accepted methodology for the formal verification of digital circuits. Operation properties describe the behavior of a circuit during a certain time interval. They can be sequentially concatenated in order to specify the overall behavior. Additionally, a formal completeness check proves that the sequence of properties consistently determines the exact value of the output signals for every valid sequence of input signal values. This work examines how a circuit description can be automatically derived from a set of operation properties whose completeness has been proven. In contrast to the traditional design flow at register-transfer level (RTL), this method offers two advantages. First, the prove of completeness helps to avoid many design errors. Second, the design of operation properties resembles the design of timing diagrams often used in textual specifications. Therefore, the design level is closer to the specification level and errors caused by refinement steps are avoided. The design tool vhisyn performs the high-level synthesis from a complete set of operation properties to a description at RTL. The results show that both the synthesis algorithms and the generated circuit descriptions are efficient and allow the design of larger applications. This is demonstrated by means of two case studies
Baidas, Zaher Abdulkarim. "High-level floating-point synthesis". Thesis, University of Southampton, 2000. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.325049.
Texto completoAbbas, Naeem. "Acceleration of a bioinformatics application using high-level synthesis". Phd thesis, École normale supérieure de Cachan - ENS Cachan, 2012. http://tel.archives-ouvertes.fr/tel-00847076.
Texto completoLawrence, Bleddyn Idris. "High level synthesis with interconnect prediction". Thesis, University of Southampton, 2005. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.437114.
Texto completoYeung, Ping F. "High-level synthesis of VLSI circuits". Thesis, University of Edinburgh, 1992. http://hdl.handle.net/1842/11647.
Texto completoFallside, Hamish. "High level synthesis of memory architectures". Thesis, University of Edinburgh, 1995. http://hdl.handle.net/1842/10882.
Texto completoFinlay, Iain William. "High-level synthesis using structural input". Thesis, University of Edinburgh, 1992. http://hdl.handle.net/1842/14849.
Texto completoSchmidt, Marco, Ulrich Möhrke y Paul Herrmann. "Verhaltensbeschreibung in der High-Level Synthese". Universität Leipzig, 1996. https://ul.qucosa.de/id/qucosa%3A34506.
Texto completoUguen, Yohann. "High-level synthesis and arithmetic optimizations". Thesis, Lyon, 2019. http://www.theses.fr/2019LYSEI099.
Texto completoHigh-level synthesis (HLS) tools offer increased productivity regarding FPGA programming. However, due to their relatively young nature, they still lack many arithmetic optimizations. This thesis proposes safe arithmetic optimizations that should always be applied. These optimizations are simple operator specializations, following the C semantic. Other require to a lift the semantic embedded in high-level input program languages, which are inherited from software programming, for an improved accuracy/cost/performance ratio. To demonstrate this claim, the sum-of-product of floating-point numbers is used as a case study. The sum is performed on a fixed-point format, which is tailored to the application, according to the context in which the operator is instantiated. In some cases, there is not enough information about the input data to tailor the fixed-point accumulator. The fall-back strategy used in this thesis is to generate an accumulator covering the entire floating-point range. This thesis explores different strategies for implementing such a large accumulator, including new ones. The use of a 2's complement representation instead of a sign+magnitude is demonstrated to save resources and to reduce the accumulation loop delay. Based on a tapered precision scheme and an exact accumulator, the posit number systems claims to be a candidate to replace the IEEE floating-point format. A throughout analysis of posit operators is performed, using the same level of hardware optimization as state-of-the-art floating-point operators. Their cost remains much higher that their floating-point counterparts in terms of resource usage and performance. Finally, this thesis presents a compatibility layer for HLS tools that allows one code to be deployed on multiple tools. This library implements a strongly typed custom size integer type along side a set of optimized custom operators
Libros sobre el tema "High level Synthesi"
Coussy, Philippe y Adam Morawiec, eds. High-Level Synthesis. Dordrecht: Springer Netherlands, 2008. http://dx.doi.org/10.1007/978-1-4020-8588-8.
Texto completoGajski, Daniel D., Nikil D. Dutt, Allen C.-H. Wu y Steve Y.-L. Lin. High — Level Synthesis. Boston, MA: Springer US, 1992. http://dx.doi.org/10.1007/978-1-4615-3636-9.
Texto completoCamposano, Raul y Wayne Wolf, eds. High-Level VLSI Synthesis. Boston, MA: Springer US, 1991. http://dx.doi.org/10.1007/978-1-4615-3966-7.
Texto completoCamposano, Raul. High-Level VLSI Synthesis. Boston, MA: Springer US, 1991.
Buscar texto completoWinterstein, Felix. Separation Logic for High-level Synthesis. Cham: Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-53222-6.
Texto completoTamás, Visegrády y Jankovits István, eds. High level synthesis of pipelined datapaths. Chichester, [England]: Wiley, 2001.
Buscar texto completoWalker, Robert A. y Raul Camposano, eds. A Survey of High-Level Synthesis Systems. Boston, MA: Springer US, 1991. http://dx.doi.org/10.1007/978-1-4615-3968-1.
Texto completo1959-, Walker Robert A. y Camposano Raul, eds. A Survey of high-level synthesis systems. Boston: Kluwer, 1991.
Buscar texto completoKhalid, Ayesha, Goutam Paul y Anupam Chattopadhyay. Domain Specific High-Level Synthesis for Cryptographic Workloads. Singapore: Springer Singapore, 2019. http://dx.doi.org/10.1007/978-981-10-1070-5.
Texto completoPhilippe, Coussy y Morawiec Adam, eds. High-level synthesis: From algorithm to digital circuit. [New York]: Springer, 2008.
Buscar texto completoCapítulos de libros sobre el tema "High level Synthesi"
Derrien, Steven, Sanjay Rajopadhye, Patrice Quinton y Tanguy Risset. "High-Level Synthesis of Loops Using the Polyhedral Model". En High-Level Synthesis, 215–30. Dordrecht: Springer Netherlands, 2008. http://dx.doi.org/10.1007/978-1-4020-8588-8_12.
Texto completoAditya, Shail y Vinod Kathail. "Algorithmic Synthesis Using PICO". En High-Level Synthesis, 53–74. Dordrecht: Springer Netherlands, 2008. http://dx.doi.org/10.1007/978-1-4020-8588-8_4.
Texto completoWakabayashi, Kazutoshi y Benjamin Carrion Schafer. "“All-in-C” Behavioral Synthesis and Verification with CyberWorkBench". En High-Level Synthesis, 113–27. Dordrecht: Springer Netherlands, 2008. http://dx.doi.org/10.1007/978-1-4020-8588-8_7.
Texto completoCoussy, Philippe, Cyrille Chavet, Pierre Bomel, Dominique Heller, Eric Senn y Eric Martin. "GAUT: A High-Level Synthesis Tool for DSP Applications". En High-Level Synthesis, 147–69. Dordrecht: Springer Netherlands, 2008. http://dx.doi.org/10.1007/978-1-4020-8588-8_9.
Texto completoGajski, Daniel D., Nikil D. Dutt, Allen C.-H. Wu y Steve Y.-L. Lin. "Introduction". En High — Level Synthesis, 1–25. Boston, MA: Springer US, 1992. http://dx.doi.org/10.1007/978-1-4615-3636-9_1.
Texto completoGajski, Daniel D., Nikil D. Dutt, Allen C.-H. Wu y Steve Y.-L. Lin. "Architectural Models in Synthesis". En High — Level Synthesis, 27–61. Boston, MA: Springer US, 1992. http://dx.doi.org/10.1007/978-1-4615-3636-9_2.
Texto completoGajski, Daniel D., Nikil D. Dutt, Allen C.-H. Wu y Steve Y.-L. Lin. "Quality Measures". En High — Level Synthesis, 63–92. Boston, MA: Springer US, 1992. http://dx.doi.org/10.1007/978-1-4615-3636-9_3.
Texto completoGajski, Daniel D., Nikil D. Dutt, Allen C.-H. Wu y Steve Y.-L. Lin. "Design Description Languages". En High — Level Synthesis, 93–135. Boston, MA: Springer US, 1992. http://dx.doi.org/10.1007/978-1-4615-3636-9_4.
Texto completoGajski, Daniel D., Nikil D. Dutt, Allen C.-H. Wu y Steve Y.-L. Lin. "Design Representation and Transformations". En High — Level Synthesis, 137–77. Boston, MA: Springer US, 1992. http://dx.doi.org/10.1007/978-1-4615-3636-9_5.
Texto completoGajski, Daniel D., Nikil D. Dutt, Allen C.-H. Wu y Steve Y.-L. Lin. "Partitioning". En High — Level Synthesis, 179–212. Boston, MA: Springer US, 1992. http://dx.doi.org/10.1007/978-1-4615-3636-9_6.
Texto completoActas de conferencias sobre el tema "High level Synthesi"
"Session 3: High-level synthesis". En 2014 Electronic System Level Synthesis Conference (ESLsyn). IEEE, 2014. http://dx.doi.org/10.1109/eslsyn.2014.6850382.
Texto completo"Proceedings of 7th International Symposium on High-Level Synthesis". En Proceedings of 7th International Symposium on High-Level Synthesis. IEEE, 1994. http://dx.doi.org/10.1109/ishls.1994.302351.
Texto completoMahapatra, Anushree y Benjamin Carrion Schafer. "Machine-learning based simulated annealer method for high level synthesis design space exploration". En 2014 Electronic System Level Synthesis Conference (ESLsyn). IEEE, 2014. http://dx.doi.org/10.1109/eslsyn.2014.6850383.
Texto completoSarma, Robin C., Mark D. Dooley, N. Craig Newman y Graham Hetherington. "High-level synthesis". En Conference proceedings. New York, New York, USA: ACM Press, 1990. http://dx.doi.org/10.1145/123186.123399.
Texto completoSinha, Sharad y Wei Zhang. "SynDFG: Synthetic dataflow graph generator for high-level synthesis". En 2015 6th Asia Symposium on Quality Electronic Design (ASQED). IEEE, 2015. http://dx.doi.org/10.1109/acqed.2015.7274006.
Texto completoBoule, Marc y Zeljko Zilic. "Efficient Automata-Based Assertion-Checker Synthesis of PSL Properties". En 2006 IEEE International High Level Design Validation and Test Workshop. IEEE, 2006. http://dx.doi.org/10.1109/hldvt.2006.319966.
Texto completoNishihara, Tasuku, Takeshi Matsumoto y Masahiro Fujita. "Equivalence Checking with Rule-Based Equivalence Propagation and High-Level Synthesis". En 2006 IEEE International High Level Design Validation and Test Workshop. IEEE, 2006. http://dx.doi.org/10.1109/hldvt.2006.319984.
Texto completoSchirner, Gunar. "Modeling, synthesis, and validation of heterogeneous biomedical embedded systems". En 2011 IEEE International High Level Design Validation and Test Workshop (HLDVT). IEEE, 2011. http://dx.doi.org/10.1109/hldvt.2011.6113984.
Texto completoBonet, Blai, Giuseppe De Giacomo, Hector Geffner, Fabio Patrizi y Sasha Rubin. "High-level Programming via Generalized Planning and LTL Synthesis". En 17th International Conference on Principles of Knowledge Representation and Reasoning {KR-2020}. California: International Joint Conferences on Artificial Intelligence Organization, 2020. http://dx.doi.org/10.24963/kr.2020/16.
Texto completo"High level synthesis (HLS)". En 2016 International Conference on Field-Programmable Technology (FPT). IEEE, 2016. http://dx.doi.org/10.1109/fpt.2016.7929516.
Texto completoInformes sobre el tema "High level Synthesi"
Bush, William R. High Level Synthesis in ASP. Fort Belvoir, VA: Defense Technical Information Center, agosto de 1986. http://dx.doi.org/10.21236/ada172975.
Texto completoAmir, Rachel, David J. Oliver, Gad Galili y Jacline V. Shanks. The Role of Cysteine Partitioning into Glutathione and Methionine Synthesis During Normal and Stress Conditions. United States Department of Agriculture, enero de 2013. http://dx.doi.org/10.32747/2013.7699850.bard.
Texto completoJin, Zheming, Hal Finkel, Kazutomo Yoshii y Franck Cappello. Evaluation of the FIR Example using Xilinx Vivado High-Level Synthesis Compiler. Office of Scientific and Technical Information (OSTI), julio de 2017. http://dx.doi.org/10.2172/1375449.
Texto completoDelmer, Deborah P. y Prem S. Chourey. The Importance of the Enzyme Sucrose Synthase for Cell Wall Synthesis in Plants. United States Department of Agriculture, octubre de 1994. http://dx.doi.org/10.32747/1994.7568771.bard.
Texto completoBerkman, Nancy D., Eva Chang, Julie Seibert, Rania Ali, Deborah Porterfield, Linda Jiang, Roberta Wines, Caroline Rains y Meera Viswanathan. Management of High-Need, High-Cost Patients: A “Best Fit” Framework Synthesis, Realist Review, and Systematic Review. Agency for Healthcare Research and Quality (AHRQ), octubre de 2021. http://dx.doi.org/10.23970/ahrqepccer246.
Texto completoGrafi, Gideon y Brian Larkins. Endoreduplication in Maize Endosperm: An Approach for Increasing Crop Productivity. United States Department of Agriculture, septiembre de 2000. http://dx.doi.org/10.32747/2000.7575285.bard.
Texto completoRocheford, Torbert, Yaakov Tadmor, Robert Lambert y Nurit Katzir. Molecular Marker Mapping of Genes Enhancing Tocol and Carotenoid Composition of Maize Grain. United States Department of Agriculture, diciembre de 1995. http://dx.doi.org/10.32747/1995.7571352.bard.
Texto completoSisler, Edward C., Raphael Goren y Akiva Apelbaum. Controlling Ethylene Responses in Horticultural Crops at the Receptor Level. United States Department of Agriculture, octubre de 2001. http://dx.doi.org/10.32747/2001.7580668.bard.
Texto completoVarga, Gabriella A., Amichai Arieli, Lawrence D. Muller, Haim Tagari, Israel Bruckental y Yair Aharoni. Effect of Rumen Available Protein, Amimo Acids and Carbohydrates on Microbial Protein Synthesis, Amino Acid Flow and Performance of High Yielding Cows. United States Department of Agriculture, agosto de 1993. http://dx.doi.org/10.32747/1993.7568103.bard.
Texto completoGinzberg, Idit, Richard E. Veilleux y James G. Tokuhisa. Identification and Allelic Variation of Genes Involved in the Potato Glycoalkaloid Biosynthetic Pathway. United States Department of Agriculture, agosto de 2012. http://dx.doi.org/10.32747/2012.7593386.bard.
Texto completo