Literatura académica sobre el tema "Hardware Security Primitives"
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Artículos de revistas sobre el tema "Hardware Security Primitives"
Labrado, Carson y Himanshu Thapliyal. "Hardware Security Primitives for Vehicles". IEEE Consumer Electronics Magazine 8, n.º 6 (1 de noviembre de 2019): 99–103. http://dx.doi.org/10.1109/mce.2019.2941392.
Texto completoHuffmire, Ted, Timothy Levin, Thuy Nguyen, Cynthia Irvine, Brett Brotherton, Gang Wang, Timothy Sherwood y Ryan Kastner. "Security Primitives for Reconfigurable Hardware-Based Systems". ACM Transactions on Reconfigurable Technology and Systems 3, n.º 2 (mayo de 2010): 1–35. http://dx.doi.org/10.1145/1754386.1754391.
Texto completoGordon, Holden, Jack Edmonds, Soroor Ghandali, Wei Yan, Nima Karimian y Fatemeh Tehranipoor. "Flash-Based Security Primitives: Evolution, Challenges and Future Directions". Cryptography 5, n.º 1 (4 de febrero de 2021): 7. http://dx.doi.org/10.3390/cryptography5010007.
Texto completoZhang, Zhiming y Qiaoyan Yu. "Towards Energy-Efficient and Secure Computing Systems". Journal of Low Power Electronics and Applications 8, n.º 4 (27 de noviembre de 2018): 48. http://dx.doi.org/10.3390/jlpea8040048.
Texto completoBi, Yu, Kaveh Shamsi, Jiann-Shiun Yuan, Pierre-Emmanuel Gaillardon, Giovanni De Micheli, Xunzhao Yin, X. Sharon Hu, Michael Niemier y Yier Jin. "Emerging Technology-Based Design of Primitives for Hardware Security". ACM Journal on Emerging Technologies in Computing Systems 13, n.º 1 (6 de diciembre de 2016): 1–19. http://dx.doi.org/10.1145/2816818.
Texto completoDubrova, Elena. "Energy-efficient cryptographic primitives". Facta universitatis - series: Electronics and Energetics 31, n.º 2 (2018): 157–67. http://dx.doi.org/10.2298/fuee1802157d.
Texto completoVenkataraman, Anusha, Eberechukwu Amadi y Chris Papadopoulos. "Molecular-Scale Hardware Encryption Using Tunable Self-Assembled Nanoelectronic Networks". Micro 2, n.º 3 (21 de junio de 2022): 361–68. http://dx.doi.org/10.3390/micro2030024.
Texto completoTsantikidou, Kyriaki y Nicolas Sklavos. "Hardware Limitations of Lightweight Cryptographic Designs for IoT in Healthcare". Cryptography 6, n.º 3 (1 de septiembre de 2022): 45. http://dx.doi.org/10.3390/cryptography6030045.
Texto completoTomecek, Jozef. "Hardware optimizations of stream cipher rabbit". Tatra Mountains Mathematical Publications 50, n.º 1 (1 de diciembre de 2011): 87–101. http://dx.doi.org/10.2478/v10127-011-0039-8.
Texto completoPreetisudha Meher, Lukram Dhanachandra Singh,. "Advancing Hardware Security: A Review and Novel Design of Configurable Arbiter PUF with DCM-Induced Metastability for Enhanced Resource Efficiency and Unpredictability". Tuijin Jishu/Journal of Propulsion Technology 45, n.º 01 (16 de febrero de 2024): 3804–16. http://dx.doi.org/10.52783/tjjpt.v45.i01.4934.
Texto completoTesis sobre el tema "Hardware Security Primitives"
Basak, Abhishek. "INFRASTRUCTURE AND PRIMITIVES FOR HARDWARE SECURITY IN INTEGRATED CIRCUITS". Case Western Reserve University School of Graduate Studies / OhioLINK, 2016. http://rave.ohiolink.edu/etdc/view?acc_num=case1458787036.
Texto completoMa, Yao. "Quantum Hardware Security and Near-term Applications". Electronic Thesis or Diss., Sorbonne université, 2023. https://accesdistant.sorbonne-universite.fr/login?url=https://theses-intra.sorbonne-universite.fr/2023SORUS500.pdf.
Texto completoHardware security primitives are hardware-based fundamental components and mechanisms used to enhance the security of modern computing systems in general. These primitives provide building blocks for implementing security features and safeguarding against threats to ensure integrity, confidentiality, and availability of information and resources. With the high-speed development of quantum computation and information processing, a huge potential is shown in constructing hardware security primitives with quantum mechanical systems. Meanwhile, addressing potential vulnerabilities from the hardware perspective is becoming increasingly important to ensure the security properties of quantum applications. The thesis focuses on practical hardware security primitives in quantum analogue, which refer to designing and implementing hardware-based security features with quantum mechanical systems against various threats and attacks. Our research follows two questions: How can quantum mechanical systems enhance the security of existing hardware security primitives? And how can hardware security primitives protect quantum computing systems? We give the answers by studying two different types of hardware security primitives with quantum mechanical systems from constructions to applications: Physical Unclonable Function (PUF) and Trusted Execution Environments (TEE). We first propose classical-quantum hybrid constructions of PUFs called HPUF and HLPUF. When PUFs exploit physical properties unique to each individual hardware device to generate device-specific keys or identifiers, our constructions incorporate quantum information processing technologies and implement quantum-secure authentication and secure communication protocols with reusable quantum keys. Secondly, inspired by TEEs that achieve isolation properties by hardware mechanism, we propose the QEnclave construction with quantum mechanical systems. The idea is to provide an isolated and secure execution environment within a larger quantum computing system by utilising secure enclaves/processors to protect sensitive operations from unauthorized access or tampering with minimal trust assumptions. It results in an operationally simple enough QEnclave construction with performing rotations on single qubits. We show that QEnclave enables delegated blind quantum computation on the cloud server with a remote classical user under the security definitions
Sabt, Mohamed. "Outsmarting smartphones : trust based on provable security and hardware primitives in smartphones architectures". Thesis, Compiègne, 2016. http://www.theses.fr/2016COMP2320.
Texto completoThe landscape of mobile devices has been changed with the introduction of smartphones. Sincetheir advent, smartphones have become almost vital in the modern world. This has spurred many service providers to propose access to their services via mobile applications. Despite such big success, the use of smartphones for sensitive applications has not become widely popular. The reason behind this is that users, being increasingly aware about security, do not trust their smartphones to protect sensitive applications from attackers. The goal of this thesis is to strengthen users trust in their devices. We cover this trust problem with two complementary approaches: provable security and hardware primitives. In the first part, our goal is to demonstrate the limits of the existing technologies in smartphones architectures. To this end, we analyze two widely deployed systems in which careful design was applied in order to enforce their security guarantee: the Android KeyStore, which is the component shielding users cryptographic keys in Android smartphones, and the family of Secure Channel Protocols (SCPs) defined by the GlobalPlatform consortium. Our study relies on the paradigm of provable security. Despite being perceived as rather theoretical and abstract, we show that this tool can be handily used for real-world systems to find security vulnerabilities. This shows the important role that can play provable security for trust by being able to formally prove the absence of security flaws or to identify them if they exist. The second part focuses on complex systems that cannot cost-effectively be formally verified. We begin by investigating the dual-execution-environment approach. Then, we consider the case when this approach is built upon some particular hardware primitives, namely the ARM TrustZone, to construct the so-called Trusted Execution Environment (TEE). Finally, we explore two solutions addressing some of the TEE limitations. First, we propose a new TEE architecture that protects its sensitive data even when the secure kernel gets compromised. This relieves service providers of fully trusting the TEE issuer. Second, we provide a solution in which TEE is used not only for execution protection, but also to guarantee more elaborated security properties (i.e. self-protection and self-healing) to a complex software system like an OS kernel
Ouattara, Frédéric. "Primitives de sécurité à base de mémoires magnétiques". Thesis, Montpellier, 2020. http://www.theses.fr/2020MONTS072.
Texto completoMagnetic memories (MRAM) are one of the emerging non-volatile memory technologies that have experienced rapid development over the past decade. One of the advantages of this technology lies in the varied fields of application in which it can be used. In addition to its primary function of storing information, MRAM is nowadays used in applications such as sensors, RF receivers and hardware security. In this thesis, we are interested in the use of MRAMs in the design of elementary hardware security primitives. Initially, an exploration in the design of TRNG (True Random Number Generator) based on STT-MRAM (Spin Transfert Torque MRAM) type memories was carried out with the aim of producing a demonstrator and proving its effectiveness for secure applications. Random extraction methods in STT and TAS (Thermally Assisted Switching) memories are presented. We have thus evaluated these magnetic memories within the framework of TRNGs but also for the generation of PUFs (Physically Unclonable Functions) on physical devices
Wild, Alexander [Verfasser], Tim [Gutachter] Güneysu y Amir [Gutachter] Moradi. "Structure-aware design of security primitives on reconfigurable hardware / Alexander Wild ; Gutachter: Tim Güneysu, Amir Moradi ; Fakultät für Elektrotechnik und Informationstechnik". Bochum : Ruhr-Universität Bochum, 2018. http://d-nb.info/1152077902/34.
Texto completoJuliato, Marcio. "Fault Tolerant Cryptographic Primitives for Space Applications". Thesis, 2011. http://hdl.handle.net/10012/5876.
Texto completoLibros sobre el tema "Hardware Security Primitives"
Tehranipoor, Mark, Nitin Pundir, Nidish Vashistha y Farimah Farahmandi. Hardware Security Primitives. Cham: Springer International Publishing, 2023. http://dx.doi.org/10.1007/978-3-031-19185-5.
Texto completoPundir, Nitin, Nidish Vashishta, Mark Tehranipoor y Farimah Farahmandi. Hardware Security Primitives. Springer International Publishing AG, 2022.
Buscar texto completoCapítulos de libros sobre el tema "Hardware Security Primitives"
Tehranipoor, Mark, Nitin Pundir, Nidish Vashistha y Farimah Farahmandi. "Analog Security". En Hardware Security Primitives, 245–60. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-19185-5_14.
Texto completoTehranipoor, Mark, Nitin Pundir, Nidish Vashistha y Farimah Farahmandi. "Intrinsic Racetrack PUF". En Hardware Security Primitives, 1–16. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-19185-5_1.
Texto completoTehranipoor, Mark, Nitin Pundir, Nidish Vashistha y Farimah Farahmandi. "Fault Injection Resistant Cryptographic Hardware". En Hardware Security Primitives, 333–46. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-19185-5_19.
Texto completoTehranipoor, Mark, Nitin Pundir, Nidish Vashistha y Farimah Farahmandi. "Hybrid Extrinsic Radio Frequency PUF". En Hardware Security Primitives, 81–95. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-19185-5_6.
Texto completoTehranipoor, Mark, Nitin Pundir, Nidish Vashistha y Farimah Farahmandi. "Tamper Detection". En Hardware Security Primitives, 261–79. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-19185-5_15.
Texto completoTehranipoor, Mark, Nitin Pundir, Nidish Vashistha y Farimah Farahmandi. "Side-Channel Protection in Cryptographic Hardware". En Hardware Security Primitives, 319–32. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-19185-5_18.
Texto completoTehranipoor, Mark, Nitin Pundir, Nidish Vashistha y Farimah Farahmandi. "Direct Intrinsic Characterization PUF". En Hardware Security Primitives, 33–47. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-19185-5_3.
Texto completoTehranipoor, Mark, Nitin Pundir, Nidish Vashistha y Farimah Farahmandi. "Lightweight Cryptography". En Hardware Security Primitives, 213–27. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-19185-5_12.
Texto completoTehranipoor, Mark, Nitin Pundir, Nidish Vashistha y Farimah Farahmandi. "Package-Level Counterfeit Detection and Avoidance". En Hardware Security Primitives, 301–17. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-19185-5_17.
Texto completoTehranipoor, Mark, Nitin Pundir, Nidish Vashistha y Farimah Farahmandi. "Virtual Proof of Reality". En Hardware Security Primitives, 229–43. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-19185-5_13.
Texto completoActas de conferencias sobre el tema "Hardware Security Primitives"
Du, Nan, Mahdi Kiani, Xianyue Zhao, Danilo Burger, Oliver G. Schmidt, Ramona Ecke, Stefan E. Schulz, Heidemarie Schmidt y Ilia Polian. "Electroforming-free Memristors for Hardware Security Primitives". En 2019 IEEE 4th International Verification and Security Workshop (IVSW). IEEE, 2019. http://dx.doi.org/10.1109/ivsw.2019.8854394.
Texto completoRose, Garrett S., Mesbah Uddin y Md Badruddoja Majumder. "A Designer's Rationale for Nanoelectronic Hardware Security Primitives". En 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI). IEEE, 2016. http://dx.doi.org/10.1109/isvlsi.2016.114.
Texto completoSingh, Simranjeet, Furqan Zahoor, Gokul Rajendran, Sachin Patkar, Anupam Chattopadhyay y Farhad Merchant. "Hardware Security Primitives Using Passive RRAM Crossbar Array". En ASPDAC '23: 28th Asia and South Pacific Design Automation Conference. New York, NY, USA: ACM, 2023. http://dx.doi.org/10.1145/3566097.3568348.
Texto completoPugazhenthi, Anugayathiri, Nima Karimian y Fatemeh Tehranipoor. "DLA-PUF: deep learning attacks on hardware security primitives". En Autonomous Systems: Sensors, Processing and Security for Vehicles & Infrastructure 2019, editado por Michael C. Dudzik y Jennifer C. Ricklin. SPIE, 2019. http://dx.doi.org/10.1117/12.2519257.
Texto completoXu, Xiaolin, Vikram Suresh, Raghavan Kumar y Wayne Burleson. "Post-Silicon Validation and Calibration of Hardware Security Primitives". En 2014 IEEE Computer Society Annual Symposium on VLSI (ISVLSI). IEEE, 2014. http://dx.doi.org/10.1109/isvlsi.2014.80.
Texto completoAnandakumar, N. Nalla, Somitra Kumar Sanadhya y Mohammad S. Hashmi. "Design, Implementation and Analysis of Efficient Hardware-Based Security Primitives". En 2020 IFIP/IEEE 28th International Conference on Very Large Scale Integration (VLSI-SOC). IEEE, 2020. http://dx.doi.org/10.1109/vlsi-soc46417.2020.9344097.
Texto completoAramoon, Omid, Gang Qu y Aijiao Cui. "Building Hardware Security Primitives Using Scan-based Design-for-Testability". En 2022 IEEE 65th International Midwest Symposium on Circuits and Systems (MWSCAS). IEEE, 2022. http://dx.doi.org/10.1109/mwscas54063.2022.9859460.
Texto completoRajesh, E. y Udit Sapra. "Design, build, and analyse hardware-based security primitives that work well". En 2022 International Interdisciplinary Humanitarian Conference for Sustainability (IIHC). IEEE, 2022. http://dx.doi.org/10.1109/iihc55949.2022.10060075.
Texto completoThapliyal, Himanshu y S. Dinesh Kumar. "Energy-recovery based hardware security primitives for low-power embedded devices". En 2018 IEEE International Conference on Consumer Electronics (ICCE). IEEE, 2018. http://dx.doi.org/10.1109/icce.2018.8326326.
Texto completoShrivastava, Ayush, Pai-Yu Chen, Yu Cao, Shimeng Yu y Chaitali Chakrabarti. "Design of a reliable RRAM-based PUF for compact hardware security primitives". En 2016 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE, 2016. http://dx.doi.org/10.1109/iscas.2016.7539050.
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