Literatura académica sobre el tema "Hardware circuits"
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Artículos de revistas sobre el tema "Hardware circuits"
Raman, Karthik y Andreas Wagner. "The evolvability of programmable hardware". Journal of The Royal Society Interface 8, n.º 55 (9 de junio de 2010): 269–81. http://dx.doi.org/10.1098/rsif.2010.0212.
Texto completoD'Ari, Richard y René Thomas. "Hardware (DNA) circuits". Comptes Rendus Biologies 326, n.º 2 (febrero de 2003): 215–17. http://dx.doi.org/10.1016/s1631-0691(03)00066-0.
Texto completoLi, Zeyu, Junjie Wang, Zhao Huang, Nan Luo y Quan Wang. "Towards Trust Hardware Deployment of Edge Computing: Mitigation of Hardware Trojans based on Evolvable Hardware". Applied Sciences 12, n.º 13 (29 de junio de 2022): 6601. http://dx.doi.org/10.3390/app12136601.
Texto completoKerschbaumer, Ricardo, Robson R. Linhares, Jean M. Simão, Paulo C. Stadzisz y Carlos R. Erig Lima. "Notification-Oriented Paradigm to Implement Digital Hardware". Journal of Circuits, Systems and Computers 27, n.º 08 (12 de abril de 2018): 1850124. http://dx.doi.org/10.1142/s0218126618501244.
Texto completoPawase, Ramesh y N. P. Futane. "MEMS Seismic Sensor with FPAA Based Interface Circuit for Frequency-Drift Compensation using ANN". International Journal of Reconfigurable and Embedded Systems (IJRES) 6, n.º 2 (28 de mayo de 2018): 120. http://dx.doi.org/10.11591/ijres.v6.i2.pp120-126.
Texto completoPARK, SUNGWOO y HYEONSEUNG IM. "A calculus for hardware description". Journal of Functional Programming 21, n.º 1 (19 de noviembre de 2010): 21–58. http://dx.doi.org/10.1017/s0956796810000249.
Texto completoLi, Chun Feng, Ke Ming Li y Xiang Zhang. "Research on Circuit Design for Speed Adjusting Hardware of Brushless DC Motor Based on the Two-Dimensional Fuzzy Controller". Advanced Materials Research 705 (junio de 2013): 509–15. http://dx.doi.org/10.4028/www.scientific.net/amr.705.509.
Texto completoShibata, Tadashi y Tadahiro Ohmi. "Implementing Intelligence in Silicon Integrated Circuits Using Neuron-Like High-Functionality Transistors". Journal of Robotics and Mechatronics 8, n.º 6 (20 de diciembre de 1996): 508–15. http://dx.doi.org/10.20965/jrm.1996.p0508.
Texto completoKatoh, Yusuke, Hironari Yoshiuchi, Yoshio Murata y Hironori Nakajo. "Scalable Hardware Mechanism for Partitioned Circuits Operation". ECTI Transactions on Computer and Information Technology (ECTI-CIT) 12, n.º 2 (16 de diciembre de 2018): 90–97. http://dx.doi.org/10.37936/ecti-cit.2018122.142511.
Texto completoOdame, K. y P. E. Hasler. "Nonlinear Circuit Analysis via Perturbation Methods and Hardware Prototyping". VLSI Design 2010 (18 de marzo de 2010): 1–8. http://dx.doi.org/10.1155/2010/687498.
Texto completoTesis sobre el tema "Hardware circuits"
Mallepalli, Samarsen Reddy. "Generic algorithms and NULL Convention Logic hardware implementation for unsigned and signed quad-rail multiplication". Diss., Rolla, Mo. : University of Missouri-Rolla, 2007. http://scholarsmine.umr.edu/thesis/pdf/Mallepalli_09007dcc803c4eec.pdf.
Texto completoVita. The entire thesis text is included in file. Title from title screen of thesis/dissertation PDF file (viewed November 27, 2007) Includes bibliographical references (p. 66-67).
Kalganova, Tatiana. "Evolvable hardware design of combinational logic circuits". Thesis, Edinburgh Napier University, 2000. http://researchrepository.napier.ac.uk/Output/4341.
Texto completoSingh, Satnam. "Analysis of hardware descriptions". Thesis, University of Glasgow, 1991. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.390451.
Texto completoSandiford, Richard. "Hardware compilation based on communicating processes". Thesis, Imperial College London, 2001. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.246769.
Texto completoThompson, Adrian. "Hardware evolution : automatic design of electronic circuits in reconfigurable hardware by artificial evolution". Thesis, University of Sussex, 1996. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.360588.
Texto completoDesai, Avinash R. "Anti-Counterfeit and Anti-Tamper Hardware Implementation using Hardware Obfuscation". Thesis, Virginia Tech, 2013. http://hdl.handle.net/10919/23756.
Texto completoMaster of Science
Basak, Abhishek. "INFRASTRUCTURE AND PRIMITIVES FOR HARDWARE SECURITY IN INTEGRATED CIRCUITS". Case Western Reserve University School of Graduate Studies / OhioLINK, 2016. http://rave.ohiolink.edu/etdc/view?acc_num=case1458787036.
Texto completoBlum, Thomas. "Modular exponentiation on reconfigurable hardware". Digital WPI, 1999. http://www.wpi.edu/Pubs/ETD/Available/etd-090399-090413/unrestricted/thesis.pdf.
Texto completoWang, Xiao-Lin 1955. "A TRANSLATER OF CLOCK MODE VHDL HARDWARE DESCRIPTION LANGUAGE". Thesis, The University of Arizona, 1986. http://hdl.handle.net/10150/291295.
Texto completoStaunstrup, Jørgen. "A formal approach to hardware design /". Boston [u.a.] : Kluwer Acad. Publ, 1994. http://www.loc.gov/catdir/enhancements/fy0820/93043582-d.html.
Texto completoLibros sobre el tema "Hardware circuits"
Computer hardware diagnostics for engineers. New York: McGraw-Hill, 1995.
Buscar texto completoPC hardware projects. Indianapolis, IN: Prompt Publications, 1997.
Buscar texto completoThompson, Adrian. Hardware evolution: Automatic design of electronic circuits in reconfigurable hardware by Artificial Evolution. London: Springer, 1998.
Buscar texto completoA formal approach to hardware design. Boston: Kluwer Academic Publishers, 1994.
Buscar texto completoWang, Li-Guo. Abstraction of hardware construction. Edinburgh: LFCS, Dept. of Computer Science, University of Edinburgh, 1995.
Buscar texto completoSingh, Gaurav. Low power hardware synthesis from concurrent action-oriented specifications. New York: Springer, 2010.
Buscar texto completoAbraham, Kandel y Langholz Gideon, eds. Fuzzy hardware: Architectures and applications. Boston: Kluwer Academic Publishers, 1998.
Buscar texto completoHardware design verification: Simulation and formal method-based approaches. Upper Saddle River, NJ: Prentice Hall Professional Technical Reference, 2005.
Buscar texto completoLuís, Gomes, Lavagno Luciano 1959- y Yakovlev Alex, eds. Hardware design and petri nets. Boston: Kluwer Academic, 2000.
Buscar texto completoKropf, Thomas. Introduction to Formal Hardware Verification. Berlin, Heidelberg: Springer Berlin Heidelberg, 1999.
Buscar texto completoCapítulos de libros sobre el tema "Hardware circuits"
Tehranipoor, Mark, Ujjwal Guin y Domenic Forte. "Hardware IP Watermarking". En Counterfeit Integrated Circuits, 203–22. Cham: Springer International Publishing, 2015. http://dx.doi.org/10.1007/978-3-319-11824-6_10.
Texto completoSekanina, Lukáš. "Principles and Applications of Polymorphic Circuits". En Evolvable Hardware, 209–24. Berlin, Heidelberg: Springer Berlin Heidelberg, 2015. http://dx.doi.org/10.1007/978-3-662-44616-4_8.
Texto completoTehranipoor, Mark, Nitin Pundir, Nidish Vashistha y Farimah Farahmandi. "Hardware Camouflaging in Integrated Circuits". En Hardware Security Primitives, 171–84. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-19185-5_10.
Texto completoWei, Shaojun, Leibo Liu, Jianfeng Zhu y Chenchen Deng. "Hardware Architectures and Circuits". En Software Defined Chips, 77–196. Singapore: Springer Nature Singapore, 2022. http://dx.doi.org/10.1007/978-981-19-6994-2_3.
Texto completoGalindez Olascoaga, Laura Isabel, Wannes Meert y Marian Verhelst. "Hardware-Aware Probabilistic Circuits". En Hardware-Aware Probabilistic Machine Learning Models, 81–110. Cham: Springer International Publishing, 2021. http://dx.doi.org/10.1007/978-3-030-74042-9_5.
Texto completoFroehlich, Saman, Daniel Große y Rolf Drechsler. "Approximate Hardware Generation Using Formal Techniques". En Approximate Circuits, 155–74. Cham: Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-99322-5_8.
Texto completoJoyce, Jeffrey J. "Generic Specification of Digital Hardware". En Designing Correct Circuits, 68–91. London: Springer London, 1991. http://dx.doi.org/10.1007/978-1-4471-3544-9_4.
Texto completoSanchez, Eduardo. "Field programmable gate array (FPGA) circuits". En Towards Evolvable Hardware, 1–18. Berlin, Heidelberg: Springer Berlin Heidelberg, 1996. http://dx.doi.org/10.1007/3-540-61093-6_1.
Texto completoLee, Seogoo y Andreas Gerstlauer. "Approximate High-Level Synthesis of Custom Hardware". En Approximate Circuits, 205–23. Cham: Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-99322-5_10.
Texto completoHanif, Muhammad Abdullah, Muhammad Usama Javed, Rehan Hafiz, Semeen Rehman y Muhammad Shafique. "Hardware–Software Approximations for Deep Neural Networks". En Approximate Circuits, 269–88. Cham: Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-99322-5_13.
Texto completoActas de conferencias sobre el tema "Hardware circuits"
Miller, J. F. y P. Thomson. "Discovering novel digital circuits using evolutionary techniques". En IEE Colloquium Evolvable Hardware Systems. IEE, 1998. http://dx.doi.org/10.1049/ic:19980207.
Texto completoKnichel, David y Amir Moradi. "Low-Latency Hardware Private Circuits". En CCS '22: 2022 ACM SIGSAC Conference on Computer and Communications Security. New York, NY, USA: ACM, 2022. http://dx.doi.org/10.1145/3548606.3559362.
Texto completoVenturelli, Davide, Minh Do, Eleanor Rieffel y Jeremy Frank. "Temporal Planning for Compilation of Quantum Approximate Optimization Circuits". En Twenty-Sixth International Joint Conference on Artificial Intelligence. California: International Joint Conferences on Artificial Intelligence Organization, 2017. http://dx.doi.org/10.24963/ijcai.2017/620.
Texto completoCatelan, Daniela, Ricardo Santos y Liana Duenha. "Accuracy and Physical Characterization of Approximate Arithmetic Circuits". En XXI Simpósio em Sistemas Computacionais de Alto Desempenho. Sociedade Brasileira de Computação, 2020. http://dx.doi.org/10.5753/wscad.2020.14065.
Texto completoRose, G. S., J. Rajendran, N. McDonald, R. Karri, M. Potkonjak y B. Wysocki. "Hardware security strategies exploiting nanoelectronic circuits". En 2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC 2013). IEEE, 2013. http://dx.doi.org/10.1109/aspdac.2013.6509623.
Texto completo"Verification of hardware systems and circuits". En IECON 2013 - 39th Annual Conference of the IEEE Industrial Electronics Society. IEEE, 2013. http://dx.doi.org/10.1109/iecon.2013.6700422.
Texto completoLiu, Siting y Jie Han. "Hardware ODE Solvers using Stochastic Circuits". En DAC '17: The 54th Annual Design Automation Conference 2017. New York, NY, USA: ACM, 2017. http://dx.doi.org/10.1145/3061639.3062258.
Texto completoYamakawa. "Fuzzy logic hardware systems". En 1993 Symposium on VLSI Circuits. IEEE, 1989. http://dx.doi.org/10.1109/vlsic.1989.1037460.
Texto completoShanthi, A. P., P. Muruganandam y R. Parthasarathi. "Enhancing the development based evolution of digital circuits". En 2004 NASA/DoD Conference on Evolvable Hardware. IEEE, 2004. http://dx.doi.org/10.1109/eh.2004.1310815.
Texto completoDally, William J., C. Thomas Gray, John Poulton, Brucek Khailany, John Wilson y Larry Dennison. "Hardware-Enabled Artificial Intelligence". En 2018 IEEE Symposium on VLSI Circuits. IEEE, 2018. http://dx.doi.org/10.1109/vlsic.2018.8502368.
Texto completoInformes sobre el tema "Hardware circuits"
Di, Jia. Towards Trustable Embedded Systems: Hardware Threat Modeling for Integrated Circuits. Fort Belvoir, VA: Defense Technical Information Center, octubre de 2008. http://dx.doi.org/10.21236/ada501149.
Texto completoChung, Moon Jung. Parallel Very High Speed Integrated Circuits (VHSIC) Hardware Description Language (VHDL) Simulation for Performance Modeling. Fort Belvoir, VA: Defense Technical Information Center, marzo de 1999. http://dx.doi.org/10.21236/ada372678.
Texto completoMills, Michael T. A Key Element Toward Concurrent Engineering of Hardware and Software: Binding Very High Speed Integrated Circuits (VHSIC) Hardware Description Language (VHDL) with Ada 95. Fort Belvoir, VA: Defense Technical Information Center, octubre de 1994. http://dx.doi.org/10.21236/ada294469.
Texto completoMills, Michael T. Proposed Object Oriented Programming (OOP) Enhancements to the Very High Speed Integrated Circuits (VHSIC) Hardware Description Language (VHDL). Fort Belvoir, VA: Defense Technical Information Center, agosto de 1993. http://dx.doi.org/10.21236/ada274004.
Texto completoWachen, John y Steven McGee. Qubit by Qubit’s Four-Week Quantum Computing Summer School Evaluation Report for 2021. The Learning Partnership, septiembre de 2021. http://dx.doi.org/10.51420/report.2021.4.
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