Literatura académica sobre el tema "GENERATING CIRCUITS"
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Artículos de revistas sobre el tema "GENERATING CIRCUITS"
Materzok, Marek. "Generating circuits with generators". Proceedings of the ACM on Programming Languages 6, ICFP (29 de agosto de 2022): 52–79. http://dx.doi.org/10.1145/3549821.
Texto completoBriggman, K. L. y W. B. Kristan. "Multifunctional Pattern-Generating Circuits". Annual Review of Neuroscience 31, n.º 1 (julio de 2008): 271–94. http://dx.doi.org/10.1146/annurev.neuro.31.060407.125552.
Texto completoBrodovskaya, Anastasia y Jaideep Kapur. "Circuits generating secondarily generalized seizures". Epilepsy & Behavior 101 (diciembre de 2019): 106474. http://dx.doi.org/10.1016/j.yebeh.2019.106474.
Texto completoKosarev, Boris. "FERRORESONANT PROCESSES IN POWER SUPPLY SYSTEMS WITH DISTRIBUTED GENERATION". Electrical and data processing facilities and systems 18, n.º 3-4 (2022): 56–64. http://dx.doi.org/10.17122/1999-5458-2022-18-3-4-56-64.
Texto completoSOLIMAN, AHMED M. "GENERATION OF THIRD-ORDER QUADRATURE OSCILLATOR CIRCUITS USING NAM EXPANSION". Journal of Circuits, Systems and Computers 22, n.º 07 (agosto de 2013): 1350060. http://dx.doi.org/10.1142/s0218126613500606.
Texto completoGÜNAY, ENIS y MUSTAFA ALÇI. "n-DOUBLE SCROLLS IN SC-CNN CIRCUIT VIA DIODE-BASED PWL FUNCTION". International Journal of Bifurcation and Chaos 16, n.º 04 (abril de 2006): 1023–33. http://dx.doi.org/10.1142/s0218127406015271.
Texto completoWeikle, R. M., T. W. Crowe y E. L. Kollberg. "Multiplier and Harmonic Generator Technologies for Terahertz Applications". International Journal of High Speed Electronics and Systems 13, n.º 02 (junio de 2003): 429–56. http://dx.doi.org/10.1142/s012915640300179x.
Texto completoKim, Junyeong y Jin Jang. "P‐2: Narrow Bezel Gate Driver Generating Positive Pulse for AMOLED Display Using LTPO Technology with Depletion Mode Oxide TFTs". SID Symposium Digest of Technical Papers 54, n.º 1 (junio de 2023): 1782–85. http://dx.doi.org/10.1002/sdtp.16950.
Texto completoCAFAGNA, DONATO y GIUSEPPE GRASSI. "NEW 3D-SCROLL ATTRACTORS IN HYPERCHAOTIC CHUA'S CIRCUITS FORMING A RING". International Journal of Bifurcation and Chaos 13, n.º 10 (octubre de 2003): 2889–903. http://dx.doi.org/10.1142/s0218127403008284.
Texto completoZeng, Xian Tao y Qian Hua Ren. "Power Generation System by Vehicle on the Downhill of Expressway". Advanced Materials Research 724-725 (agosto de 2013): 1361–65. http://dx.doi.org/10.4028/www.scientific.net/amr.724-725.1361.
Texto completoTesis sobre el tema "GENERATING CIRCUITS"
Sheikhbahaei, Shahriar. "Astroglial control of respiratory rhythm generating circuits". Thesis, University College London (University of London), 2017. http://discovery.ucl.ac.uk/10037956/.
Texto completoWang, Jianwei. "Generating, manipulating, distributing and analysing light's quantum states using integrated photonic circuits". Thesis, University of Bristol, 2015. https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.702227.
Texto completoMcKnight, Walter Lee. "A meta system for generating software engineering environments /". The Ohio State University, 1985. http://rave.ohiolink.edu/etdc/view?acc_num=osu1487260531958418.
Texto completoFerraz, Rafael da Silva. "Dispositivo para medição de impedância em sistemas de aterramento elétricos em alta frequência". Universidade Federal de Goiás, 2016. http://repositorio.bc.ufg.br/tede/handle/tede/6615.
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Coordenação de Aperfeiçoamento de Pessoal de Nível Superior - CAPES
This work presents the project and the implementation of a device that is capable of measuring the electrical effects, especially the impedance, in grounding meshes when subjected to atmospherical discharges. An analysis on the influence of the atmospheric discharges in electrical protection systems is performed and also a comparison between current and voltage impulsive circuits. The device is built of electronic circuits controlled by a microcontroller, with the possibility of parameter adjusting for shaping the generated impulse wave. The device was conceived such that it can be used for tests of soil impedance measurement and for verification of the behavior of electrical grounding systems under high frequencies. The results are presented for tests in different types of systems and there was satisfactory performance for the developed equipment when compared with a commercial device
Este trabalho apresenta o projeto e a implementação do dispositivo capaz de medir os efeitos elétricos, em especial, as impedâncias, em malha de aterramento, sujeito a descargas atmosféricas. Analisa-se as influências das descargas atmosféricas nos sistemas de proteção elétricos e desenvolve-se análise comparativa dos circuitos impulsivos de corrente e de tensão. Constrói-se o dispositivo que consiste de circuitos eletrônicos controlados por microcontrolador, com possibilidade de ajuste de parâmetros da onda gerada. O dispositivo produzido é utilizado para medição da impedância do solo e verificação do comportamento de sistemas de aterramento elétrico em baixas e altas frequências. São apresentados os resultados dos testes em diferentes tipos de sistemas, demonstrando o satisfatório desempenho quando comparado com instrumento comercial.
Krishnamurthy, Smitha. "SOLAR AND FUEL CELL CIRCUIT MODELING, ANALYSIS AND INTEGRATIONS WITH POWER CONVERSION CIRCUITS FOR DISTRIBUTED GENERATION". Master's thesis, University of Central Florida, 2009. http://digital.library.ucf.edu/cdm/ref/collection/ETD/id/3501.
Texto completoM.S.
School of Electrical Engineering and Computer Science
Engineering and Computer Science
Electrical Engineering MSEE
Bollinger, S. Wayne. "Hierarchical test generation for CMOS circuits". Diss., This resource online, 1992. http://scholar.lib.vt.edu/theses/available/etd-07282008-134708/.
Texto completoLee, Kyung Tek. "Crosstalk fault test generation and hierarchical timing verification in VLSI digital circuits /". Digital version accessible at:, 1999. http://wwwlib.umi.com/cr/utexas/main.
Texto completoLazzari, Cristiano. "Transistor level automatic generation of radiation-hardened circuits". reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2007. http://hdl.handle.net/10183/15506.
Texto completoDeep submicron (DSM) technologies have increased the challenges in circuit designs due to geometry shrinking, power supply reduction, frequency increasing and high logic density. The reliability of integrated circuits is significantly reduced as a consequence of the susceptibility to crosstalk and substrate coupling. In addition, radiation effects are also more significant because particles with low energy, without importance in older technologies, start to be a problem in DSM technologies. All these characteristics emphasize the need for new Electronic Design Automation (EDA) tools. One of the goals of this thesis is to develop EDA tools able to cope with these DSM challenges. This thesis is divided in two major contributions. The first contribution is related to the development of a new methodology able to generate optimized circuits in respect to timing and power consumption. A new design flow is proposed in which the circuit is optimized at transistor level. This methodology allows the optimization of every single transistor according to the capacitances associated to it. Different from the traditional standard cell approach, the layout is generated on demand after a transistor level optimization process. Results show an average 11% delay improvement and more than 30% power saving in comparison with the traditional design flow. The second contribution of this thesis is related with the development of techniques for radiation-hardened circuits. The Code Word State Preserving (CWSP) technique is used to apply timing redundancy into latches and flipflops. This technique presents low area overhead, but timing penalties are totally related with the glitch duration is being attenuated. Further, a new transistor sizing methodology for Single Event Transient (SET) attenuation is proposed. The sizing method is based on an analytic model. The model considers independently pull-up and pull-down blocks. Thus, only transistors directly related to the SET attenuation are sized. Results show smaller area, timing and power consumption overhead in comparison with TMR and CWSP techniques allowing the development of high frequency circuits, with lower area and power overhead.
Hutton, Michael D. "Characterization and parameterized generation of digital circuits". Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1997. http://www.collectionscanada.ca/obj/s4/f2/dsk2/tape16/PQDD_0021/NQ27666.pdf.
Texto completoVasudevan, Dilip Prasad. "Automatic test pattern generation for asynchronous circuits". Thesis, University of Edinburgh, 2012. http://hdl.handle.net/1842/7670.
Texto completoLibros sobre el tema "GENERATING CIRCUITS"
Martins, Ricardo M. F. Generating Analog IC Layouts with LAYGEN II. Berlin, Heidelberg: Springer Berlin Heidelberg, 2013.
Buscar texto completoGivon, Lev E. An Open Pipeline for Generating Executable Neural Circuits from Fruit Fly Brain Data. [New York, N.Y.?]: [publisher not identified], 2016.
Buscar texto completoModel engineering in mixed-signal circuit design: A guide to generating accurate behavioral models in VHDL-AMS. Boston: Kluwer Academic Publishers, 2001.
Buscar texto completoZeljko, Zilic y SpringerLink (Online service), eds. Generating Hardware Assertion Checkers: For Hardware Verification, Emulation, Post-Fabrication Debugging and On-Line Monitoring. Dordrecht: Springer Science + Business Media B.V, 2008.
Buscar texto completoBobyr', Maksim, Vitaliy Titov y Vladimir Ivanov. Design of analog and digital devices. ru: INFRA-M Academic Publishing LLC., 2020. http://dx.doi.org/10.12737/1070341.
Texto completoIEEE Power Engineering Society. Power Generation Committee., ed. IEEE recommended practice for the design of safety-related DC auxiliary power systems for nuclear power generating stations. New York, NY, USA: Institute of Electrical and Electronics Engineers, 1985.
Buscar texto completoLin, Chieh. Mixed-signal layout generation concepts. Boston: Kluwer Academic Publishers, 2003.
Buscar texto completoLin, Chieh. Mixed-signal layout generation concepts. Boston, MA: Kluwer Academic Publishers, 2004.
Buscar texto completoLampaert, Koen. Analog layout generation for performance and manufacturability. Boston: Kluwer Academic, 1999.
Buscar texto completoDhiman, Rohit. Nanoelectronics for Next-Generation Integrated Circuits. Boca Raton: CRC Press, 2022. http://dx.doi.org/10.1201/9781003155751.
Texto completoCapítulos de libros sobre el tema "GENERATING CIRCUITS"
Mellergaard, Niels y Jørgen Staunstrup. "Generating Proof Obligations for Circuits". En Workshops in Computing, 185–200. London: Springer London, 1993. http://dx.doi.org/10.1007/978-1-4471-3558-6_11.
Texto completoTanaka, Takushi. "Generating explanations from electronic circuits". En Lecture Notes in Computer Science, 739–48. Berlin, Heidelberg: Springer Berlin Heidelberg, 1998. http://dx.doi.org/10.1007/3-540-64582-9_806.
Texto completoSheeran, Mary. "Generating Fast Multipliers Using Clever Circuits". En Formal Methods in Computer-Aided Design, 6–20. Berlin, Heidelberg: Springer Berlin Heidelberg, 2004. http://dx.doi.org/10.1007/978-3-540-30494-4_2.
Texto completoStent, Gunther S. "Neural Circuits for Generating Rhythmic Movements". En Self-Organizing Systems, 245–63. Boston, MA: Springer US, 1987. http://dx.doi.org/10.1007/978-1-4613-0883-6_14.
Texto completoValiron, Benoît. "Generating Reversible Circuits from Higher-Order Functional Programs". En Reversible Computation, 289–306. Cham: Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-40578-0_21.
Texto completoLi, Zhiqiang, Jiajia Hu, Xi Wu, Juan Dai, Wei Zhang y Donghan Yang. "An Efficient Method for Generating Matrices of Quantum Logic Circuits". En Lecture Notes in Computer Science, 142–50. Cham: Springer International Publishing, 2020. http://dx.doi.org/10.1007/978-3-030-57884-8_13.
Texto completoAli Taher, Murad Ahmed. "Algorithmic Method for Generating DC-DC Converter Circuits by Using Topological Matrix". En Communications in Computer and Information Science, 714–23. Berlin, Heidelberg: Springer Berlin Heidelberg, 2011. http://dx.doi.org/10.1007/978-3-642-22603-8_62.
Texto completoGoldberg, Eugene y Panagiotis Manolios. "Generating High-Quality Tests for Boolean Circuits by Treating Tests as Proof Encoding". En Tests and Proofs, 101–16. Berlin, Heidelberg: Springer Berlin Heidelberg, 2010. http://dx.doi.org/10.1007/978-3-642-13977-2_10.
Texto completoSziray, József. "Test Generation for Short-Circuit Faults in Digital Circuits". En Studies in Computational Intelligence, 313–19. Cham: Springer International Publishing, 2014. http://dx.doi.org/10.1007/978-3-319-03206-1_21.
Texto completoMaheshwari, Sudhanshu. "Waveform generation circuits". En Analog Circuit Design using Current-Mode Techniques, 109–33. Boca Raton: CRC Press, 2023. http://dx.doi.org/10.1201/9781003403111-7.
Texto completoActas de conferencias sobre el tema "GENERATING CIRCUITS"
Gaber, Lamya, Aziza I. Hussein y Mohammed Moness. "Incremental Automatic Correction for Digital VLSI Circuits". En 10th International Conference on Advances in Computing and Information Technology (ACITY 2020). AIRCC Publishing Corporation, 2020. http://dx.doi.org/10.5121/csit.2020.101508.
Texto completoTabei, Kaku y Toshinori Yamada. "On generating test sets for reversible circuits". En Systems (ICCES). IEEE, 2009. http://dx.doi.org/10.1109/icces.2009.5383305.
Texto completoDubrov, Denis y Alexander Roshal. "Generating pipeline integrated circuits using C2HDL converter". En 2013 11th East-West Design and Test Symposium (EWDTS). IEEE, 2013. http://dx.doi.org/10.1109/ewdts.2013.6673108.
Texto completoKiselyov, Oleg, Kedar N. Swadi y Walid Taha. "A methodology for generating verified combinatorial circuits". En the fourth ACM international conference. New York, New York, USA: ACM Press, 2004. http://dx.doi.org/10.1145/1017753.1017794.
Texto completoMutlu, Mustafa Umut, Ümit Hakan Yildiz y Osman Akın. "Polymer nanofiber-carbon nanotube network generating circuits". En Organic Photonic Materials and Devices XX, editado por Christopher E. Tabor, François Kajzar, Toshikuni Kaino y Yasuhiro Koike. SPIE, 2018. http://dx.doi.org/10.1117/12.2289085.
Texto completoS, Riju y Soni Meera G. V. "High Speed Built in Self-Test via Pattern Generation". En The International Conference on scientific innovations in Science, Technology, and Management. International Journal of Advanced Trends in Engineering and Management, 2023. http://dx.doi.org/10.59544/lgqz5151/ngcesi23p122.
Texto completoLee, David y Jehoshua Bruck. "Generating probability distributions using multivalued stochastic relay circuits". En 2011 IEEE International Symposium on Information Theory - ISIT. IEEE, 2011. http://dx.doi.org/10.1109/isit.2011.6034134.
Texto completoHernandez-Araya, Deykel, Jorge Castro-Godinez, Muhammad Shafique y Jorg Henkel. "AUGER: A Tool for Generating Approximate Arithmetic Circuits". En 2020 IEEE 11th Latin American Symposium on Circuits & Systems (LASCAS). IEEE, 2020. http://dx.doi.org/10.1109/lascas45839.2020.9069045.
Texto completoMoussalli, Roger, Bharat Sukhwani y Sameh Asaad. "FINPAGE: Generating high performance feed-specific parser circuits". En 2013 IEEE Global Conference on Signal and Information Processing (GlobalSIP). IEEE, 2013. http://dx.doi.org/10.1109/globalsip.2013.6737095.
Texto completoWeingarten, K. J., M. J. W. Rodwell, J. L. Freeman, S. K. Diamond y D. M. Bloom. "Electrooptic Sampling of GaAs Integrated Circuits". En International Conference on Ultrafast Phenomena. Washington, D.C.: Optica Publishing Group, 1986. http://dx.doi.org/10.1364/up.1986.ma2.
Texto completoInformes sobre el tema "GENERATING CIRCUITS"
Ghosh, Abhijit, Srinivas Devadas y A. R. Newton. Test Generation for Highly Sequential Circuits. Fort Belvoir, VA: Defense Technical Information Center, agosto de 1989. http://dx.doi.org/10.21236/ada211932.
Texto completoAuthor, Not Given. Advanced Gate Dielectric Materials for Next-Generation Integrated Circuits. Office of Scientific and Technical Information (OSTI), octubre de 2018. http://dx.doi.org/10.2172/1483866.
Texto completoCardwell, Suma, John Smith y Douglas Crowder. AI-enhanced Codesign for Next-Generation Neuromorphic Circuits and Systems. Office of Scientific and Technical Information (OSTI), septiembre de 2022. http://dx.doi.org/10.2172/1889339.
Texto completoBoppana, Vamsi y W. Kent Fuchs. Dynamic Fault Collapsing and Diagnostic Test Pattern Generation for Sequential Circuits. Fort Belvoir, VA: Defense Technical Information Center, noviembre de 1998. http://dx.doi.org/10.21236/ada351548.
Texto completoVawter, G. A., A. Mar, J. Zolper y V. Hietala. Photonic integrated circuit for all-optical millimeter-wave signal generation. Office of Scientific and Technical Information (OSTI), marzo de 1997. http://dx.doi.org/10.2172/469141.
Texto completoEshed, Yuval y Sarah Hake. Exploring General and Specific Regulators of Phase Transitions for Crop Improvement. United States Department of Agriculture, noviembre de 2012. http://dx.doi.org/10.32747/2012.7699851.bard.
Texto completoModeling a Printed Circuit Heat Exchanger with RELAP5-3D for the Next Generation Nuclear Plant. Office of Scientific and Technical Information (OSTI), diciembre de 2010. http://dx.doi.org/10.2172/1004237.
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