Artículos de revistas sobre el tema "GDI TECHNIQUE"
Crea una cita precisa en los estilos APA, MLA, Chicago, Harvard y otros
Consulte los 50 mejores artículos de revistas para su investigación sobre el tema "GDI TECHNIQUE".
Junto a cada fuente en la lista de referencias hay un botón "Agregar a la bibliografía". Pulsa este botón, y generaremos automáticamente la referencia bibliográfica para la obra elegida en el estilo de cita que necesites: APA, MLA, Harvard, Vancouver, Chicago, etc.
También puede descargar el texto completo de la publicación académica en formato pdf y leer en línea su resumen siempre que esté disponible en los metadatos.
Explore artículos de revistas sobre una amplia variedad de disciplinas y organice su bibliografía correctamente.
Saxena, Rimjhim y Kiran Sharma. "Delay Optimization and Power Optimization of 4-Bit ALU Designed in FS-GDI Technique". SMART MOVES JOURNAL IJOSCIENCE 6, n.º 2 (1 de febrero de 2020): 1–12. http://dx.doi.org/10.24113/ijoscience.v6i2.264.
Texto completoA.S., Prabhu, Naveena B, Parimaladevi K, Samundeswari M y Thilagavathy P. "Serial Divider Using Modified GDI Technique". IJIREEICE 3, n.º 10 (15 de octubre de 2015): 73–76. http://dx.doi.org/10.17148/ijireeice.2015.31017.
Texto completoSolomon, Merrin Mary, Neeraj Gupta y Rashmi Gupta. "HIGH SPEED ADDER USING GDI TECHNIQUE". International Journal of Engineering Technologies and Management Research 5, n.º 2 (30 de abril de 2020): 130–36. http://dx.doi.org/10.29121/ijetmr.v5.i2.2018.634.
Texto completoAnitha, M., J. Princy Joice y Rexlin Sheeba.I. "A New-High Speed-Low Power-Carry Select Adder Using Modified GDI Technique". International Journal of Reconfigurable and Embedded Systems (IJRES) 4, n.º 3 (1 de noviembre de 2015): 173. http://dx.doi.org/10.11591/ijres.v4.i3.pp173-177.
Texto completoB Sangeeth Kumar,, Pyasa Dileep and A. Satyanarayana. "Design of Low Power & Area Efficient of 8-Bit Comparator using GDI Technique". International Journal for Modern Trends in Science and Technology, n.º 8 (7 de agosto de 2020): 62–65. http://dx.doi.org/10.46501/ijmtst060812.
Texto completoSehrawat, Arjun, Vandana Khanna y Kushal Jindal. "Comparative Study of CMOS Logic and Modified GDI Technique for Basic Logic Gates and Code Convertor". International Journal of Advance Research and Innovation 9, n.º 3 (2021): 70–85. http://dx.doi.org/10.51976/ijari.932111.
Texto completoTyagi, Priyanka, Sanjay Kumar Singh y Piyush Dua. "Gate Diffusion Input Based 10-T CNTFET Power Efficient Full Adder". Recent Advances in Electrical & Electronic Engineering (Formerly Recent Patents on Electrical & Electronic Engineering) 14, n.º 4 (17 de junio de 2021): 415–27. http://dx.doi.org/10.2174/2352096514666210106094136.
Texto completoR., Manjunath. "LOW POWER OPTIMIZATION OF FULL ADDER CIRCUIT BASED ON GDI LOGIC FOR BIOMEDICAL APPLICATIONS". International Journal of Advanced Research 10, n.º 10 (31 de octubre de 2022): 457–67. http://dx.doi.org/10.21474/ijar01/15511.
Texto completoGupta, Shashank y Subodh Wairya. "Hybrid Code Converters using Modified GDI Technique". International Journal of Computer Applications 143, n.º 7 (17 de junio de 2016): 12–19. http://dx.doi.org/10.5120/ijca2016910248.
Texto completoHari Kishore, K., K. DurgaKoteswara Rao, G. Manvith, K. Biswanth y P. Alekhya. "Area, power and delay efficient 2-bit magnitude comparator using modified gdi technique in tanner 180nm technology". International Journal of Engineering & Technology 7, n.º 2.8 (19 de marzo de 2018): 222. http://dx.doi.org/10.14419/ijet.v7i2.8.10413.
Texto completoPonnian, Jebashini, Senthil Pari, Uma Ramadass y Chee Pun Ooi. "A Unified Power-Delay Model for GDI Library Cell Created Using New Mux Based Signal Connectivity Algorithm". Emerging Science Journal 7, n.º 4 (12 de julio de 2023): 1364–94. http://dx.doi.org/10.28991/esj-2023-07-04-022.
Texto completoN., Alivelu Manga. "Design of High-Speed Low Power Computational Blocks for DSP Processors". Revista Gestão Inovação e Tecnologias 11, n.º 2 (5 de junio de 2021): 1419–29. http://dx.doi.org/10.47059/revistageintec.v11i2.1768.
Texto completoKumre, Laxmi, Ajay Somkuwar y Ganga Agnihotri. "Analysis of GDI Technique for Digital Circuit Design". International Journal of Computer Applications 76, n.º 16 (23 de agosto de 2013): 41–48. http://dx.doi.org/10.5120/13335-0934.
Texto completoDurga, Gaddam Naga y D. V. A. N. Ravi Kumar. "Gdi Technique Based Carry Look Ahead Adder Design". IOSR Journal of VLSI and Signal Processing 4, n.º 6 (2014): 01–09. http://dx.doi.org/10.9790/4200-04610109.
Texto completoReissing, J., H. Peters, J. M. Kech y U. Spicher. "Experimental and numerical analyses of the combustion process in a direct injection gasoline engine". International Journal of Engine Research 1, n.º 2 (1 de abril de 2000): 147–61. http://dx.doi.org/10.1243/1468087001545100.
Texto completoSuresh, N., K. Subba Rao y R. Vassoudevan. "Low Power High Performance Full Adder Design Using Gate Diffusion Input Techniques". Journal of Computational and Theoretical Nanoscience 17, n.º 4 (1 de abril de 2020): 1595–99. http://dx.doi.org/10.1166/jctn.2020.8407.
Texto completoPokhriyal, Nidhi y Neelam Rup Prakash. "Area Efficient Low Power Compressor Design Using GDI Technique". International Journal of Engineering Trends and Technology 12, n.º 3 (25 de junio de 2014): 132–35. http://dx.doi.org/10.14445/22315381/ijett-v12p224.
Texto completoKowsalya, P., M. Malathi y Palaniappan Ramanathan. "Low Power Parallel Prefix Adder". Applied Mechanics and Materials 573 (junio de 2014): 194–200. http://dx.doi.org/10.4028/www.scientific.net/amm.573.194.
Texto completoKuruvilla, Siya Susan, Stephani Sunil, Abisha Susan Alichan y Abraham K. Thomas. "Comparison of Vedic Multiplier Implementation Using Gate Diffusion Input and Modified Gate Diffusion Input Techniques". Journal of Signal Processing 8, n.º 2 (22 de junio de 2022): 1–5. http://dx.doi.org/10.46610/josp.2022.v08i02.001.
Texto completoPanarelli, Joseph F. y Anna T. Do. "Bleb Management Following Trabeculectomy and Glaucoma Drainage Device Implantation". US Ophthalmic Review 16, n.º 2 (2022): 76. http://dx.doi.org/10.17925/usor.2022.16.2.76.
Texto completoPokhriyal, Nidhi y Neelam Rup Prakash. "Area Efficient Low Power Vedic Multiplier Design Using GDI Technique". International Journal of Engineering Trends and Technology 15, n.º 4 (25 de septiembre de 2014): 196–99. http://dx.doi.org/10.14445/22315381/ijett-v15p238.
Texto completoKaur, Ranbirjeet y Rajesh Mehra. "Power and Area Efficient CMOS Half Adder using GDI Technique". International Journal of Engineering Trends and Technology 36, n.º 8 (25 de junio de 2016): 401–5. http://dx.doi.org/10.14445/22315381/ijett-v36p274.
Texto completoDabhade, Priyanka y Amol Boke. "Design and Analyse Low Power Wallace Multiplier Using GDI Technique". IOSR Journal of Electronics and Communication Engineering 12, n.º 02 (abril de 2017): 49–54. http://dx.doi.org/10.9790/2834-1202034954.
Texto completoNagarajan, Manikandan, Rajappa Muthaiah, Yuvaraja Teekaraman, Ramya Kuppusamy y Arun Radhakrishnan. "Power and Area Efficient Cascaded Effectless GDI Approximate Adder for Accelerating Multimedia Applications Using Deep Learning Model". Computational Intelligence and Neuroscience 2022 (19 de marzo de 2022): 1–15. http://dx.doi.org/10.1155/2022/3505439.
Texto completoAnitha, M., J. Princy joice y Mrs Rexlin Sheeba.I. "A New-High Speed-Low Power-Carry Select adder Using Modified GDI Technique". International Journal of Engineering Research 4, n.º 3 (1 de marzo de 2015): 127–29. http://dx.doi.org/10.17950/ijer/v4s3/309.
Texto completoEt. al., J. Nageswara Reddy ,. "Power Efficient Two Transistor Exclusiveor Gate for Full Adder Usinggdi in 45NM". Turkish Journal of Computer and Mathematics Education (TURCOMAT) 12, n.º 2 (11 de abril de 2021): 1342–47. http://dx.doi.org/10.17762/turcomat.v12i2.1230.
Texto completoSharma, Priyanka. "High Performance Sense Amplifier based Flip Flop Design using GDI Technique". International Journal of Advanced engineering, Management and Science 3, n.º 4 (2017): 350–54. http://dx.doi.org/10.24001/ijaems.3.4.11.
Texto completoMurthy, CRavindra. "Low Power Design Bi – Directional Shift Register By using GDI Technique". International Journal on Recent and Innovation Trends in Computing and Communication 3, n.º 4 (2015): 2367–73. http://dx.doi.org/10.17762/ijritcc2321-8169.1504128.
Texto completoSivathanu, Yudaya, Jongmook Lim, Ariel Muliadi, Oana Nitulescu y Tom Shieh. "Estimating velocity in Gasoline Direct Injection sprays using statistical pattern imaging velocimetry". International Journal of Spray and Combustion Dynamics 11 (28 de junio de 2018): 175682771877828. http://dx.doi.org/10.1177/1756827718778289.
Texto completoSharma, Satish, Shyam Babu Singh y Shyam Akashe. "A Power Efficient GDI Technique for Reversible Logic Multiplexer of Emerging Nanotechnologies". International Journal of Computer Applications 73, n.º 14 (26 de julio de 2013): 8–14. http://dx.doi.org/10.5120/12807-9900.
Texto completoRamya . S, Sri Phani y Nimmy Maria Jose. "A Low Power Binary to Excess-1 Code Converter Using GDI Technique". International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering 04, n.º 01 (20 de enero de 2015): 209–14. http://dx.doi.org/10.15662/ijareeie.2015.0401031.
Texto completokaur, Simran, Balwinder Singh y Jain D.K. "Design and Performance Analysis of Various Adders and Multipliers Using GDI Technique". International Journal of VLSI Design & Communication Systems 6, n.º 5 (30 de octubre de 2015): 45–56. http://dx.doi.org/10.5121/vlsic.2015.6504.
Texto completoNaveenkumar, Majety. "Novel Design of Reversible MUX and DEMUX using GDI Techinque". International Journal of Advances in Applied Sciences 4, n.º 3 (1 de septiembre de 2015): 103. http://dx.doi.org/10.11591/ijaas.v4.i3.pp103-108.
Texto completoDi Ilio, Giovanni, Vesselin K. Krastev y Giacomo Falcucci. "Evaluation of a Scale-Resolving Methodology for the Multidimensional Simulation of GDI Sprays". Energies 12, n.º 14 (15 de julio de 2019): 2699. http://dx.doi.org/10.3390/en12142699.
Texto completoGujjula, Ramana Reddy, Chitra Perumal, Prakash Kodali y Bodapati Venkata Rajanna. "Datasets design of gate diffusion input based pipeline architecture for numerically controlled oscillator". Indonesian Journal of Electrical Engineering and Computer Science 26, n.º 1 (1 de abril de 2022): 253. http://dx.doi.org/10.11591/ijeecs.v26.i1.pp253-260.
Texto completoJeyasree, C. y R. Arul Raj. "Design Of Low Power And Area Efficient SRAM Architecture Based on GDI Technique". International Journal of MC Square Scientific Research 9, n.º 1 (16 de abril de 2017): 18–25. http://dx.doi.org/10.20894/ijmsr.117.009.001.003.
Texto completoce, Prin y Rajesh Mehra. "Design of an Energy Efficient, Low Power Dissipation Half Subtractor using GDI Technique". International Journal of Engineering Trends and Technology 36, n.º 2 (25 de junio de 2016): 53–59. http://dx.doi.org/10.14445/22315381/ijett-v36p211.
Texto completoY, Syamala, Srilakshmi K y Somasekhar Varma N. "Design of Low Power CMOS Logic Circuits Using Gate Diffusion Input (GDI) Technique". International Journal of VLSI Design & Communication Systems 4, n.º 5 (31 de octubre de 2013): 89–95. http://dx.doi.org/10.5121/vlsic.2013.4507.
Texto completoSharma, Sandesh y Vangmayee Sharda. "Design and Analysis of 8-bit Vedic Multiplier in 90nm Technology using GDI Technique". International Journal of Engineering & Technology 7, n.º 3.12 (20 de julio de 2018): 759. http://dx.doi.org/10.14419/ijet.v7i3.12.16496.
Texto completoSaxena, Rimjhim y Kiran Sharma. "A Comparative Review on ALU using CMOS and GDI techniques for Power Dissipation and Propagation Delay". IJOSTHE 7, n.º 1 (19 de febrero de 2020): 4. http://dx.doi.org/10.24113/ojssports.v7i1.119.
Texto completoKhokha, Simran y Rahul Reddy K. "Low Power-Area Design of Full Adder Using Self Resetting Logic with GDI Technique". International Journal of VLSI Design & Communication Systems 7, n.º 4 (30 de agosto de 2016): 57–69. http://dx.doi.org/10.5121/vlsic.2016.7406.
Texto completoJung, Seungmin. "A Study on the VLSI Implementation of Fingerprint Thinning Processors Using Hybrid GDI Technique". Journal of Computing Science and Engineering 17, n.º 1 (31 de marzo de 2023): 20–29. http://dx.doi.org/10.5626/jcse.2023.17.1.20.
Texto completoParvathi, M., N. Vasantha y K. Satya Prasad. "BIST Architecture using Area Efficient Low Current LFSR for Embedded Memory Testing Applications Applications". International Journal of Reconfigurable and Embedded Systems (IJRES) 7, n.º 1 (1 de marzo de 2018): 1. http://dx.doi.org/10.11591/ijres.v7.i1.pp1-11.
Texto completoLakshmaiah, Dayadi, Dr M. V. Subramanyam y Dr K. Sathya Prasad. "A Novel Design of Low-Power 1-Bit CMOS Full-Adder Cell using XNOR and MUX". INTERNATIONAL JOURNAL OF MANAGEMENT & INFORMATION TECHNOLOGY 7, n.º 3 (15 de diciembre de 2013): 1155–65. http://dx.doi.org/10.24297/ijmit.v7i3.702.
Texto completoYadav, Neetika y Preeti Kumari. "Design and Implementation of Power and Area Efficient 3-Bit Flash ADC using GDI Technique". International Journal of Computer Applications 182, n.º 2 (16 de julio de 2018): 13–16. http://dx.doi.org/10.5120/ijca2018917452.
Texto completoSingh, Haramardeep y Harmeet Kaur. "Design and Simulation of Novel 10-T Subtraction logic for ALU design using GDI Technique". International Journal of Hybrid Information Technology 8, n.º 10 (31 de octubre de 2015): 405–16. http://dx.doi.org/10.14257/ijhit.2015.8.10.37.
Texto completoSingh, Haramardeep y Harmeet Kaur. "Design and Simulation of Novel 10-T Subtraction Logic for ALU Design Using GDI Technique". International Journal of Hybrid Information Technology 8, n.º 7 (31 de julio de 2015): 293–304. http://dx.doi.org/10.14257/ijhit.2015.8.7.27.
Texto completoSingh, Haramardeep y Harmeet Kaur. "Design and Simulation of Novel 10-T Subtraction Logic for ALU Design using GDI Technique". International Journal of Hybrid Information Technology 9, n.º 2 (28 de febrero de 2016): 203–14. http://dx.doi.org/10.14257/ijhit.2016.9.2.18.
Texto completoChen, Hao, Chenxi Wang, Xiang Li, Yongzhi Li, Miao Zhang, Zhijun Peng, Yiqiang Pei et al. "Quantitative Analysis of Water Injection Mass and Timing Effects on Oxy-Fuel Combustion Characteristics in a GDI Engine Fuelled with E10". Sustainability 15, n.º 13 (29 de junio de 2023): 10290. http://dx.doi.org/10.3390/su151310290.
Texto completoPotenza, Marco, Marco Milanese, Fabrizio Naccarato y Arturo de Risi. "In-cylinder soot concentration measurement by Neural Network Two Colour technique (NNTC) on a GDI engine". Combustion and Flame 217 (julio de 2020): 331–45. http://dx.doi.org/10.1016/j.combustflame.2020.03.024.
Texto completo