Bibliografías temáticas / Floating point

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Literatura académica sobre el tema "Floating point"

Autor: Grafiati
Publicado: 4 de junio de 2021
Última modificación: 25 de julio de 2025

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Artículos de revistas sobre el tema "Floating point"

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Jorgensen, Alan A., Las Vegas, Connie R. Masters, Ratan K. Guha, and Andrew C. Masters. "Bounded Floating Point: Identifying and Revealing Floating-Point Error." Advances in Science, Technology and Engineering Systems Journal 6, no. 1 (2021): 519–31. http://dx.doi.org/10.25046/aj060157.

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M. Somasekhar, M. Somasekhar. "Floating Point Operations in PipeRench CGRA." International Journal of Scientific Research 1, no. 6 (2012): 67–68. http://dx.doi.org/10.15373/22778179/nov2012/24.

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Boldo, Sylvie, Claude-Pierre Jeannerod, Guillaume Melquiond, and Jean-Michel Muller. "Floating-point arithmetic." Acta Numerica 32 (May 2023): 203–90. http://dx.doi.org/10.1017/s0962492922000101.

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Floating-point numbers have an intuitive meaning when it comes to physics-based numerical computations, and they have thus become the most common way of approximating real numbers in computers. The IEEE-754 Standard has played a large part in making floating-point arithmetic ubiquitous today, by specifying its semantics in a strict yet useful way as early as 1985. In particular, floating-point operations should be performed as if their results were first computed with an infinite precision and then rounded to the target format. A consequence is that floating-point arithmetic satisfies the ‘sta
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Boldo, Sylvie, Claude-Pierre Jeannerod, Guillaume Melquiond, and Jean-Michel Muller. "Floating-point arithmetic." Acta Numerica 32 (May 1, 2023): 203–90. https://doi.org/10.1017/s0962492922000101.

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Floating-point numbers have an intuitive meaning when it comes to physics-based numerical computations, and they have thus become the most common way of approximating real numbers in computers. The IEEE-754 Standard has played a large part in making floating-point arithmetic ubiquitous today, by specifying its semantics in a strict yet useful way as early as 1985. In particular, floating-point operations should be performed as if their results were first computed with an infinite precision and then rounded to the target format. A consequence is that floating-point arithmetic satisfies the 'sta
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5

Blinn, J. F. "Floating-point tricks." IEEE Computer Graphics and Applications 17, no. 4 (1997): 80–84. http://dx.doi.org/10.1109/38.595279.

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Ghosh, Aniruddha, Satrughna Singha, and Amitabha Sinha. ""Floating point RNS"." ACM SIGARCH Computer Architecture News 40, no. 2 (2012): 39–43. http://dx.doi.org/10.1145/2234336.2234343.

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Harrison, John. "Floating-Point Verification." JUCS - Journal of Universal Computer Science 13, no. (5) (2007): 629–38. https://doi.org/10.3217/jucs-013-05-0629.

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This paper overviews the application of formal verification techniques to hardware ingeneral, and to floating-point hardware in particular. A specific challenge is to connect the usual mathematical view of continuous arithmetic operations with the discrete world, in a credible andverifiable way.
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Kavya, Nagireddy. "Design and Implementation of Floating-Point Addition and Floating-Point Multiplication." International Journal for Research in Applied Science and Engineering Technology 10, no. 1 (2022): 98–101. http://dx.doi.org/10.22214/ijraset.2022.39742.

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Abstract: In this paper, we present the design and implementation of Floating point addition and Floating point Multiplication. There are many multipliers in existence in which Floating point Multiplication and Floating point addition offers a high precision and more accuracy for the data representation of the image. This project is designed and simulated on Xilinx ISE 14.7 version software using verilog. Simulation results show area reduction and delay reduction as compared to the conventional method. Keywords: FIR Filter, Floating point Addition, Floating point Multiplication, Carry Look Ahe
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Ms., Anuja A. Bhat* &. Prof. Rutuja Warbhe. "DESIGN OF FLOATING POINT MULTIPLIER BASED ON BOOTH ALGORITHM USING VHDL." INTERNATIONAL JOURNAL OF RESEARCH SCIENCE & MANAGEMENT 4, no. 5 (2017): 123–30. https://doi.org/10.5281/zenodo.580862.

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In this paper, high Speed, low power and less delay 32-bit IEEE 754 Floating PointSubtractor andMultiplierispresented using Booth Multiplier. Multiplication is an important fundamental function in many Digital Signal Processing (DSP) applications such as Fast Fourier Transform (FFT). Since multiplication dominates the execution time of most DSP algorithms, so there is a need of high speed multiplier. The main objective of this researchis to reduce delay, power and to increase the speed.The coding is done in VHDL, synthesis and simulationhas been done using Xilinx ISE simulator. The modules des
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Mishra, Raj Gaurav, and Amit Kumar Shrivastava. "Implementation of Custom Precision Floating Point Arithmetic on FPGAs." HCTL Open International Journal of Technology Innovations and Research (IJTIR) 1, January 2013 (2013): 10–26. https://doi.org/10.5281/zenodo.160887.

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Floating point arithmetic is a common requirement in signal processing, image processing and real time data acquisition & processing algorithms. Implementation of such algorithms on FPGA requires an efficient implementation of floating point arithmetic core as an initial process. We have presented an empirical result of the implementation of custom-precision floating point numbers on an FPGA processor using the rules of IEEE standards defined for single and double precision floating point numbers. Floating point operations are difficult to implement on FPGAs because of their complexity in
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Tesis sobre el tema "Floating point"

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Skogstrøm, Kristian. "Implementation of Floating-point Coprocessor." Thesis, Norwegian University of Science and Technology, Department of Computer and Information Science, 2005. http://urn.kb.se/resolve?urn=urn:nbn:no:ntnu:diva-9202.

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<p>This thesis presents the architecture and implementation of a high-performance floating-point coprocessor for Atmel's new microcontroller. The coprocessor architecture is based on a fused multiply-add pipeline developed in the specialization project, TDT4720. This pipeline has been optimized significantly and extended to support negation of all operands and single-precision input and output. New hardware has been designed for the decode/fetch unit, the register file, the compare/convert pipeline and the approximation tables. Division and square root is performed in software using Newton-Ra
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Zhang, Yiwei. "Biophysically accurate floating point neuroprocessors." Thesis, University of Bristol, 2011. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.544427.

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Baidas, Zaher Abdulkarim. "High-level floating-point synthesis." Thesis, University of Southampton, 2000. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.325049.

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Duracz, Jan Andrzej. "Verification of floating point programs." Thesis, Aston University, 2010. http://publications.aston.ac.uk/15778/.

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In this thesis we present an approach to automated verification of floating point programs. Existing techniques for automated generation of correctness theorems are extended to produce proof obligations for accuracy guarantees and absence of floating point exceptions. A prototype automated real number theorem prover is presented, demonstrating a novel application of function interval arithmetic in the context of subdivision-based numerical theorem proving. The prototype is tested on correctness theorems for two simple yet nontrivial programs, proving exception freedom and tight accuracy guaran
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Ross, Johan, and Hans Engström. "Voice Codec for Floating Point Processor." Thesis, Linköping University, Department of Electrical Engineering, 2008. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-15763.

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<p>As part of an ongoing project at the department of electrical engineering, ISY, at Linköping University, a voice decoder using floating point formats has been the focus of this master thesis. Previous work has been done developing an mp3-decoder using the floating point formats. All is expected to be implemented on a single DSP.The ever present desire to make things smaller, more efficient and less power consuming are the main reasons for this master thesis regarding the use of a floating point format instead of the traditional integer format in a GSM codec. The idea with the low precision
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Englund, Madeleine. "Hybrid Floating-point Units in FPGAs." Thesis, Linköpings universitet, Datorteknik, 2012. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-86587.

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Floating point numbers are used in many applications that  would be well suited to a higher parallelism than that offered in a CPU. In  these cases, an FPGA, with its ability to handle multiple calculations  simultaneously, could be the solution. Unfortunately, floating point  operations which are implemented in an FPGA is often resource intensive,  which means that many developers avoid floating point solutions in FPGAs or  using FPGAs for floating point applications. Here the potential to get less expensive floating point operations by using ahigher radix for the floating point numbers and u
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Xiao, Yancheng. "Two floating point LLL reduction algorithms." Thesis, McGill University, 2013. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=114503.

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The Lenstra, Lenstra and Lov\'sz (LLL) reduction is the most popular lattice reduction and is a powerful tool for solving many complex problems in mathematics and computer science. The blocking technique casts matrix algorithms in terms of matrix-matrix operations to permit efficient reuse of data in the algorithms. In this thesis, we use the blocking technique to develop two floating point block LLL reduction algorithms, the left-to-right block LLL (LRBLLL) reduction algorithm and the alternating partition block LLL (APBLLL) reduction algorithm, and give the complexity analysis of these two a
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Kupriianova, Olga. "Towards a modern floating-point environment." Thesis, Paris 6, 2015. http://www.theses.fr/2015PA066584/document.

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Cette thèse fait une étude sur deux moyens d'enrichir l'environnement flottant courant : le premier est d'obtenir plusieurs versions d'implantation pour chaque fonction mathématique, le deuxième est de fournir des opérations de la norme IEEE754, qui permettent de mélanger les entrées et la sortie dans les bases différentes. Comme la quantité de versions différentes pour chaque fonction mathématique est énorme, ce travail se concentre sur la génération du code. Notre générateur de code adresse une large variété de fonctions: il produit les implantations paramétrées pour les fonctions définies p
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Kupriianova, Olga. "Towards a modern floating-point environment." Electronic Thesis or Diss., Paris 6, 2015. http://www.theses.fr/2015PA066584.

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Cette thèse fait une étude sur deux moyens d'enrichir l'environnement flottant courant : le premier est d'obtenir plusieurs versions d'implantation pour chaque fonction mathématique, le deuxième est de fournir des opérations de la norme IEEE754, qui permettent de mélanger les entrées et la sortie dans les bases différentes. Comme la quantité de versions différentes pour chaque fonction mathématique est énorme, ce travail se concentre sur la génération du code. Notre générateur de code adresse une large variété de fonctions: il produit les implantations paramétrées pour les fonctions définies p
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Aamodt, Tor. "Floating-point to fixed-point compilation and embedded architectural support." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 2001. http://www.collectionscanada.ca/obj/s4/f2/dsk3/ftp04/MQ58787.pdf.

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Libros sobre el tema "Floating point"

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L, Wallis Peter J., ed. Improving floating-point programming. Wiley, 1990.

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Muller, Jean-Michel, Nicolas Brunie, Florent de Dinechin, et al. Handbook of Floating-Point Arithmetic. Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-76526-6.

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Muller, Jean-Michel, Nicolas Brisebarre, Florent de Dinechin, et al. Handbook of Floating-Point Arithmetic. Birkhäuser Boston, 2010. http://dx.doi.org/10.1007/978-0-8176-4705-6.

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service), SpringerLink (Online, ed. Handbook of floating-point arithmetic. Birkhäuser, 2010.

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Vekaria, R. Bandpass filters using floating point arithmtic. University of East London, 1994.

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Aamodt, Tor. Floating-point to fixed-point compilation and embedded architectural support. National Library of Canada, 2001.

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Russinoff, David M. Formal Verification of Floating-Point Hardware Design. Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-030-87181-9.

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Russinoff, David M. Formal Verification of Floating-Point Hardware Design. Springer International Publishing, 2019. http://dx.doi.org/10.1007/978-3-319-95513-1.

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Motorola. MC68881/MC68882 floating-point coprocessor user's manual. 2nd ed. Prentice Hall, 1989.

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IEEE Computer Society. Standards Committee. Working group of the Microprocessor Standards Subcommittee. and American National Standards Institute, eds. IEEE standard for binary floating-point arithmetic. Institute of Electrical and Electronics Engineers, Inc, 1985.

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Capítulos de libros sobre el tema "Floating point"

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Kneusel, Ronald T. "Floating Point." In Numbers and Computers. Springer International Publishing, 2015. http://dx.doi.org/10.1007/978-3-319-17260-6_3.

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Kneusel, Ronald T. "Floating Point." In Numbers and Computers. Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-50508-4_3.

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Kneusel, Ronald T. "Floating Point." In Texts in Computer Science. Springer Nature Switzerland, 2024. https://doi.org/10.1007/978-3-031-67482-2_3.

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Lloris Ruiz, Antonio, Encarnación Castillo Morales, Luis Parrilla Roure, Antonio García Ríos, and María José Lloris Meseguer. "Floating Point." In Arithmetic and Algebraic Circuits. Springer International Publishing, 2021. http://dx.doi.org/10.1007/978-3-030-67266-9_4.

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Stoyan, Gisbert, and Agnes Baran. "Floating Point Arithmetic." In Compact Textbooks in Mathematics. Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-44660-8_1.

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Kormanyos, Christopher. "Floating-Point Mathematics." In Real-Time C++. Springer Berlin Heidelberg, 2015. http://dx.doi.org/10.1007/978-3-662-47810-3_12.

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Deschamps, Jean-Pierre, Gustavo D. Sutter, and Enrique Cantó. "Floating Point Arithmetic." In Lecture Notes in Electrical Engineering. Springer Netherlands, 2012. http://dx.doi.org/10.1007/978-94-007-2987-2_12.

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Van Hoey, Jo. "Floating-Point Arithmetic." In Beginning x64 Assembly Programming. Apress, 2019. http://dx.doi.org/10.1007/978-1-4842-5076-1_11.

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Smith, Stephen. "Floating-Point Operations." In Raspberry Pi Assembly Language Programming. Apress, 2019. http://dx.doi.org/10.1007/978-1-4842-5287-1_11.

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Smith, Stephen. "Floating-Point Operations." In Programming with 64-Bit ARM Assembly Language. Apress, 2020. http://dx.doi.org/10.1007/978-1-4842-5881-1_12.

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Actas de conferencias sobre el tema "Floating point"

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Singh, Uttam, Rahul Mundliya, Raushan Maharana, and Babita Jajodia. "Floating Point Multipliers on FPGAs." In 2025 Devices for Integrated Circuit (DevIC). IEEE, 2025. https://doi.org/10.1109/devic63749.2025.11012142.

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Agrawal, Anita B., Amar Biswas, Shruti Singh, and Sayan Neogy. "Design of a Floating-Point ALU for Calculating Shortest Distance Between Two Floating Point Numbers." In 2024 4th International Conference on Sustainable Expert Systems (ICSES). IEEE, 2024. https://doi.org/10.1109/icses63445.2024.10763154.

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Zaki, Ahmad M., Mohamed H. El-Shafey, Ayman M. Bahaa-Eldin, and Gamal M. Aly. "Accurate floating-point operation using controlled floating-point precision." In 2011 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (PacRim). IEEE, 2011. http://dx.doi.org/10.1109/pacrim.2011.6032978.

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Gemini, Vipin. "Reconfigurable floating point adder." In 2014 1st International Conference on Information Technology, Computer and Electrical Engineering (ICITACEE). IEEE, 2014. http://dx.doi.org/10.1109/icitacee.2014.7065719.

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Collins, George E., and Werner Krandick. "Multiprecision floating point addition." In the 2000 international symposium. ACM Press, 2000. http://dx.doi.org/10.1145/345542.345585.

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Fandrianto, Jan, and B. Y. Woo. "VLSI floating-point processors." In 1985 IEEE 7th Symposium on Computer Arithmetic (ARITH). IEEE, 1985. http://dx.doi.org/10.1109/arith.1985.6158947.

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Han, Kyungtae, Alex G. Olson, and Brian L. Evans. "Automatic Floating-Point to Fixed-Point Transformations." In 2006 Fortieth Asilomar Conference on Signals, Systems and Computers. IEEE, 2006. http://dx.doi.org/10.1109/acssc.2006.356588.

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Marynets, K. "Study of the Antarctic Circumpolar Current via the Shallow Water Large Scale Modelling." In Floating Offshore Energy Devices. Materials Research Forum LLC, 2022. http://dx.doi.org/10.21741/9781644901731-11.

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Abstract. This paper proposes a modelling of the Antarctic Circumpolar Current (ACC) by means of a two-point boundary value problem. As the major means of exchange of water between the great ocean basins (Atlantic, Pacific and Indian), the ACC plays a highly important role in the global climate. Despite its importance, it remains one of the most poorly understood components of global ocean circulation. We present some recent results on the existence and uniqueness of solutions of a two-point nonlinear boundary value problem that arises in the modeling of the flow of the (ACC) (see discussions
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Rao, R. Prakash, N. Dhanunjaya Rao, K. Naveen, and P. Ramya. "IMPLEMENTATION OF THE STANDARD FLOATING POINT MAC USING IEEE 754 FLOATING POINT ADDER." In 2018 Second International Conference on Computing Methodologies and Communication (ICCMC). IEEE, 2018. http://dx.doi.org/10.1109/iccmc.2018.8487626.

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Lam, Michael O., and Barry L. Rountree. "Floating-Point Shadow Value Analysis." In 2016 5th Workshop on Extreme-Scale Programming Tools (ESPT). IEEE, 2016. http://dx.doi.org/10.1109/espt.2016.007.

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Informes sobre el tema "Floating point"

1

Chen, Yirng-An, and Randal E. Bryant. Verification of Floating-Point Adders. Defense Technical Information Center, 1997. http://dx.doi.org/10.21236/ada346061.

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Kahan, W. Rational Arithmetic in Floating-Point. Defense Technical Information Center, 1986. http://dx.doi.org/10.21236/ada175190.

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Dally, William J. Micro-Optimization of Floating-Point Operations. Defense Technical Information Center, 1988. http://dx.doi.org/10.21236/ada202001.

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Hauser, John R. Handling Floating-point Exceptions in Numeric Programs. Defense Technical Information Center, 1995. http://dx.doi.org/10.21236/ada637041.

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Kong, Soonho, Sicun Gao, and Edmund M. Clarke. Floating-point Bugs in Embedded GNU C Library. Defense Technical Information Center, 2013. http://dx.doi.org/10.21236/ada600185.

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Jensen, Debby. Control Implementation for the SPUR Floating Point Coprocessor. Defense Technical Information Center, 1987. http://dx.doi.org/10.21236/ada604004.

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Presuhn, R. Textual Conventions for the Representation of Floating-Point Numbers. RFC Editor, 2011. http://dx.doi.org/10.17487/rfc6340.

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Chen, Yirng-An, and Randal E. Bryant. PBHD: An Efficient Graph Representation for Floating Point Circuit Verification,. Defense Technical Information Center, 1997. http://dx.doi.org/10.21236/ada327995.

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Nagayama, Shinobu, Tsuotomu Sasao, and Jon T. Butler. Floating-Point Numeric Function Generators Based on Piecewise-Split EVMDDs. Defense Technical Information Center, 2010. http://dx.doi.org/10.21236/ada547647.

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Nash, J. G. VLSI (Very Large Scale Integration) Floating Point Chip Design Study. Defense Technical Information Center, 1985. http://dx.doi.org/10.21236/ada164198.

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