Literatura académica sobre el tema "Field Programmable Gate Arrays"
Crea una cita precisa en los estilos APA, MLA, Chicago, Harvard y otros
Consulte las listas temáticas de artículos, libros, tesis, actas de conferencias y otras fuentes académicas sobre el tema "Field Programmable Gate Arrays".
Junto a cada fuente en la lista de referencias hay un botón "Agregar a la bibliografía". Pulsa este botón, y generaremos automáticamente la referencia bibliográfica para la obra elegida en el estilo de cita que necesites: APA, MLA, Harvard, Vancouver, Chicago, etc.
También puede descargar el texto completo de la publicación académica en formato pdf y leer en línea su resumen siempre que esté disponible en los metadatos.
Artículos de revistas sobre el tema "Field Programmable Gate Arrays"
Marchal, Pierre. "Field-programmable gate arrays". Communications of the ACM 42, n.º 4 (abril de 1999): 57–59. http://dx.doi.org/10.1145/299157.299594.
Texto completoVerma, H. "Field programmable gate arrays". IEEE Potentials 18, n.º 4 (1999): 34–36. http://dx.doi.org/10.1109/45.796099.
Texto completoLombardi, F. "Field Programmable Gate-Arrays". IEEE Design & Test of Computers 15, n.º 1 (enero de 1998): 8–9. http://dx.doi.org/10.1109/mdt.1998.655176.
Texto completoBhatia, Dinesh. "Field-Programmable Gate Arrays". VLSI Design 4, n.º 4 (1 de enero de 1996): i—ii. http://dx.doi.org/10.1155/1996/87608.
Texto completoHurst, S. L. "Field programmable gate arrays". Microelectronics Journal 28, n.º 1 (enero de 1997): 102. http://dx.doi.org/10.1016/s0026-2692(97)87854-8.
Texto completoHurst, S. L. "Field-programmable gate arrays". Microelectronics Journal 25, n.º 1 (febrero de 1994): 77–78. http://dx.doi.org/10.1016/0026-2692(94)90166-x.
Texto completoJay, Christopher. "Field programmable gate arrays". Microprocessors and Microsystems 17, n.º 7 (septiembre de 1993): 370. http://dx.doi.org/10.1016/0141-9331(93)90058-f.
Texto completoGreene, J., E. Hamdy y S. Beal. "Antifuse field programmable gate arrays". Proceedings of the IEEE 81, n.º 7 (julio de 1993): 1042–56. http://dx.doi.org/10.1109/5.231343.
Texto completoLeon, A. F. "Field programmable gate arrays in space". IEEE Instrumentation & Measurement Magazine 6, n.º 4 (diciembre de 2003): 42–48. http://dx.doi.org/10.1109/mim.2003.1251482.
Texto completoRose, J., A. El Gamal y A. Sangiovanni-Vincentelli. "Architecture of field-programmable gate arrays". Proceedings of the IEEE 81, n.º 7 (julio de 1993): 1013–29. http://dx.doi.org/10.1109/5.231340.
Texto completoTesis sobre el tema "Field Programmable Gate Arrays"
Howard, Neil John. "Defect-tolerant Field-Programmable Gate Arrays". Thesis, University of York, 1994. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.359290.
Texto completoHall, Tyson Stuart. "Field-Programmable Analog Arrays: A Floating-Gate Approach". Diss., Available online, Georgia Institute of Technology, 2004:, 2004. http://etd.gatech.edu/theses/available/etd-07122004-124607/unrestricted/hall%5Ftyson%5Fs%5F200407%5Fphd.pdf.
Texto completoPrvulovic, Milos, Committee Member ; Citrin, David, Committee Member ; Lanterman, Aaron, Committee Member ; Yalamanchili, Sudhakar, Committee Member ; Hasler, Paul, Committee Member ; Anderson, David, Committee Chair. Includes bibliographical references.
Leong, David Chin Kuang. "Incremental placement for field-programmable gate arrays". Thesis, University of British Columbia, 2006. http://hdl.handle.net/2429/31671.
Texto completoApplied Science, Faculty of
Electrical and Computer Engineering, Department of
Graduate
Messa, Norman C. "Design implementation into field programmable gate arrays". Thesis, Monterey, California. Naval Postgraduate School, 1991. http://hdl.handle.net/10945/26451.
Texto completoNiu, Jianyong. "Digital control using field programmable gate arrays". Thesis, University of Sheffield, 2006. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.434507.
Texto completoLu, Aiguo. "Logic synthesis for field programmable gate arrays". Thesis, University of Bristol, 1995. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.295061.
Texto completoNewalkar, Aditya. "Alternative techniques for Built-In Self-Test of Field Programmable Gate Arrays". Auburn, Ala., 2005. http://repo.lib.auburn.edu/2005%20Summer/master's/NEWALKAR_ADITYA_6.pdf.
Texto completoКарнаушенко, В. П. y А. В. Бородин. "Field Programmable Counter Arrays Integration with Field Programmable Gates Arrays". Thesis, NURE, MC&FPGA, 2019. https://mcfpga.nure.ua/conf/2019-mcfpga/10-35598-mcfpga-2019-004.
Texto completoVachranukunkiet, Petya Nagvajara Prawat Johnson Jeremy. "Power flow computation using field programmable gate arrays /". Philadelphia, Pa. : Drexel University, 2007. http://hdl.handle.net/1860/1789.
Texto completoCamus, Dominic Roger. "Improved logic optimisation for field programmable gate arrays". Thesis, University of Oxford, 1999. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.301840.
Texto completoLibros sobre el tema "Field Programmable Gate Arrays"
Brown, Stephen D. Field-Programmable Gate Arrays. Boston, MA: Springer US, 1992.
Buscar texto completoBrown, Stephen D., Robert J. Francis, Jonathan Rose y Zvonko G. Vranesic. Field-Programmable Gate Arrays. Boston, MA: Springer US, 1992. http://dx.doi.org/10.1007/978-1-4615-3572-0.
Texto completoD, Brown Stephen, ed. Field-programmable gate arrays. Boston: Kluwer Academic Publishers, 1992.
Buscar texto completoMurgai, Rajeev. Logic synthesis for field-programmable gate arrays. Boston: Kluwer Academic Publishers, 1995.
Buscar texto completo1955-, Trimberger Stephen, ed. Field-programmable gate array technology. Boston: Kluwer Academic Publishers, 1994.
Buscar texto completoUkeiley, Richard Larry. Field programmable gate arrays (FPGAs): The 3000 series. Englewood Cliffs, N.J: PTR Prentice Hall, 1993.
Buscar texto completoVuillamy, Jean-Michel. Performance enhancement in field-programmable Gate Arrays. Ottawa: National Library of Canada, 1991.
Buscar texto completoMurgai, Rajeev. Logic Synthesis for Field-Programmable Gate Arrays. Boston, MA: Springer US, 1995.
Buscar texto completoMessa, Norman C. Design implementation into field programmable gate arrays. Monterey, Calif: Naval Postgraduate School, 1991.
Buscar texto completoMurgai, Rajeev, Robert K. Brayton y Alberto Sangiovanni-Vincentelli. Logic Synthesis for Field-Programmable Gate Arrays. Boston, MA: Springer US, 1995. http://dx.doi.org/10.1007/978-1-4615-2345-1.
Texto completoCapítulos de libros sobre el tema "Field Programmable Gate Arrays"
Gu, Changyi. "Field-Programmable Gate Arrays". En Building Embedded Systems, 191–231. Berkeley, CA: Apress, 2016. http://dx.doi.org/10.1007/978-1-4842-1919-5_9.
Texto completoBarkalov, Alexander, Larysa Titarenko y Małgorzata Mazurkiewicz. "Field Programmable Gate Arrays". En Foundations of Embedded Systems, 81–106. Cham: Springer International Publishing, 2019. http://dx.doi.org/10.1007/978-3-030-11961-4_4.
Texto completoBrown, Stephen D., Robert J. Francis, Jonathan Rose y Zvonko G. Vranesic. "Introduction to FPGAs". En Field-Programmable Gate Arrays, 1–11. Boston, MA: Springer US, 1992. http://dx.doi.org/10.1007/978-1-4615-3572-0_1.
Texto completoBrown, Stephen D., Robert J. Francis, Jonathan Rose y Zvonko G. Vranesic. "Commercially Available FPGAs". En Field-Programmable Gate Arrays, 13–43. Boston, MA: Springer US, 1992. http://dx.doi.org/10.1007/978-1-4615-3572-0_2.
Texto completoBrown, Stephen D., Robert J. Francis, Jonathan Rose y Zvonko G. Vranesic. "Technology Mapping for FPGAs". En Field-Programmable Gate Arrays, 45–86. Boston, MA: Springer US, 1992. http://dx.doi.org/10.1007/978-1-4615-3572-0_3.
Texto completoBrown, Stephen D., Robert J. Francis, Jonathan Rose y Zvonko G. Vranesic. "Logic Block Architecture". En Field-Programmable Gate Arrays, 87–115. Boston, MA: Springer US, 1992. http://dx.doi.org/10.1007/978-1-4615-3572-0_4.
Texto completoBrown, Stephen D., Robert J. Francis, Jonathan Rose y Zvonko G. Vranesic. "Routing for FPGAs". En Field-Programmable Gate Arrays, 117–45. Boston, MA: Springer US, 1992. http://dx.doi.org/10.1007/978-1-4615-3572-0_5.
Texto completoBrown, Stephen D., Robert J. Francis, Jonathan Rose y Zvonko G. Vranesic. "Flexibility of FPGA Routing Architectures". En Field-Programmable Gate Arrays, 147–67. Boston, MA: Springer US, 1992. http://dx.doi.org/10.1007/978-1-4615-3572-0_6.
Texto completoBrown, Stephen D., Robert J. Francis, Jonathan Rose y Zvonko G. Vranesic. "A Theoretical Model for FPGA Routing". En Field-Programmable Gate Arrays, 169–90. Boston, MA: Springer US, 1992. http://dx.doi.org/10.1007/978-1-4615-3572-0_7.
Texto completoSeals, R. C. y G. F. Whapshott. "Field programmable gate arrays (FPGAs)". En Programmable Logic: PLDs and FPGAs, 102–39. London: Macmillan Education UK, 1997. http://dx.doi.org/10.1007/978-1-349-14003-9_4.
Texto completoActas de conferencias sobre el tema "Field Programmable Gate Arrays"
Jyothi, Vinayaka, Ashik Poojari, Richard Stern y Ramesh Karri. "Fingerprinting Field Programmable Gate Arrays". En 2017 IEEE 35th International Conference on Computer Design (ICCD). IEEE, 2017. http://dx.doi.org/10.1109/iccd.2017.58.
Texto completoDeHon, A. "Entropy, Counting, and Programmable Interconnect". En Fourth International ACM Symposium on Field-Programmable Gate Arrays. IEEE, 1996. http://dx.doi.org/10.1109/fpga.1996.242346.
Texto completoPérez López, Daniel, Aitor López Hernández, Andrés Macho Ortiz, Prometheus DasMahapatra y José Capmany Francoy. "Towards field-programmable photonic gate arrays". En Smart Photonic and Optoelectronic Integrated Circuits XXII, editado por Sailing He y Laurent Vivien. SPIE, 2020. http://dx.doi.org/10.1117/12.2551289.
Texto completoChow, P., P. G. Gulak y P. Chow. "A Field-Programmable Mixed-Analog-Digital Array". En Third International ACM Symposium on Field-Programmable Gate Arrays. IEEE, 1995. http://dx.doi.org/10.1109/fpga.1995.242048.
Texto completoLombardi, F., D. Ashen, Xiaotao Chen y Wei Kang Huang. "Diagnosing Programmable Interconnect Systems for FPGAs". En Fourth International ACM Symposium on Field-Programmable Gate Arrays. IEEE, 1996. http://dx.doi.org/10.1109/fpga.1996.242436.
Texto completoTong Liu, Wei Kang Huang y F. Lombardi. "Testing of Uncustomized Segmented Channel Field Programmable Gate Arrays". En Third International ACM Symposium on Field-Programmable Gate Arrays. IEEE, 1995. http://dx.doi.org/10.1109/fpga.1995.242145.
Texto completoVi Cuong Chan y D. M. Lewis. "Area-Speed Tradeoffs for Hierarchical Field-Programmable Gate Arrays". En Fourth International ACM Symposium on Field-Programmable Gate Arrays. IEEE, 1996. http://dx.doi.org/10.1109/fpga.1996.242343.
Texto completoLamoureux, Julien y Steven Wilton. "Activity Estimation for Field-Programmable Gate Arrays". En 2006 International Conference on Field Programmable Logic and Applications. IEEE, 2006. http://dx.doi.org/10.1109/fpl.2006.311199.
Texto completoBratt, A. y I. Macbeth. "Design and Implementation of a Field Programmable Analogue Array". En Fourth International ACM Symposium on Field-Programmable Gate Arrays. IEEE, 1996. http://dx.doi.org/10.1109/fpga.1996.242434.
Texto completoChan, Pak K. y Martine D. F. Schlag. "Parallel placement for field-programmable gate arrays". En the 2003 ACM/SIGDA eleventh international symposium. New York, New York, USA: ACM Press, 2003. http://dx.doi.org/10.1145/611817.611825.
Texto completoInformes sobre el tema "Field Programmable Gate Arrays"
Mumbru, Jose, George Panotopoulos y Demetri Psaltis. Optically Programmable Field Programmable Gate Arrays (FPGA) Systems. Fort Belvoir, VA: Defense Technical Information Center, enero de 2004. http://dx.doi.org/10.21236/ada421336.
Texto completoStepaniak, Michael J., Maarten Uijt de Haag y Frank Van Graas. Field Programmable Gate Array-Based Attitude Stabilization. Fort Belvoir, VA: Defense Technical Information Center, julio de 2008. http://dx.doi.org/10.21236/ada485525.
Texto completoManohar, Rajit. Experimental 3D Asynchronous Field Programmable Gate Array (FPGA). Fort Belvoir, VA: Defense Technical Information Center, marzo de 2015. http://dx.doi.org/10.21236/ada614130.
Texto completoWawrzynek, J. y K. Asanovic. Field-Programmable Gate Array (FPGA) Emulation for Computer Architecture. Fort Belvoir, VA: Defense Technical Information Center, agosto de 2009. http://dx.doi.org/10.21236/ada519578.
Texto completoTyler, Stephen C. The Design of a Frequency Domain Interference Excision Processor Using Field Programmable Gate Arrays. Fort Belvoir, VA: Defense Technical Information Center, enero de 2005. http://dx.doi.org/10.21236/ada432369.
Texto completoWirthlin, Michael, Brent Nelson, Brad Hutchings, Peter Athanas y Shawn Bohner. Future Field Programmable Gate Array (FPGA) Design Methodologies and Tool Flows. Fort Belvoir, VA: Defense Technical Information Center, julio de 2008. http://dx.doi.org/10.21236/ada492273.
Texto completoManohar, Rajit. A Secure and Reliable High-Performance Field Programmable Gate Array for Information Processing. Fort Belvoir, VA: Defense Technical Information Center, marzo de 2012. http://dx.doi.org/10.21236/ada559184.
Texto completoLearn, Mark Walter. Evaluation of soft-core processors on a Xilinx Virtex-5 field programmable gate array. Office of Scientific and Technical Information (OSTI), abril de 2011. http://dx.doi.org/10.2172/1013229.
Texto completoLin, Chun-Shin. High Speed Publication Subscription Brokering Through Highly Parallel Processing on Field Programmable Gate Array (FPGA). Fort Belvoir, VA: Defense Technical Information Center, enero de 2010. http://dx.doi.org/10.21236/ada514601.
Texto completoBobrek, Miljko, Don Bouldin, David Eugene Holcomb, Stephen M. Killough, Stephen Fulton Smith y Christina D. Ward. Survey of Field Programmable Gate Array Design Guides and Experience Relevant to Nuclear Power Plant Applications. Office of Scientific and Technical Information (OSTI), septiembre de 2007. http://dx.doi.org/10.2172/991174.
Texto completo