Literatura académica sobre el tema "Embedded software design and verification"
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Artículos de revistas sobre el tema "Embedded software design and verification"
Geng, Bo y Qing Hua Cao. "Design and Realization of Simulation Environment of Embedded Software and Hardware Intergration Based on GEF". Advanced Materials Research 756-759 (septiembre de 2013): 2226–30. http://dx.doi.org/10.4028/www.scientific.net/amr.756-759.2226.
Texto completoDasgupta, Pallab, Mandayam K. Srivas y Rajdeep Mukherjee. "Formal Hardware/Software Co-Verification of Embedded Power Controllers". IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 33, n.º 12 (diciembre de 2014): 2025–29. http://dx.doi.org/10.1109/tcad.2014.2354297.
Texto completoChen, Ce, Shao Cai Zhao, Yong Hu y Guo Kai He. "Design and Realization of Universal Integrated Testing Platform for Equipment-Embedded Software". Applied Mechanics and Materials 635-637 (septiembre de 2014): 1175–78. http://dx.doi.org/10.4028/www.scientific.net/amm.635-637.1175.
Texto completoChen, Xi, Harry Hsieh, Felice Balarin y Yosinori Watanabe. "Formal Verification for Embedded System Designs". Design Automation for Embedded Systems 8, n.º 2/3 (junio de 2003): 139–53. http://dx.doi.org/10.1023/b:daem.0000003959.60964.4d.
Texto completoChen, Xi, Harry Hsieh y Felice Balarin. "Verification Approach of Metropolis Design Framework for Embedded Systems". International Journal of Parallel Programming 34, n.º 1 (25 de enero de 2006): 3–27. http://dx.doi.org/10.1007/s10766-005-0002-x.
Texto completoPark, Sa-Choun, Gi-Hwon Kwon y Soon-Hoi Ha. "Automatic Verification of the Control Flow Model for Effective Embedded Software Design". KIPS Transactions:PartA 12A, n.º 7 (1 de diciembre de 2005): 563–70. http://dx.doi.org/10.3745/kipsta.2005.12a.7.563.
Texto completoDong, Zhijiang, Yujian Fu y Yue Fu. "Runtime Verification on Robotics Systems". International Journal of Robotics Applications and Technologies 3, n.º 1 (enero de 2015): 23–40. http://dx.doi.org/10.4018/ijrat.2015010102.
Texto completoCunning, Steve J., Stephan Schulz y Jerzy W. Rozenblit. "An Embedded System's Design Verification Using Object-Oriented Simulation". SIMULATION 72, n.º 4 (abril de 1999): 238–49. http://dx.doi.org/10.1177/003754979907200403.
Texto completoCheddadi, Youssef, Fatima Errahimi y Najia Es-sbai. "Design and verification of photovoltaic MPPT algorithm as an automotive-based embedded software". Solar Energy 171 (septiembre de 2018): 414–25. http://dx.doi.org/10.1016/j.solener.2018.06.085.
Texto completoJúnior, José, Alisson Brito y Tiago Nascimento. "Verification of Embedded System Designs through Hardware-Software Co-Simulation". International Journal of Information and Electronics Engineering 5, n.º 1 (2015): 68–73. http://dx.doi.org/10.7763/ijiee.2015.v5.504.
Texto completoTesis sobre el tema "Embedded software design and verification"
Todorov, Vassil. "Automotive embedded software design using formal methods". Electronic Thesis or Diss., université Paris-Saclay, 2020. http://www.theses.fr/2020UPASG026.
Texto completoThe growing share of driver assistance functions, their criticality, as well as the prospect of certification of these functions, make their verification and validation necessary with a level of requirement that testing alone cannot ensure. For several years now, other industries such as aeronautics and railways have been subject to equivalent contexts. To respond to certain constraints, they have locally implemented formal methods. We are interested in the motivations and criteria that led to the use of formal methods in these industries in order to transpose them to automotive scenarios and identify the potential scope of application.In this thesis, we present our case studies and propose methodologies for the use of formal methods by non-expert engineers. Inductive model checking for a model-driven development process, abstract interpretation to demonstrate the absence of run-time errors in the code and deductive proof for critical library functions.Finally, we propose new algorithms to solve the problems identified during our experiments. These are, firstly, an invariant generator and a method using the semantics of data to process properties involving long-running timers in an efficient way, and secondly, an efficient algorithm to measure the coverage of the model by the properties using mutation techniques
Härberg, Martin y Roberto Chiarito. "Design, Measurement and Verification of Scania’s Platform Software Architecture for Safety Related Embedded Systems". Thesis, KTH, Maskinkonstruktion (Inst.), 2013. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-185515.
Texto completoPlattformsarkitekturen för programvaran i de säkerhetsrelaterade inbyggda system som Scania utvecklar har blivit alltmer komplex. Hög komplexitet medför ökad risk för att fel uppstår i programvaran samt att den tid som programvaruutvecklare spenderar med att förstå och debugga (avlusa) källkoden ökar. Detta leder till ökade underhållskostnader, vilket enligt [24] kan utgöra mellan 60 % och 75 % av den totala kostnaden för programvaruutveckling. Syftet med detta examensarbete är att undersöka hur en del av Scanias nuvarande arkitekturdesign kan vidareutvecklas för att minska komplexiteten, utan att kompromissa med någon grundläggande funktionalitet och prestanda. Ett annat mål är att erbjuda en lösning som uppfyller de säkerhetskrav för programvaran som ISO 26262 ställer, vilket Scania förbereder sig för att kunna uppfylla i framtiden. Ett mätverktyg har utvecklats för att kunna jämföra vår programvaruarkitekturlösning med Scanias nuvarande lösning. Detta verktyg mäter kvalitetsmåtten coupling (koppling) och cohesion (samhörighet), vilka tillsammans med andra programvarumått ger en uppskattning av komplexiteten för arkitekturen. Verifieringen av programvaruarkitekturen med avseende på kraven från ISO 26262 har utförts med hjälp av kontraktteori. Examensarbetet har resulterat i alternativa arkitekturlösningar för trycksensorernas drivrutiner samt realtidsdatabasen i en av Scanias styrenheter, där lösningarna både uppfyller kraven från ISO 26262 bättre och har lägre komplexitetän Scanias nuvarande lösning. Detta har uppnåtts genom en omstrukturering av programvaruarkitekturen samt genom att undvika att återanvända gemensamma programvarufunktioner. Huvudslutsatsen som kan dras från examensarbetet är att det finns stor potential för Scania att kunna reducera programvaruarkitekturens komplexitet, samt uppfylla kraven från ISO 26262.
Ahmad, Noor Azurati Binti. "The impact of software architecture on the cost of design, implementation and verification of reliable embedded systems". Thesis, University of Leicester, 2013. http://hdl.handle.net/2381/28166.
Texto completoMačišák, Martin. "Využití metody „model based design“ pro návrh embedded aplikace". Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2021. http://www.nusl.cz/ntk/nusl-442458.
Texto completoKureksiz, Funda. "A Real Time Test Setup Design And Realization For Performance Verification Of Controller Designs For Unmanned Air Vehichles". Master's thesis, METU, 2008. http://etd.lib.metu.edu.tr/upload/2/12609393/index.pdf.
Texto completoTraub, Johannes [Verfasser]. "Formal Verification of Concurrent Embedded Software / Johannes Traub". Kiel : Universitätsbibliothek Kiel, 2016. http://d-nb.info/1105472175/34.
Texto completoSwart, Riaan. "A language to support verification of embedded software". Thesis, Stellenbosch : Stellenbosch University, 2004. http://hdl.handle.net/10019.1/49823.
Texto completoENGLISH ABSTRACT: Embedded computer systems form part of larger systems such as aircraft or chemical processing facilities. Although testing and debugging of such systems are difficult, reliability is often essential. Development of embedded software can be simplified by an environment that limits opportunities for making errors and provides facilities for detection of errors. We implemented a language and compiler that can serve as basis for such an experimental environment. Both are designed to make verification of implementations feasible. Correctness and safety were given highest priority, but without sacrificing efficiency wherever possible. The language is concurrent and includes measures for protecting the address spaces of concurrently running processes. This eliminates the need for expensive run-time memory protection and will benefit resource-strapped embedded systems. The target hardware is assumed to provide no special support for concurrency. The language is designed to be small, simple and intuitive, and to promote compile-time detection of errors. Facilities for abstraction, such as modules and abstract data types support implementation and testing of bigger systems. We have opted for model checking as verification technique, so our implementation language is similar in design to a modelling language for a widely used model checker. Because of this, the implementation code can be used as input for a model checker. However, since the compiler can still contain errors, there might be discrepancies between the implementation code written in our language and the executable code produced by the compiler. Therefore we are attempting to make verification of executable code feasible. To achieve this, our compiler generates code in a special format, comprising a transition system of uninterruptible actions. The actions limit the scheduling points present in processes and reduce the different interleavings of process code possible in a concurrent system. Requirements that conventional hardware places on this form of code are discussed, as well as how the format influences efficiency and responsiveness.
AFRIKAANSE OPSOMMING: Ingebedde rekenaarstelsels maak deel uit van groter stelsels soos vliegtuie of chemiese prosesseerfasiliteite. Hoewel toetsing en ontfouting van sulke stelsels moeilik is, is betroubaarheid dikwels onontbeerlik. Ontwikkeling van ingebedde sagteware kan makliker gemaak word met 'n ontwikkelingsomgewing wat geleenthede vir foutmaak beperk en fasiliteite vir foutbespeuring verskaf. Ons het 'n programmeertaal en vertaler geïmplementeer wat as basis kan dien vir so 'n eksperimentele omgewing. Beide is ontwerp om verifikasie van implementasies haalbaar te maak. Korrektheid en veiligheid het die hoogste prioriteit geniet, maar sonder om effektiwiteit prys te gee, waar moontlik. Die taal is gelyklopend en bevat maatreëls om die adresruimtes van gelyklopende prosesse te beskerm. Dit maak duur looptyd-geheuebeskerming onnodig, tot voordeel van ingebedde stelsels met 'n tekort aan hulpbronne. Daar word aangeneem dat die teikenhardeware geen spesiale ondersteuning vir gelyklopendheid bevat nie. Die programmeertaal is ontwerp om klein, eenvoudig en intuïtief te wees, en om vertaaltyd-opsporing van foute te bevorder. Fasiliteite vir abstraksie, byvoorbeeld modules en abstrakte datatipes, ondersteun implementering en toetsing van groter stelsels. Ons het modeltoetsing as verifikasietegniek gekies, dus is die ontwerp van ons programmeertaal soortgelyk aan dié van 'n modelleertaal vir 'n modeltoetser wat algemeen gebruik word. As gevolg hiervan kan die implementasiekode as toevoer vir 'n modeltoetser gebruik word. Omdat die vertaler egter steeds foute kan bevat, mag daar teenstrydighede bestaan tussen die implementasie geskryf in ons implementasietaal, en die uitvoerbare masjienkode wat deur die vertaler gelewer word. Daarom poog ons om verifikasie van die uitvoerbare masjienkode haalbaar te maak. Om hierdie doelwit te bereik, is ons vertaler ontwerp om 'n spesiale formaat masjienkode te genereer bestaande uit 'n oorgangstelsel wat ononderbreekbare (atomiese) aksies bevat. Die aksies beperk die skeduleerpunte in prosesse en verminder sodoende die aantal interpaginasies van proseskode wat moontlik is in 'n gelyklopende stelsel. Die vereistes wat konvensionele hardeware aan dié spesifieke formaat kode stel, word bespreek, asook hoe die formaat effektiwiteit en reageerbaarheid van die stelsel beïnvloed.
Traub, Johannes Frederik Jesper [Verfasser]. "Formal Verification of Concurrent Embedded Software / Johannes Traub". Kiel : Universitätsbibliothek Kiel, 2016. http://nbn-resolving.de/urn:nbn:de:gbv:8-diss-186183.
Texto completoYan, Weiwei. "Software-hardware Cooperative Embedded Verification System Fusing Fingerprint Verification and Shared-key Authentication". Thesis, KTH, Skolan för informations- och kommunikationsteknik (ICT), 2011. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-66677.
Texto completoGrobler, Leon D. "A kernel to support computer-aided verification of embedded software". Thesis, Stellenbosch : University of Stellenbosch, 2006. http://hdl.handle.net/10019.1/2479.
Texto completoFormal methods, such as model checking, have the potential to improve the reliablility of software. Abstract models of systems are subjected to formal analysis, often showing subtle defects not discovered by traditional testing.
Libros sobre el tema "Embedded software design and verification"
Samar, Abdi, Gerstlauer Andreas 1970-, Schirner Gunar y SpringerLink (Online service), eds. Embedded System Design: Modeling, Synthesis and Verification. Boston, MA: Springer-Verlag US, 2009.
Buscar texto completoCo-verification of hardware and software for ARM SoC design. Burlington, MA: Elsevier Newnes, 2005.
Buscar texto completoThoen, Filip. Modeling, Verification and Exploration of Task-Level Concurrency in Real-Time Embedded Systems. Boston, MA: Springer US, 2000.
Buscar texto completoSchirner, Gunar. Embedded Systems: Design, Analysis and Verification: 4th IFIP TC 10 International Embedded Systems Symposium, IESS 2013, Paderborn, Germany, June 17-19, 2013. Proceedings. Berlin, Heidelberg: Springer Berlin Heidelberg, 2013.
Buscar texto completoLettnin, Djones y Markus Winterholer, eds. Embedded Software Verification and Debugging. New York, NY: Springer New York, 2017. http://dx.doi.org/10.1007/978-1-4614-2266-2.
Texto completoBeningo, Jacob. Embedded Software Design. Berkeley, CA: Apress, 2022. http://dx.doi.org/10.1007/978-1-4842-8279-3.
Texto completoRichard, Zurawski, ed. Embedded systems handbook: Embedded systems design and verification. 2a ed. Boca Raton, FL: Taylor & Francis Group, 2009.
Buscar texto completoSchirner, Gunar, Marcelo Götz, Achim Rettberg, Mauro C. Zanella y Franz J. Rammig, eds. Embedded Systems: Design, Analysis and Verification. Berlin, Heidelberg: Springer Berlin Heidelberg, 2013. http://dx.doi.org/10.1007/978-3-642-38853-8.
Texto completoHsiung, Pao-Ann. Reconfigurable system design and verification. Boca Raton, Fla: CRC Press, 2009.
Buscar texto completoSridar, T. Designing embedded communications software. San Francisco, CA: CMP Books, 2003.
Buscar texto completoCapítulos de libros sobre el tema "Embedded software design and verification"
Beningo, Jacob. "Testing, Verification, and Test-Driven Development". En Embedded Software Design, 197–218. Berkeley, CA: Apress, 2022. http://dx.doi.org/10.1007/978-1-4842-8279-3_8.
Texto completoBalarin, Felice, Massimiliano Chiodo, Paolo Giusto, Harry Hsieh, Attila Jurecska, Luciano Lavagno, Claudio Passerone et al. "Verification". En Hardware-Software Co-Design of Embedded Systems, 199–246. Boston, MA: Springer US, 1997. http://dx.doi.org/10.1007/978-1-4615-6127-9_5.
Texto completoSherwood, George B. "Embedded Functions for Test Design Automation". En Hardware and Software: Verification and Testing, 221–24. Cham: Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-70389-3_16.
Texto completoZhan, Jinyu, Nan Sang y Guangze Xiong. "Formal Co-verification for SoC Design with Colored Petri Net". En Embedded Software and Systems, 188–95. Berlin, Heidelberg: Springer Berlin Heidelberg, 2005. http://dx.doi.org/10.1007/11535409_26.
Texto completoMorshed, Bashir I. "Prototyping and Verification of ES". En Embedded Systems – A Hardware-Software Co-Design Approach, 167–75. Cham: Springer International Publishing, 2021. http://dx.doi.org/10.1007/978-3-030-66808-2_5.
Texto completoChandrasekaran, Prakash, Christopher L. Conway, Joseph M. Joy y Sriram K. Rajamani. "Verifiable Design of Asynchronous Software". En Next Generation Design and Verification Methodologies for Distributed Embedded Control Systems, 115–16. Dordrecht: Springer Netherlands, 2007. http://dx.doi.org/10.1007/978-1-4020-6254-4_9.
Texto completoHsiung, Pao-Ann y Shang-Wei Lin. "Formal Design and Verification of Real-Time Embedded Software". En Programming Languages and Systems, 382–97. Berlin, Heidelberg: Springer Berlin Heidelberg, 2004. http://dx.doi.org/10.1007/978-3-540-30477-7_26.
Texto completoShukla, Sandeep K., Syed M. Suhaib, Deepak A. Mathaikutty y Jean-Pierre Talpin. "On the Polychronous Approach to Embedded Software Design". En Next Generation Design and Verification Methodologies for Distributed Embedded Control Systems, 261–73. Dordrecht: Springer Netherlands, 2007. http://dx.doi.org/10.1007/978-1-4020-6254-4_20.
Texto completoAdler, Rasmus, Ina Schaefer, Tobias Schuele y Eric Vecchié. "From Model-Based Design to Formal Verification of Adaptive Embedded Systems". En Formal Methods and Software Engineering, 76–95. Berlin, Heidelberg: Springer Berlin Heidelberg, 2007. http://dx.doi.org/10.1007/978-3-540-76650-6_6.
Texto completoBerry, Gérard. "SCADE: Synchronous Design and Validation of Embedded Control Software". En Next Generation Design and Verification Methodologies for Distributed Embedded Control Systems, 19–33. Dordrecht: Springer Netherlands, 2007. http://dx.doi.org/10.1007/978-1-4020-6254-4_2.
Texto completoActas de conferencias sobre el tema "Embedded software design and verification"
Behrend, Jörg, D. Lettnin, P. Heckeler, J. Ruf, T. Kropf y W. Rosenstiel. "Scalable hybrid verification for embedded software". En 2011 Design, Automation & Test in Europe. IEEE, 2011. http://dx.doi.org/10.1109/date.2011.5763039.
Texto completoChao Wang, Malay Ganai, Shuvendu Lahiri y Daniel Kroening. "Embedded software verification: Challenges and solutions". En 2008 IEEE/ACM International Conference on Computer-Aided Design (ICCAD). IEEE, 2008. http://dx.doi.org/10.1109/iccad.2008.4681536.
Texto completoChao Wang, Zijiang Yang, F. Ivancic y A. Gupta. "Disjunctive Image Computation for Embedded Software Verification". En 2006 Design, Automation and Test in Europe. IEEE, 2006. http://dx.doi.org/10.1109/date.2006.244049.
Texto completoLettnin, Djones, Pradeep K. Nalla, Jurgen Ruf, Thomas Kropf, Wolfgang Rosenstiel, Tobias Kirsten, Volker Schonknecht y Stephan Reitemeyer. "Verification of Temporal Properties in Automotive Embedded Software". En 2008 Design, Automation and Test in Europe. IEEE, 2008. http://dx.doi.org/10.1109/date.2008.4484680.
Texto completoDi Guglielmo, Giuseppe, Luigi Di Guglielmo, Franco Fummi y Graziano Pravadelli. "Interactive presentation abstract: Assertion-based verification in embedded-software design". En 2011 IEEE International High Level Design Validation and Test Workshop (HLDVT). IEEE, 2011. http://dx.doi.org/10.1109/hldvt.2011.6114169.
Texto completoShedeed, Mohamed, Ghada Bahig, M. Watheq Elkharashi y Michael Chen. "Functional design and verification of automotive embedded software: An integrated system verification flow". En 2013 18th International Conference on Digital Signal Processing (DSP). IEEE, 2013. http://dx.doi.org/10.1109/siecpc.2013.6550793.
Texto completoA, Jay, Paul Urban y Pat Canny. "Verification and Testing of Embedded Software with Model Based Design". En AIAA Scitech 2019 Forum. Reston, Virginia: American Institute of Aeronautics and Astronautics, 2019. http://dx.doi.org/10.2514/6.2019-1479.
Texto completoDi Guglielmo, Giuseppe, Luigi Di Guglielmo, Franco Fummi y Graziano Pravadelli. "On the use of assertions for embedded-software dynamic verification". En 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). IEEE, 2012. http://dx.doi.org/10.1109/ddecs.2012.6219083.
Texto completoSchwarz, Michael, Carlos Villarraga, Dominik Stoffel y Wolfgang Kunz. "Cycle-accurate software modeling for RTL verification of embedded systems". En 2017 IEEE 20th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). IEEE, 2017. http://dx.doi.org/10.1109/ddecs.2017.7934571.
Texto completoAckermann, Christopher, Arnab Ray, Rance Cleaveland, Charles Shelton y Chris Martin. "Integrating Functional and Non-Functional Design Verification for Embedded Software Systems". En SAE World Congress & Exhibition. 400 Commonwealth Drive, Warrendale, PA, United States: SAE International, 2009. http://dx.doi.org/10.4271/2009-01-0152.
Texto completoInformes sobre el tema "Embedded software design and verification"
Santos, Eugene y Jr. Verification and Validation of Embedded Knowledge-Based Software Systems. Fort Belvoir, VA: Defense Technical Information Center, enero de 1999. http://dx.doi.org/10.21236/ada419001.
Texto completoBouali, Amar, Bernard Dion y Kosuke Konishi. Using Formal Verification in Real-Time Embedded Software Development. Warrendale, PA: SAE International, mayo de 2005. http://dx.doi.org/10.4271/2005-08-0319.
Texto completoVarma, Amit y Jungil Seo. Verification of LRFD Bridge Design and Analysis Software for INDOT. West Lafayette, Indiana: Purdue University, 2011. http://dx.doi.org/10.5703/1288284314279.
Texto completoKent Norris. Independent Verification and Validation Of SAPHIRE 8 Software Design and Interface Design Project Number: N6423 U.S. Nuclear Regulatory Commission. Office of Scientific and Technical Information (OSTI), octubre de 2009. http://dx.doi.org/10.2172/968677.
Texto completoKent Norris. Independent Verification and Validation Of SAPHIRE 8 Software Design and Interface Design Project Number: N6423 U.S. Nuclear Regulatory Commission. Office of Scientific and Technical Information (OSTI), marzo de 2010. http://dx.doi.org/10.2172/974773.
Texto completoApostolatos, A., R. Rossi y C. Soriano. D7.2 Finalization of "deterministic" verification and validation tests. Scipedia, 2021. http://dx.doi.org/10.23967/exaqute.2021.2.006.
Texto completoDash, Z. V., B. A. Robinson y G. A. Zyvoloski. Software requirements, design, and verification and validation for the FEHM application - a finite-element heat- and mass-transfer code. Office of Scientific and Technical Information (OSTI), julio de 1997. http://dx.doi.org/10.2172/567506.
Texto completoMurphy, Joe J., Michael A. Duprey, Robert F. Chew, Paul P. Biemer, Kathleen Mullan Harris y Carolyn Tucker Halpern. Interactive Visualization to Facilitate Monitoring Longitudinal Survey Data and Paradata. RTI Press, mayo de 2019. http://dx.doi.org/10.3768/rtipress.2019.op.0061.1905.
Texto completoWu, Yingjie, Selim Gunay y Khalid Mosalam. Hybrid Simulations for the Seismic Evaluation of Resilient Highway Bridge Systems. Pacific Earthquake Engineering Research Center, University of California, Berkeley, CA, noviembre de 2020. http://dx.doi.org/10.55461/ytgv8834.
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