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1
Liu, Yuxi. "Dynamical Activity Patterns of High-frequency Oscillations and Their Functional Roles in Neural Circuits". Thesis, University of Sydney, 2020. https://hdl.handle.net/2123/23236.
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Oscillations are widely observed in brain activities, but their spatiotemporal organisation properties and functional roles remain elusive. In this thesis, we first investigate gamma oscillations (30 - 80 Hz) by combined empirical and modelling studies. Array recordings of local field potentials in visual motion-processing cortical area MT of marmoset monkeys reveal that gamma bursts form localised patterns with superdiffusive propagation dynamics. To understand how these gamma burst patterns emerge, we investigate a spatially extended, biophysically realistic circuit model that quantitatively captures the superdiffusive propagation of gamma burst patterns as found in the recordings. We further demonstrate that such gamma burst dynamics arise from the intrinsic non-equilibrium nature of transitions between asynchronous and propagating wave states. These results thus reveal novel a spatiotemporal organisation property of gamma bursts and their underlying mechanisms. We further illustrate that such non-equilibrium transitions in the spatially extended circuit model mechanistically account for a range of dynamical properties of sharp-wave ripples (100-250 Hz) and that sharp-wave ripples with superdiffusive dynamics underlie efficient memory retrievals. Furthermore, by incorporating short-term synaptic plasticity into the spatially extended circuit model, we find that in the dynamical regime near the transition of circuit states, large endogenous fluctuations emerging from the circuit can quantitively reproduce and explain the variability of working memory across items and trials as found experimental studies. In addition, our circuit model reproduces and explains several other key neural and behavioural features of working memory, such as the capacity limit of working memory and gamma bursts that are coupled to theta oscillations. These results establish a dynamical circuit mechanism of working memory and provide novel experimentally testable predictions.
2
Kropff, Emilio. "Statistical and dynamical properties of large cortical network models: insights into semantic memory and language". Doctoral thesis, SISSA, 2007. http://hdl.handle.net/20.500.11767/4639.
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This thesis introduces several variants to the classical autoassociative memory model in order to capture different characteristics of large cortical networks, using semantic memory as a paradigmatic example in which to apply the results. Chapter 2 is devoted to the development of the sparse Potts model network as a simplification of a multi modular memory performing computations both at the local and the global level. If a network storing p global patterns has N local modules, each one active in S possible ways with a global sparseness a, and if each module is connected to cM other modules, the storage capacity scales like αc ≡ pmax /cM ∝ S 2 /a with logarithmic corrections. Chapter 3 further introduces adaptation and correlations among patterns, as a result of which a latching dynamics appears, consistent in the spontaneous hopping between global attractor states after an initial cue-guided
retrieval, somehow similar to a free association process. The complexity of the latching series depends on the equilibrium between self-excitation of the local networks and global inhibition represented by the parameter U. Finally, Chapter 4 develops a consistent way to store and retrieve correlated patterns, which works as long as any statistical dependence between units can be neglected. The popularity of units must be introduced into the learning rule,
as a result of which a new property of associative memories appears: the robustness of a memory is inverse to the information it conveys. As in some accounts of semantic memory deficits, random damage results in selective impairments, associated to the entropy measure Sf of each memory, since the minimum connectivity required to sustain its retrieval is, in optimal conditions, cM ∝ pSf , and still proportional to pSf but possibly with a larger coefficient in the general case. Present in the entire thesis, but specially in this last Chapter, the conjecture stating that autoassociative memories are limited in the amount of information stored per synapse results consistent with the results.
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Rehn, Martin. "Aspects of memory and representation in cortical computation". Doctoral thesis, KTH, Numerisk Analys och Datalogi, NADA, 2006. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-4161.
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Denna avhandling i datalogi föreslår modeller för hur vissa beräkningsmässiga uppgifter kan utföras av hjärnbarken. Utgångspunkten är dels kända fakta om hur en area i hjärnbarken är uppbyggd och fungerar, dels etablerade modellklasser inom beräkningsneurobiologi, såsom attraktorminnen och system för gles kodning. Ett neuralt nätverk som producerar en effektiv gles kod i binär mening för sensoriska, särskilt visuella, intryck presenteras. Jag visar att detta nätverk, när det har tränats med naturliga bilder, reproducerar vissa egenskaper (receptiva fält) hos nervceller i lager IV i den primära synbarken och att de koder som det producerar är lämpliga för lagring i associativa minnesmodeller. Vidare visar jag hur ett enkelt autoassociativt minne kan modifieras till att fungera som ett generellt sekvenslärande system genom att utrustas med synapsdynamik. Jag undersöker hur ett abstrakt attraktorminnessystem kan implementeras i en detaljerad modell baserad på data om hjärnbarken. Denna modell kan sedan analyseras med verktyg som simulerar experiment som kan utföras på en riktig hjärnbark. Hypotesen att hjärnbarken till avsevärd del fungerar som ett attraktorminne undersöks och visar sig leda till prediktioner för dess kopplingsstruktur. Jag diskuterar också metodologiska aspekter på beräkningsneurobiologin idag.In this thesis I take a modular approach to cortical function. I investigate how the cerebral cortex may realise a number of basic computational tasks, within the framework of its generic architecture. I present novel mechanisms for certain assumed computational capabilities of the cerebral cortex, building on the established notions of attractor memory and sparse coding. A sparse binary coding network for generating efficient representations of sensory input is presented. It is demonstrated that this network model well reproduces the simple cell receptive field shapes seen in the primary visual cortex and that its representations are efficient with respect to storage in associative memory. I show how an autoassociative memory, augmented with dynamical synapses, can function as a general sequence learning network. I demonstrate how an abstract attractor memory system may be realised on the microcircuit level -- and how it may be analysed using tools similar to those used experimentally. I outline some predictions from the hypothesis that the macroscopic connectivity of the cortex is optimised for attractor memory function. I also discuss methodological aspects of modelling in computational neuroscience.
QC 20100916
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Bhalala, Smita Ashesh 1966. "Modified Newton's method for supervised training of dynamical neural networks for applications in associative memory and nonlinear identification problems". Thesis, The University of Arizona, 1991. http://hdl.handle.net/10150/277969.
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There have been several innovative approaches towards realizing an intelligent architecture that utilizes artificial neural networks for applications in information processing. The development of supervised training rules for updating the adjustable parameters of neural networks has received extensive attention in the recent past. In this study, specific learning algorithms utilizing modified Newton's method for the optimization of the adjustable parameters of a dynamical neural network are developed. Computer simulation results show that the convergence performance of the proposed learning schemes match very closely that of the LMS learning algorithm for applications in the design of associative memories and nonlinear mapping problems. However, the implementation of the modified Newton's method is complex due to the computation of the slope of the nonlinear sigmoidal function, whereas, the LMS algorithm approximates the slope to be zero.
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Bauer, Michael. "Dynamical characterization of Markov processes with varying order". Master's thesis, [S.l. : s.n.], 2009. http://nbn-resolving.de/urn:nbn:de:bsz:ch1-200900153.
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Abbs, Brandon Robert. "The temporal dynamics of auditory memory for static and dynamic sounds". Diss., University of Iowa, 2008. http://ir.uiowa.edu/etd/4.
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Williams, Peter. "Dynamic memory for design". Thesis, The University of Sydney, 1995. https://hdl.handle.net/2123/27472.
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This thesis addresses the problem of providing an efficient case memory suitable for use with case-based reasoning in design. First, the requirements of a case memory for design are identified. Then a formal specification of a dynamic memory which satisfies these requirements is produced based on the idea of the memory organization packet presented in Schank’s model of dynamic memory and the assumption that design cases are decomposed into excerpts.
Memory organization packets are used to represent both the excerpts themselves and the generalizations that may be formed from them. The term trace is used to refer to a memory organization packet that represents an excerpt and the term epitome is used for one that represents a generalization. A memory organization packet may be both a trace and an epitome simultaneously. The memory organization packets are the nodes of a structure and are linked together by links from more general nodes to their specializations indexed by their differences. Minimum storage requirements to meet this specification are identified and it is shown that, after a short period of exponential growth, this requirement increases linearly with the number of case excerpts processed and that the rate of growth is exponentially related to the maximum length of an excerpt.
Algorithms, based on this specification, which perform efficient retrieval of complete and partial matches to queries are presented. Complete match retrieval takes time proportional to the size of the query and retrieval of partial matches is optimal in the sense that the minimum number of nodes necessary to find all partial matches are visited. A method for retrieving approximate matches by using partial match procedures is also presented. A mechanism for choosing between multiple responses to retrieval requests that takes into account both how frequently excerpts have been seen (or generalizations have been supported) and how recently they have been seen (or supported) is presented.
The dynamic memory is then implemented in a series of increasingly sophisticated implementations culminating in one that is optimal in terms of the number of nodes used. The series of implementations are used so that problems associated with formation of generalizations, exploitation of inheritance, multiple indexing and removal of node redundancy can be addressed separately and as simply as possible. In particular problems with exploitation of inheritance and multiple indexing which could lead to selective forgetting and spurious erroneous recollections (respectively) are identified and corrected.
An empirical evaluation of the trade-offs between processing time increases due to the more complex algorithms of the final implementation and the savings in storage space that they allow is made. The results of this evaluation showed that the reduction in the number of nodes to be processed more than compensated for the increased complexity of the insertion algorithms. Excerpt insertion times for the final implementation are slightly less than for any of the other three. The average time to process retrievals is slightly longer for the final implementation than the others due to the complications with inheritance when node redundancy is eliminated. Additionally, an empirical evaluation of the effects of increasing the maximum length of excerpts was made. This evaluation confirmed the hypothesis that the number of nodes required increases dramatically as the maximum size of excerpts grows and that this is a more important factor in determining feasibility than the number of excerpts.
The application of this kind of memory structure to classification problems is briefly discussed. In this area it has the advantage of being able to identify further tests that could be performed to resolve a classification problem when the existing data is insufficient to produce a unique solution. Additionally, the undifferentiated strength can be used to guide the choice between two competing classifications where it is not possible to gather more data.
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Sperens, Martin. "Dynamic Memory Managment in C++". Thesis, Luleå tekniska universitet, Datavetenskap, 2019. http://urn.kb.se/resolve?urn=urn:nbn:se:ltu:diva-76611.
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Memory allocation is an important part of program optimization as well as of computer architecture. This thesis examines some of the concepts of memory allocation and tries to implement overrides for the standard new and delete functions in the c++ library using memory pools combined with other techniques. The overrides are tested against the standard new and delete as well as a custom memory pool with perfect size for the allocations. The study finds that the overrides are slightly faster on a single thread but not on multiple. The study also finds that the biggest gain on performance is to create custom memory pools specific to the programs needs. Lastly, the study also lists a number of ways that the library could be improved
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Bisht, Pawas. "Disaster and the dynamics of memory". Thesis, Loughborough University, 2013. https://dspace.lboro.ac.uk/2134/14184.
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Calls for examining the interrelations between individual and collective processes of remembering have been repeatedly made within the field of memory studies. With the tendency being to focus on either the individual or the collective level, there have been few studies that have undertaken this task in an empirically informed manner. This thesis seeks to engage in such an examination by undertaking a multi-level study of the remembrance of the Bhopal gas disaster of 1984. The gas leak in Bhopal (India) was one of the world s worst industrial disasters and has seen a long-running political contestation involving state institutions, social movement organisations (SMOs) and individual survivors. Employing an ethnographic methodology, incorporating interviews, participant observation and archival research, the study seeks to examine similarities and divergences in how these institutional, group-level and individual actors have remembered the disaster. It identifies the factors that modulated these remembrances and focuses on examining the nature of their interrelationship. The study conceptualises remembering as memory-work : an active process of meaning-making in relation to the past. The memory-work of state institutions was examined within the judicial and commemorative domains. The analysis demonstrates how state institutions engaged in a limiting of the meaning of the disaster removing from view the transnational causality of the event and the issue of corporate liability. It tracks how the survivors suffering was dehistoricised and contained within the framework of a localized claims bureaucracy. The examination of SMO memory-work focused on the activities of the two most prominent groups working in Bhopal. The analysis reveals how both organisations emphasise the continuing suffering of the survivors to challenge the state s settlement of the event. However, clear differences are outlined between the two groups in the wider frameworks of meaning employed by them to explain the suffering, assign responsibility and define justice. Memory-work at the individual level was accessed in the memory narratives of individual survivors generated through ethnographic interviews. The study examined how individual survivors have made sense of the lived experience of suffering caused by the disaster and its aftermath. The analysis revealed how the frameworks of meaning imposed by the state are deeply incommensurate with the survivors needs to express the multi-dimensionality of their suffering; it tracks how the state imposed identities are resisted but cannot be entirely overcome in individual remembrance. Engagement with the activities of the SMOs is demonstrated as enabling the development of an alternative activist remembrance for a limited group of survivors. Overall, the thesis seeks to provide a complex and empirically grounded account of the relations between the inner, individual level processes of memory linked to lived experience and the wider, historically inflected, collective and institutional registers of remembrance. The examination of the encounters between these diverse individual and collective remembrances in the context of an on-going political contestation allows the study to contribute to ongoing discussions within the field about memory politics in a global age and memory and justice.
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Wu, Jiaming. "A modular dynamic Neuro-Synaptic platform for Spiking Neural Networks". Electronic Thesis or Diss., université Paris-Saclay, 2024. http://www.theses.fr/2024UPASP145.
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Que le réseau de neurones soit biologique ou artificiel, il possède une unité de calcul fondamentale : le neurone. Ces neurones, interconnectés par des synapses, forment ainsi des réseaux complexes qui permettent d’obtenir une pluralité de fonctions. De même, le réseau de neurones neuromorphique, ou plus généralement les ordinateurs neuromorphiques, nécessitent également ces deux éléments fondamentaux que sont les neurones et les synapses. Dans ce travail, nous introduisons une unité matérielle neuro-synaptique à impulsions, inspirée de la biologie et entièrement réalisée avec des composants électroniques conventionnels. Le modèle de cette unité neuro-synaptique repose sur les modèles théoriques classiques du neurone à impulsions et des courants synaptiques et membranaires. Le neurone à impulsions est entièrement analogique et un dispositif memristif, dont les composants électroniques sont facilement disponibles sur le marché, permet d’assurer l’excitabilité du neurone. En ce qui concerne les courants synaptiques et membranaires, leur intensité est ajustable, et ils possèdent une dynamique biomimétique, incluant à la fois des courants excitateurs et inhibiteurs. Tous les paramètres du modèle sont ajustables et permettant ainsi d'adapter le système neuro-synaptique. Cette flexibilité et cette adaptabilité sont des caractéristiques essentielles dans la réalisation d’applications telles que les interfaces cerveau-machine. En nous appuyant sur ces deux unités modulaires, le neurone et la synapse, nous pouvons concevoir des motifs fondamentaux des réseaux de neurones. Ces motifs servent ainsi de base pour implémenter des réseaux aux fonctionnalités plus complexes, telles que des mémoires dynamiques ou des réseaux locomoteurs spinaux (Central Pattern Generator). De plus, il sera possible d’améliorer le modèle existant, que ce soit en y intégrant des memristors à base d’oxydes (actuellement étudiés en science des matériaux), ou en le déployant à grande échelle (VLSI) afin de réaliser des réseaux d’ordres de grandeurs supérieures. L’unité neuro-synaptique peut être considérée comme un bloc fondamental pour implémenter des réseaux neuronaux à impulsions de géométrie arbitraire. Son design compact et modulaire, associé à la large disponibilité des composants électroniques, font de notre plateforme une option attrayante de développement pour construire des interfaces neuronales, que ce soit dans les domaines médical, robotique, ou des systèmes d'intelligence artificielle (par exemple le calcul par réservoir), etcBiological and artificial neural networks share a fundamental computational unit: the neuron. These neurons are coupled by synapses, forming complex networks that enable various functions. Similarly, neuromorphic hardware, or more generally neuro-computers, also require two hardware elements: neurons and synapses. In this work, we introduce a bio-inspired spiking Neuro-Synaptic hardware unit, fully implemented with conventional electronic components. Our hardware is based on a textbook theoretical model of the spiking neuron, and its synaptic and membrane currents. The spiking neuron is fully analog and the various models that we introduced are defined by their hardware implementation. The neuron excitability is achieved through a memristive device made from off-the-shelf electronic components. Both synaptic and membrane currents feature tunable intensities and bio-mimetic dynamics, including excitatory and inhibitory currents. All model parameters are adjustable, allowing the system to be tuned to bio-compatible timescales, which is crucial in applications such as brain-machine interfaces. Building on these two modular units, we demonstrate various basic neural network motifs (or neuro-computing primitives) and show how to combine these fundamental motifs to implement more complex network functionalities, such as dynamical memories and central pattern generators. Our hardware design also carries potential extensions for integrating oxide-based memristors (which are widely studied in material science),or porting the design to very large-scale integration (VLSI) to implement large-scale networks. The Neuro-Synaptic unit can be considered as a building block for implementing spiking neural networks of arbitrary geometry. Its compact and modular design, as well as the wide availability of ordinary electronic components, makes our approach an attractive platform for building neural interfaces in medical devices, robotics, and artificial intelligence systems such as reservoir computing
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Van, Vleet Taylor. "Dynamic cache-line sizes /". Thesis, Connect to this title online; UW restricted, 2000. http://hdl.handle.net/1773/6899.
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Jula, Alin Narcis. "Improving locality with dynamic memory allocation". [College Station, Tex. : Texas A&M University, 2008. http://hdl.handle.net/1969.1/ETD-TAMU-2910.
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Caughey, Janet Elizabeth. "Inhibitory dynamics in human memory from criminal interrogation to classroom instruction /". Diss., Restricted to subscribing institutions, 2007. http://proquest.umi.com/pqdweb?did=1481667571&sid=1&Fmt=2&clientId=1564&RQT=309&VName=PQD.
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Beyler, Jean-Christophe. "Dynamic software memory access optimization : Dynamic low-cost reduction of memory latencies by binary analyses and transformations". Université Louis Pasteur (Strasbourg) (1971-2008), 2007. http://www.theses.fr/2007STR13171.
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Cette thèse se place dans le cadre du développement d'approches dynamiques permettant une maîtrise du comportement du couple logiciel/matériel en cours d'exécution. Plus particulièrement, les travaux présentés ici recouvrent l'objectif principal de minimisation des temps d'exécution sur une architecture mono ou multi-processeurs, par anticipation des accès mémoire des programmes via le préchargement des données utiles, et ce de manière entièrement transparente à l'utilisateur. Nous montrons qu'il est possible de concevoir un tel système dynamique d'une relative complexité et entièrement logiciel, c'est-à-dire qui ne repose sur aucune fonctionnalité spécifique de la machine d'exécution, qui est efficace pour de nombreux programmes et très peu pénalisant pour les autres. A notre connaissance, notre travail constitue une première proposition d'un système dynamique d'optimisation entièrement logiciel qui ne se base pas sur une interprétation du code binaireThis thesis concerns the development of dynamic approaches for the control of the hardware/software couple. More precisely, works presented here have the main goal of minimizing program execution times on mono or multi-processor architectures, by anticipating memory accesses through dynamic prefetch of useful data in cache memory and in a way that is entirely transparent to the user. The developed systems consist in a dynamic analysis phase, where memory access latencies are measured, a phase of binary optimizing transformations when they have been evaluated as efficient, and where data prefetching instructions are inserted into the binary code, a dynamic analysis phase of the optimizations efficiency, and finally a canceling phase for transformations that have been evaluated as inefficient. Every phase applies individually to every memory access, and eventually applies several times if memory accesses have behaviors that are varying during the execution time of the target software
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Müller, Petr. "Nástroj pro analýzu výkonu alokátorů paměti v operačním systému Linux". Master's thesis, Vysoké učení technické v Brně. Fakulta informačních technologií, 2010. http://www.nusl.cz/ntk/nusl-237274.
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This diploma thesis presents a tool for dynamic memory allocator analysis, focused on their performance. The work identifies the important memory allocator performance metrics, as well as the environment and program factors influencing these metrics. Using this knowledge, a tool was designed and implemented. This tool allows to gather and analyze these metrics. The tool provides the ability to create memory allocator usage scenarios for the purpose of the allocator behavior analysis under different conditions. The tool was tested on several available memory allocators with free license.
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May, Patrick J. C. "Memory traces in human auditory cortex". Thesis, King's College London (University of London), 1999. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.341058.
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Zhang, Yang. "Dynamic Memory Management for the Loci Framework". MSSTATE, 2004. http://sun.library.msstate.edu/ETD-db/theses/available/etd-04062004-215627/.
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Resource management is a critical part in high-performance computing software. While management of processing resources to increase performance is the most critical, efficient management of memory resources plays an important role in solving large problems. This thesis research seeks to create an effective dynamic memory management scheme for a declarative data-parallel programming system. In such systems, some sort of automatic resource management is a requirement. Using the Loci framework, this thesis research focuses on exploring such opportunities. We believe there exists an automatic memory management scheme for such declarative data-parallel systems that provides good compromise between memory utilization and performance. In addition to basic memory management, this thesis research also seeks to develop methods that take advantages of the cache memory subsystem and explore balances between memory utilization and parallel communication costs in such declarative data-parallel frameworks.
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Salén, Filip. "Visualization of Dynamic Memory in C++ Applications". Thesis, Luleå tekniska universitet, Institutionen för system- och rymdteknik, 2019. http://urn.kb.se/resolve?urn=urn:nbn:se:ltu:diva-75286.
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Optimized memory management is important for a demanding application to achieve high-performance results. But un-optimized or unwanted memory behaviors can usually be difficult to detect without an overview of how memory is structured during run-time. This thesis explores real-time visualization of dynamic memory allocation for applications using the memory pool allocation technique. In the thesis, technical and graphical challenges are described together with their solutions and the design choices that were made. The final result is a program that can visualize dynamic memory management in real time, with the focus on displaying a detailed and comprehensive memory overview that preserves the level of detail over time.Optimerad minneshantering är viktig för att uppnå hög prestanda i en krävande applikation. Men att upptäcka icke optimerade eller oönskade minnesbeteenden kan vara svårt utan en visuell översikt över hur minnet är strukturerat under programmets exekvering. Denna avhandling undersöker hur dynamisk minnesallokering kan visualiseras i realtid för applikationer som använder allokeringstekniken minnes\-pool. I avhandlingen beskrivs tekniska och grafiska utmaningar tillsammans med deras lösningar och de designval som gjordes. Slutresultatet är ett program som kan visualisera dynamisk minneshantering i realtid och som fokuserar på att visa en detaljerad och omfattande minnesöversikt som bevarar detaljeringsgraden över tiden.
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Farkas, Keith I. "Memory-system design considerations for dynamically-scheduled microprocessors". Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1997. http://www.collectionscanada.ca/obj/s4/f2/dsk2/ftp02/NQ27922.pdf.
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Maini, Mala Kunti. "Clonal dynamics and turnover in T cell memory". Thesis, University College London (University of London), 1998. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.300463.
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Storm, Benjamin Casey. "The dynamics and consequences of inhibition in memory". Diss., Restricted to subscribing institutions, 2008. http://proquest.umi.com/pqdweb?did=1619405961&sid=1&Fmt=2&clientId=1564&RQT=309&VName=PQD.
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Feng, Tao Atwater Harry Albert. "Silicon nanocrystal charging dynamics and memory device applications /". Diss., Pasadena, Calif. : Caltech, 2006. http://resolver.caltech.edu/CaltechETD:etd-06052006-141803.
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Liu, Beichen. "SlimGuard: Design and Implementation of a Memory Efficient and Secure Heap Allocator". Thesis, Virginia Tech, 2020. http://hdl.handle.net/10919/96291.
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Attacks on the heap are an increasingly severe threat. State-of-the-art secure
dynamic memory allocators can offer protection, however their
memory consumption is high, making them suboptimal in many situations. We
introduce sys, a secure allocator whose design is driven by memory
efficiency. Among other features, sys uses an efficient fine-grain size
classes indexing mechanism and implements a novel dynamic canary scheme. It
offers a low memory overhead due its size classes optimized for canary
usage, its on-demand metadata allocation, and the combination of randomized
allocations and over-provisioning into a single memory efficient security
feature. sys protects against widespread heap-related attacks such as
overflows, over-reads, double/invalid free, and use-after-free. Evaluation
over a wide range of applications shows that it offers a significant
reduction in memory consumption compared to the state-of-the-art secure
allocator (up to 2x in macro-benchmarks), while offering similar or better
security guarantees and good performance.Master of Science
Attacks targeting on the runtime memory (heap allocator) are severe threats to software safety. Statistical results shown that the numbers of heap-related attacks has doubled since 2016. A large number of research works are desgined to solve the security problems by offering different techniques to prevent some specific attacks. Not only are they very secure but also fast. However, these secure heap allocators sacrefise the memory usage, all of them at least double the memory consumption. Our work is trying to design and implement a heap allocator, in which it can defend against different attacks, as well as fast and memory-efficient. We carefully re-design some security features in our heap allocator while keep memory-efficient in mind. In the end, we evaluated sys and found that it offers significant reduction on different benchmarks suites. Evaluation also showed that sys can detect a lot of vulnerabilites in the software, while offer the same good performance as the state-of-the-art heap allocator.
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Mattar, Andrew A. G. "On the retention of learned dynamics". Thesis, McGill University, 2005. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=84060.
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When one learns a novel motor skill, retention of that skill requires consolidation of motor learning. Previous reports have shown that preceding sessions of motor learning can interfere with the acquisition of new tasks and that new motor learning can disrupt previously retained skills. A recent study by Caithness et al. (2004) shows that new learning, even after long delays, can totally disrupt prior retention. This finding is consistent with the idea that re-activated memories become labile and subject to displacement. However the result is difficult to reconcile with day-to-day experience in which skills improve with repetition and are not disrupted by unrelated activities. In this experiment, we show that when subjects learn new dynamics the influence of one task on another depends on the similarity of the force fields involved. We used a robotic manipulandum to define environments in which subjects learned to move. We used an AB design in which subjects learned field A on day one and B on day 2. We show that the effect of having learned environment A 24-hours prior to learning B varies along a continuum from facilitation when they are identical, through little effect when they are unrelated, to total interference when they are opposite. These findings thus indicate that the nervous system encodes information about dynamics in a fashion that is predictable on the basis of the similarity between the initial and final training environments. One month following their initial training, we tested subjects environment C, whose dynamics were opposite to B. Performance on this task suggests that the nervous system retained neither discrete instances of past training nor solely the most recent motor learning, but instead constructed a running average of learned dynamics to build an individual's motor repertoire.
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Morris, Michael Andrew. "Gallium arsenide dynamic random access memory support circuitry". Thesis, Monterey, Calif. : Springfield, Va. : Naval Postgraduate School ; Available from the National Technical Information Service, 1993. http://handle.dtic.mil/100.2/ADA265176.
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Cheong, Kuan Yew y n/a. "Silicon Carbide as the Nonvolatile-Dynamic-Memory Material". Griffith University. School of Microelectronic Engineering, 2004. http://www4.gu.edu.au:8080/adt-root/public/adt-QGU20050115.101233.
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This thesis consists of three main parts, starting with the use of improved nitridation processes to grow acceptable quality gate oxides on silicon carbide (SiC)[1][7], to the comprehensive investigation of basic electron-hole generation process in 4H SiC-based metaloxidesemiconductor (MOS) capacitors [8], [9], and concluding with the experimental demonstration and analysis of nonvolatile characteristics of 4H SiC-based memory devices [10][15]. In the first part of the thesis, two improved versions of nitridation techniques have been introduced to alleviate oxide-growth rate and toxicity problems. Using a combination of nitridation and oxidation processes, a sandwich technique (nitridationoxidationnitridation) has been proposed and verified to solve the lengthy and expensive oxide-growing process in direct nitric oxide (NO) gas [1]. The nitrogen source from the toxic-NO gas has been replaced by using a nontoxic nitrous oxide (N2O) gas. The best combination of process parameters in this gas is oxide-growing temperature at 1300oC with 10% N2O [2], [3]. The quality of nitrided gate oxides obtained by this technique is lower than the sandwich technique [6], [13]. Using 4H SiC-based MOS with nitrided gate oxides grown by either of the abovementioned nitridation techniques, the fundamentals of electron-hole generation have been investigated using high-temperature capacitancetransient measurements. The contributions of carrier generation, occurring at room temperature, in the bulk and at the SiCSiO2 interface are evaluated and compared using a newly developed method [8], [9]. The effective bulk-generation rates are approximately equal for both types of nitrided oxides, whereas the effective surface-generation rates have been shown to exhibit very strong dependencies on the methods of producing the nitrided gate oxide. Based on analysis, the prevailing generation component in a SiC-based MOS capacitor with nitrided gate oxide is at SiCSiO2 interface located below the gate. Utilizing the understanding of electron-hole generation in SiC, the nonvolatile characteristics of memory device fabricated on SiC have been explored. The potential of developing a SiC-based one-transistor one-capacitor (1T/1C) nonvolatile-dynamic memory (NDM) has been analyzed using SiC-based MOS capacitors as storage elements or test structures. Three possible leakage mechanisms have been evaluated [10][16]: (1) leakage via MOS capacitor dielectric, (2) leakage due to electron-hole generation in a depleted MOS capacitor, and (3) junction leakage due to generation current occurred at a reverse-biased pn junction surrounding the drain region of a select metaloxide semiconductor fieldeffecttransistor (MOSFET). Among them, leakage through capacitor oxide remains an important factor that could affect the nonvolatile property in the proposed device, whereas others leakage mechanisms are insignificant. Based on the overall results, the potential of developing a SiC-based 1T/1C NDM is encouraging.
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Taylor, Nathan Bryan. "Cachekata : memory hierarchy optimization via dynamic binary translation". Thesis, University of British Columbia, 2013. http://hdl.handle.net/2429/44335.
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As hardware parallelism continues to increase, CPU caches can no longer be considered a transparent, hardware-level performance optimization. Adverse cache impact on performance is entirely workload-dependent and may depend on runtime factors. The operating system must begin to treat CPU caches like any other shared hardware resource to effectively support workloads on parallel hardware.
We present a binary translation system called Cachekata that provides a byte-granular memory remapping facility within the OS in an efficient manner. Cachekata is incorporated into a larger system, Plastic, which diagnoses and corrects instances of false sharing occurring within running applications. Our implementation is able to achieve a 3-6x performance improvement on known examples of false sharing in parallel benchmarks.
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Nguyen, Anh Thi Hoang. "Long memory conditional volatility and dynamic asset allocation". Thesis, University of Exeter, 2011. http://hdl.handle.net/10036/3279.
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The thesis evaluates the benefit of allowing for long memory volatility dynamics in forecasts of the variance-covariance matrix for asset allocation. First, I compare the forecast performance of multivariate long memory conditional volatility models (the long memory EWMA, long memory EWMA-DCC, FIGARCH-DCC and Component GARCH-DCC models) with that of short memory conditional volatility models (the short memory EWMA and GARCH-DCC models), using the asset allocation framework of Engle and Colacito (2006). The research reports two main findings. First, for longer horizon forecasts, long memory volatility models generally produce forecasts of the covariance matrix that are statistically more accurate and informative, and economically more useful than those produced by short memory volatility models. Second, the two parsimonious long memory EWMA models outperform the other models – both short memory and long memory – in a majority of cases across all forecast horizons. These results apply to both low and high dimensional covariance matrices with both low and high correlation assets, and are robust to the choice of estimation window. The research then evaluates the application of multivariate long memory conditional volatility models in dynamic asset allocation, applying the volatility timing procedure of Fleming et al. (2001). The research consistently identifies the economic gains from incorporating long memory volatility dynamics in investment decisions. Investors are willing to pay to switch from the static to the dynamic strategies, and especially from the short memory volatility timing to the long memory volatility timing strategies across both short and long investment horizons. Among the long memory conditional volatility models, the two parsimonious long memory EWMA models, again, generally produce the most superior portfolios. When transaction costs are taken into account, the gains from the daily rebalanced dynamic portfolios deteriorate; however, it is still worth implementing the dynamic strategies at lower rebalancing frequencies. The results are robust to estimation error in expected returns, the choice of risk aversion coefficients and the use of a long-only constraint. To control for estimation error in forecasts of the long memory high dimensional covariance matrix, the research develops a dynamic long memory factor (the Orthogonal Factor Long Memory, or OFLM) model by embedding the univariate long memory EWMA model of Zumbach (2006) into an orthogonal factor structure. The factor-structured OFLM model is evaluated against the six above multivariate conditional volatility models in terms of forecast performance and economic benefits. The results suggest that the OFLM model generally produces impressive forecasts over both short and long forecast horizons. In the volatility timing framework, portfolios constructed with the OFLM model consistently dominate the static and other dynamic volatility timing portfolios in all rebalancing frequencies. Particularly, the outperformance of the factor-structured OFLM model to the fully estimated LM-EWMA model confirms the advantage of the factor structure in reducing estimation error. The factor structure also significantly reduces transaction costs, making the dynamic strategies more feasible in practice. The dynamic factor long memory volatility model also consistently produces more superior portfolios than those produced by the traditional unconditional factor and the dynamic factor short memory volatility models.
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Milton, Daniel J. D. "Dynamic memory allocation within a behavioural synthesis system". Thesis, University of Southampton, 2002. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.393918.
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Hsieh, Wilson Cheng-Yi. "Dynamic computation migration in distributed shared memory systems". Thesis, Massachusetts Institute of Technology, 1995. http://hdl.handle.net/1721.1/36635.
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Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1995.Vita.
Includes bibliographical references (p. 123-131).
by Wilson Cheng-Yi Hsieh.
Ph.D.
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Herrmann, Edward C. "Threaded Dynamic Memory Management in Many-Core Processors". University of Cincinnati / OhioLINK, 2010. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1277132326.
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Li, Wen. "Memory indicators and their incorporation into dynamic models". [Ames, Iowa : Iowa State University], 2009.
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Cheong, Kuan Yew. "Silicon Carbide as the Nonvolatile-Dynamic-Memory Material". Thesis, Griffith University, 2004. http://hdl.handle.net/10072/367177.
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This thesis consists of three main parts, starting with the use of improved nitridation processes to grow acceptable quality gate oxides on silicon carbide (SiC)[1]–[7], to the comprehensive investigation of basic electron-hole generation process in 4H SiC-based metal–oxide–semiconductor (MOS) capacitors [8], [9], and concluding with the experimental demonstration and analysis of nonvolatile characteristics of 4H SiC-based memory devices [10]–[15]. In the first part of the thesis, two improved versions of nitridation techniques have been introduced to alleviate oxide-growth rate and toxicity problems. Using a combination of nitridation and oxidation processes, a sandwich technique (nitridation–oxidation–nitridation) has been proposed and verified to solve the lengthy and expensive oxide-growing process in direct nitric oxide (NO) gas [1]. The nitrogen source from the toxic-NO gas has been replaced by using a nontoxic nitrous oxide (N2O) gas. The best combination of process parameters in this gas is oxide-growing temperature at 1300oC with 10% N2O [2], [3]. The quality of nitrided gate oxides obtained by this technique is lower than the sandwich technique [6], [13]. Using 4H SiC-based MOS with nitrided gate oxides grown by either of the abovementioned nitridation techniques, the fundamentals of electron-hole generation have been investigated using high-temperature capacitance–transient measurements. The contributions of carrier generation, occurring at room temperature, in the bulk and at the SiC–SiO2 interface are evaluated and compared using a newly developed method [8], [9]. The effective bulk-generation rates are approximately equal for both types of nitrided oxides, whereas the effective surface-generation rates have been shown to exhibit very strong dependencies on the methods of producing the nitrided gate oxide. Based on analysis, the prevailing generation component in a SiC-based MOS capacitor with nitrided gate oxide is at SiC–SiO2 interface located below the gate. Utilizing the understanding of electron-hole generation in SiC, the nonvolatile characteristics of memory device fabricated on SiC have been explored. The potential of developing a SiC-based one-transistor one-capacitor (1T/1C) nonvolatile-dynamic memory (NDM) has been analyzed using SiC-based MOS capacitors as storage elements or test structures. Three possible leakage mechanisms have been evaluated [10]–[16]: (1) leakage via MOS capacitor dielectric, (2) leakage due to electron-hole generation in a depleted MOS capacitor, and (3) junction leakage due to generation current occurred at a reverse-biased pn junction surrounding the drain region of a select metal–oxide– semiconductor field–effect–transistor (MOSFET). Among them, leakage through capacitor oxide remains an important factor that could affect the nonvolatile property in the proposed device, whereas others leakage mechanisms are insignificant. Based on the overall results, the potential of developing a SiC-based 1T/1C NDM is encouraging.Thesis (PhD Doctorate)
Doctor of Philosophy (PhD)
School of Microelectronic Engineering
Faculty of Engineering and Information Technology
Full Text
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Oliveira, Wilnice Tavares Reis. "Novos resultados nas caminhadas deterministas parcialmente autorepulsivas em meios aleatórios obtidos com o gerenciamento numérico da memória dos caminhantes". Universidade de São Paulo, 2010. http://www.teses.usp.br/teses/disponiveis/59/59135/tde-23092010-170457/.
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Podemos considerar a caminhada determinista do turista como um processo do tipo dinâmico, que ocorre sobre uma rede composta por N pontos. Os pontos são gerados de maneira aleatória, no espaço euclidiano d dimensional. Um caminhante, partindo de um ponto qualquer do meio desordenado, se movimenta seguindo uma regra determinista de ir para o ponto mais próximo que não tenha sido visitado nos últimos ?= µ - 1 passos. Cada uma das trajetórias geradas através dessa dinâmica possui uma parte inicial não periódica de t passos, denominada transiente, e uma parte final, periódica, de p passos, denominada atrator. Devido ao custo computacional de memória, só é possível simular sistemas com N ? O(103) e µ << N. Neste estudo uma nova implementação na estrutura de armazenamento de dados, no modelo numérico do turista, nos permitiu obter algumas distribuições estatísticas para a caminhada, com valores de memória µ ? O(N). Com estes resultados verificamos a eficiência da estrutura proposta e avançamos no conhecimento acerca do comportamento do turista em caminhadas com memória da ordem de N. Também neste trabalho, obtivemos resultados numéricos interessantes, que serviram para explicar a formação de atratores com determinados períodos na caminhada determinista do turista unidimensional, bem como a não formação de atratores com períodos 2µ+1, 2µ+2 e 2µ+3.não são constituídos. Também neste trabalho, uma nova implementação na estrutura de armazenamento de dados, no modelo numérico do turista, nos permitiu obter algumas distribuições estatísticas para a caminhada, com valores de memória ? muito acima do que se tinha alcançado anteriormente. Com estes resultados verificamos a eficiência da estrutura proposta, e avançamos o conhecimento a cerca do comportamento do turista em sistema da ordem de N.We may consider the deterministic tourist walk as a dynamic process performed over a landscape of N points. These points are randomly spread on a d dimensional euclidean space. A walker leaves from any point of that landscape and moves according to the deterministic rule of going to the nearest point that has not been visited in the last ?= µ - 1 steps. Each trajectory generated by this dynamics has an initial non-periodic part of t steps, called transient, and a final periodic one of p steps, called attractor. Due to computational costs of memory usage, it is possible to simulate only small sistems, with N ? O(103) and µ << N. In this work, we propose a new implementation of the structure for data storage. The numerical model of the tourist walk, allowed us to obtain some statistical distributions for the walk with a memory value µ ? O(N). Moreover, in this study we obtain interesting and useful numerical results to explain the presence of some specific attractors in deterministic walk in one-dimensional space and the absence of attractors with periods 2µ+1, 2µ+2 and 2µ+3. are not made. In this work, we propose a new implementation of the structure for storing data, the numerical model of the tourist, has allowed us to obtain some statistical distributions for the walk with a memory value ? over and above what had been achieved previously. With these results, we verifed the efficiency of the HL structure proposed, and advance knowledge about the behavior of the tourist walk in the order of N.
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Wilson, John Mark. "Contemporary remediations : the dynamics of literary technology and memory". Thesis, Aberystwyth University, 2016. http://hdl.handle.net/2160/da18187a-7fd6-420a-86f9-d7be97e790ff.
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Lidstone, Patrick. "A dynamically reconfigurable parallel processing architecture". Thesis, University of Exeter, 1995. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.307286.
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Vagts, Christopher Bryan. "A single-transistor memory cell and sense amplifier for a gallium arsenide dynamic random access memory". Thesis, Monterey, California. Naval Postgraduate School, 1992. http://hdl.handle.net/10945/24038.
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Approved for public release; distribution is unlimitedThis thesis presents the design and layout of a Gallium Arsenide (GaAs) Dynamic Random Access Memory (DRAM) cell. Attempts have been made at producing GaAs DRAM cells, but these have dealt with modifications to the fabrication process, are expensive, and have met with little success. An eight-address by one-bit memory is designed, simulated, and laid out for a standard GaAs digital fabrication process. Three different configurations of RAM cells are considered: the Three-Transistor RAM Cell, the One-Transistor RAM Cell with a Diode and the One-Transistor RAM Cell with a capacitor. All are tested and compared using the circuit simulator HSPICE. The chosen DRAM design uses the One- Transistor RAM Cell with a parallel plate capacitor and a five-transistor differential sense amplifier that handles reading as well as refresh of the memory cells. The differential sense amplifier compares a dummy cell with a memory cell to perform a read. The required timing is presented and demonstrated with read, write, and refresh cycles. Actions to minimize charge leakage are also considered and discussed. The design is simulated for access rates of approximately five nanoseconds, but the basic design can work at much faster rates with little modification.
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Martorell, Bofill Xavier. "Dynamic Scheduling of Parallel Applications on Shared-Memory Multiprocessors". Doctoral thesis, Universitat Politècnica de Catalunya, 1999. http://hdl.handle.net/10803/6010.
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Peterson, Thomas. "Dynamic Allocation for Embedded Heterogeneous Memory : An Empirical Study". Thesis, KTH, Skolan för elektroteknik och datavetenskap (EECS), 2018. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-223904.
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Embedded systems are omnipresent and contribute to our lives in many ways by instantiating functionality in larger systems. To operate, embedded systems require well-functioning software, hardware as well as an interface in-between these. The hardware and software of these systems is under constant change as new technologies arise. An actual change these systems are undergoing are the experimenting with different memory management techniques for RAM as novel non-volatile RAM(NVRAM) technologies have been invented. These NVRAM technologies often come with asymmetrical read and write latencies and thus motivate designing memory consisting of multiple NVRAMs. As a consequence of these properties and memory designs there is a need for memory management that minimizes latencies.This thesis addresses the problem of memory allocation on heterogeneous memory by conducting an empirical study. The first part of the study examines free list, bitmap and buddy system based allocation techniques. The free list allocation technique is then concluded to be superior. Thereafter, multi-bank memory architectures are designed and memory bank selection strategies are established. These strategies are based on size thresholds as well as memory bank occupancies. The evaluation of these strategies did not result in any major conclusions but showed that some strategies were more appropriate for someapplication behaviors.Inbyggda system existerar allestädes och bidrar till våran livsstandard på flertalet avseenden genom att skapa funktionalitet i större system. För att vara verksamma kräver inbyggda system en välfungerande hård- och mjukvara samt gränssnitt mellan dessa. Dessa tre måste ständigt omarbetas i takt med utvecklingen av nya användbara teknologier för inbyggda system. En förändring dessa system genomgår i nuläget är experimentering med nya minneshanteringstekniker för RAM-minnen då nya icke-flyktiga RAM-minnen utvecklats. Dessa minnen uppvisar ofta asymmetriska läs och skriv fördröjningar vilket motiverar en minnesdesign baserad på flera olika icke-flyktiga RAM. Som en konsekvens av dessa egenskaper och minnesdesigner finns ett behov av att hitta minnesallokeringstekniker som minimerar de fördröjningar som skapas. Detta dokument adresserar problemet med minnesallokering på heterogena minnen genom en empirisk studie. I den första delen av studien studerades allokeringstekniker baserade på en länkad lista, bitmapp och ett kompissystem. Med detta som grund drogs slutsatsen att den länkade listan var överlägsen alternativen. Därefter utarbetades minnesarkitekturer med flera minnesbanker samtidigt som framtagandet av flera strategier för val av minnesbank utfördes. Dessa strategier baserades på storleksbaserade tröskelvärden och nyttjandegrad hos olika minnesbanker. Utvärderingen av dessa strategier resulterade ej i några större slutsatser men visade att olika strategier var olika lämpade för olika beteenden hos applikationer.
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Doddapaneni, Srinivas P. "Automatic dynamic decomposition of programs on distributed memory machines". Diss., Georgia Institute of Technology, 1997. http://hdl.handle.net/1853/8158.
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Barlow, Gregory John. "Improving Memory for Optimizatioin and Learning in Dynamic Environments". Research Showcase @ CMU, 2011. http://repository.cmu.edu/dissertations/175.
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Many problems considered in optimization and artificial intelligence research are static: information about the problem is known a priori, and little to no uncertainty about this information is presumed to exist. Most real problems, however, are dynamic: information about the problem is released over time, uncertain events may occur, or the requirements of the problem may change as time passes. One technique for improving optimization and learning in dynamic environments is by using information from the past. By using solutions from previous environments, it is often easier to find promising solutions in a new environment. A common way to maintain and exploit information from the past is the use of memory, where solutions are stored periodically and can be retrieved and refined when the environment changes. Memory can help search respond quickly and efficiently to changes in a dynamic problem. Despite their strengths, standard memories have many weaknesses which limit their effectiveness. This thesis explores ways to improve memory for optimization and learning in dynamic environments. The techniques presented in this thesis improve memories by incorporating probabilistic models of previous solutions into memory, storing many previous solutions in memory while keeping overhead low, building long-term models of the dynamic search space over time, allowing easy refinement of memory entries, and mapping previous solutions to the current environment for problems where solutions may become obsolete over time. To address the weaknesses and limitations of standard memory, two novel classes of memory are introduced: density-estimate memory and classifier-based memory. Density-estimate memory builds and maintains probabilistic models within memory to create density estimations of promising areas of the search space over time. Density-estimate memory allows many solutions to be stored in memory, builds long-term models of the dynamic search space, and allows memory entries to be easily refined while keeping overhead low. Density-estimate memory is applied to three dynamic problems: factory coordination, the Moving Peaks benchmark problem, and adaptive traffic signal control. For all three problems, density-estimate memory improves performance over a baseline learning or optimization algorithm as well as state-of-the-art algorithms. Classifier-based memory allows dynamic problems with shifting feasible regions to capture solutions in memory and then map these memory entries to feasible solutions in the future. By storing abstractions of solutions in the memory, information about previous solutions can be used to create solutions in a new environment, even when the old solutions are now completely obsolete or infeasible. Classifier-based memory is applied to a dynamic job shop scheduling problem with sequence-dependent setup times and machine breakdowns and repairs. Classifier-based memory improves the quality of schedules and reduces the amount of search necessary to find good schedules. The techniques presented in this this thesis improve the ability of memories to guide search quickly and efficiently to good solutions as the environment changes.
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Gilbert, Seth 1976. "Rambo II : rapidly reconfigurable atomic memory for dynamic networks". Thesis, Massachusetts Institute of Technology, 2003. http://hdl.handle.net/1721.1/87437.
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Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2003.Includes bibliographical references (p. 121-123) and index.
by Seth Gilbert.
S.M.
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Malhotra, Gaurav. "Dynamics of structural priming". Thesis, University of Edinburgh, 2009. http://hdl.handle.net/1842/2751.
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This thesis is about how our syntactic choice changes with linguistic experience. Studies on syntactic priming show that our decisions are influenced by sentences that we have recently heard or recently spoken. They also show that not all sentences have an equal amount of influence; that repetition of verbs increases priming (the lexical-boost effect) and that some verbs are more susceptible to priming than others. This thesis explores how and why syntactic decisions change with time and what these observations tell us about the cognitive mechanism of speaking. Specifically, we set out to develop a theoretical account of syntactic priming. Theoretical accounts require mathematical models and this thesis develops a sequence of mathematical models for understanding various aspects of syntactic priming. Cognitive processes are modelled as dynamical systems that can change their behaviour when they process information. We use these dynamical systems to investigate how each episode of language comprehension or production affects syntactic decisions. We also use these systems to investigate how long priming persists, how groups of consecutive sentences affect structural decisions, why repeating words leads to greater syntactic priming and what this tells us about how words, concepts and syntax are cognitively represented. We obtain two kinds of results by simulating these mathematical models. The first kind of results reveal how syntactic priming evolves over time. We find that structural priming itself shows a gradual decay with time but the lexical enhancement of priming decays catastrophically – a result consistent with experimental observations. We also find that consecutive episodes of language processing add up nonlinearly in memory, which challenges the design of some existing psycholinguistic experiments. The second kind of results reveal how our syntax module might be connected to other cognitive modules. We find that the lexical enhancement of syntactic priming might be a consequence of how the modules of attention and working memory influence syntactic decisions. These models suggest a mechanism of priming that is in contrast to a previous prediction-based account. This prediction-based account proposes that we actively predict what we hear and structural priming is due to error-correction whenever our predictions do not match the stimuli. In contrast, our account embodies syntactic priming in cognitive processes of attention, working memory and long-term memory. It asserts that our linguistic decisions are not based solely on abstract rules but also depend on the cognitive implementation of each module. Our investigations also contribute a novel theoretical framework for studying syntactic priming. Previous studies analyse priming using error-correction or Hebbian learning algorithms. We introduce the formalism of dynamical systems. This formalism allows us to trace the effect of information processing through time. It explains how residual activation from a previous episode might play a role in structural decisions, thereby enriching our understanding of syntactic priming. Since these dynamical systems are also used to model neural processes, this theoretical framework brings our understanding of priming one step closer to its biological implementation, bridging the gap between neural processes and abstract thoughts.
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Kłosin, Adam 1985. "Mechanism and dynamics of transgenerational epigenetic memory in Caenorhabditis elegans". Doctoral thesis, Universitat Pompeu Fabra, 2015. http://hdl.handle.net/10803/482206.
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Desde Darwin y Lamarck, a los biólogos les ha intrigado la posibilidad de que rasgos adquiridos debido al ambiente pudieran ser heredados. Se han descrito muchos ejemplos de este tipo debidos a perturbaciones del ambiente y transmitidos durante generaciones en numerosas especies, aunque por el momento no se conoce su regulación a nivel molecular. Usando C. elegans como modelo demostramos que el aumento de la expresión de un transgén artificial en células somáticas inducido por altas temperaturas es conservado durante múltiples generaciones. Esta memoria epigenética está regulada por la transmisión entre generaciones de dos memorias epigenéticas: el principal regulador de los niveles de expresión en la siguiente generación es la transmisión en cis de la modificación de la histona H3K9me3, mientras que los represores RNA pequeños (dsRNA) se heredan en trans y actúan de mediadores en la restitución del estado reprimido de la cromatina. Además, la puesta a cero epigenética es reforzada por la comunicación desde células somáticas a germinales regulada por el canal de dsRNA SID-1. También demostramos finalmente que un estrés en la replicación del DNA durante el desarrollo embrionario interfiere con la transmisión epigenética del estado reprimido de la cromatina. Estos resultados contribuyen a aumentar el conocimiento que tenemos de la herencia epigenética y la posible puesta a cero de los rasgos adquiridos debidos a cambios en el ambiente.Since Darwin and Lamarck, biologists have been intrigued by the possibility of the inheritance of environmentally-acquired traits. Examples of inter-generational transmission of traits induced by an environmental perturbation have been reported in multiple species, but the molecular mechanisms governing these responses remain obscure. Using C. elegans as a model system we demonstrate that high temperature-induced increase in expression from a somatically expressed transgene array persists for multiple generations. This epigenetic memory is governed by transgenerational transmission of two conflicting epigenetic memories: H3K9me3 histone marks are inherited in cis and act as the major determinant of expression levels in the next generation, whereas repressive small RNAs are inherited in trans and mediate restoration of the repressed state. In addition, epigenetic resetting is reinforced by soma to germline communication mediated by the dsRNA channel SID-1. Finally, we discovered that replication stress during early embryonic development interferes with epigenetic inheritance of a repressed state. These findings contribute to our understanding of the epigenetic inheritance and eventual resetting of environmentally acquired traits.
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Harish, Omri. "Network mechanisms of working memory : from persistent dynamics to chaos". Thesis, Paris 5, 2013. http://www.theses.fr/2013PA05T073/document.
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Une des capacités cérébrales les plus fondamentales, qui est essentiel pour tous les fonctions cognitifs de haut niveau, est de garder des informations pertinentes de tâche pendant les périodes courtes de temps; on connaît cette capacité comme la mémoire de travail (WM). Dans des décennies récentes, accumule là l'évidence d'activité pertinente de tâche dans le cortex préfrontal (PFC) de primates pendant les périodes de "delay" de tâches de "delay-response", impliquant ainsi que PFC peut maintenir des informations sensorielles et ainsi la fonction comme un module de WM. Pour la récupération d'informationssensorielles de l'activité de réseau après que le stimulus sensoriel n'est plus présent il est impératif que l'état du réseau au moment de la récupération soit corrélé avec son état au moment de la compensation de stimulus. Un extrême, en vue dans les modèles informatiques de WM, est la coexistence d'attracteurs multiples. Dans cette approche la dynamique de réseau a une multitude d'états stables possibles, qui correspondent aux états différents de mémoire et un stimulus peut forcer le réseau à changer à un tel état stable. Autrement, même en absence d'attracteurs multiples, si la dynamique du réseau estchaotique alors les informations sur des événements passés peuvent être extraites de l'état du réseau, à condition que la durée typique de l'autocorrélation (AC) de dynamique neuronale soit assez grande. Dans la première partie de cette thèse, j'étudie un modèle à base d'attracteur de mémoire d'un emplacement spatial, pour examiner le rôle des non-linéarités de courbes de f-I neuronales dans des mécanismes de WM. Je fournis une théorie analytique et des résultats de simulations montrant que ces nonlinéarités, plutôt que les constants de temps synaptic ou neuronal, peuvent être la base de mécanismes de réseau WM. Dans la deuxième partie j'explore des facteurs contrôlant la durée d'ACs neuronales dans ungrand réseau "balanced" affichant la dynamique chaotique. Je développe une théorie de moyen champ (MF) décrivant l'ACs en termes de plusieurs paramètres d'ordre. Alors, je montre qu'en dehors de la proximité au point de transition-à-chaos, qui peut augmenter la largeur de la courbe d'AC, l'existence de motifs de connectivité peut causer des corrélations de longue durée dans l'état du réseauOne of the most fundamental brain capabilities, that is vital for any high level cognitive function, is to store task-relevant information for short periods of time; this capability is known as working memory (WM). In recent decades there is accumulating evidence of taskrelevant activity in the prefrontal cortex (PFC) of primates during delay periods of delayedresponse tasks, thus implying that PFC is able to maintain sensory information and so function as a WM module. For retrieval of sensory information from network activity after the sensory stimulus is no longer present it is imperative that the state of the network at the time of retrieval be correlated with its state at the time of stimulus offset. One extreme, prominent in computational models of WM, is the co-existence of multiple attractors. In this approach the network dynamics has a multitude of possible steady states, which correspond to different memory states, and a stimulus can force the network to shift to one such steady state. Alternatively, even in the absence of multiple attractors, if the dynamics of the network is chaotic then information about past events can be extracted from the state of the network, provided that the typical time scale of the autocorrelation (AC) of neuronal dynamics is large enough. In the first part of this thesis I study an attractor-based model of memory of a spatial location to investigate the role of non-linearities of neuronal f-I curves in WM mechanisms. I provide an analytic theory and simulation results showing that these nonlinearities, rather than synaptic or neuronal time constants, can be the basis of WM network mechanisms. In the second part I explore factors controlling the time scale of neuronal ACs in a large balanced network displaying chaotic dynamics. I develop a mean-field (MF) theory describing the ACs in terms of several order parameters. Then, I show that apart from the proximity to the transition-to-chaos point, which can increase the width of the AC curve, the existence of connectivity motifs can cause long-time correlations in the state of the network
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SAVI, MARCELO AMORIM. "NONLINEAR AND CHAOTIC DYNAMICS OF MECHANICAL SYSTEMS WITH SHAPE MEMORY". PONTIFÍCIA UNIVERSIDADE CATÓLICA DO RIO DE JANEIRO, 1994. http://www.maxwell.vrac.puc-rio.br/Busca_etds.php?strSecao=resultado&nrSeq=33239@1.
Texto completoResumen
Motivado por aplicações na àrea de materiais e estruturas inteligentes, este trabalho apresenta
resultados de um estudo sobre a resposta dinâmica de sistemas mecânicos contendo elementos com
memória de forma Inicialmente é realizada uma revisão crítica de algumas teorias formenológicas
que procuram descrever os efeitos de memória de forma e pseudoelasticidade associados a
transformações martensíticas tamoelásticas. Duas destas teorias são utilizadas na modelagem de uma
mola helicoidal. O comportamento dinâmico de um oscilador com memória de forma é investigado.
Verifica-se que o sistema pode responder caoticamente sob determinadas condições. É também
apresentado um método, baseado na técnica dos Elementos Finitos, para a análise estática e dinâmica
não-linear de estruturas reticuladas com memória de forma. Resultados de simulações numéricas ilustram a complexidade do comportamento destas estruturas.Motivated by recent developments in the field of intelligent structures and materials, the present work reports results from an investigation on the dynamical behavior of mechanical systems containing elements with shape memory. Initially, three phenomenologieal theories that attempt to describe shape memory and pseudoelastic effects in metallic alloys that undergo thermoelastic martensitic transfomations are reviewed. Two of these theories are used to model and helical spring. The dynamic response of an oscillator with shape memory spring is investigated. It is shown tlm the system may behave chaotically under certain conditions. A method based on the Finite Element techinique, which can be applied to model the non-linear static and dynamic behavior of adaptive trusses with shape memory elements is also presented. Results of numerical simulations illustrate the complex behavior of these structures.
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Machado, Luciano G. "Shape memory alloy for vibration isolation and damping". Texas A&M University, 2007. http://hdl.handle.net/1969.1/85772.
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This work investigates the use of shape memory alloys (SMAs) for vibration isolation
and damping of mechanical systems. The first part of this work evaluates the nonlinear
dynamics of a passive vibration isolation and damping (PVID) device through
numerical simulations and experimental correlations. The device, a mass connected
to a frame through two SMA wires, is subjected to a series of continuous acceleration
functions in the form of a sine sweep. Frequency responses and transmissibility of the
device as well as temperature variations of the SMA wires are analyzed for the case
where the SMA wires are pre-strained at 4.0% of their original length. Numerical
simulations of a one-degree of freedom (1-DOF) SMA oscillator are also conducted
to corroborate the experimental results. The configuration of the SMA oscillator is
based on the PVID device. A modified version of the constitutive model proposed
by Boyd and Lagoudas, which considers the thermomechanical coupling, is used to
predict the behavior of the SMA elements of the oscillator.
The second part of this work numerically investigates chaotic responses of a 1-
DOF SMA oscillator composed of a mass and a SMA element. The restitution force
of the oscillator is provided by an SMA element described by a rate-independent,
hysteretic, thermomechanical constitutive model. This model, which is a new version
of the model presented in the first part of this work, allows smooth transitions
between the austenitic and the martensitic phases. Chaotic responses of the SMA oscillator are evaluated through the estimation of the Lyapunov exponents. The Lyapunov
exponent estimation of the SMA system is done by adapting the algorithm
by Wolf and co-workers. The main issue of using this algorithm for nonlinear, rateindependent,
hysteretic systems is related to the procedure of linearization of the
equations of motion. The present work establishes a procedure of linearization that
allows the use of the classical algorithm. Two different modeling cases are considered
for isothermal and non-isothermal heat transfer conditions. The evaluation of
the Lyapunov exponents shows that the proposed procedure is capable of quantifying
chaos in rate-independent, hysteretic dynamical systems.
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Hodgson, Joyce. "Dynamic Memory: The long poem and the poetics of autiobiography". Thesis, University of Newcastle Upon Tyne, 2008. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.492437.
Texto completoResumen
Memory plays a central role in writing autobiography hence the choice of title for this thesis. I make particular reference to three published autobiographical long poems, Basil Bunting's Briggflatts (1966), Derek Walcott's Omeros (1990), and Barry MacSweeney's The Book of Demons (1997), then I consider how the long poem genre continues to attract contemporary poets. I also investigate the particular way in which memory contributes to the writing of such poems. My work includes an appreciation of the part played by the spoken word as an instrument in the recall of specific memories.
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Poyias, Andreas. "Engineering compact dynamic data structures and in-memory data mining". Thesis, University of Leicester, 2018. http://hdl.handle.net/2381/42282.
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Compact and succinct data structures use space that approaches the information-theoretic lower bound on the space that is required to represent the data. In practice, their memory footprint is orders of magnitude smaller than normal data structures and at the same time they are competitive in speed. A main drawback with many of these data structures is that they do not support dynamic operations efficiently. It can be exceedingly expensive to rebuild a static data structure each time an update occurs. In this thesis, we propose a number of novel compact dynamic data structures including m-Bonsai, which is a compact tree representation, compact dynamic rewritable (CDRW) arrays which is a compact representation of variable-length bit-strings. These data structures can answer queries efficiently, perform updates fast while they maintain their small memory footprint. In addition to the designing of these data structures, we analyze them theoretically, we implement them and finally test them to show their good practical performance. Many data mining algorithms require data structures that can query and dynamically update data in memory. One such algorithm is FP-growth. It is one of the fastest algorithms for the solution of Frequent Itemset Mining, which is one of the most fundamental problems in data mining. FP-growth reads the entire data in memory, updates the data structures in memory and performs a series of queries on the given data. We propose a compact implementation for the FP-growth algorithm, the PFP-growth. Based on our experimental evaluation, our implementation is one order of magnitude more space efficient compared to the classic implementation of FP-growth and 2 - 3 times compared to a more recent carefully engineered implementation. At the same time it is competitive in terms of speed.
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Touheed, Nasir. "Parallel dynamic load-balancing for adaptive distributive memory PDE solvers". Thesis, University of Leeds, 1998. http://etheses.whiterose.ac.uk/1286/.
Texto completoResumen
This thesis is concerned with the issue of dynamic load-balancing in connection with the parallel adaptive solution of partial differential equations (PDEs). We are interested in parallel solutions based upon either finite element or finite volume schemes on unstructured grids and we assume that geometric parallelism is used, whereby the finite element or finite volume grids are partitioned across the available parallel processors. For parallel efficiency it is necessary to maintain a well balanced partition and to attempt to keep communication overheads as low as possible . When adaptively occurs however a given partition may deteriorate in quality and so it must be modified dynamically. This is the problem that we consider in the is work. Chapters one and two outline the problem is more detail and review existing work in this field. In Chapter one a brief history of parallel computers is presented and different kinds of parallel machines are mentioned. The finite element method is also introduced and its parallel implementation is discussed in some detail: leading to the derivation of a static load-balancing problem. A number of important static load balancing algorithms are then discussed. Chapter two commences with a brief description of some error indicators and common techniques for mesh adaptively. It is shown how this adaptively may lead to a load imbalance among the available processors of parallel machine. We then discuss some ways in which the static load-balancing algorithms of Chapter one can be modified and used in the context of dynamic load-balancing. The pros and cons of these strategies are discussed and then finally some specific dynamic load-balancing algorithms are introduced and discussed. In Chapter three a new dynamic load-balancing algorithm is proposed based upon a number of generalisations of existing algorithms. The details of the new algorithm are outlined and a number of preliminary numerical experiments are undertaken. In this preliminary (sequential) version the dual graphed an existing partitioned computational mesh is repartitioned among the same number of processors so that after the repartitioning step each processor has an approximate equal load and the number of edges of this dual graph which cross from one processor to another are relatively small. The remainder of the thesis is concerned with the practical parallel implementation of this new algorithm and making comparison with existing techniques. In Chapter four the algorithm is implemented for a 2-d adaptive finite element solver for steady-state problems, and in Chapter five the generality of the implementation is enhanced and the algorithm is applied in conjunction with a 3-d adaptive finite volume solver for unsteady problems. In this situation frequent repartitioning of the mesh is required. In this Chapter performance comparisons are made for that logarithm detailed here against new software that was developed simultaneously with the work of this thesis. These comparisons are very favourable for certain problems which involve very non-uniform refinement. All software implementations described in this thesis have been coded in ANSI C using MPI version 1.1 (where applicable). The portability of the load-balancing code had been tested by making use of a variety of platforms, including a Cray T3D, an SGI PowerChallenge, different workstation networks (SGI Indys and SGI 02s), and an SGI Origin 2000. For the purposes of numerical comparisons all timings quoted in this thesis are for the SGI Origin 2000 unless otherwise stated.