Literatura académica sobre el tema "DIGITAL SYSTEM DESIGN TEST AND VERIFICATION"
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Artículos de revistas sobre el tema "DIGITAL SYSTEM DESIGN TEST AND VERIFICATION"
Wei, Chi Pin, Zhao Lin Li, Hao Liu y Zhi Xiang Chen. "Design of a Random Test Platform for DSP Serials Used in Embedded Systems". Advanced Materials Research 267 (junio de 2011): 98–103. http://dx.doi.org/10.4028/www.scientific.net/amr.267.98.
Texto completoSandi, Anuradha. "VERIFICATION OF CARRY LOOK AHEAD ADDER USING CONSTRAINED RANDOMIZED LAYERED TEST BENCH". International Journal of Engineering Technologies and Management Research 6, n.º 6 (25 de marzo de 2020): 40–50. http://dx.doi.org/10.29121/ijetmr.v6.i6.2019.392.
Texto completoSharma, N., P. Kumar, N. Singh y U. Mehta. "Digital energy monitor: design, simulations and prototype". South Pacific Journal of Natural and Applied Sciences 35, n.º 2 (2017): 45. http://dx.doi.org/10.1071/sp17005.
Texto completoChen, Fu Long, Zhao Xia Zhu y Xiao Ya Fan. "FPGA-Based In-Circuit Verification of Digital Systems". Advanced Materials Research 187 (febrero de 2011): 362–67. http://dx.doi.org/10.4028/www.scientific.net/amr.187.362.
Texto completoZhang, Xu, Zhiguang Deng, Jun Li, Youwei Yang, Quan Ma y Mingming Liu. "Design and Verification of Reactor Power Control Based on Stepped Dynamic Matrix Controller". Science and Technology of Nuclear Installations 2019 (3 de noviembre de 2019): 1–11. http://dx.doi.org/10.1155/2019/4973120.
Texto completoZhu, Pengcheng y Haojie Li. "Design of Aeronautical Digital Video and Communication Bus Processing System". Journal of Physics: Conference Series 2252, n.º 1 (1 de abril de 2022): 012044. http://dx.doi.org/10.1088/1742-6596/2252/1/012044.
Texto completoZhu, Pengcheng y Haojie Li. "Design of Aeronautical Digital Video and Communication Bus Processing System". Journal of Physics: Conference Series 2252, n.º 1 (1 de abril de 2022): 012044. http://dx.doi.org/10.1088/1742-6596/2252/1/012044.
Texto completoSun, Peng, Qi Shao, Ying Yu Liu y Wei Ping Chen. "A New Method of Design and Verification of Digital Silicon Gyroscopes Closed-Loop Driving System Based on MicroBlaze". Key Engineering Materials 645-646 (mayo de 2015): 771–76. http://dx.doi.org/10.4028/www.scientific.net/kem.645-646.771.
Texto completoRakic, Aleksandar, Sasa Zivanovic, Zoran Dimic y Mladen Knezevic. "Digital twin control of multi-axis wood CNC machining center based on LinuxCNC". BioResources 16, n.º 1 (18 de diciembre de 2020): 1115–30. http://dx.doi.org/10.15376/biores.16.1.1115-1130.
Texto completoHudson, Jeffrey A., Aernout Oudenhuijzen y Gregory F. Zehner. "Digital Human Modelling Systems: A Procedure for Verification and Validation Using the F-16 Crew Station". Proceedings of the Human Factors and Ergonomics Society Annual Meeting 44, n.º 38 (julio de 2000): 723–26. http://dx.doi.org/10.1177/154193120004403810.
Texto completoTesis sobre el tema "DIGITAL SYSTEM DESIGN TEST AND VERIFICATION"
VALLERO, ALESSANDRO. "Cross layer reliability estimation for digital systems". Doctoral thesis, Politecnico di Torino, 2017. http://hdl.handle.net/11583/2673865.
Texto completoZhou, Jing 1959. "LOVERD--a logic design verification and diagnosis system via test generation". Thesis, The University of Arizona, 1989. http://hdl.handle.net/10150/291686.
Texto completoKim, Seokjin. "High-speed analog-to-digital converters for modern satellite receivers design verification test and sensitivity analysis /". College Park, Md.: University of Maryland, 2008. http://hdl.handle.net/1903/7864.
Texto completoThesis research directed by: Dept. of Electrical and Computer Engineering. Title from t.p. of PDF. Includes bibliographical references. Published by UMI Dissertation Services, Ann Arbor, Mich. Also available in paper.
Bougan, Timothy B. "Flexible Intercom System Design for Telemetry Sites and Other Test Environments". International Foundation for Telemetering, 1996. http://hdl.handle.net/10150/611449.
Texto completoTesting avionics and military equipment often requires extensive facilities and numerous operators working in concert. In many cases these facilities are mobile and can be set up at remote locations. In almost all situations the equipment is loud and makes communication between the operators difficult if not impossible. Furthermore, many sites must transmit, receive, relay, and record telemetry signals. To facilitate communication, most telemetry and test sites incorporate some form of intercom system. While intercom systems themselves are a not a new concept and are available in many forms, finding one that meets the requirements of the test community (at a reasonable cost) can be a significant challenge. Specifically, the test director must often communicate with several manned stations, aircraft, remote sites, and/or simultaneously record all or some of the audio traffic. Furthermore, it is often necessary to conference all or some of the channels (so that all those involved can fully follow the progress of the test). The needs can be so specialized that they often demand a very expensive "custom" solution. This paper describes the philosophy and design of a multi-channel intercom system specifically intended to support the needs of the telemetry and test community. It discusses in detail how to use state-of-the-art field programmable gate arrays, relatively inexpensive computers and digital signal processors, and some other new technologies to design a fully digital, completely non-blocking intercom system. The system described is radically different from conventional designs but is much more cost effective (thanks to recent developments in programmable logic, microprocessor performance, and serial/digital technologies). This paper presents, as an example, the conception and design of an actual system purchased by the US government.
Ruddy, Marcus A. "Pico-Satellite Integrated System Level Test Program". DigitalCommons@CalPoly, 2012. https://digitalcommons.calpoly.edu/theses/688.
Texto completoAalto, Alve y Ali Jafari. "Automatic Probing System for PCB : Analysis of an automatic probing system for design verification of printed circuit boards". Thesis, KTH, Skolan för informations- och kommunikationsteknik (ICT), 2015. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-174865.
Texto completoMålet med detta examensarbete är att göra en analys av huruvida Ericssons kretskort kan testas med hjälp av ett automatiskt probe system eller om det kräver stora förändringar i designdelen av kretskorten och om, vad för förändringar det i sådant fall kan vara. Till hjälp att analysera kretskorten har vi haft oscilloskop för att få ut rådata om skillnaderna mellan de teoretiska och verkliga signalerna. För att kunna tyda oscilloskopets samplade signaler har olika programmeringsspråk som Python, Matlab samt Excel använts. En extra via i signalens väg har även simulerats i HFSS och ADS med olika sorts probar för att se hur signalens beteende påverkas. Resultaten extraherades sedan in i olika Excel ark för att få en lätt överskådlig bild av resultaten. Resultatet vi fick visade att utformningen av ett kretskort med ändringarna skulle vara lättare att göra med en ny design istället för en redan existerande då större delar av kortet skulle behöva göras om. Vissa stora komponenter behöver antingen göras om, hitta mindre men likvärdiga eller sättas på ena sidan av kortet där de inte är i vägen för proben. Kretskorten som kommer använda flygande probesystem kommer antagligen bli lite större då viornas placering är mer begränsade än tidigare. Det mest tidskrävande arbetet var att simulera olika placeringar av en extra via i signalens väg. Detta visade att på en single ended signal under två gigahertz så gör det ingen större skillnad vart i signalens väg som den extra vian placeras. Då en högre frekvens används så är själva signalens karaktär det viktigaste än placeringen av en via, men om man inte vet den exakta karaktären så är fyra millimeter bort från mottagarens sida att rekommendera då närmare placering av viorna gör att signalerna börjar störa varandra.
Ioannides, Charalambos. "Investigating the potential of machine learning techniques for feedback-based coverage-directed test genreation in simulation-based digital design verification". Thesis, University of Bristol, 2013. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.618315.
Texto completoAluru, Gunasekhar. "Exploring Analog and Digital Design Using the Open-Source Electric VLSI Design System". Thesis, University of North Texas, 2016. https://digital.library.unt.edu/ark:/67531/metadc849770/.
Texto completoQiang, Qiang. "FORMAL a sequential ATPG-based bounded model checking system for VLSI circuits /". online version, 2006. http://rave.ohiolink.edu/etdc/view?acc%5Fnum=case1144614543.
Texto completoLarsson, Erik. "An Integrated System-Level Design for Testability Methodology". Doctoral thesis, Linköpings universitet, ESLAB - Laboratoriet för inbyggda system, 2000. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-4932.
Texto completoLibros sobre el tema "DIGITAL SYSTEM DESIGN TEST AND VERIFICATION"
Navabi, Zainalabedin. Digital System Test and Testable Design. Boston, MA: Springer US, 2011. http://dx.doi.org/10.1007/978-1-4419-7548-5.
Texto completoVerilog digital system design: RT level synthesis, testbench, and verification. 2a ed. New York: McGraw-Hill, 2006.
Buscar texto completoRashinkar, Prakash. System-On-A-Chip verification: Methodology and techniques. New York: Kluwer Academic Publishers, 2002.
Buscar texto completo1959-, Lavagno Luciano, Scheffer Lou y Martin Grant, eds. EDA for IC system design, verification, and testing. Boca Raton, FL: Taylor & Francis, 2005.
Buscar texto completo1955-, Paterson Peter y Singh Leena 1971-, eds. System-On-A-Chip verification: Methodology and techniques. Boston, MA: Kluwer Academic Publishers, 2001.
Buscar texto completoRashinkar, Prakash. System-On-A-Chip verification: Methodology and techniques. Boston, MA: Kluwer Academic Publishers, 2001.
Buscar texto completoJean-Michel, Bergé, Levia Oz y Rouillard Jacques, eds. Hardware/software co-design and co-verification. Boston: Kluwer Academic Publishers, 1997.
Buscar texto completoNavabi, Zainalabedin. Digital System Test and Testable Design: Using HDL Models and Architectures. Boston, MA: Springer Science+Business Media, LLC, 2011.
Buscar texto completoBergé, Jean-Michel. Hardware/Software Co-Design and Co-Verification. Boston, MA: Springer US, 1997.
Buscar texto completoIEEE International High-Level Design Validation and Test Workshop (6th 2001 Monterey, Calif.). Sixth IEEE International High-Level Design Validation and Test Workshop: Proceedings : 7-9 November, 2001. Los Alamitos, Calif: IEEE Computer Society, 2001.
Buscar texto completoCapítulos de libros sobre el tema "DIGITAL SYSTEM DESIGN TEST AND VERIFICATION"
Navabi, Zainalabedin. "Test Compression". En Digital System Test and Testable Design, 345–73. Boston, MA: Springer US, 2010. http://dx.doi.org/10.1007/978-1-4419-7548-5_10.
Texto completoNavabi, Zainalabedin. "Deterministic Test Generation Algorithms". En Digital System Test and Testable Design, 175–212. Boston, MA: Springer US, 2010. http://dx.doi.org/10.1007/978-1-4419-7548-5_6.
Texto completoSnider, Ross. "Chapter 8: Introduction to Verification". En Advanced Digital System Design using SoC FPGAs, 93–124. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-15416-4_8.
Texto completoNavabi, Zainalabedin. "Standard IEEE Test Access Methods". En Digital System Test and Testable Design, 261–94. Boston, MA: Springer US, 2010. http://dx.doi.org/10.1007/978-1-4419-7548-5_8.
Texto completoNavabi, Zainalabedin. "Logic Built-in Self-test". En Digital System Test and Testable Design, 295–344. Boston, MA: Springer US, 2010. http://dx.doi.org/10.1007/978-1-4419-7548-5_9.
Texto completoNavabi, Zainalabedin. "Verilog HDL for Design and Test". En Digital System Test and Testable Design, 21–62. Boston, MA: Springer US, 2010. http://dx.doi.org/10.1007/978-1-4419-7548-5_2.
Texto completoNavabi, Zainalabedin. "Test Pattern Generation Methods and Algorithms". En Digital System Test and Testable Design, 143–74. Boston, MA: Springer US, 2010. http://dx.doi.org/10.1007/978-1-4419-7548-5_5.
Texto completoNavabi, Zainalabedin. "Design for Test by Means of Scan". En Digital System Test and Testable Design, 213–59. Boston, MA: Springer US, 2010. http://dx.doi.org/10.1007/978-1-4419-7548-5_7.
Texto completoNavabi, Zainalabedin. "Basics of Test and Role of HDLs". En Digital System Test and Testable Design, 1–20. Boston, MA: Springer US, 2010. http://dx.doi.org/10.1007/978-1-4419-7548-5_1.
Texto completoNavabi, Zainalabedin. "Memory Testing by Means of Memory BIST". En Digital System Test and Testable Design, 375–91. Boston, MA: Springer US, 2010. http://dx.doi.org/10.1007/978-1-4419-7548-5_11.
Texto completoActas de conferencias sobre el tema "DIGITAL SYSTEM DESIGN TEST AND VERIFICATION"
Xiong, Huasheng, Duo Li y Liangju Zhang. "Test Facility Design for Integrated Digital Nuclear Reactor Protection System". En 18th International Conference on Nuclear Engineering. ASMEDC, 2010. http://dx.doi.org/10.1115/icone18-29286.
Texto completoReza Kakoee, Mohammad, M. H. Neishaburi y Siamak Mohammadi. "Functional Test-Case Generation by a Control Transaction Graph for TLM Verification". En 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools (DSD 2007). IEEE, 2007. http://dx.doi.org/10.1109/dsd.2007.4341464.
Texto completoHanada, Satoshi, Koji Ito y Kenji Mashio. "US-APWR Human System Interface System Verification and Validation Program for Digital I&C Design". En 18th International Conference on Nuclear Engineering. ASMEDC, 2010. http://dx.doi.org/10.1115/icone18-29928.
Texto completoKadlubowski, Lukasz A. y Piotr Kmon. "Test and Verification Environment and Methodology for Vernier Time-to-Digital Converter Pixel Array". En 2021 24th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). IEEE, 2021. http://dx.doi.org/10.1109/ddecs52668.2021.9417054.
Texto completoZak, P. y V. Dynybyl. "Design and Testing of Gears With Non-Standard Profile". En ASME 2007 International Mechanical Engineering Congress and Exposition. ASMEDC, 2007. http://dx.doi.org/10.1115/imece2007-41027.
Texto completoSheng, Xin, Xiaojin Huang, Zhencai An y Yin Guo. "Study on an Optimization Algorithm of Generating Test Vectors for Digital Reactor Protection System Testing". En 16th International Conference on Nuclear Engineering. ASMEDC, 2008. http://dx.doi.org/10.1115/icone16-48098.
Texto completoEndo, Yui, Satoshi Kanai, Takeshi Kishinami, Miyata Natsuki, Makiko Kouchi y Masaaki Mochimaru. "An Ergonomic Assessment System Using a Digital Hand for Designing Handheld Information Appliances". En ASME 2006 International Design Engineering Technical Conferences and Computers and Information in Engineering Conference. ASMEDC, 2006. http://dx.doi.org/10.1115/detc2006-99114.
Texto completoGuzas, Emily L., Stephen E. Turner, Matthew Babina, Brandon Casper, Thomas N. Fetherston y Joseph M. Ambrico. "Validation of a Surrogate Model for Marine Mammal Lung Dynamics Under Underwater Explosive Impulse". En ASME 2019 Verification and Validation Symposium. American Society of Mechanical Engineers, 2019. http://dx.doi.org/10.1115/vvs2019-5143.
Texto completoDavies, William J., Charlie L. Jones y Robert A. Noonan. "Real Time Simulators for Use in Design of Integrated Flight and Propulsion Control Systems". En ASME 1988 International Gas Turbine and Aeroengine Congress and Exposition. American Society of Mechanical Engineers, 1988. http://dx.doi.org/10.1115/88-gt-24.
Texto completoEl-Shafei, A. y M. El-Hakim. "Development of a Test Rig and Experimental Verification of the Performance of HSFDs for Active Control of Rotors". En ASME 1995 International Gas Turbine and Aeroengine Congress and Exposition. American Society of Mechanical Engineers, 1995. http://dx.doi.org/10.1115/95-gt-256.
Texto completoInformes sobre el tema "DIGITAL SYSTEM DESIGN TEST AND VERIFICATION"
Korsah, K., G. W. Turner y J. A. Mullens. Environmental testing of a prototypic digital safety channel, Phase I: System design and test methodology. Office of Scientific and Technical Information (OSTI), abril de 1995. http://dx.doi.org/10.2172/90921.
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