Literatura académica sobre el tema "CMOS compatible fabrication"
Crea una cita precisa en los estilos APA, MLA, Chicago, Harvard y otros
Consulte las listas temáticas de artículos, libros, tesis, actas de conferencias y otras fuentes académicas sobre el tema "CMOS compatible fabrication".
Junto a cada fuente en la lista de referencias hay un botón "Agregar a la bibliografía". Pulsa este botón, y generaremos automáticamente la referencia bibliográfica para la obra elegida en el estilo de cita que necesites: APA, MLA, Harvard, Vancouver, Chicago, etc.
También puede descargar el texto completo de la publicación académica en formato pdf y leer en línea su resumen siempre que esté disponible en los metadatos.
Artículos de revistas sobre el tema "CMOS compatible fabrication"
Buyong, Muhamad Ramdzan, Norazreen Abd Aziz y Burhanuddin Yeop Majlis. "Characterization and Optimization of Seals-Off for Very Low Pressure Sensors (VLPS) Fabricated by CMOS MEMS Process". Advanced Materials Research 74 (junio de 2009): 231–34. http://dx.doi.org/10.4028/www.scientific.net/amr.74.231.
Texto completoBi, Cheng y Yanfei Liu. "CMOS-Compatible Optoelectronic Imagers". Coatings 12, n.º 11 (22 de octubre de 2022): 1609. http://dx.doi.org/10.3390/coatings12111609.
Texto completoYu, Le, Yaozu Guo, Haoyu Zhu, Mingcheng Luo, Ping Han y Xiaoli Ji. "Low-Cost Microbolometer Type Infrared Detectors". Micromachines 11, n.º 9 (24 de agosto de 2020): 800. http://dx.doi.org/10.3390/mi11090800.
Texto completoKempf, P., R. Hadaway y J. Kolk. "Complementary metal oxide semiconductor compatible high-voltage transistors". Canadian Journal of Physics 65, n.º 8 (1 de agosto de 1987): 1003–8. http://dx.doi.org/10.1139/p87-161.
Texto completoRasmussen, A., M. Gaitan, L. E. Locascio y M. E. Zaghloul. "Fabrication techniques to realize CMOS-compatible microfluidic microchannels". Journal of Microelectromechanical Systems 10, n.º 2 (junio de 2001): 286–97. http://dx.doi.org/10.1109/84.925785.
Texto completoLv, Hongming, Huaqiang Wu, Jinbiao Liu, Can Huang, Junfeng Li, Jiahan Yu, Jiebin Niu, Qiuxia Xu, Zhiping Yu y He Qian. "Inverted process for graphene integrated circuits fabrication". Nanoscale 6, n.º 11 (2014): 5826–30. http://dx.doi.org/10.1039/c3nr06904d.
Texto completoWu, Wenhao, Yu Yu, Wei Liu y Xinliang Zhang. "Fully integrated CMOS-compatible polarization analyzer". Nanophotonics 8, n.º 3 (31 de enero de 2019): 467–74. http://dx.doi.org/10.1515/nanoph-2018-0205.
Texto completoAGARWAL, AJAY, N. BALASUBRAMANIAN, N. RANGANATHAN y R. KUMAR. "SILICON NANOWIRES FORMATION IN CMOS COMPATIBLE MANNER". International Journal of Nanoscience 05, n.º 04n05 (agosto de 2006): 445–51. http://dx.doi.org/10.1142/s0219581x06004619.
Texto completoXiong, Chunle, Bryn Bell y Benjamin J. Eggleton. "CMOS-compatible photonic devices for single-photon generation". Nanophotonics 5, n.º 3 (1 de septiembre de 2016): 427–39. http://dx.doi.org/10.1515/nanoph-2016-0022.
Texto completoKang, G. B., J. M. Park, S. G. Kim, J. G. Koo, J. H. Park, Y. S. Sohn y Y. T. Kim. "Fabrication and characterisation of CMOS compatible silicon nanowire biosensor". Electronics Letters 44, n.º 16 (2008): 953. http://dx.doi.org/10.1049/el:20081876.
Texto completoTesis sobre el tema "CMOS compatible fabrication"
DiLello, Nicole Ann. "Fabrication and simulation of CMOS-compatible photodiodes". Thesis, Massachusetts Institute of Technology, 2008. http://hdl.handle.net/1721.1/43039.
Texto completoIncludes bibliographical references (p. 65-67).
CMOS-compatible photodiodes are becoming increasinging important devices to study because of their application in combined electronic-photonic systems. They are already used as inexpensive optical transceivers in fiber optic telecommunications systems and they have the potential to be integrated in a number of applications. This thesis focuses on germanium photodiodes to be used in an integrated electronic-photonic analog-to-digital converter. It specifically studies the dark current, responsivity, and frequency response of Ge-on-Si LPCVD-grown diodes that will be used in such a system. It outlines a process that can be used to add metal contacts to pre-existing diodes and discusses characterization procedure. It was found that previously fabricated 50 pm square diodes had leakage current of 0.25 uA at -1 V, but responsivity of -5 mA/W. Diodes with higher leakage current, 1.1 piA at -1 V, had a higher responsivity of -0.5 A/W. Spreading resistance profiles (SRP) indicate that better control of the n-type contact is needed to systematically reproduce these results. Furthermore, spreading resistance analysis demonstrated that elimination of the p-type seed during growth will result in a more abrupt junction, for which simulations predict an improved frequency response. Simulations indicate that removal of the p-type seed and associated autodoping should increase the frequency response from -1.6 GHz to 1-4 GHz. Better control of the n-type profile can further increase the frequency response from '14 GHz to -27 GHz.
by Nicole Ann DiLello.
S.M.
Gantz, Kevin Francis. "Fabrication of Three-Dimensionally Independent Microchannels Using a Single Mask Aimed at On-Chip Microprocessor Cooling". Thesis, Virginia Tech, 2007. http://hdl.handle.net/10919/35863.
Texto completoMaster of Science
Ben, Masaud Taha. "Development of low temperature fabrication processes of n-ZnO/p-Si optical switch and poly-silicon waveguides for CMOS-compatible multi-layered silicon photonics". Thesis, University of Southampton, 2014. https://eprints.soton.ac.uk/370612/.
Texto completoJoo, Nicoleta. "Nouveaux dérivés de polyoxométallates (POMs) pour des mémoires moléculaires compatibles avec des procédés de fabrication CMOS". Grenoble, 2010. http://www.theses.fr/2010GRENV031.
Texto completoThe aim of the present thesis is to study the miniaturization of non-volatile memory devices, FLASH type, by replacing the floating gate with monolayers of redox molecules, polyoxometalates. Towards this goal, I was engaged in a program aimed at constructing devices that use the properties of polyoxometalates (POMs) to store information. In a general approach, a redox-active molecule attached to an electroactive surface serves as the active storage medium, and information is stored in the discrete redox states of the molecule (POM). This work is organized in four parts and begins with a short introduction into the molecular memory and polyoxometalates field. It continues with the experimental results systematized in Part 2, synthesis and characterization of functionalized polyoxometalates; Part 3, polyoxometalates modified electrodes and Part 4, electrical investigation of the polyoxometalates modified capacitors
Liu, Chuan-Chang y 劉川漳. "Design、Fabrication and Characterization of Monolithic CMOS Compatible Photodetectors". Thesis, 2006. http://ndltd.ncl.edu.tw/handle/65553161667493517415.
Texto completo國立交通大學
電子工程系所
94
In this study, monolithic CMOS technology compatible photodetectors have been investigated. Using the metal as the light-blocking layer, the input light can form a spatial periodical variation to the detector. Thus, the diffusion photocurrent within the substrate can be cancelled out, and the detector response speed can be improved. A rigorous model for analyzing the detectors is adopted. All device parameters in our design have been discussed systematically for obtaining high speed operation without significantly reducing the detector responsivity. The devices were fabricated by TSMC (Taiwan Semiconductor Manufacturing Company) 0.18 um 2P6M CMOS technology. By taking VCSEL (Vertical-Cavity Surface-Emitting Laser) with input light wavelength of 850 nm as input signal, the experimental results of eye patterns of the signals show that these devices can operate at a 1.5-Gb/s datarate.
Jhou, Cheng-Syu y 周城旭. "Fabrication and Characterization of CMOS Compatible Poly-Si/SiGe Thermoelectric Microcoolers". Thesis, 2015. http://ndltd.ncl.edu.tw/handle/42609737992501356712.
Texto completo國立中央大學
電機工程學系
103
Silicon and germanium are the best semiconductor material choices for the integrated circuit for their material robustness and the fabrication process compatibility. Therefore, placement of SiGe thermoelectric microcoolers into integrated circuits to cool local hot spots is one of the promising, optimal solution to solve the heat problem in the future. Our research group has fabricated and explored the characteristics of thermal conductivity and electrical conductivity for 100 nm-wide poly-SiGe-pillars-array. Extensive experimental results show that 100 nm-wide, poly-SiGe nanopillars array with the Ge mole concentration of 24% possess, the estimated thermoelectric figure of merit (ZT) to up to 0.5 at 300 K. In this thesis, we have fabricated poly-Si and poly-Si0.76Ge0.24 P-N pillars (diameter of 250 nm/ height of 1 μm) arrays with various of area size in 17 × 12 μm2, 37 × 32 μm2 and 56 × 52 μm2. P-N pillars were produced by ion implantation of Boron/1 × 1020 cm-3 as P-dopants and Phosphorus/1 × 1020 cm-3 for N-type donors, respectively. Following nickel evaporation and silicidation and rapid-thermal annealing, NiSi/NiSiGe nanocontacts were produced to connect the bottom of N- and P-pillars. Also aluminum top electrodes form by thermal evaporation of aluminum in conjunction with lift-off process were formed to bridge the top of pillars, the P-/N- pair SiGe nanopillar thermoelectric microcooler. We systematically investigated effects of the array size and Ge concentration of poly-SiGe nanopillars on cooling capability at test conditions of the environmental temperature at 30, 60 and 90 oC as well as the driving current of 1, 3, 5, 7, 9 and 11 μA, respectively. Experimental results suggest that the poly-Si0.76Ge0.24 thermoelectric cooler with areas size of 37 × 32 µm2 possesses the best of the cooling capability with cooling temperature up to 15 oC for the condition of environmental temperature at 90 oC, and driving current at 11 μA.
Yang, Chiu-Chin y 楊久進. "Fabrication of Carbon Nanotube Field-Effect Transistor Compatible with CMOS Process". Thesis, 2008. http://ndltd.ncl.edu.tw/handle/9z4n68.
Texto completo國立臺北科技大學
機電整合研究所
96
The main objectives of this thesis aim to fabricate Carbon nanotube field-effect transistors (CNTFETs) combined with standard CMOS process. In this thesis, we will discuss the properties and fabrication of carbon nanotubes electronic devices on a CMOS chips. This research utilizes several kinds of techniques to reach purposes, such as, low temperature fabrication, manipulate technique (dielectrophoresis force), localized techniques, and surface modification by self-assembled monolayer (SAM), and moreover, to investigate the standard electrical transport characteristics of these CNTFETs. In the experimental process, the SWCNTs-based electronic devices microstructures are fabricated by standard CMOS process and wet etching process (post-process). Finally, CNTs are deposited and aligned CNTs on the predefined electrode pairs by using alternating current dielectrophoresis (AC-DEP) or photo resist defined adherent region for CNTs to complete the fabrication of SWCNTs-based electronic devices fabrication. These SWCNTs-based electronic devices are successfully fabricated and characteristics of the devices possess both weak gate modulation and no gate modulation, respectively. The former shows a turn-on current of 2nA and a conducting current ration of 2-5 folds, which is similar to the conventional silicon-based p-channel MOSFETs, while the latter is similar to characteristics of resistors. After utilizing the electroless plating to replace the low work function of TiN electrodes (~3.74eV) with the high work function of Ni/Au electrodes (~5.1eV), the formation of an improved metal-CNT contact and the reduced probabilities of surface oxidation help improve the performance of the CNT devices and promote the current of more than 10 times. Finally, the ideal of novel chemical and bio sensors, which relies on the CNTFETs technology combined with CMOS circuitry can be made on a single chip in the future.
Chang, Po-Chih y 張博智. "Fabrication of Carbon Nanotube Gas Sensor Device Compatible with CMOS Processes". Thesis, 2009. http://ndltd.ncl.edu.tw/handle/62wtdm.
Texto completo國立臺北科技大學
機電整合研究所
97
The study demonstrates the low temperature fabrication of CMOS compatible gas sensor based on CNTs. To begin with, the SIO2 on the silicon wafer was modified by APTS in order to form an aminoterminated (–NH2) self-assembled monolayer (SAM), which could facilitate the chemical bonding between CNTs and amino-groups. By means of it, CNTs were immobilized on SIO2 to be the thin film of gas sensing. Photolithography and Evaporato were then implemented to develop micro parallel electrodes. At last, Lift-off was used to complete the fabrication. In this study, we not only successfully apply the fabrication to the purpose of mass production, but also integrate it with CMOS circuits to achieve System on Chip (SoC). Moreover, from the experiment, laser trimming was proved to modulate the initial resistance of the gas sensors. The initial resistance of sensors ranged from a few hundred Ω to a few thousand Ω at room temperate. The difference of resistance resulted from the amount of CNTs which bridged the parallel electrodes and the material use of the parallel electrodes. Laser trimming could also be used to adjust the resistance of the array of CNT gas sensors. In the future, the sensors will be designed with the specificity of specific gas by modifying CNTs. Moreover, the sensors will be integrated with CMOS circuits for the purpose of wearable SoC.
Cheng, Chih-Ching y 鄭智璟. "Fabrication of Ferroelectric Negative Capacitance MOSFETs and Self-Aligned Fin-Shaped TFETs Compatible with CMOS Process". Thesis, 2015. http://ndltd.ncl.edu.tw/handle/27126023298927217666.
Texto completo國立臺灣師範大學
光電科技研究所
103
The enhancement performance of steep swing may reduce power consumption and be a candidate of next generation technology node in CMOS industry.In this work, the superior subthreshold swing is obtained by NC effect with dielectric CET=0.98nm, which the combination of HfOX/ZrOX was used. The self-aligned fin-shaped TFET without space between gate and source/drain is demonstrated successfully, and the fabrication process using all i-line photolithograph stepper without e-beam writer. The high ON current (> 10A) is obtained and indicates the benefit of self-alignment process. The proposed fin-shaped TFET process leads the opportunity of the advanced devices fabrication by 6-inch process with i-line photolithograph stepper.
Bayat, Khadijeh. "Design, Simulation and Fabrication of Photonic Crystal Slab Waveguide Based Polarization Processors". Thesis, 2009. http://hdl.handle.net/10012/4444.
Texto completoCapítulos de libros sobre el tema "CMOS compatible fabrication"
Ojur, John, Farooq Ahmad y M. Haris. "CMOS Compatible Bulk Micromachining". En Advances in Micro/Nano Electromechanical Systems and Fabrication Technologies. InTech, 2013. http://dx.doi.org/10.5772/55526.
Texto completoCai, Jin y Tak Ning. "SiGe HBTs on CMOS-Compatible SOI". En Fabrication of SiGe HBT BiCMOS Technology. CRC Press, 2007. http://dx.doi.org/10.1201/9781420066890.ch5.
Texto completo"SiGe HBTs on CMOS-Compatible SOI". En Fabrication of SiGe HBT BiCMOS Technology, 63–78. CRC Press, 2018. http://dx.doi.org/10.1201/9781315218892-13.
Texto completoActas de conferencias sobre el tema "CMOS compatible fabrication"
Gaugel, Daniel M. y Kaigham J. Gabriel. "CMOS-Compatible Micro-Fluidic Chip Cooling Using Buried Channel Fabrication". En ASME 2002 International Mechanical Engineering Congress and Exposition. ASMEDC, 2002. http://dx.doi.org/10.1115/imece2002-33644.
Texto completoChen, H. Y., C. Y. Lin, M. C. Chen, H. C. Chen, C. C. Huang y C. H. Chien. "Fabrication of CMOS-compatible Poly-Si Nanowire FET Sensor". En 2010 International Conference on Solid State Devices and Materials. The Japan Society of Applied Physics, 2010. http://dx.doi.org/10.7567/ssdm.2010.g-9-2.
Texto completoYamaguchi, Takuto, Hironobu Yoshimi, Miyoshi Seki, Minoru Ohtsuka, Nobuyuki Yokoyama, Yasutomo Ota, Makoto Okano y Satoshi Iwamoto. "Fabrication of valley photonic crystals with CMOS-compatible process". En 2021 26th Microoptics Conference (MOC). IEEE, 2021. http://dx.doi.org/10.23919/moc52031.2021.9598129.
Texto completoSaffih, Faycal, Amro M. Elshurafa, Mohammad Ali Mohammad, Nathaniel Nelson-Fitzpatrick y Stephane Evoy. "Fabrication of CMOS-compatible nanopillars for smart bio-mimetic CMOS image sensors". En 2012 IEEE 10th International New Circuits and Systems Conference (NEWCAS). IEEE, 2012. http://dx.doi.org/10.1109/newcas.2012.6329024.
Texto completoDai, Pengfei, Na Lu, Anran Gao, Yuelin Wang y Tie Li. "CMOS compatible pinpointed fabrication of nanoscale silicon oxide islands array". En 2015 Symposium on Design, Test, Integration and Packaging of MEMS/MOEMS (DTIP). IEEE, 2015. http://dx.doi.org/10.1109/dtip.2015.7160980.
Texto completoHeck, John, Richard Jones y Mario J. Paniccia. "CMOS-compatible fabrication, micromachining, and bonding strategies for silicon photonics". En SPIE MOEMS-MEMS, editado por Winston V. Schoenfeld, Jian Jim Wang, Marko Loncar y Thomas J. Suleski. SPIE, 2011. http://dx.doi.org/10.1117/12.878499.
Texto completoEibelhuber, M., T. Uhrmann y T. Glinsner. "CMOS compatible fabrication of 3D photonic crystals by nanoimprint lithography". En SPIE OPTO, editado por Wibool Piyawattanametha y Yong-Hwa Park. SPIE, 2015. http://dx.doi.org/10.1117/12.2084583.
Texto completoNotaros, Milica, Thomas Dyer, Ashton Hattori, Kevin Fealey, Seth Kruger y Jelena Notaros. "Flexible Wafer-Scale Silicon-Photonics Fabrication Platform". En Frontiers in Optics. Washington, D.C.: Optica Publishing Group, 2022. http://dx.doi.org/10.1364/fio.2022.fw1e.3.
Texto completoGrabulosa i Vallmajó, Adria, Johnny Moughames, Xavier Porte y Daniel Brunner. "3D additive fabrication for CMOS-compatible integration of scalable neural networks". En Advanced Fabrication Technologies for Micro/Nano Optics and Photonics XVI, editado por Georg von Freymann, Eva Blasco y Debashis Chanda. SPIE, 2023. http://dx.doi.org/10.1117/12.2650043.
Texto completoBurckel, D. Bruce y Katherine M. Musick. "Fabrication and Characterization of Large Area Plasmonic Metasurface Lenses". En Frontiers in Optics. Washington, D.C.: Optica Publishing Group, 2022. http://dx.doi.org/10.1364/fio.2022.fm5c.4.
Texto completo