Literatura académica sobre el tema "Cache Coherence Problem"
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Artículos de revistas sobre el tema "Cache Coherence Problem"
Shmeylin, B. Z. y E. A. Alekseeva. "THE PROBLEM OF PROVIDING CACHE COHERENCE IN MULTIPROCESSOR SYSTEMS WITH MANY PROCESSORS". Issues of radio electronics, n.º 5 (20 de mayo de 2018): 47–53. http://dx.doi.org/10.21778/2218-5453-2018-5-47-53.
Texto completoJournal, Baghdad Science. "Cache Coherence Protocol Design and Simulation Using IES (Invalid Exclusive read/write Shared) State". Baghdad Science Journal 14, n.º 1 (5 de marzo de 2017): 219–30. http://dx.doi.org/10.21123/bsj.14.1.219-230.
Texto completoأنيس القردوح, عبدالحميد الكواش y عبدالمحسن البنداق. "Simulation Cache Coherence Protocols in Multicore Processors". Journal of Pure & Applied Sciences 21, n.º 4 (3 de octubre de 2022): 285–89. http://dx.doi.org/10.51984/jopas.v21i4.2239.
Texto completoJalil, Luma Fayeq, Maha Abdul kareem H. Al-Rawi y Abeer Diaa Al-Nakshabandi. "Cache coherence protocol design using VMSI (Valid Modified Shared Invalid) states". Journal of University of Human Development 3, n.º 1 (31 de marzo de 2017): 274. http://dx.doi.org/10.21928/juhd.v3n1y2017.pp274-281.
Texto completoGuo, Yu Feng, Ming Zhang y Rui Gong. "I/O Coherence Faulty Tolerance Method for Multi-Core Processor Based on Retry". Applied Mechanics and Materials 427-429 (septiembre de 2013): 2830–33. http://dx.doi.org/10.4028/www.scientific.net/amm.427-429.2830.
Texto completoZhao, Jia y Watanabe. "Router-integrated Cache Hierarchy Design for Highly Parallel Computing in Efficient CMP Systems". Electronics 8, n.º 11 (17 de noviembre de 2019): 1363. http://dx.doi.org/10.3390/electronics8111363.
Texto completoZhu, Wei y Xiaoyang Zeng. "Decision Tree-Based Adaptive Reconfigurable Cache Scheme". Algorithms 14, n.º 6 (1 de junio de 2021): 176. http://dx.doi.org/10.3390/a14060176.
Texto completoTian, Yong Hong y Guang Jian Chen. "A Review of Researches on Cache Coherence Protocols for Multi-Core Processor". Advanced Materials Research 933 (mayo de 2014): 740–43. http://dx.doi.org/10.4028/www.scientific.net/amr.933.740.
Texto completoALKOWAILEET, WAIL Y., DAVID CARRILLO-CISNEROS, ROBERT V. LIM y ISAAC D. SCHERSON. "NUMA-Aware Multicore Matrix Multiplication". Parallel Processing Letters 24, n.º 04 (diciembre de 2014): 1450006. http://dx.doi.org/10.1142/s0129626414500066.
Texto completoCHONG, FREDERIC T. y ANANT AGARWAL. "SHARED MEMORY VERSUS MESSAGE PASSING FOR ITERATIVE SOLUTION OF SPARSE, IRREGULAR PROBLEMS". Parallel Processing Letters 09, n.º 01 (marzo de 1999): 159–70. http://dx.doi.org/10.1142/s0129626499000177.
Texto completoTesis sobre el tema "Cache Coherence Problem"
Archibald, James K. "The cache coherence problem in shared-memory multiprocessors /". Thesis, Connect to this title online; UW restricted, 1987. http://hdl.handle.net/1773/6955.
Texto completoARORA, POOJA. "Cache Coherence in Multi Processors Architecture". Thesis, 2015. http://dspace.dtu.ac.in:8080/jspui/handle/repository/14290.
Texto completoMr. MANOJ KUMAR Associate Professor Delhi Technological University Department of Computer Engineering Delhi Technological University 2011-2012
HUANG, WEN-GIANG y 黃文強. "Two new protocols for cache coherence problem". Thesis, 1989. http://ndltd.ncl.edu.tw/handle/80242125272378726036.
Texto completoLibros sobre el tema "Cache Coherence Problem"
Milo, Tomašević y Milutinović Veljko, eds. The Cache-coherence problem in shared-memory multiprocessors: Hardware solutions. Los Alamitos, Calif: IEEE Computer Society Press, 1993.
Buscar texto completoTartalja, Igor. The cache coherence problem in shared-memory multiprocessors: Software solutions. Los Alamitos, Calif: IEEE Computer Society Press, 1996.
Buscar texto completo(Editor), Milo Tomasevic y Veljko Milutinovic (Editor), eds. The Cache-Coherence Problem in Shared-Memory Multiprocessors: Hardware Solutions. Ieee Computer Society, 1993.
Buscar texto completo(Editor), Veljko Milutinovic y Milo Tomasevic (Editor), eds. The Cache-Coherence Problem in Shared-Memory Multiprocessors: Hardware Solutions. Institute of Electrical & Electronics Enginee, 1999.
Buscar texto completoCapítulos de libros sobre el tema "Cache Coherence Problem"
Cortes, Toni, Sergi Girona y Jesús Labarta. "Avoiding the cache-coherence problem in a parallel/distributed file system". En High-Performance Computing and Networking, 860–69. Berlin, Heidelberg: Springer Berlin Heidelberg, 1997. http://dx.doi.org/10.1007/bfb0031657.
Texto completoMoorthi, M. Narayana y R. Manjula. "Challenges Faced in Enhancing the Performance and Scalability in Parallel Computing Architecture". En Advances in Computer and Electrical Engineering, 252–69. IGI Global, 2016. http://dx.doi.org/10.4018/978-1-4666-9479-8.ch010.
Texto completo"Design Issues of a Cooperative Cache with no Coherence Problems". En High Performance Mass Storage and Parallel I/O. IEEE, 2009. http://dx.doi.org/10.1109/9780470544839.ch18.
Texto completoActas de conferencias sobre el tema "Cache Coherence Problem"
Cheng, L. y A. A. Sawchuk. "Optical solutions for cache memories in parallel computers". En OSA Annual Meeting. Washington, D.C.: Optica Publishing Group, 1993. http://dx.doi.org/10.1364/oam.1993.mzz.1.
Texto completoMittal, Shaily y Nitin. "A New Approach to Directory Based Solution for Cache Coherence Problem". En 2014 3rd International Conference on Eco-friendly Computing and Communication Systems (ICECCS). IEEE, 2014. http://dx.doi.org/10.1109/eco-friendly.2014.77.
Texto completoLi, Qiang. "SCI Lamp for Multimedia Applications". En ASME 1994 International Computers in Engineering Conference and Exhibition and the ASME 1994 8th Annual Database Symposium collocated with the ASME 1994 Design Technical Conferences. American Society of Mechanical Engineers, 1994. http://dx.doi.org/10.1115/cie1994-0474.
Texto completoCortes, Toni, Sergi Girona y Jesús Labarta. "Design issues of a cooperative cache with no coherence problems". En the fifth workshop. New York, New York, USA: ACM Press, 1997. http://dx.doi.org/10.1145/266220.266224.
Texto completoHytopoulos, Evangelos, Mark D. Kremenetsky, Ramesh Andra, Richard Sun y Stan Posey. "Scalability Studies on a cc-NUMA Computer Architecture for Large Automotive Simulations". En ASME 1998 International Mechanical Engineering Congress and Exposition. American Society of Mechanical Engineers, 1998. http://dx.doi.org/10.1115/imece1998-0994.
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