Literatura académica sobre el tema "Beyond CMOS technologie"
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Artículos de revistas sobre el tema "Beyond CMOS technologie"
Mohamed, Khaled Salah. "Work around Moore’s Law: Current and next Generation Technologies". Applied Mechanics and Materials 110-116 (octubre de 2011): 3278–83. http://dx.doi.org/10.4028/www.scientific.net/amm.110-116.3278.
Texto completoThomas, S. G., P. Tomasini, M. Bauer, B. Vyne, Y. Zhang, M. Givens, J. Devrajan, S. Koester y I. Lauer. "Enabling Moore's Law beyond CMOS technologies through heteroepitaxy". Thin Solid Films 518, n.º 6 (enero de 2010): S53—S56. http://dx.doi.org/10.1016/j.tsf.2009.10.054.
Texto completoMa, T. P. "(Plenary) Beyond-Si CMOS Technologies Based on High-Mobility Channels". ECS Transactions 54, n.º 1 (28 de junio de 2013): 15–24. http://dx.doi.org/10.1149/05401.0015ecst.
Texto completoChen, An, Supriyo Datta, X. Sharon Hu, Michael T. Niemier, Tajana Simunic Rosing y J. Joshua Yang. "A Survey on Architecture Advances Enabled by Emerging Beyond-CMOS Technologies". IEEE Design & Test 36, n.º 3 (junio de 2019): 46–68. http://dx.doi.org/10.1109/mdat.2019.2902359.
Texto completoBourianoff, George y Dmitri Nikonov. "(Keynote) Progress, Opportunities and Challenges for Beyond CMOS Information Processing Technologies". ECS Transactions 35, n.º 2 (16 de diciembre de 2019): 43–53. http://dx.doi.org/10.1149/1.3568847.
Texto completoLI, QILIANG. "HYBRID SILICON-MOLECULAR ELECTRONICS". Modern Physics Letters B 22, n.º 12 (20 de mayo de 2008): 1183–202. http://dx.doi.org/10.1142/s0217984908016054.
Texto completoDe Gendt, Stefan. "(Dielectric Science & Technology Thomas Callinan Award) Materials and Processes As Enablers for Moore Moore and Beyond Moore Technologies". ECS Meeting Abstracts MA2022-01, n.º 18 (7 de julio de 2022): 1036. http://dx.doi.org/10.1149/ma2022-01181036mtgabs.
Texto completoPan, Chenyun, Qiuwen Lou, Michael Niemier, Sharon Hu y Azad Naeemi. "Energy-Efficient Convolutional Neural Network Based on Cellular Neural Network Using Beyond-CMOS Technologies". IEEE Journal on Exploratory Solid-State Computational Devices and Circuits 5, n.º 2 (diciembre de 2019): 85–93. http://dx.doi.org/10.1109/jxcdc.2019.2960307.
Texto completoLi, Cheng, Zijin Pan, Xunyu Li, Weiquan Hao, Runyu Miao y Albert Wang. "Selective Overview of 3D Heterogeneity in CMOS". Nanomaterials 12, n.º 14 (8 de julio de 2022): 2340. http://dx.doi.org/10.3390/nano12142340.
Texto completoGrella, K., S. Dreiner, H. Vogt y U. Paschen. "Reliability Investigations up to 350°C of Gate Oxide Capacitors Realized in a Silicon-on-Insulator CMOS Technology". Journal of Microelectronics and Electronic Packaging 10, n.º 4 (1 de octubre de 2013): 150–54. http://dx.doi.org/10.4071/imaps.391.
Texto completoTesis sobre el tema "Beyond CMOS technologie"
Ceyhan, Ahmet. "Interconnects for future technology generations - conventional CMOS with copper/low-k and beyond". Diss., Georgia Institute of Technology, 2014. http://hdl.handle.net/1853/53080.
Texto completoBalijepalli, Heman. "Design, Implementation, and Test of Novel Quantum-dot Cellular Automata FPGAs for the beyond CMOS Era". University of Toledo / OhioLINK, 2012. http://rave.ohiolink.edu/etdc/view?acc_num=toledo1333730938.
Texto completoLee, Wei-Chin y 李威縉. "MBE-grown High quality Oxide Thin Film for CMOS Technology beyond 16nm node". Thesis, 2009. http://ndltd.ncl.edu.tw/handle/08939201900273523191.
Texto completo國立清華大學
材料科學工程學系
98
Looking beyond the 16 nm node ICs, researchers have come up a consensus that high-κ dielectrics will become the channel material in the long-standing SiO2/Si system. The combination of high-κ dielectrics with channel made of III-Vs will have to be integrated onto Si. Themes of this thesis work focus on utilizing unique MBE technique to grow high quality oxides to search potential solutions to solve this issue. Two major achievements has been obtained by employing the MBE method: (I) further reducing the EOT by (a) interfacial engineering and (b) phase transition engineering, (II) the integration of GaN onto Si through the high quality MBE-grown crystalline oxide. (III) (a) By employing the MBE technique, the formation of the oxide/Si interfacial layer has been effectively suppressed. HfO2 films with 4.9 nm thickness show low leakage current density ~0.4 A/cm2 at 1V, a dielectric constant �� of 20.7, and an EOT of 0.9 nm. The composite film of ALD-HfO2(1.4 nm)/MBE-HfO2(1.5 nm) exhibits an overall�n�� value of 16.2, and an EOT of 0.7 nm with a leakage current density of 5.3×10-1 A/cm2 at Vfb -1V. The Dit value at midgap is 3.6×1011 cm-2eV-1 calculated by the conductance method. (b) Cubic phase yttrium-doped HfO2 (YDH) ultrathin films were grown on both Si (111) and GaAs(100) substrates by molecular beam epitaxy. Thorough structural and morphological investigations by x-ray scattering and transmission electron microscopy reveal that the YDH thin films are epitaxially grown on the Si(111) and GaAs(100) substrates. From the electrical measurements, optimized doping concentration of yttrium into HfO2 increases the dielectric value to 32, achieving lower EOT on both Si and GaAs. (IV) The epitaxial growth of GaN on Si (111) substrates with a thin crystalline oxide (Sc2O3, or ��-Al2O3) as a template/buffer layer is fabricated. The structural properties and in-situ epitaxial growth were studied using reflection high energy electron diffraction (RHEED), high-resolution transmission electron microscopy, and high-resolution x-ray diffraction. The crystalline oxide template serves as an effective barrier layer, and no cracking is observed in GaN.
Pan, Chun-Peng y 潘俊澎. "The 1.8~1.6nm Gate Dielectrics Prepared by Plasma-Nitridation for 0.13um CMOS Technology Application and Beyond". Thesis, 2004. http://ndltd.ncl.edu.tw/handle/48938724714296935755.
Texto completo國立臺北科技大學
機電整合研究所
92
In order to improve the device performance, gate oxide has been scaled aggressively. The gate leakage current through the gate oxide increases significantly because direct tunneling is the primary conduction mechanism. The high gate leakage increases standby power consumption, which is a major concern for low power device applications. Decoupled plasma nitridation of is a new technology using inductive coupling to generate nitrogen plasma and implant a high level of nitrogen concentration onto the top surface layer of an ultra-thin gate oxide. This will help to increase the dielectric constant of the gate dielectric, and improve the boron penetration problem in p-channel MOSFETs. Traditional nitrided oxide prepared using N2O or NO thermal nitridation will have nitrogen piling up at the oxide/substrate interface, which results in boron pile up within the oxide causing an increase in the electron trapping and degradation of the oxide reliability. In our study, using traditional nitrided oxide methods result in poor performance、worse resistance to boron penetration、small EOT (effective oxide thickness) decreasing range. In this thesis, we use the current-voltage (I-V) measurements, capacitance-voltage (C-V) measurements, and lots of electric parameters studies were used to characterize the MOSFETs performance with Decoupled-Plasma nitrided oxide and compared with conventional methods.
Kang, Inkuk. "Formation of N⁺P junctions using in-situ phosphorus doped selective Si1-xGex alloys for CMOS technology nodes beyond 50nm". 2004. http://www.lib.ncsu.edu/theses/available/etd-03312004-172745/unrestricted/etd.pdf.
Texto completoChang, Pen y 張翔筆. "Interface engineering between high-κ dielectrics and III-V high mobility channel materials for passivation enabling the technology beyond Si CMOS". Thesis, 2011. http://ndltd.ncl.edu.tw/handle/26050156900427811103.
Texto completo國立清華大學
材料科學工程學系
100
The High-κ/Metal-Gate plus III-V high mobility channel materials is regarded as a urgent issue for achieving high performance and low power dissipation complementary metal-oxide-semiconductor (CMOS) technology beyond 15 nm node. A combination of electrical, chemical, and structural characterization methods to evaluate the MOS interface passivation quality. The interface engineering of in-situ directly deposited not only rare-earth oxide (REOs) but also HfO2-based high-κ dielectrics on III-V surface exhibited the successful passivation, in terms of low interfacial density of states (Dit) below 10e12 eV-1cm-2 without midgap peak, low equivalent oxide thickness (EOT) below 1 nm, low leakage current, both conduction band offset (ΔEc) and valence band offset (ΔEv) are larger than 1.5 eV, and truly high thermal stability higher than 800 oC. Moreover, high performance of self-aligned gate first inversion-channel MOS field-effect-transistors (MOSFETs) have achieved steep subthreshold swing (SS) value below 100 mV/dec, a maximum drain current (Id,max) of 1.5 mA/μm, a maximum transconductance (Gm) of 0.77 mS/μm, and a peak field-effect mobility (μFE) of 2100 cm2/Vs. This work suffices the key for realizing ultimately scaled devices with really high performance.
Libros sobre el tema "Beyond CMOS technologie"
Topaloglu, Rasit O. y H. S. Philip Wong, eds. Beyond-CMOS Technologies for Next Generation Computer Design. Cham: Springer International Publishing, 2019. http://dx.doi.org/10.1007/978-3-319-90385-9.
Texto completoSimon, Deleonibus, ed. Electronic device architectures for the nano-CMOS era: From ultimate CMOS scaling to beyond CMOS devices. Singapore: Pan Stanford, 2009.
Buscar texto completoSimon, Deleonibus, ed. Electronic device architectures for the nano-CMOS era: From ultimate CMOS scaling to beyond CMOS devices. Singapore: Pan Stanford, 2009.
Buscar texto completoTopaloglu, Rasit O. y H. S. Philip Wong. Beyond-CMOS Technologies for Next Generation Computer Design. Springer International Publishing AG, 2018.
Buscar texto completoTopaloglu, Rasit O. y H. S. Philip Wong. Beyond-CMOS Technologies for Next Generation Computer Design. Springer, 2019.
Buscar texto completoChen, An. Advances in Semiconductor Technologies: Selected Topics Beyond Conventional CMOS. Wiley & Sons, Incorporated, John, 2022.
Buscar texto completoChen, An. Advances in Semiconductor Technologies: Selected Topics Beyond Conventional CMOS. Wiley & Sons, Incorporated, John, 2022.
Buscar texto completoChen, An. Advances in Semiconductor Technologies: Selected Topics Beyond Conventional CMOS. Wiley & Sons, Incorporated, John, 2022.
Buscar texto completoChen, An. Advances in Semiconductor Technologies: Selected Topics Beyond Conventional CMOS. Wiley & Sons, Incorporated, John, 2022.
Buscar texto completoFerrari, Philippe, Rolf Jakoby, Onur Hamza Karabey, Gustavo P. Rehder y Holger Maune, eds. Reconfigurable Circuits and Technologies for Smart Millimeter-Wave Systems. Cambridge University Press, 2022. http://dx.doi.org/10.1017/9781316212479.
Texto completoCapítulos de libros sobre el tema "Beyond CMOS technologie"
Sangiorgi, E. "Part 2 New Materials, Devices and Technologies for Energy Harvesting". En Beyond-CMOS Nanodevices 1, 83–87. Hoboken, NJ, USA: John Wiley & Sons, Inc., 2014. http://dx.doi.org/10.1002/9781118984772.part2.
Texto completoNassiopoulou, Androula G. "Part 4 New Materials, Devices and Technologies for RF Applications". En Beyond-CMOS Nanodevices 1, 365–72. Hoboken, NJ, USA: John Wiley & Sons, Inc., 2014. http://dx.doi.org/10.1002/9781118984772.part4.
Texto completoNassiopoulou, Androula G., Panagiotis Sarafis, Jean-Pierre Raskin, Henza Issa y Phillippe Ferrari. "Substrate Technologies for Silicon-Integrated RF and mm-Wave Passive Devices". En Beyond-CMOS Nanodevices 1, 373–417. Hoboken, NJ, USA: John Wiley & Sons, Inc., 2014. http://dx.doi.org/10.1002/9781118984772.ch13.
Texto completoJamaa, Haykel Ben, Bahman Kheradmand Boroujeni, Giovanni De Micheli, Yusuf Leblebici, Christian Piguet, Alexandre Schmid y Milos Stanisavljevic. "Design Technologies for Nanoelectronic Systems Beyond Ultimately Scaled CMOS". En Nanosystems Design and Technology, 45–84. Boston, MA: Springer US, 2009. http://dx.doi.org/10.1007/978-1-4419-0255-9_3.
Texto completoAnghel, Costin y Amara Amara. "Beyond Conventional CMOS Technology: Challenges for New Design Concepts". En Design Technology for Heterogeneous Embedded Systems, 279–301. Dordrecht: Springer Netherlands, 2012. http://dx.doi.org/10.1007/978-94-007-1125-9_13.
Texto completoHills, Gage, H. S. Philip Wong y Subhasish Mitra. "Beyond-Silicon Devices: Considerations for Circuits and Architectures". En Beyond-CMOS Technologies for Next Generation Computer Design, 1–19. Cham: Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-90385-9_1.
Texto completoBouvet, Didier, László Forró, Adrian M. Ionescu, Yusuf Leblebici, Arnaud Magrez, Kirsten E. Moselund, Giovanni A. Salvatore, Nava Setter y Igor Stolitchnov. "Materials and Devices for Nanoelectronic Systems Beyond Ultimately Scaled CMOS". En Nanosystems Design and Technology, 23–44. Boston, MA: Springer US, 2009. http://dx.doi.org/10.1007/978-1-4419-0255-9_2.
Texto completoDe Man, Hugo y Hugo De Man. "Design Technology for Advanced Digital Systems in CMOS and Beyond". En Design, Automation, and Test in Europe, 269–73. Dordrecht: Springer Netherlands, 2008. http://dx.doi.org/10.1007/978-1-4020-6488-3_20.
Texto completoResta, Giovanni V., Pierre-Emmanuel Gaillardon y Giovanni De Micheli. "Functionality-Enhanced Devices: From Transistors to Circuit-Level Opportunities". En Beyond-CMOS Technologies for Next Generation Computer Design, 21–42. Cham: Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-90385-9_2.
Texto completoNourbakhsh, Amirhasan, Lili Yu, Yuxuan Lin, Marek Hempel, Ren-Jye Shiue, Dirk Englund y Tomás Palacios. "Heterogeneous Integration of 2D Materials and Devices on a Si Platform". En Beyond-CMOS Technologies for Next Generation Computer Design, 43–84. Cham: Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-90385-9_3.
Texto completoActas de conferencias sobre el tema "Beyond CMOS technologie"
Ham, Donhee y David Scott. "ES1: Beyond CMOS - emerging technologies". En 2010 IEEE International Solid- State Circuits Conference - (ISSCC). IEEE, 2010. http://dx.doi.org/10.1109/isscc.2010.5433854.
Texto completoYoung, Ian. "Technology Options for Beyond-CMOS". En ISPD '17: International Symposium on Physical Design. New York, NY, USA: ACM, 2017. http://dx.doi.org/10.1145/3036669.3041225.
Texto completoSotomayor Torres, C. M., J. Ahopelto, M. W. M. Graef, R. M. Popp y W. Rosenstiel. "Beyond CMOS - benchmarking for future technologies". En 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE 2012). IEEE, 2012. http://dx.doi.org/10.1109/date.2012.6176445.
Texto completoKawanaka, Shigeru, Akira Hokazono, Nobuaki Yasutake, Kosuke Tatsumura, Masato Koyama y Yoshiaki Toyoshima. "Advanced CMOS Technology beyond 45nm Node". En 2007 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA). IEEE, 2007. http://dx.doi.org/10.1109/vtsa.2007.378967.
Texto completoFettweis, Gerhard P. "Electronics beyond CMOS (introduction)". En 2012 IEEE Technology Time Machine (TTM). IEEE, 2012. http://dx.doi.org/10.1109/ttm.2012.6509054.
Texto completoPrendergast, James. "Electronics beyond CMOS (challenger)". En 2012 IEEE Technology Time Machine (TTM). IEEE, 2012. http://dx.doi.org/10.1109/ttm.2012.6509059.
Texto completoTurner, Richard M. y Kristina M. Johnson. "CMOS position detectors for peak location". En OSA Annual Meeting. Washington, D.C.: Optica Publishing Group, 1993. http://dx.doi.org/10.1364/oam.1993.thb.7.
Texto completoKnechtel, Johann. "Hardware Security For and Beyond CMOS Technology". En ISPD '20: International Symposium on Physical Design. New York, NY, USA: ACM, 2020. http://dx.doi.org/10.1145/3372780.3378175.
Texto completoKnechtel, Johann. "Hardware Security for and beyond CMOS Technology". En ISPD '21: International Symposium on Physical Design. New York, NY, USA: ACM, 2021. http://dx.doi.org/10.1145/3439706.3446902.
Texto completoZografos, O., A. De Meester, E. Testa, M. Soeken, P. E. Gaillardon, G. De Micheli, L. Amaru, P. Raghavan, F. Catthoor y R. Lauwereins. "Wave pipelining for majority-based beyond-CMOS technologies". En 2017 Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE, 2017. http://dx.doi.org/10.23919/date.2017.7927195.
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