Tesis sobre el tema "Approximate Circuit"
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Meana, Richard William Piper. "Approximate Sub-Graph Isomorphism For Watermarking Finite State Machine Hardware". Scholar Commons, 2013. http://scholarcommons.usf.edu/etd/4728.
Texto completoMartins, Mayler Gama Alvarenga. "Applications of functional composition for CMOS and emerging technologies". reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2015. http://hdl.handle.net/10183/164452.
Texto completoThe advances in semiconductor industry over the last decades have been strongly based on continuous scaling down of dimensions in manufactured CMOS devices. The use of CMOS devices profoundly relies on AND/OR/Inverter logic. As the CMOS scaling is reaching its physical limits, researchers increase the effort to prolong the CMOS life. Also, it is necessary to investigate alternative devices, which in many cases implies the use of different basic logic operations. As the commercial synthesis tools are not able to handle these technologies efficiently, there is an opportunity to research alternative logic implementations better suited for these new devices. This thesis focuses on presenting efficient algorithms to design circuits in both CMOS and new technologies while integrating these algorithms into regular design flows. For this task, we apply the functional composition technique, to efficiently synthesize both CMOS and emerging technologies. The functional composition is a bottom-up synthesis approach, providing flexibility to implement algorithms with optimal or suboptimal results for different technologies. To investigate how the functional composition compares to the state-of-the-art synthesis methods, we propose to apply this synthesis paradigm into six different scenarios. Two of them focus on CMOS-based circuits, and other four are based on emerging technologies. Regarding CMOSbased circuits, we investigate functional composition to investigate multi-output factorization in a circuit resynthesis flow. Also, we manipulate approximate functions to synthesize approximate triple modular redundancy (ATMR) modules. Concerning emerging technologies, we explore functional composition over spin-diode circuits and other promising approaches based on different logic implementations: threshold logic, majority logic, and implication logic. Results present a considerable improvement over the state-of-the-art methods for both CMOS and emerging technologies applications, demonstrating the ability to handle different technologies and showing the possibility to improve technologies not explored yet.
Matyáš, Jiří. "Využití přibližné ekvivalence při návrhu přibližných obvodů". Master's thesis, Vysoké učení technické v Brně. Fakulta informačních technologií, 2017. http://www.nusl.cz/ntk/nusl-363841.
Texto completoRIZZO, ROBERTO GIORGIO. "Energy-Accuracy Scaling in Digital ICs: Static and Adaptive Design Methods and Tools". Doctoral thesis, Politecnico di Torino, 2019. http://hdl.handle.net/11583/2743228.
Texto completoDvořáček, Petr. "Evoluční návrh pro aproximaci obvodů". Master's thesis, Vysoké učení technické v Brně. Fakulta informačních technologií, 2015. http://www.nusl.cz/ntk/nusl-234958.
Texto completoTraiola, Marcello. "TEST TECHNIQUES FOR APPROXIMATE DIGITAL CIRCUITS". Thesis, Montpellier, 2019. http://www.theses.fr/2019MONTS060.
Texto completoDespite great improvements of the semiconductor industry in terms of energy efficiency, the computer systems’ energy consumption is constantly growing. Many largely used applications – usually referred to as Recognition, Mining and Synthesis (RMS) applications – are more and more deployed as mobile applications and on Internet of Things (IoT) structures. Therefore, it is mandatory to improve the future silicon devices and architectures on which these applications will run. Inherent resiliency property of RMS applications has been thoroughly investigated over the last few years. This interesting property leads applications to be tolerant to errors, as long as their results remain close enough to the expected ones. Approximate Computing (AxC) , is an emerging computing paradigm which takes advantages of this property. AxC has gained increasing interest in the scientific community in last years. It is based on the intuitive observation that introducing selective relaxation of non-critical specifications may lead to efficiency gains in terms of power consumption, run time, and/or chip area. So far, AxC has been applied on the whole digital system stack, from hardware to application level. This work focuses on approximate integrated circuits (AxICs), which are the result of AxC application at hardware-level. Functional approximation has been successfully applied to integrated circuits (ICs) in order to efficiently design AxICs. Specifically, we focus on testing aspects of functionally approximate ICs. In fact – since approximation changes the functional behavior of ICs – techniques to test them have to be revisited. In fact, some previous works – have shown that circuit approximation brings along some challenges for testing procedures, but also some opportunities. In particular, approximation procedures intrinsically lead the circuit to produce errors, which have to be taken into account in test procedures. Error can be measured according to different error metrics. On the one hand, the occurrence of a defect in the circuit can lead it to produce unexpected catastrophic errors. On the other hand, some defects can be tolerated, when they do not induce errors over a certain threshold. This phenomenon could lead to a yield increase, if properly investigated and managed. To deal with such aspects, conventional test flow should be revisited. Therefore, we introduce Approximation-Aware testing (AxA testing). We identify three main AxA testing phases: (i) AxA fault classification, (ii) AxA test pattern generation and (iii) AxA test set application. Briefly, the first phase has to classify faults into catastrophic and acceptable; the test pattern generation has to produce test vectors able to cover all the catastrophic faults and, at the same time, to leave acceptable faults undetected; finally, the test set application needs to correctly classify AxICs under test into catastrophically faulty, acceptably faulty, fault-free. Only AxICs falling into the first group will be rejected. In this thesis, we thoroughly discuss the three phases of AxA testing, and we present a set of AxA test techniques for approximate circuits. Firstly, we work on the classification of AxIC faults into catastrophic and acceptable according to an error threshold (i.e. the maximum tolerable amount of error). This classification provides two lists of faults (i.e. catastrophic and acceptable). Then, we propose an approximation-aware (ax-aware) Automatic Test Pattern Generation. Obtained test patterns prevent catastrophic failures by detecting catastrophic defects. At the same time, they minimize the detection of acceptable ones. Finally – since the AxIC structure often leads to a yield gain lower than expected – we propose a technique to correctly classify AxICs into “catastrophically faulty”, “acceptably faulty”, “and fault-free”, after the test application. To evaluate the proposed techniques, we perform extensive experiments on state-ofthe-art AxICs
Albandes, Iuri. "Use of Approximate Triple Modular Redundancy for Fault Tolerance in Digital Circuits". Doctoral thesis, Universidad de Alicante, 2018. http://hdl.handle.net/10045/88248.
Texto completoRouijaa, Hicham. "Modelisation des lignes de transmission multiconducteurs par la méthode des approximants de Padé : approche circuit". Aix-Marseille 3, 2004. http://www.theses.fr/2004AIX30011.
Texto completoA transmission line model is presented in this thesis. Various methods allowing calculation of the currents and the tensions distributed on the uniform transmission line. The most of these methods are limited to lines with constants or low losses, and only for linear loads. Using Padé approximant, this proposed model use most variable than the conventional lumped discretization model. The model is suitable for inclusion in general circuit simulator, such as Esacap, Spice and Saber. This method offers an efficient means to discretize transmission lines on real and complexes cells compared to the conventional lumped discretization. In addition, the model can handle frequency-dependent line parameters directly in the time domain. However, the model is extended of shielded cable for coaxial cable and general shielded cable as bundle cable. Numerical examples are presented to demonstrate the validity of the proposed model and to illustrate its application to a variety of cable category
Wang, You. "Analyse de fiabilité de circuits logiques et de mémoire basés sur dispositif spintronique". Thesis, Paris, ENST, 2017. http://www.theses.fr/2017ENST0005/document.
Texto completoSpin transfer torque magnetic tunnel junction (STT-MTJ) has been considered as a promising candidate for next generation of non-volatile memories and logic circuits, because it provides a perfect solution to overcome the bottleneck of increasing static power caused by CMOS technology scaling. However, its commercialization is limited by the poor reliability, which deteriorates severely with device scaling down. This thesis focuses on the reliability investigation of MTJ based non-volatile circuits. Firstly, a compact model of MTJ including main reliability issues is proposed and validated by the comparison with experimental data. Based on this accurate model, the reliability of typical circuits is analyzed and reliability optimization methodology is proposed. Finally, the stochastic switching behavior is utilized in some new designs of conventional applications
Hrbáček, Radek. "Automatický multikriteriální paralelní evoluční návrh a aproximace obvodů". Doctoral thesis, Vysoké učení technické v Brně. Fakulta informačních technologií, 2017. http://www.nusl.cz/ntk/nusl-412591.
Texto completoMay, David [Verfasser], Walter [Akademischer Betreuer] [Gutachter] Stechele y Lirida De Barros [Gutachter] Naviner. "Automated Power Optimization of Sequential Integrated Circuits through Approximate Computing / David May ; Gutachter: Lirida de Barros Naviner, Walter Stechele ; Betreuer: Walter Stechele". München : Universitätsbibliothek der TU München, 2017. http://d-nb.info/1143125029/34.
Texto completoMatula, Tomáš. "Využití aproximovaných aritmetických obvodů v neuronových sítí". Master's thesis, Vysoké učení technické v Brně. Fakulta informačních technologií, 2019. http://www.nusl.cz/ntk/nusl-399179.
Texto completoMrázek, Vojtěch. "Metodologie pro automatický návrh nízkopříkonových aproximativních obvodů". Doctoral thesis, Vysoké učení technické v Brně. Fakulta informačních technologií, 2018. http://www.nusl.cz/ntk/nusl-412599.
Texto completoKincl, Zdeněk. "Metody pro testování analogových obvodů". Doctoral thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2013. http://www.nusl.cz/ntk/nusl-233583.
Texto completo(10184063), Younghoon Kim. "Approximate Computing: From Circuits to Software". Thesis, 2021.
Buscar texto completoEsposito, Darjn. "VLSI Circuits for Approximate Computing". Tesi di dottorato, 2017. http://www.fedoa.unina.it/11627/1/esposito_darjn_29.pdf.
Texto completoChoudhury, Mihir Rajanikant. "Approximate logic circuits: Theory and applications". Thesis, 2011. http://hdl.handle.net/1911/64404.
Texto completoMiao, Jin. "Modeling and synthesis of approximate digital circuits". Thesis, 2014. http://hdl.handle.net/2152/28060.
Texto completotext
"Optimization Techniques for Minimizing Energy Consumption in Approximate Circuits". Thesis, 2011. http://hdl.handle.net/1911/70363.
Texto completoAlmardy, Mohamed S. M. "Three-phase high-frequency transformer isolated soft-switching DC-DC resonant converters". Thesis, 2011. http://hdl.handle.net/1828/3594.
Texto completoGraduate
Hsu, Wei-min y 許維民. "Design of a Circuit for Generating Approximated Step Waveforms of Current". Thesis, 2006. http://ndltd.ncl.edu.tw/handle/05771527816990516844.
Texto completo逢甲大學
資訊電機工程碩士在職專班
94
This thesis is designing a piece of circuit to generating approximate step waveforms of current mainly. Apply to test the response time of the detecting device of current. Because the biggest current of step waveforms current is up to several dozen amperes. The circuit adopts MOSFET power electronic element to be done for the switch component of the current. The size current of flowing through MOSFET is urged the voltage to control. Drive voltage of step can is it generating approximate step waveforms of current. But rise time of step current must meet the requirement of grade microsecond. It is unable to reach this request that traditional MOSFET circuit designs. This thesis puts forward an improved generating approximate current waveforms circuit design method of the step. And probe into the factor influencing rise time of current in the circuit with the experiment and simulation.
Lai, Yung-An y 賴勇安. "Synthesis of Approximate Threshold Logic Circuits with an Error Rate Guarantee". Thesis, 2017. http://ndltd.ncl.edu.tw/handle/xv3937.
Texto completo國立清華大學
資訊工程學系所
105
Recently, threshold logic attracts a lot of attention due to the advances of its physical implementation and the strong binding to neural networks.On the other hand, approximate computing is a new design paradigm that focuses on error-tolerant applications, e.g., machine learning or pattern recognition.In this thesis, we integrate threshold logic with approximate computing and propose a synthesis algorithm to obtain cost-efficient approximate threshold logic circuits with an error rate guarantee.We conduct experiments on a set of IWLS 2005 benchmarks.The experimental results show that the proposed algorithm can efficiently explore the approximability of each benchmark.For a 5\% error rate constraint, the circuit cost can be reduced by 22.8\% on average.
Guo, Ning. "Investigation of Energy-Efficient Hybrid Analog/Digital Approximate Computation in Continuous Time". Thesis, 2017. https://doi.org/10.7916/D86W9GRX.
Texto completoYoul, Jennifer Marie. "Lead exposure in free-ranging kea (Nestor notabilis), takahe (Porphyrio hochstetteri) and Australasian harriers (Circus approximans) in New Zealand : a thesis presented in partial fulfillment of the requirements for the degree of Masters of Veterinary Science in Wildlife Health at Massey University, Palmerston North, New Zealand". 2009. http://hdl.handle.net/10179/1031.
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