Tesis sobre el tema "Analogue technologies"
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Raingeaud, Joël. "Synthèse et purification d'un analogue du neuropeptide VIP (vasoactive intestinal peptide) par les technologies de l'ADN recombinant et du génie protéique". Limoges, 1994. http://www.theses.fr/1994LIMO0006.
Texto completoMustard, Jonathan. "The integrated sound, space and movement environment the uses of analogue and digital technologies to correlate topographical and gestural movement with sound /". Connect to thesis, 2006. http://portal.ecu.edu.au/adt-public/adt-ECU2007.0037.html.
Texto completoMustard, Jonathan A. "The integrated sound, space and movement environment : The uses of analogue and digital technologies to correlate topographical and gestural movement with sound". Thesis, Edith Cowan University, Research Online, Perth, Western Australia, 2006. https://ro.ecu.edu.au/theses/84.
Texto completoTan, Jennifer Pei-Ling. "Digital kids, analogue students : a mixed methods study of students' engagement with a school-based Web 2.0 learning innovation". Thesis, Queensland University of Technology, 2009. https://eprints.qut.edu.au/30396/1/Jennifer_Tan_Thesis.pdf.
Texto completoTan, Jennifer Pei-Ling. "Digital kids, analogue students : a mixed methods study of students' engagement with a school-based Web 2.0 learning innovation". Queensland University of Technology, 2009. http://eprints.qut.edu.au/30396/.
Texto completoHartwich, Franziska. "Supporting Older Drivers through Emerging In-Vehicle Technologies: Performance-Related Aspects and User Acceptance". Doctoral thesis, Universitätsbibliothek Chemnitz, 2017. http://nbn-resolving.de/urn:nbn:de:bsz:ch1-qucosa-230565.
Texto completoIm Zuge des aktuellen demografischen Wandels wird für zahlreiche Länder der Welt eine stetige Zunahme des Bevölkerungsanteils von Personen im Alter von 65 Jahren und älter prognostiziert (UN DESA Population Division, 2015). Die daraus resultierende alternde Gesellschaft spiegelt sich auch in der steigenden Anzahl älterer Verkehrsteilnehmer wieder (Koppel & Berecki-Gisolf, 2015). Dieser Effekt wird durch das ebenfalls ansteigende Bedürfnis älterer Personen, ihre Individualmobilität auch bis ins hohe Alter hinein aufrecht zu erhalten, noch verstärkt (Eby & Molnar, 2012). Berücksichtigt man die Auswirkungen altersbedingter Veränderungen von Mobilitätsmustern und fahrrelevanten Fähigkeiten auf die Sicherheit älterer Verkehrsteilnehmer (Polders et al., 2015), stellt diese demographische Entwicklung neue Herausforderungen an die Verkehrsforschung. So bedarf es neuartiger Strategien zur Unterstützung älterer Fahrzeugführer und ihrer Mobilitätsbedürfnisse. Aufgrund aktueller technologischer Entwicklungen eröffnen vor allem durch neuartige Fahrzeugtechnologien zur Fahrerunterstützung innovative Möglichkeiten, diesem Bedarf gerecht zu werden (Karthaus & Falkenstein, 2016). An diesem Punkt setzt die vorliegende Dissertation an. Ziel des Dissertationsprojektes war es zu evaluieren, inwieweit aktuell in Entwicklung befindliche Fahrzeugtechnologien, die aus theoretischer Sicht als geeignete Mittel zur Unterstützung älterer Fahrer erscheinen, tatsächlich zu deren Individualmobilität beitragen können. Um das Potential derartiger Technologien abzuschätzen, wurde einerseits untersucht, inwieweit sie zur Verbesserung von Variablen, die in Beziehung zur Fahrleistung stehen, beitragen können. Anderseits wurde ihre Akzeptanz bei potentiellen zukünftigen Nutzern evaluiert. Für diese Untersuchungen wurden zwei exemplarische Technologien als Repräsentanten grundlegend unterschiedlicher Stufen der Fahrzeugautomatisierung ausgewählt: ein kontaktanaloge Head-up Display (auch Augmented Reality Display, ARD) und hochautomatisiertes Fahren. ARDs stellen einen technologischen Ansatz zur Implementierung von Fahrerinformationssystemen und dementsprechend ein Beispiel für Automatisierungsstufe 0 (no automation; SAE International, 2014) dar, indem sie den Fahrer durch die Bereitstellung verkehrsrelevanter Informationen bei der manuellen Ausführung der Fahraufgabe unterstützen. Im Gegensatz dazu zielt die Technologie des hochautomatisierten Fahrens auf eine Unterstützung des Fahrers durch die vollständige Übernahme der Fahraufgabe ab, was Automatisierungsstufe 4 (high automation; SAE International, 2014) entspricht. Trotz dieser grundlegend unterschiedlichen Ansätze wird beiden Technologien ein hohes Potential zur Unterstützung insbesondere älterer Fahrer zugesprochen (Meyer & Deix, 2014; Polders et al., 2015; Rusch et al., 2013; Schall et al., 2013). Die Untersuchung Performanz- und Akzeptanz-bezogener Aspekte beider Technologien erfolgte im Rahmen von drei empirische Studien. Um altersspezifische Befunde identifizieren zu können, wurden allen Studien mit Vertretern der Zielgruppe von älteren Fahrern (65-85 Jahre alt) sowie einer jüngeren Vergleichsgruppe ‚durchschnittlicher‘ (d.h. junger, erfahrener) Fahrer (25-45 Jahre alt) durchgeführt. Bei Studie I handelte es sich um eine im Fahrsimulator durchgeführte Reaktionszeitstudie, in deren Rahmen Leistungs-bezogene Aspekte von ARDs untersucht wurden. Unter den vielfältigen Möglichkeiten zur Anwendung dieser Technologie wird vor allem die Präsentation von Vorinformationen über bevorstehende komplexe Fahrsituationen während der Fahrt als gewinnbringend für ältere Fahrer eingestuft. Diese Strategie adressiert die Tendenz älterer Fahrer zu einer eher seriellen als parallelen Verarbeitung gleichzeitig verfügbarer Informationen während der Fahrt (Davidse et al., 2009; Küting & Krüger, 2002). Vor diesem Hintergrund lag der Fokus von Studie I auf den Effekten einer kontaktanalogen Präsentation von Vorinformationen über bevorstehende Kreuzungen auf die Geschwindigkeit und Genauigkeit der Wahrnehmung dieser Kreuzungen durch den Fahrer, was eine Grundvoraussetzung für eine sichere Fahrleistung darstellt (Crundall & Underwood, 2011). Basierend auf bestehenden Befürchtungen über kontraproduktive Effekte einer kontaktanalogen Informationsdarstellung während der Fahrt, insbesondere im Falle inkorrekter Informationen, wurden zudem die Auswirkungen von Systemfehlern untersucht. Mit Hilfe der kontaktanalogen Vorinformationen gelang es sowohl älteren als auch jüngeren Fahrern, ohne erhöhten Zeitbedarf einen höheren Anteil relevanter Aspekte in Kreuzungssituationen wahrzunehmen. Allerdings wurde die positive Systemwirkung durch das Erleben von Systemfehlern (in diesem Fall inkorrekten Vorinformationen) zumindest für die Dauer der Untersuchung aufgehoben. Dieser Effekt war besonders ausgeprägt für ältere Fahrer und könnte auf die Schwierigkeit, inkorrekte Informationen auf Grund ihrer Darstellung im ARD zu ignorieren, zurückzuführen sein. Studie II stellte eine Fahrsimulatorstudie zu Akzeptanz-bezogenen Aspekten eines ARDs, welches dem Fahrer Vorinformationen über bevorstehende Kreuzungen zur Verfügung stellt, dar. Inhalt dieser Studie waren zum einen die Effekte von Systemerfahrung auf die Nutzerakzeptanz des Systems, zum anderen altersspezifische Akzeptanzbarrieren, welche ältere Fahrer potentiell von der Nutzung der Technologie abhalten könnten. Insgesamt bewerteten sowohl ältere als auch jüngere Fahrer das ARD positiv. Dabei fielen Bewertungen auf Basis von Systemerfahrung im Fahrsimulator tendenziell besser aus als Bewertungen ohne vorherige Systemerfahrung. Obwohl ältere Fahrer im Vergleich zu jüngeren Fahrern ihre Selbstwirksamkeit im Umgang mit dem ARD sowie Umgebungsfaktoren, welche dessen Nutzung unterstützen könnten, als geringer ausgeprägt wahrnahmen, war die positive Einstellung gegenüber der Nutzung des Systems bei ihnen im Durchschnitt stärker ausgeprägt. Leistungs- und Akzeptanz-bezogene Aspekte des hochautomatisierten Fahrens wurden in Studie III, einer zweistufigen Fahrsimulatorstudie, untersucht. Parallel zur Veränderung der Rolle des Menschen vom Fahrzeugführer zum Passagier im Zuge der zunehmenden Fahrzeugautomatisierung veränderte sich dabei auch der Fokus der Leistungsperspektive. Dem entsprechend stand die Bewertung der Fahrleistung des automatisierten Systems durch den mitfahrenden Menschen im Mittelpunkt dieser Untersuchung. Affektive Komponenten der Mensch-Automatisierungs-Interaktion wie Fahrkomfort und Fahrspaß werden in diesem Kontext als bedeutsam zur Gewährleistung der Nutzerakzeptanz und damit auch Nutzung automatisierter Fahrzeuge betrachtet (Tischler & Renner, 2007). Es wird angenommen, dass derartige affektive Komponenten im Kontext des hochautomatisierten Fahrens vor allem vom implementierten Fahrstil abhängen (Bellem et al., 2016). In einem theoretischen Ansatz zur Verbesserung des Fahrkomforts wird die Implementierung vertrauter (d.h. dem eigenen manuellen Fahrstil ähnlicher) Fahrstile empfohlen, um einen menschlichen Fahrzeugführer nachzuahmen und so Bedenken gegenüber einer automatisierten Fahrzeugführung abzubauen (Elbanhawi et al., 2015). Diesem Ansatz folgend wurden in Studie III die Effekte der Fahrzeugautomatisierung sowie der Ähnlichkeit des implementierten Fahrstils zum individuellen manuellen Fahrstil des jeweiligen Fahrers auf Fahrkomfort und Fahrspaß untersucht. Es konnte gezeigt werden, dass mit höherer Automatisierung der Fahrkomfort älterer und jüngerer Fahrer anstieg, der Fahrspaß jüngerer Fahrer sich jedoch verringerte. Alle abhängigen Variablen wurden von einer vergleichbaren Interaktion zwischen Fahreralter und Fahrstilähnlichkeit beeinflusst: Während jüngere Fahrer hochautomatisierte Fahrstile bevorzugten, die ihren jeweiligen manuellen Fahrstilen ähnelten, präferierten ältere Fahrer im hochautomatisierten Kontext eher unähnliche Fahrstile. Dem entsprechend kann der Vertrautheitsansatz basierend auf den Ergebnissen von Studie III zumindest für jüngere Fahrer unterstützt werden, nicht aber für die Zielgruppe älterer Fahrer, deren manuelle Fahrstile durch Kompensationsstrategien zum Ausgleich altersbedingter Einschränkungen ihrer sensorischen, kognitiven und motorischen Fähigkeiten geprägt sind. Fahrstilpräferenzen im hochautomatisierten Kontext scheinen in dieser Altersgruppe mehr von dem Wunsch, einen von diesen Kompensationsstrategien unbeeinträchtigten Fahrstil wiederzuerlangen, geprägt zu sein als von dem Bedürfnis nach vertraut gestalteten Fahrmanövern. Analog zur Evaluation des ARDs beinhaltete die Untersuchung Akzeptanz-bezogener Aspekte des hochautomatisierten Fahrens die Effekte von Systemerfahrung auf die Nutzerakzeptanz sowie potentielle altersspezifische Akzeptanzbarrieren. Einen systemspezifischen Designaspekt aufgreifend wurde zudem untersucht, ob die Nutzerakzeptanz des hochautomatisierten Fahrens ebenfalls durch den implementierten Fahrstil modifizierbar ist. Fahrer beider Altersgruppen berichteten tendenziell positive a priori Akzeptanzwerte, welche sich nach der Ersterfahrung mit dem System signifikant erhöhten und sich anschließend stabilisierten. Vergleichbar mit den Ergebnissen zum ARD war die positive Einstellung gegenüber der Nutzung eines hochautomatisierten Fahrzeuges bei älteren Fahrern im Durchschnitt stärker ausgeprägt als bei jüngeren, obwohl sie ihre Selbstwirksamkeit im Umgang mit dem System sowie unterstützende Umgebungsfaktoren als geringer ausgeprägt bewerteten. Bezüglich des hochautomatisierten Fahrstils unterlag die Systemakzeptanz derselben Interaktion zwischen Fahreralter und Fahrstilähnlichkeit wie Fahrkomfort und Fahrspaß. Diese Ergebnisse demonstrieren, dass Fahrzeugtechnologien auf verschiedenen Automatisierungsstufen effektive Ansätze zur Unterstützung der Individualmobilität älterer Personen liefern können. Die Mehrzahl der identifizierten Leistungs-bezogenen Verbesserungen zeigte sich sowohl für ältere als auch jüngere Fahrer. Diese Befunde weißen auf das Potential von Systemen, welche den Bedürfnissen älterer Fahrer entsprechen, zur Unterstützung verschiedener Altersgruppen hin. Die Ergebnisse der Akzeptanzperspektive deuten an, dass die evaluierten Systeme von Fahrern verschiedener Altersgruppen akzeptiert werden würden, was die Ergebnisse der Leistungsebene widerspiegelt. Die Vergleichbarkeit der Muster verschiedener Akzeptanzprädiktoren, welche für zwei Systeme auf grundlegend unterschiedlichen Automatisierungsstufen identifiziert werden konnten, legt die Existenz zugrundeliegender genereller Aspekte der Fahrzeugtechnologie-Akzeptanz älterer Fahrer nahe. Diese beinhalten deren stark ausgeprägtes Bedürfnis zur Erhaltung ihrer Individualmobilität sowie deren geringere Selbstwirksamkeit im Umgang mit relevanten Technologien und den unzureichenden Zugang zu unterstützenden Infrastrukturen. Diese Erkenntnisse liefern Implikationen für theoretische Modelle der Akzeptanz von Fahrzeugtechnologien durch ältere Fahrer sowie für Maßnahmen zur Absicherung einer erfolgreichen Entwicklung und Markteinführung von Systemen, die darauf abzielen, ältere Menschen beim Erhalt ihrer Individualmobilität zu unterstützen. Berücksichtigt man die Bedeutsamkeit des Fahrens eines eigenen Automobils für das physiologische und psychologische Wohlbefinden im Alter (Adler & Rottunda, 2006; Lutin et al., 2013; Whelan, Langford, Oxley, Koppel, & Charlton, 2006), unterstreichen diese Ergebnisse das Potential neu entstehender Fahrerunterstützungstechnologien für die Verbesserung der Verkehrssicherheit, aber auch Lebensqualität älterer Menschen
Joubert, Antoine. "Neurone analogique robuste et technologies émergentes pour les architectures neuromorphiques". Phd thesis, Université de Grenoble, 2013. http://tel.archives-ouvertes.fr/tel-00935178.
Texto completoLosch, Flora. "Technopolitiques post-coloniales : radiotélévisions, archives audiovisuelles et retour du passé en Afrique (XXe-XXIe siècles)". Electronic Thesis or Diss., Paris, EHESS, 2024. http://www.theses.fr/2024EHES0024.
Texto completoAt a time of debates on digital imperialism, the decolonization of heritage organizations, and the renewal of the relations between European and African states, this thesis seeks to survey a “slow-moving history” with lasting historiographic and cultural impacts: that of media technopolitics and of the accumulation of an audiovisual “documentary mass” by contemporary states.During the first 20th century, audiovisual technologies were introduced to Africa to serve imperial projects. Expanded to television during the decolonization, this techno-imperial investment was redeployed in the post-colonial context through cooperation between European and African states. Over the century, these technologies have generated a mass of analogue audiovisual archives. Produced exclusively by the former, and then by the latter after their independence, these archives are subject to obsolescence and destruction. Since the turn of the 21st century, they have been saved thanks to digital technologies, which radically change the terms and conditions of their preservation. Holding a monopoly on the continent’s audiovisual past, European states have assisted those of Africa, and this assistance, like that provided for their digital migration, forms part of the same post-colonial technopolitics.Lying at the intersection of relational histories, science studies, critical archival studies and critical heritage studies, this thesis reconstructs this puzzle using paper and audiovisual archives, semi-directive interviews and technical audits. It makes these media archives, which have remained outside of the reflection on the colonial archive and the “archive-subject”, an object of research in their own right. Centered on the analysis of the French imperial project and the agency of African actors, particularly in Côte d’Ivoire and Senegal, it consists of two volumes, the first of which, “Rewinding time to understand the collections (20th century)”, situates these archives in a long-term history. This volume studies the structuring of radio networks during the colonial period and their reconfiguration after the introduction of television and the coeval independence, post-1960 (part 1). By following two actors, it shows the intertwining of humans and non-humans in these socio-technical networks while also highlighting the polycentric nature of audiovisual technologies (part 2). By reconstructing the concomitant production of a legal instrument within UNESCO, it analyzes the standardization of audiovisual heritage preservation while retracing the first, now largely forgotten, debates on the restitution of the audiovisual heritage accumulated by the imperial states (part 3).These histories converge in the contemporary period, explored in the second volume “New issues in African audiovisual archives (21st century)”. This volume analyzes the implications of the change in the technical system on the audiovisual archives of the Ivorian and Senegalese public broadcasters and on the international preservation activity (part 4). Part 5 focuses on the reconfiguration of Franco-African cooperation and French investment in the safeguarding of African audiovisual archives. It also studies the African collections held on French territory, especially in the Institut national de l’audiovisuel, one of the main organizations holding African audiovisual past, bringing out the need for their restitution. At the end of these developments, it appears that the preservation activity is historically situated and a space where resources of the past, technologies, states, markets, knowledge and powers intermingle, this question being thus brought back into the field of politics
Diokh, Thérèse. "Développement des technologies mémoires "back-end" résistives à base d'oxydes pour application dans des "Systems on Chip" avancés". Thesis, Grenoble, 2013. http://www.theses.fr/2013GRENT048.
Texto completoOxide-based Resistive Random Acces Memories (OxRRAM) are nowadays considered among the most promising solutions for future generation of low-cost embedded non-volatile memories. The advantages of these memories are the scalability, low power consumption, high speed, complementary metal oxide semiconductor technology (CMOS) compatibility and ease of fabrication (the memory cell consisting of a Metal–Insulator– Metal (MIM) structure integrated in the back-end-of-line, plus an addressing element, i.e. a transistor or a diode) . The potential applications range from consumer – communications to automotive – industrial. This work deals with the development of an OxRRAM demonstrator into an advanced CMOS technology for System on Chip (SoC) application. We discuss the impact of different dielectrics materials (Ta2O5, ZrO2 and HfO2) and electrodes (Pt, Ti, TiN) on the memory performances and reliability in order to choose the best couple dielectric/electrode. We focus on the understanding of the memory switching physics that is involved in the programming of OxRRAM bit-cells. The failure and transition mechanism are presented for lifetime prediction. Some methodologies are presented in this PhD thesis for the optimization of the OxRRAM bit-cell performances and sizes according to a targeted Mutliple Time Programmable (MTP) memory application. We developed analog block systems to control and address the OxRRAM bit-cell taking to account the bipolar switching characteristics of the devices. Finally, these solutions are to be validated using a 1-kb OxRRAM demonstrator yet designed and fabricated in a logic 28-nm node CMOS technology. Keywords: Oxide Resistive memory (OxRRAM), High-k, MIM, CMOS, Characterization, Reliability, Modeling, Analog Design, Simulation
Baumberger, Werner W. Baumberger Werner. "Analoge integrierte Schaltungen in Gallium-Arsenid-Technologie mit geringem Leistungsverbrauch /". [S.l.] : [s.n.], 1994. http://e-collection.ethbib.ethz.ch/show?type=diss&nr=10483.
Texto completoVogt, Rolf Walter Eduard. "Schnelle gemischt digital/analoge Transversalfilter in Gallium-Arsenid-MESFET-Technologie /". [S.l.] : [s.n.], 1996. http://e-collection.ethbib.ethz.ch/show?type=diss&nr=11755.
Texto completoBraham, Ahmed. "Simulateur analogique temps réel des systèmes électrotechniques : apport des nouvelles technologies". Toulouse, INPT, 1997. http://www.theses.fr/1997INPT012H.
Texto completoRitter, Philipp. "Design and optimization of high speed flash analog-to-digital converters in SiGe BiCMOS technologies". Thesis, Lyon, INSA, 2013. http://www.theses.fr/2013ISAL0052.
Texto completoHigh speed Analog-to-Digital Converters (ADC) are essential building blocks for the reception and processing in high data rate reception circuits. The flash ADC archi- tecture performs the digitization by comparing the analog input signal to all refer- ence levels of the quantization range simultaneously and is thus the fastest architecture available. In the past the flash architecture has been employed successfully to digitize signals at Nyquist rates beyond 20 GS/s. However the inherent high speed operation has led to power consumptions of several watts and hence to poor energy efficien- cies. This thesis explores approaches to optimize the energy efficiency of flash ADCs. In particular, no dedicated track-and-hold stage is used at the high speed data input. This imposes very stringent requirements on the timing accuracy and level accuracy in the high speed signal distribution to the comparators. The comparators need to ex- hibit a very high speed capability to correctly perform the quantization of the signal against the reference levels. The main focus of this thesis is hence the investigation of design relevant high frequency effects in the analog ADC frontend, such as the bandwidth requirement of overdriven comparators, the data signal distribution over a passive transmission line tree and the dynamic linearity of emitter followers. The correctness and efficacy of the presented methods is demonstrated by measurement results of a 6 bit 20 GS/s Nyquist rate flash ADC fabricated within the context of this work. The demonstrator ADC operates without time interleaving, no calibration or correction whatsoever is needed. By employing design techniques borrowed from high speed analog circuits engineering and by exhausting the high speed potential of a state-of-the-art SiGe BiCMOS production technology, a flash ADC with a record energy efficiency could be realized
Fei, Richun. "Solutions alternatives pour améliorer le test de production des capteurs optiques en technologie CMOS". Thesis, Université Grenoble Alpes (ComUE), 2015. http://www.theses.fr/2015GREAT117.
Texto completoCurrent production testing of CMOS imager sensors is mainly based on capturing images and detecting failures by image processing with special algorithms. The fault coverage of this costly optical test is not sufficient given the quality requirements. Studies on devices produced at large volume have shown that Horizontal Fixed Pattern Noise (HFPN) is one of the common image failures encountered on products that present fault coverage problems, and this is the main cause of customer returns for many products. A detailed analysis of failed devices has demonstrated that HFPN failures arise from changes of electronic circuit topology in pixel addressing decoders or the metal lines required for pixel powering and control. These changes are usually due to the presence of spot defects, causing some pixels in a row to operate incorrectly, leading to an HFPN failure. Moreover, defects resulting in partially degraded metal lines may not induce image failure in limited industrial test conditions, passing the optical tests. Later, these defects may produce an image failure in the field, either because the capture conditions would be more stringent, or because the defects would evolve into catastrophic faults due to electromigration. In this paper, we have first enhanced the HFPN detection algorithm in order to improve the fault coverage of the optical test. Next, a built-in self-test structure is presented for the on-chip detection of catastrophic and non-catastrophic defects in the pixel power and control lines
Bazarjani, Seyfollah Carleton University Dissertation Engineering Electronics. "Mixed analog-digital design considerations in deep submicron CMOS technologies". Ottawa, 1996.
Buscar texto completoRoig, Fabien. "Etude et modélisation des effets de synergie issus de l’environnement radiatif spatial naturel et intentionnel sur les technologies bipolaires intégrées". Thesis, Montpellier 2, 2014. http://www.theses.fr/2014MON20205.
Texto completoThe space environment is a radiative concern that affects on board electronic systems, leading to failures. It is possible to distinguish two types of effects: the cumulative effects due to continuous deposition of energy throughout the space mission and the transient effects due to the single energetic particle crossing a sensitive area of the component or deposition of energy in a very short time in the specific context of an exo-atmospheric nuclear explosion. During qualification procedures for space mission, these effects are studied separately. However, the probability that they occur simultaneously in flight is significant. As a consequence, this work is about the study of the synergy between both cumulative and transient effects on various integrated bipolar technologies. The present results are used to provide some answers about potential changes of test methods. This work also evaluates the predictive capability of the previously developed model to reproduce accurately both the fast and the long lasting components of transients in circuitry and so to model transients' effects. This simulation methodology is extended to an operational amplifier from different manufacturers and for three different synergistic effects. The comparison between transients obtained experimentally during heavy ions, pulse laser and flash X experiments and the predicted transients validates the investigated methodology. The cumulative effects are taken into account by injecting the internal electrical parameters variations using irradiation exposure
Tarabbia, Marc. "Caractérisation physico-chimique, simulation et modélisation d'une technologie analogique avancée BICMOS". Lyon, INSA, 1993. http://www.theses.fr/1993ISAL0003.
Texto completoThe goal of this study is to understand the physico-chemical phenomenon induced by the manufacturing of bipolar analogue integrated circuits. This study helps us to introduce new structures on the process flow. The electrical characteristics of new cells supply more freedom to designers and simplify the layout of circuits. The process modelization (SUPREM and SUPRA) and device simulation (SEDAN and PISCES) were done by improving default parameters and checking links between each of them. New steps introduce with in to process flow to make MOS structures were monitored by simulation. It checks the conservative basic bipolar cells performances. SIMS profiles and electrical measurements verify the simulation results. The feasibility of the integration of NMOS and PMOS on the bipolar process flow is done. We have introduce an isolated vertical PNP to simplify integrated circuit design and to get full complementary bipolar structures. Some process options remain to be defined
Premont, Christophe. "Etude et conception d'un composant analogique programmable en technologie CMOS standard". Lyon, INSA, 1998. http://www.theses.fr/1998ISAL0028.
Texto completoThis thesis is concerned with the study and the design of a field-programmable analogue array with a CMOS standard process. This circuit is an analogue cells based array. Each cell is programmable and can achieve various analogue functions with specific performance. Beside, the interconnections between the cells have to be programmable. The array configuration is achieved using a digital or an analogue interface circuitry to implement a particular function. For a flexible programmability and high-electrical performance, a new approach based and a transresistor amplifier using current conveyors have been developed to control full-differential transconductances. This report falls into six chapters. The first one deals with the concept of field programmable analogue array. The second chapter presents a methodology for describing analogue circuits. The array architecture is studied according to the requirements for such a programmable circuit. The main feature of the third chapter is to introduce the current-mode approach with the current conveyor. The fourth chapter presents the programmable analogue cell designed during the project. The structure of the analogue array and the proposed solutions are thoroughly described in the fifth chapter. The last chapter presents some application examples and it focuses on future works
Dong, Yan Hua. "Etude et realisation d'un convertisseur analogique-numerique rapide en technologie cmos". Rennes 1, 1988. http://www.theses.fr/1988REN10077.
Texto completoAubert, Alain. "Contribution à la conception d'un circuit analogique programmable en technologie CMOS : conception et caractérisation d'une cellule de calcul analogique". Lyon, INSA, 2001. http://theses.insa-lyon.fr/publication/2001ISAL0074/these.pdf.
Texto completoThe development of an analogue application is long and often requires multiple iterations. However, electronics requires products with short time-to-market: short design and production cycle. In front of this challenge, the analogue designer is deprived of methodologies and tools contrary to the digital designer who benefits a broad range of programmable logic devices. This thesis exposes the contribution to the design of a programmable analogue circuit which integrates configurable cells for analogue computation targeting applications of sensor conditioning, carrying out operations of linearization. In most cases, the response curve of the sensor is not linear or the sensor conditioner introduces a non-linearity. This application is related to an industrial need with conditions of reduce cycle and development cost. After a state of the art in the field of analogue programmable devices both at the university level and the industrial level, the specifications of the required cell are exposed. The analogue computation cell must fulfill the functions of amplification, addition, substraction, multiplication, division and square root. This cell is completely differential at input and output. Thereafter, the cell of computation based on multipliers and inverting amplifiers, is described and characterised in simulation and experiment. The experimental characterisation highlights offsets, all related to problems of componant matching. This is why, a second cell was developed allowing to compensate for these offsets. Results show that the performances of the multiplier are improved in term of linearity and offset. Lastly, a network of eight computation cells was designed for the validation of the cell performances through the example of a resistive sensor linearization
Aubert, Alain Chante Jean-Pierre. "Contribution à la conception d'un circuit analogique programmable en technologie CMOS conception et caractérisation d'une cellule de calcul analogique /". Villeurbanne : Doc'INSA, 2005. http://docinsa.insa-lyon.fr/these/pont.php?id=aubert.
Texto completoLiu, Shaolong. "SAR ADCs Design and Calibration in Nano-scaled Technologies". Research Showcase @ CMU, 2017. http://repository.cmu.edu/dissertations/1073.
Texto completoVerrascina, Nicola. "Design of ULP circuits for Harvesting applications". Thesis, Bordeaux, 2019. http://www.theses.fr/2019BORD0115/document.
Texto completoIn the modern devices Ultra-low power consumption is thesurvival key for the energy-harvested sensor node. The reduction of thepower budget can be achieved by mixing different low–power techniquesat three levels of abstraction: transistor level, circuit level and systemlevel. This thesis deals with the analysis and the design of Ultra-LowPower (ULP) circuits suitable for Energy-Harvesting Wireless SensorNetworks (EHWSN). In particular, voltage regulator and RF transmissioncircuits are examined. The former is the main block in powermanagement unit; it interfaces the transducer circuit with the rest of thesensor node. The latter is the most energy hungry block and thusdecreasing its power consumption can drastically increases the sensoron-time
Larguech, Syhem. "Test indirect des circuits analogiques et RF : implémentation sûre et efficace". Thesis, Montpellier, 2015. http://www.theses.fr/2015MONTS185/document.
Texto completoBeing able to check whether an IC is functional or not after the manufacturing process is very difficult. Particularly for analog and Radio Frequency (RF) circuits, test equipment and procedures required have a major impact on the circuits cost. An interesting approach to reduce the impact of the test cost is to measure parameters requiring low cost test resources and correlate these measurements, called indirect measurements, with the targeted specifications. This is known as indirect test technique because there is no direct measurement for these specifications, which requires so expensive test equipment and an important testing time, but these specifications are estimated w.r.t "low-cost measurements". While this approach seems attractive, it is only viable if we are able to establish a sufficient accuracy for the performance estimation and if this estimation remains stable and independent from the circuits sets under test.The main goal of this thesis is to implement a robust and effective indirect test strategy for a given application and to improve test decisions based on data analysis.To be able to build this strategy, we have brought various contributions. Initially, we have defined new metric developed in this thesis to assess the reliability of the estimated performances. Secondly, we have analyzed and defined a strategy for the construction of an optimal model. This latter includes a data preprocessing followed by a comparative analysis of different methods of indirect measurement selection. Then, we have proposed a strategy for a confidant exploration of the indirect measurement space in order to build several best models that can be used later to solve trust and optimization issues. Comparative studies were performed on 2 experimental data sets by using both of the conventional and the developed metrics to evaluate the robustness of each solution in an objective way.Finally, we have developed a comprehensive strategy based on an efficient implementation of the redundancy techniques w.r.t to the build models. This strategy has greatly improved the robustness and the effectiveness of the decision plan based on the obtained measurements. This strategy is adaptable to any context in terms of compromise between the test cost, the confidence level and the expected precision
Tourneur, Gilles. "Conception d'un convertisseur numerique analogique en technologie mos pour le traitement de signaux video". Rennes 1, 1996. http://www.theses.fr/1996REN10058.
Texto completoPrenat, Guillaume. "Conception d'une architecture de BIST analogique et mixte programmable en technologie CMOS très submicronique". Grenoble INPG, 2005. http://www.theses.fr/2005INPG0135.
Texto completoThis phd thesis presents a BIST technique for harmonic testing of Analogue and Mixed-Signal (AMS) circuits. The interface of the BIST is fully digital. This approach is aimed at facilitating low-cost test techniques for System-on-Chip (SoC) devices, rendering the test of mixed-signal cores compatible with the use of a low-cost digital tester. Analogue test signal generation is performed on-chip by low pass filtering a Sigma Delta encoded bit-stream. Analogue harmonic test response analysis is also performed on-chip using square wave modulation and Sigma Delta modulation. Since both analog signal generation and circuit under test response analysis are digitally programmable on-chip, compatibility with a low-cost digital tester is ensured. Optimisation of test signatures is discussed in detail as a trade-off between test time and test quality
Johnson, Kathryn E. "From Analog to Digital Control: A Study of the Russian Experience with Communications Technologies". The Ohio State University, 2014. http://rave.ohiolink.edu/etdc/view?acc_num=osu1397610782.
Texto completoBernal, Olivier. "Conception de Convertisseurs Analogique-Numérique en technologie CMOS basse tension pour chaînes Vidéo CCD Spatiales". Phd thesis, Toulouse, INPT, 2006. http://oatao.univ-toulouse.fr/7495/1/bernal.pdf.
Texto completoAGON, FRANCOIS. "Etude d'une cellule universelle de conversion analogique-numerique par redistribution de charges en technologie cmos". Paris 6, 1995. http://www.theses.fr/1995PA066496.
Texto completoMorche, Dominique. "Conception de codeurs sigma-delta en technologie CMOS pour la conversion analogique-numérique haute résolution". Grenoble INPG, 1994. http://www.theses.fr/1994INPG0065.
Texto completoBernal, Olivier Lescure Marc. "Conception de convertisseurs analogique-numérique en technologie CMOS basse tension pour chaînes vidéo CCD spatiales". Toulouse : INP Toulouse, 2006. http://ethesis.inp-toulouse.fr/archive/00000349.
Texto completoAurangabadkar, Nilesh Kirti Kumar. "Simulations of analog circuit building blocks based on radiation and temperature-tolerant SIC JFET Technologies". Master's thesis, Mississippi State : Mississippi State University, 2003. http://library.msstate.edu/etd/show.asp?etd=etd-05162003-114102.
Texto completoPillet, Nicolas. "Conception et intégration de convertisseurs analogique/numérique, compacts, à bas bruit, adaptés aux capteurs CMOS destinés à la détection de particules chargées". Strasbourg, 2010. https://publication-theses.unistra.fr/public/theses_doctorat/2010/PILLET_Nicolas_2010.pdf.
Texto completoDevelopment of CMOS sensors has grown exponentially in the world of instrumentation in the past years because of their ability to integrate a sensitive element and the associated readout electronics on the same substrate at a low price. The CMOS-ILC team of IPHC has developed matrix of CMOS pixels for detectors used in particle physics for the last ten years. While using this kind of detectors for trajectometry, it could be interesting to raise the spatial resolution of the detectors. It could be fulfilled by implementing analog to digital converter (ADC) in the bottom of the column’s matrix. These ADCs must response to very strong constraint in term of dimension, conversion speed and power consumption. Three prototypes of ADCs with different architectures have been developed in order to respond to these specifications. The first one is a double numerical ramp ADC, the second one is a successive approximation ADC and the last one is an ADC with a progressive resolution. Three chips with these different architectures have been submitted and tested. The results have led to a comparison of the different technics in use in this particular field
Kerzerho, Vincent. ""Analogue Network of Converters": a DfT Technique to Test a Complete Set of ADCs and DACs Embedded in a Complex SiP or SoC". Phd thesis, Université Montpellier II - Sciences et Techniques du Languedoc, 2008. http://tel.archives-ouvertes.fr/tel-00364546.
Texto completoRuby, Cédric. "Etude d'un composant analogique programmable destiné aux applications d'interfaces pour capteurs". Lyon, INSA, 2002. http://www.theses.fr/2002ISAL0109.
Texto completoAnalog counterpart of an FPGA, an FPAA can firstly simplify the development flow of analog resources, in order to reduce the time-to-market of electronic applications, and can secondly be a cost effective integration solution compared to the expensive ASIC technology. The goal of this study is to develop an FPAA realizing non-linear calculus operations for the applications of sensors interface. Two versions of an analog cell using two analog multipliers were developed and tested during this thesis. The first one permitted to highlight the requirement to control internal offsets; a study of the matching in the structure was then leaded and an offset cancellation scheme was designed; finally, improvements of the performances were achieved with the second version of the cell. Nevertheless, an automatic offset cancellation must be integrated within the FP AA, and such a study could conclude about the possible industrialization of this integrated circuit
Gasnárek, Jiří. "Využití bezdrátových technologií k přenosu audio signálu". Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2012. http://www.nusl.cz/ntk/nusl-219853.
Texto completoMas, Alexandre. "Convertisseur analogique-numérique large bande avec correction mixte". Thesis, Université Paris-Saclay (ComUE), 2018. http://www.theses.fr/2018SACLC054/document.
Texto completoData transmission requirements are ever more stringent, with respect to more throughput, less power consumption and reduced cost. The cable TV market is where broadband transceivers must continuously innovate to meet these requirements. In these transceivers, the analog front-end part must be adapted to meet the increasingly tighter specifications of the newest standards. A key bottleneck is the Analogto- Digital Converter (ADC), which must reach a sampling rate of several Gigasamples per second at effective conversion resolutions in the range of 10 to 14 bits. Among the possible choices, converters based on Time-Interleaving (TI-ADC) are experiencing remarkable growth, and today they appear to be the best candidates to rmeet the two constraints set out above. However, TI-ADCs are hampered by mismatches between its different conversion channels, which result in degraded performance due to the appearance of mismatch spurs in the frequency domain, arising both from static errors (gain and offset mismatch) and dynamic (skew and bandwidth) errors. To reduce these errors, we have investigated a mixeddomain calibration strategy for TI-ADCS in 28nm FDSOI technology. We strongly focused the analog compensation of dynamic errors. This report begins with a review of the state-of-theart w.r.t. the mismatch reduction and analog compensation techniques for both dynamic errors. Based on these results, we then introduce a variety of analog techniques aimed at compensating the bandwidth and skew mismatches. In order to compensate for the skew, we make the most of the FD-SOI technology by tightly regulating the voltage of the back gate of one or several sampling transistors. For the bandwidth error, we recommend that the T/H equivalent resistor be adjusted, adapting the on-resistor of the sampling transistors using up to five different techniques. Once the most appropriate skew and bandwidth compensations were identified, we ultimately implemented a mixed calibration of static and dynamic errors along with a digital calculation based upon the "Least- Squares" method
Bertrand, Géraldine. "Conception et modélisation électrique de structures de protection contre les décharges électrostatiques en technologies BICMOS et CMOS analogique". Toulouse, INSA, 2001. http://www.theses.fr/2001ISAT0037.
Texto completoThe sensitivity of modern integrated circuits to ElectroStatic Discharges (ESD) increases with the technology shrink and the introduction of new process techniques. To move towards a "first pass success", ESD must be taken into account at an early stage of a project development which requires capability to predict efficiency of ESD protection strategies. The availability of an ESD protection library including both optimized layouts and electrical models is part of the solution. However, ESD protection structures operate in avalanche breakdown and high current regimes, which cannot be simulated with standard SPICE models. In this thesis, a methodology to extend classical models to these regimes is first developed for the vertical bipolar NPN transistor widely used in BiCMOS technologies. This methodology is then applied to the NMOS transistor in an analog CMOS process, with the modeling of its parasitic lateral NPN transistor. Physics-based compact models are provided thanks to 2D device simulation, TLP characterization and photoemission experiments (EMMI)
Sebeloue, Martine. "Modélisation comportementale paramétrée de fonctions analogiques pour la simulation des systèmes de transmission, en technologie bipolaire". Toulouse, INPT, 2000. http://www.theses.fr/2000INPT014H.
Texto completoBrauer, Jesper. "When will hybrid technologies dominate the heavy-duty vehicle market? : Forecasting Using Innovation Diffusion Models". Thesis, KTH, Industriell ekonomi och organisation (Inst.), 2011. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-72577.
Texto completoFARY, FEDERICO. "Integrated Circuits Design in Down-scaled Technologies for Wireless Applications". Doctoral thesis, Università degli Studi di Milano-Bicocca, 2021. http://hdl.handle.net/10281/301984.
Texto completoIn the last 30 years, Mobile Telecommunication (TLC) electronics proved to be one of the major driving motors in the development of new Complementary Metal-OxideSemiconductor (CMOS) technologies. This limited branch of the electronics world managed to move billions of dollars worldwide, some of which unavoidably ended up in financing advanced research projects to answer market demands. People all around the world ask for extremely performing portable devices, faster, more reliable, low power consuming and with impressive memory capability. To answer all these requests, physics and engineers developed new and incredibly down-scaled technology nodes, which met the high speed and low power consumption requirement, granting an impressive circuital density. Nowadays foundries such as TSMC or Samsung are able to manufacture incredibly small transistor devices, with channel length in the order of only 7 nm and transition frequency in the order of several hundreds of GHz. This situation has become extremely favorable for the development of high-performance digital devices, which are able to reach speed and memory capability previously unbelievable. Nonetheless, also analog building blocks must be integrated in deeply down-scaled node, in order to adapt with digital ICs. First task of this thesis work is to develop analog ICs in deep sub-micron technology nodes, such as 28 nm bulk-CMOS and 16 nm FinFET (Fin Field Effect Transistor). This has been accomplished facing several difficulties given by the very poor analog behavior of such advanced technologies, especially in terms of low transistor intrinsic gain and limited signal headroom, caused by the low supply voltage. The second task of this work is to develop these same analog ICs in order that they meet requirements of the most advanced TLC standards, such as LTE and 5G. The increased number of portable devices worldwide made in fact unavoidable the introduction of new communication standards, in order to face the huge number of connected devices. This work presents 4 building blocks that can be exploited in every next generation transceiver device. In detail, this work analyzes though extended simulations and measurements 3 Base-Band analog filters and 1 variable gain amplifier, suitable for 5G applications. These designs have been developed in 28nm CMOS and 16 nm FinFET. Each design shows the most important difficult that was faced for its realization and highlight the most important performances of every prototype device, with an extensive confrontation with the State-of-the Art. The first device is a 6th Order Rauch based analog filter, which exploit a large bandwidth amplifier to achieve low quality factor sensitivity and high linearity performances. The second is a 3rd order variable gain amplifier, with low noise and high linearity performances, suitable to be integrated in a Full-Duplex 5G transceiver Base-Band section. The third and fourth devices are Source-Follower-based 4th order filters with very low noise and low power performances. One exploit the Flipped-Source-Follower architecture, while the second integrates an innovative Fully-Differential Super-Source-Follower topology. This last design also exploits the advanced FinFET technology, which shows better intrinsic gain, in order to maintain high linearity performances, despite the Fully-Differential configuration.
Penhoat, Hervé. "Mutation(s) du paysage contemporain : entre analogique et numérique : hors-champs, instants, non-lieu". Thesis, Paris 1, 2017. http://www.theses.fr/2017PA01H314.
Texto completoWe can be in one place in the world and take pictures of places located at hundreds of kilometers away. The distance, that up to now, used to be limited to our eyes’ perception, has no more limits, thanks to new technologies. This thesis analyzes the position of the artist in the treatment of landscape in view of the choices offered between analogue and digital.This would be the multiplicity of the technological possibilities, that through the hands of the artist, allows to mutate the contemporary landscape. According to our hypothesis, the Mutation(s) of contemporary landscape, would not be based exclusively on a temporal continuity, following the technological evolution, that progressively forgets the analogue in favor of the digital. There would be this In Between that would be at the center of our questioning. The thesis develops itself in 3 parts, like a sort a tryptique: off-track - instants - out of place, based on our practice as artist. Departing from our Brittany origins, we will immerse into the Celtic legends (the “Anaon”, the “intersigne”, etc.) and cultures that will take us to Asia (the “evaporated” in Japan, etc.), shifting between the technologies, between the visible and the invisible, between the real and the virtual.In the end, the mutation (in plural) is one and many at the same time. This complex representation (in the sense of Edgar Morin) reminds that of Yi-Jin, of which his definition suggests the relationship between signs. It is not without the proximity of the Oghamic writing, that is an ancient Celtic alphabet. Our position is that the Ogham, in connection with the Yi-Jin, would be part of a new definition of the contemporary landscape
Dahoumane, Mokrane. "Conception, réalisation et caractérisation de l’électronique intégrée de lecture et de codage des signaux des détecteurs de particules chargées à pixels actifs en technologie CMOS". Strasbourg, 2009. http://www.theses.fr/2009STRA6236.
Texto completoThe future big experiments for exploring the fundamental laws of the Nature (e. G. International Linear Collider, ILC) require Vertex Detectors of high spatial resolution and granularity, very thin and radio-tolerant, which are out of reach of the current detection technologies. This observation is at the origin of the development of a novel technology, CMOS Active Pixel Sensors. The spatial resolution of the sensor is a major performance. It results from the sharing of the charges created by a charged particle when it crosses -and ionizes- the sensitive volume. The encoding of the charge collected by each pixel bases on an ADC (Analog-to-Digital Converter), which must be integrated on the substrate sheltering the sensitive volume of the sensor. This ADC must be precise, compact, fast and dissipating low power. The objective through this thesis was to design an ADC fulfilling these conflicting requirements. First, several architectures of a sample-hold-amplifier were studied for conditioning the low signal coming from the pixel. An original architecture of this stage was designed. The pipelined architecture was chosen to develop the ADC. The basic configuration 1. 5 bit/stage was implemented to test the validity of the concept, because it allows minimizing the constraints of each single stage. We optimized the ADC pipelined architecture by introducing the double sampling concept on a configuration of 2. 5 bits/stage, this allowed to minimize the dimensions and the power. The double sampling combined with the 1. 5 bit inter-stage resolution constituted a second improvement of the ADC architecture. A new architecture of the ADC adapted to the pixel command sequence was proposed
Deza, Julien. "Etude, Conception et Caractérisation de circuits pour la Conversion Analogique Numérique à très hautes performances en technologie TBH InP 0.7µm". Thesis, Cergy-Pontoise, 2013. http://www.theses.fr/2013CERG0680/document.
Texto completoThis thesis concerns the design of high speed circuits in Indium phosphide heterojunction Bipolar technology for High performance analog to digital conversion (ADC).The study focuses on the Track and Hold block (THA) which is the main function of the ADC. The study was conducted by simulating all blocks of the THA circuit. In particular, an extensive study of the THA main block was performed for various electrical parameters to achieve optimal conditions in order to obtain a good tradeoff between resolution bandwidth and linearity. THA architectures circuits with or without Voltage Gain Amplifier stage were designed, optimized and characterized. High THA performances were achieved: THA circuit with a bandwidth greater than 50 GHz at 70 Gs/s were achieved for optical communications and circuits of bandwidth more than16 GHz at (2-8 GS /s) have been realized for down conversion operation
Petit, Hervé. "Simulation comportementale pour la synthèse de convertisseurs analogique-numérique CMOS rapides". Phd thesis, Télécom ParisTech, 2004. http://pastel.archives-ouvertes.fr/pastel-00000868.
Texto completoArora, Rajan. "Trade-offs between performance and reliability of sub 100-nm RF-CMOS technologies". Diss., Georgia Institute of Technology, 2012. http://hdl.handle.net/1853/50140.
Texto completoMasmoudi, Mohamed. "Contribution à l'étude et l'optimisation de structures de conversion spécifiques à la technologie CMOS". Montpellier 2, 1989. http://www.theses.fr/1989MON20042.
Texto completoCohen, Véronique-Déborah. "La spécificité des contrats liés aux technologies issues du numérique. Quelles singularités ces contrats présentent-ils, comparés à ceux du monde analogique ?" Thesis, Paris 2, 2011. http://www.theses.fr/2011PA020083/document.
Texto completoOver the last decades, the fast-evolving technologies and the information and communication technologies (I.C.T) have been widespread in the current analogical world. They are engendered agreements which need a particular approach and which can’t be ignored today, because of their difficulties of application, interpretation, and even of qualification. The analogical world failed to offer a legal framework to that innovative and dynamic digital world creating tremendous legal uncertainty. Consequently, the emerging lack of appropriate agreements forced policymakers, regulators and legislators to elaborate new governance, new regulation and new acts to respond to those needs and expectations issued of the Information Society. The purpose is also to answer to the real needs of the lawyers and the professors of Law. These agreements are very different of the agreements of the analogical world in numerous points, but are inscribed in a logical and natural evolution of the Right of contracts. That’s why, it’s necessary to know what is their place in the legal life, and above all, how they are perceived and analyzed regarding the more "classical" contracts of the analogical world. Furthermore, other questions may be asked : in which kind of environment they evolve? What is characterizing the contracts linked to the information and communication technologies? What makes them so specific and so particular compared with the other agreements? The dematerialization of technology centered object can influence their way of formation, their execution and the balance of the agreements? What are their legal implications? If these agreements make reference to an specific and technical terminology of I.C.T., to the digital world, and if their object may be complex, in reality, the services generated by the Information Society are surrounding us in our daily life and are not different of the services we know since ever
Larsen, Frode. "Bipolar device characterization and design in CMOS technologies for the design of high-performance low-cost BiCMOS analog integrated circuits /". The Ohio State University, 1994. http://rave.ohiolink.edu/etdc/view?acc_num=osu1487857546387163.
Texto completoMoutaye, Emmanuel. "Intégration de mélangeurs optoélectroniques en technologie CMOS pour la télémétrie laser embarquée haute résolution". Thesis, Toulouse, INPT, 2010. http://www.theses.fr/2010INPT0134/document.
Texto completoDistance measurement and object detection has become essential in many fields such as automotive and robotics, medical applications, industrial processes and farming systems, surveillance and security, etc.. In order to improve the performance of laser ranging devices in terms of noise and crosstalk, an optoelectronic heterodyne technique of mixing should be used. Moreover, the aspect of embedded system requires a reduction in the size and power consumption for the same performance. The integration of optoelectronic mixers in CMOS technology will provide an optimal solution to this approach through its many advantages (integrated instrumentation circuit on the same chip, well-known models, reasonable cost, high performance, ...). Thus this thesis will focus on the study of optoelectronic mixers in CMOS technology for high resolution, embedded laser range finding systems. The first chapter of this thesis discusses the various technique of distance measurement by laser ranging and justifies the choice of phase shift technique and the gain in performance related to heterodyning. The second chapter describes the electrical and optoelectronic mixers and the properties needed to develop them. Some photodetectors are presented given the opportunity to use optoelectronic mixers and a potential integration with CMOS technology. The main constraints to the integration of CMOS photosensors used in optoelectronic mixers are set out in Part III. The work of design and optimization of structures and phases of simulations and testing are detailed. Finally, to experimentally confirm the earlier studies, the final chapter presents the design of a measuring head for a multichannel photoreceptor CMOS for a high resolution laser range finder