Bibliografías temáticas / Adaptive Voltage Over-Scaling

Literatura académica sobre el tema "Adaptive Voltage Over-Scaling"

Autor: Grafiati
Publicado: 14 de marzo de 2023

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Artículos de revistas sobre el tema "Adaptive Voltage Over-Scaling"

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Rizzo, Roberto G., Andrea Calimera y Jun Zhou. "Approximate Error Detection-Correction for efficient Adaptive Voltage Over-Scaling". Integration 63 (septiembre de 2018): 220–31. http://dx.doi.org/10.1016/j.vlsi.2018.04.008.

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Rizzo, Roberto Giorgio y Andrea Calimera. "Implementing Adaptive Voltage Over-Scaling: Algorithmic Noise Tolerance vs. Approximate Error Detection". Journal of Low Power Electronics and Applications 9, n.º 2 (21 de abril de 2019): 17. http://dx.doi.org/10.3390/jlpea9020017.

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Adaptive Voltage Over-Scaling can be applied at run-time to reach the best tradeoff between quality of results and energy consumption. This strategy encompasses the concept of timing speculation through some level of approximation. How and on which part of the circuit to implement such approximation is an open issue. This work introduces a quantitative comparison between two complementary strategies: Algorithmic Noise Tolerance and Approximate Error Detection. The first implements a timing speculation by means approximate computing, while the latter exploits a more sophisticated approach that is based on the approximation of the error detection mechanism. The aim of this study was to provide both a qualitative and quantitative analysis on two real-life digital circuits mapped onto a state-of-the-art 28-nm CMOS technology.
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YEH, CHANG-CHING, KUEI-CHUNG CHANG, TIEN-FU CHEN y CHINGWEI YEH. "ADAPTIVE PIPELINE VOLTAGE SCALING IN HIGH PERFORMANCE MICROPROCESSOR". Journal of Circuits, Systems and Computers 19, n.º 08 (diciembre de 2010): 1817–34. http://dx.doi.org/10.1142/s0218126610007146.

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Deep pipeline has traditionally been widely used in high performance microprocessor. To allow continuous program execution, branch prediction provides a necessary method of speculatively executing instructions without compromising performance. However, branch misprediction penalty significantly impacts the performance of the deep pipeline processor. This study presents a new Adaptive Pipeline Voltage Scaling (APVS) technique to reduce branch misprediction penalty. For a likely mispredicted branch entering the processor, APVS begins increasing voltage and merging deep pipeline whereby shorter pipeline length permits less branch misprediction penalty. Once the branch is resolved, the merged stages are split and the supply voltage is reduced again. With dedicated shorter pipeline length within each branch misprediction, APVS achieves great performance improvement. The evaluation of APVS in a 13-stage superscalar processor with benchmarks from SPEC2000 applications shows a performance improvement (between 3–12%, average 8%) over baseline processor that does not exploit APVS.
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KIROLOS, SAMI y YEHIA MASSOUD. "DYNAMIC VOLTAGE SCALING CONTINUOUS ADAPTIVE-SIZE CELL DESIGN TECHNIQUE". Journal of Circuits, Systems and Computers 17, n.º 05 (octubre de 2008): 871–83. http://dx.doi.org/10.1142/s0218126608004630.

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In this paper, we present an adaptive circuit design that is capable of increasing the effective size-ratio of combinational logic gates to extend the balanced operation in the subthreshold region as well as to maintain high performance at the nominal VDD. We optimize the sizes of the PMOS transistors in the pull-up network for minimum power dissipation and propagation delay over a wide range of supply voltage. In addition to the minimized energy operation, the dynamically adjustable gate size-ratio allows the gate to preserve a symmetric voltage transfer characteristic at both normal supply and subthreshold operation, which translates to maximized noise margins. Simulation results show that up to 70.9% reduction in the energy can be achieved for a ring oscillator, as compared to the fixed size design capable of operating under supply voltage in the range of 75 mV to 1.2 V. For designs working under dynamic voltage scaling schemes, our technique presents a very effective and efficient solution for balanced minimum energy operation in the subthreshold region while preserving high performance at the nominal supply voltage.
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Rizzo, Roberto G., Andrea Calimera y Jun Zhou. "Corrigendum to“Approximate error detection-correction for efficient adaptive voltage Over-Scaling”[Integration 63 (2018) 220–231]". Integration 70 (enero de 2020): 159. http://dx.doi.org/10.1016/j.vlsi.2019.11.011.

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Tesis sobre el tema "Adaptive Voltage Over-Scaling"

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RIZZO, ROBERTO GIORGIO. "Energy-Accuracy Scaling in Digital ICs: Static and Adaptive Design Methods and Tools". Doctoral thesis, Politecnico di Torino, 2019. http://hdl.handle.net/11583/2743228.

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Actas de conferencias sobre el tema "Adaptive Voltage Over-Scaling"

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Krause, P. K. y I. Polian. "Adaptive voltage over-scaling for resilient applications". En 2011 Design, Automation & Test in Europe. IEEE, 2011. http://dx.doi.org/10.1109/date.2011.5763153.

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Rizzo, Roberto Giorgio y Andrea Calimera. "Tunable Error Detection-Correction for Efficient Adaptive Voltage Over-Scaling". En 2017 New Generation of CAS (NGCAS). IEEE, 2017. http://dx.doi.org/10.1109/ngcas.2017.75.

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Groo, LoriAnne, Howard Chung, Ayoub Yari Boroujeni, Anahita Emami, Marwan Al-Haik y Michael Philen. "Characterization of ZnO Piezoelectric Nanowires in Energy Harvesting for Fiber-Reinforced Composites". En ASME 2015 Conference on Smart Materials, Adaptive Structures and Intelligent Systems. American Society of Mechanical Engineers, 2015. http://dx.doi.org/10.1115/smasis2015-9008.

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Structural health monitoring can enhance reliability, increase safety, and decrease maintenance costs by detecting damage at an early stage. By taking advantage of the electromechanical coupling, piezoelectric materials have the potential to harvest energy from ambient vibration sources to provide low-power electricity for self-powered electronic devices. In comparison with other piezoelectric transducers, zinc oxide (ZnO) nanowires carry the added advantages of structural flexibility, lower cost, compactness, and lighter weight. In this study, the energy harvesting capabilities of nanoscale ZnO piezoelectric nanowires (NW) grown on the surface of glass fiber fabrics are investigated experimentally. A series of cantilevered carbon fiber beams containing a controlled amount of ZnO nanowires is evaluated. The absolute electrical energy dissipation is quantified by measuring the output power over a broad spectrum of known vibratory loads and frequencies. The maximum amount of power extracted is obtained by employing resistive impedance matching. Here, a maximum peak of ∼6.7 mV was generated when the beam containing ZnO nanowires was excited at 2.90g and connected to a 10 MΩ load. At that excitation level, a maximum of 20.0 pW was generated when an optimal resistor of 1 MΩ is connected. A tip mass of ∼0.6 gram added to the sample with ZnO NWs increased the peak-voltage by 2.21 mV and increased the peak-power by 13.3 pW. A series of DC voltage applied to the ZnO sample suggests the equivalence of poling treatment, where the dipole alignment of the ZnO NWs are disrupted. Here, a maximum peak-power of 45 pW is reported, showing promising potential of scaling-up to harvest ambient energy for low-powered electronics.
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