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1
Gutnik, Vadim. "Variable supply voltage for low power DSP." Thesis, Massachusetts Institute of Technology, 1996. http://hdl.handle.net/1721.1/36088.
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Kadada, Holiday C. "Designing low voltage feeders to meet quality of supply specifications for voltage variations." Master's thesis, University of Cape Town, 2012. http://hdl.handle.net/11427/14558.
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Includes bibliographical references.The provision of electricity has become a global necessity. In the developing world, residential electrification has become a tool for poverty alleviation. Unfortunately connecting residential customers to the grid, particularly in the low income communities, is more of a social task as the expected returns from the investment are unlikely to cover the costs to electrify and supply the communities. In such cases it is necessary to not over- or under-design a low voltage (LV) distribution network as this leads to unnecessary capital expenditure. The main source of uncertainty in designing LV residential distribution networks has been found to be the mode used to model the residential load. Residential electricity demand is a stochastic parameter dependant on the behaviour and occupancy patterns of household occupants. Traditionally the After Diversity Maximum Demand (ADMD), which is in essence and average value of load per household, was used to model load. However, using a singular value to describe the complex random nature of load is misleading. Probabilistic methods have been adopted to model residential load behaviour as these methods are better suited to representing the stochastic nature of the load. The Beta probability function was found to be the best representative function of residential load as its characteristics were reflective of the attributes of residential load. Studies on pre-existing LV networks in South Africa have found that these networks are operating outside of Quality of Suppy (QoS) regulation. The current QoS guideline of South Africa NRS 048-2 stipulates that 5% of measured supply voltage levels measured during a certain period are allowed to be outside the QoS compliance limits. This means that 95% QoS compliance of supply voltage levels is required for all LV networks. This QoS condition has not currently been worked into the design parameters. If a network is operating out of QoS guidelines a network upgrade is necessary. This research showed that the main source of the QoS violations of these networks was due to the risk levels used to calculate the expected voltage drops during the design stage of the networks. Typically, 10% risk is used for voltage drop calculations. This means that a best case of 90% compliance is expected which is outside the 95% compliance limit required by NRS 048- This study focused on two objectives. The first was to derive design parameters that are representative of residential load and can be used to design LV networks that comply with QoS specifications. The second was to define a means or develop a model for LV network designers to distinguish the parameters appropriate for a design, based on the customer class to be electrified. In this investigation new design parameters were derived that incorporate the 95% compliance limit of NRS 048-2 allowing LV networks built based on the new parameters, to operate within QoS limits. The parameters were derived using residential load data collected in South Africa since the early 1990's. An equation was also derived which allows countries with only ADMD data available to calculate QoS design parameters suitable for their situation.
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Danko, Donald. "Configurable Frequency and Voltage Three Phase Power Supply." Wright State University / OhioLINK, 2019. http://rave.ohiolink.edu/etdc/view?acc_num=wright1559166225004371.
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Petrie, Alexander Craig. "Ultra-Low-Supply-Voltage Analog-to-Digital Converters." BYU ScholarsArchive, 2019. https://scholarsarchive.byu.edu/etd/9122.
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This thesis presents techniques to implement analog-to-digital converters (ADCs) under an ultra-low-supply-voltage of 0.2 V to reduce the power consumption. The thesis proposes a dynamic bulk biasing circuit to adjust the PMOS bulk voltage to balance the NMOS and PMOS drain currents to guarantee functionality in the presence of process, voltage, and temperature variations. The dynamic bulk bias circuit is analyzed rigorously to show its functionality. This thesis also describes a new comparator suitable for a 0.2-V supply using ac-coupling, stacked input pairs, and voltage-boosted load capacitor. A 10-bit 5-kS/s successive-approximation-register (SAR) ADC in a 180-nm CMOS process with a supply voltage of 0.2 V demonstrates these ideas. The ADC exhibits a differential nonlinearity (DNL) and integral nonlinearity (INL) within +0.42/-0.45 and +0.62/-0.67 LSB, respectively. The measured SFDR and SNDR at 5 kS/s with a Nyquist-frequency input are 65.9 dB and 52.1 dB, respectively. The entire ADC and dynamic bulk biasing circuitry consume 22 nW including leakage power to yield a figure-of-meirt (FoM) of 8.8 fJ/conv.-step. Measurements of multiple chips show the proposed dynamic bulk biasing fully recovers the ADC performance when the supply voltage is varied. The nW power consumption makes the design well suited for wireless sensor node and energy harvester applications.
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Beikoff, Geoffrey Noel. "A high power, high voltage switching power supply." Thesis, Queensland University of Technology, 1992. https://eprints.qut.edu.au/36226/1/36226_Beikoff_1992.pdf.
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A switching power supply to drive magnetrons for microwave heating has
been designed, prototyped and tested. The magnetron has an rf power
output of 6000 watts and requires a DC voltage of 7200 volts at a current
of approximately 1.1 amps for a power input to the magnetron of 8000
watts. Six magnetrons are to be connected per railway tanker for heating
the tankers at a railway terminus.
The power supply has been designed for small size, efficiency and
reliability. Current technology has been used. Insulated Gate Bipolar
Transistors (IGBT) and power MOSFETs, both of moderately high current
and voltage ratings, have been used at 25 kHz and 50 kHz switching
frequencies respectively. MOSFETs of 20 amps and 500 volts and IGBT's
of 40 amps and 600 volts ratings have been used. Ferrites for use at high
switching frequencies have been used for transformers and iron powder
material has been used for energy storage inductors. High quality
insulating materials have been used to achieve the high voltage insulation
requirements. Kapton, PTFE, mylar and nylon have been used where
appropriate.
Special features of the power supply include the power factor correction
first stage, the use of the higher than normal leakage inductance of the
power converter second stage transformer to make a resonant converter
and the ripple cancelling effect of the series connection of the units on
each phase. The power factor correction meets I EC 555 and AS2279
standards for harmonic content on the power supply source. The resonant
converter yields zero load current switching of the converter transistors.
The output 100 Hz ripple on the 7200 volt supply is negligible because of
the series connection of the three outputs.
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Omar, Saodah. "Security of supply improvement in high voltage distribution systems." Thesis, Cardiff University, 2018. http://orca.cf.ac.uk/112672/.
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In this thesis, algorithms are proposed to improve electricity distribution network supply restoration. The practical implementation of such algorithms relies on the presence of fully automated switches located at a certain number of network substations. The algorithm has the capability to restore a maximum number of customers if an outage occurs on any section of the test network. Since a very high cost is usually involved in the implementation of the fully automated system, a second algorithm was introduced with the aim of reducing the number and location of required switches. Discrete Particle Swarm Optimisation (DPSO) was employed to identify optimal placement of a limited number of remotely operable protective devices as well as the optimal sequence of reconfiguration and restoration of the supply. The reliability of the network was determined by calculating the number of possible post-outage restored customers, considering both upstream and downstream restorations. In the selection of optimal switching sequences, network voltage and current constraints were also considered to ensure that the identified restoration was viable. Further, the proposed algorithm considered the failure rate on each section of the network in arriving at the proposed optimal locations of switches. The developed DPSO-based algorithm and Brute Force is described and applied to real 11kV urban, semi-urban and rural distribution networks each with a different number of feeders and substations. These proposed algorithms have the capability to search for an unlimited number and locations of switches pairs or clusters for all networks (urban, semi-urban and rural) with optimal locations and number of Remotely Operable Switch Pairs (ROS). It was demonstrated that less than half of fully automated switches are needed to restore more than 95% of customers for each case study network. A significant reduction in investment cost of protective devices could be achieved by applying the proposed algorithm and at the same time improving and optimising the reliability of 11kV distribution networks.
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Chakravarty, Anu. "A Novel Architecture for Supply-Regulated Voltage-Controlled Oscillators." The Ohio State University, 2010. http://rave.ohiolink.edu/etdc/view?acc_num=osu1261601038.
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Hanington, Gary Joseph. "Dynamic supply voltage RF power amplifiers for wireless applications /." Diss., Connect to a 24 p. preview or request complete full text in PDF format. Access restricted to UC campuses, 1999. http://wwwlib.umi.com/cr/ucsd/fullcit?p9945782.
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Zabihi, Sasan. "Flexible high voltage pulsed power supply for plasma applications." Thesis, Queensland University of Technology, 2011. https://eprints.qut.edu.au/48137/1/Sasan_Zabihi_Sheykhrajeh_Thesis.pdf.
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Demands for delivering high instantaneous power in a compressed form (pulse shape) have widely increased during recent decades. The flexible shapes with variable pulse specifications offered by pulsed power have made it a practical and effective supply method for an extensive range of applications. In particular, the release of basic subatomic particles (i.e. electron, proton and neutron) in an atom (ionization process) and the synthesizing of molecules to form ions or other molecules are among those reactions that necessitate large amount of instantaneous power. In addition to the decomposition process, there have recently been requests for pulsed power in other areas such as in the combination of molecules (i.e. fusion, material joining), gessoes radiations (i.e. electron beams, laser, and radar), explosions (i.e. concrete recycling), wastewater, exhausted gas, and material surface treatments. These pulses are widely employed in the silent discharge process in all types of materials (including gas, fluid and solid); in some cases, to form the plasma and consequently accelerate the associated process.
Due to this fast growing demand for pulsed power in industrial and environmental applications, the exigency of having more efficient and flexible pulse modulators is now receiving greater consideration. Sensitive applications, such as plasma fusion and laser guns also require more precisely produced repetitive pulses with a higher quality. Many research studies are being conducted in different areas that need a flexible pulse modulator to vary pulse features to investigate the influence of these variations on the application. In addition, there is the need to prevent the waste of a considerable amount of energy caused by the arc phenomena that frequently occur after the plasma process. The control over power flow during the supply process is a critical skill that enables the pulse supply to halt the supply process at any stage.
Different pulse modulators which utilise different accumulation techniques including Marx Generators (MG), Magnetic Pulse Compressors (MPC), Pulse Forming Networks (PFN) and Multistage Blumlein Lines (MBL) are currently employed to supply a wide range of applications. Gas/Magnetic switching technologies (such as spark gap and hydrogen thyratron) have conventionally been used as switching devices in pulse modulator structures because of their high voltage ratings and considerably low rising times. However, they also suffer from serious drawbacks such as, their low efficiency, reliability and repetition rate, and also their short life span. Being bulky, heavy and expensive are the other disadvantages associated with these devices. Recently developed solid-state switching technology is an appropriate substitution for these switching devices due to the benefits they bring to the pulse supplies. Besides being compact, efficient, reasonable and reliable, and having a long life span, their high frequency switching skill allows repetitive operation of pulsed power supply. The main concerns in using solid-state transistors are the voltage rating and the rising time of available switches that, in some cases, cannot satisfy the application’s requirements. However, there are several power electronics configurations and techniques that make solid-state utilisation feasible for high voltage pulse generation. Therefore, the design and development of novel methods and topologies with higher efficiency and flexibility for pulsed power generators have been considered as the main scope of this research work. This aim is pursued through several innovative proposals that can be classified under the following two principal objectives.
• To innovate and develop novel solid-state based topologies for pulsed power generation
• To improve available technologies that have the potential to accommodate solid-state technology by revising, reconfiguring and adjusting their structure and control algorithms.
The quest to distinguish novel topologies for a proper pulsed power production was begun with a deep and through review of conventional pulse generators and useful power electronics topologies. As a result of this study, it appears that efficiency and flexibility are the most significant demands of plasma applications that have not been met by state-of-the-art methods. Many solid-state based configurations were considered and simulated in order to evaluate their potential to be utilised in the pulsed power area. Parts of this literature review are documented in Chapter 1 of this thesis.
Current source topologies demonstrate valuable advantages in supplying the loads with capacitive characteristics such as plasma applications. To investigate the influence of switching transients associated with solid-state devices on rise time of pulses, simulation based studies have been undertaken. A variable current source is considered to pump different current levels to a capacitive load, and it was evident that dissimilar dv/dts are produced at the output. Thereby, transient effects on pulse rising time are denied regarding the evidence acquired from this examination. A detailed report of this study is given in Chapter 6 of this thesis.
This study inspired the design of a solid-state based topology that take advantage of both current and voltage sources. A series of switch-resistor-capacitor units at the output splits the produced voltage to lower levels, so it can be shared by the switches. A smart but complicated switching strategy is also designed to discharge the residual energy after each supply cycle. To prevent reverse power flow and to reduce the complexity of the control algorithm in this system, the resistors in common paths of units are substituted with diode rectifiers (switch-diode-capacitor). This modification not only gives the feasibility of stopping the load supply process to the supplier at any stage (and consequently saving energy), but also enables the converter to operate in a two-stroke mode with asymmetrical capacitors. The components’ determination and exchanging energy calculations are accomplished with respect to application specifications and demands. Both topologies were simply modelled and simulation studies have been carried out with the simplified models. Experimental assessments were also executed on implemented hardware and the approaches verified the initial analysis. Reports on details of both converters are thoroughly discussed in Chapters 2 and 3 of the thesis.
Conventional MGs have been recently modified to use solid-state transistors (i.e. Insulated gate bipolar transistors) instead of magnetic/gas switching devices. Resistive insulators previously used in their structures are substituted by diode rectifiers to adjust MGs for a proper voltage sharing. However, despite utilizing solid-state technology in MGs configurations, further design and control amendments can still be made to achieve an improved performance with fewer components. Considering a number of charging techniques, resonant phenomenon is adopted in a proposal to charge the capacitors. In addition to charging the capacitors at twice the input voltage, triggering switches at the moment at which the conducted current through switches is zero significantly reduces the switching losses. Another configuration is also introduced in this research for Marx topology based on commutation circuits that use a current source to charge the capacitors. According to this design, diode-capacitor units, each including two Marx stages, are connected in cascade through solid-state devices and aggregate the voltages across the capacitors to produce a high voltage pulse. The polarity of voltage across one capacitor in each unit is reversed in an intermediate mode by connecting the commutation circuit to the capacitor. The insulation of input side from load side is provided in this topology by disconnecting the load from the current source during the supply process. Furthermore, the number of required fast switching devices in both designs is reduced to half of the number used in a conventional MG; they are replaced with slower switches (such as Thyristors) that need simpler driving modules. In addition, the contributing switches in discharging paths are decreased to half; this decrease leads to a reduction in conduction losses. Associated models are simulated, and hardware tests are performed to verify the validity of proposed topologies. Chapters 4, 5 and 7 of the thesis present all relevant analysis and approaches according to these topologies.
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Hassan, Amal M. "Power Supply Solutions for Modern FPGAs." The Ohio State University, 2012. http://rave.ohiolink.edu/etdc/view?acc_num=osu1338433937.
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Xie, Chunchao. "Determinism of power supply harmonic impedance by direct methods." Thesis, Staffordshire University, 2003. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.272819.
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Llanos, Roger Vicente Caputo. "Voltage scaling interfaces for multi-voltage digital systems." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2015. http://hdl.handle.net/10183/159617.
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Os Sistemas Digitais de Múltiplas Tensões exploram o conceito de dimensionamento da tensão de alimentação através da aplicação de diferentes fontes para regiões específicas do chip. Cada uma destas regiões pertence a um domínio de energia e pode ter duas ou mais configurações de voltagens. Independentemente dos distintos níveis de energia em diferentes domínios de tensão, os blocos devem processar sinais com níveis lógicos coerentes. Nestes sistemas, os Conversores de Nível (LS do inglês Level Shifters) são componentes essenciais que atuam como interfaces de escalonamento da tensão entre domínios de energia, garantindo a correta transmissão dos sinais. Com a apropriada interface de escalonamento de tensão e sua correta implementação, pode-se evitar o consumo excessivo de potência dinâmica e estática. Portanto, a concepção e implementação de conversores de nível deve ser um processo consciente que garanta o menor sobrecusto no tamanho, consumo de energia, e tempo de atraso. Neste trabalho estudam-se as principais características das interfaces de escalonamento de tensão e se introduce um conversor de tensão com eficiência energética e área reduzida, adequado para a conversão de baixo a alto nível. Apresentam-se os conversores de nível com o melhor desempenho encontrados na literatura, os quais são categorizados em dois principais grupos: Dois trilhos (Dual-rail) e Único trilho (Single-rail), de acordo ao número de linhas de alimentação necessárias. O circuito proposto foi comparado com a topologia tradicional de cada grupo, o Differential Cascode Voltage Switch (DCVS) e o conversor de Puri respectivamente. Simulações na tecnologia CMOS 130nm da IBMTM mostram que a topologia proposta requer até 93,79% menos energia em determinadas condições. Esta apresentou 88,03% menor atraso e uma redução de 39,6% no Produto Potência-Atraso (PDP), quando comparada com a topologia DCVS. Em contraste com o conversor Puri, obteve-se uma redução de 32,08% no consumo de energia, 13,26% diminuição no atraso e 15,37% inferior PDP. Além disso, o conversor de nível proposto foi o único capaz de trabalhar a 35% da tensão nominal de alimentação.Multiple Voltage Digital Systems exploit the concept of voltage scaling by applying different supplies to particular regions of the chip. Each of those regions belongs to a power domain and may have two or more supply voltage configurations. Regardless of distinct energy levels on different power domains, the blocks shall process signals with coherent logic levels. In these systems, the Level Shifters (LS) are essential components that act as voltage scaling interfaces between power domains, guaranteeing the correct signal transmission. With the appropriate voltage scaling interface and its proper implementation, we can avoid excessive static and dynamic power consumption. Therefore, the design and implementation of level shifters should be a conscientious process and must guarantee the lowest overhead in size, energy consumption, and delay time. In this work, we study the main characteristics of voltage scaling interfaces and introduce an energy-efficient level shifter with reduced area, and suitable for low-to-high level conversion. We present the level shifters with the best performance that we found in the literature and categorize them into two main groups: Dual-rail and Single-rail, according to the number of power rails required. The proposed circuit was compared to the traditional topology of each group, Differential Cascode Voltage Switch (DCVS) and Puri’s level shifter respectively. Simulations on an IBMTM 130nm CMOS technology show that the proposed topology requires up to 93.79% less energy under certain conditions. It presented 88.03% smaller delay and 39.6% less Power-Delay Product (PDP) when compared to the DCVS topology. In contrast with the Puri’s level shifter, we obtained a reduction of 32.08% in power consumption, 13.26% smaller delay and 15.37% lower PDP. Besides, our level shifter was the only one capable of working at 35% of the nominal supply voltage.
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Abidin, Haji Izham Haji Zainal. "The application of fuzzy decision tree for voltage collapse analysis." Thesis, University of Strathclyde, 2002. http://oleg.lib.strath.ac.uk:80/R/?func=dbin-jump-full&object_id=20372.
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In the time of rapid growth, there is an increase of demand for a reliable and stable power supply. Due to this, utility companies are forced to operate their power system nearer to its maximum capabilities since system expansion may be a costly option. As a result, the power system will be at risk to voltage collapse. Voltage collapse phenomenon is known to be complex and localised in nature but with a widespread effect. The ultimate effect of voltage collapse would be total system collapse which would incur high losses to utility companies. This thesis discusses the voltage collapse phenomenon, its causes, effects and its analytical tools. Looking into its analytical tools, it is observed that it relies upon system equations and models. Published results from these techniques are accurate but may require long computation time for a big and complex system. As a possible solution, this thesis looks into combining machine learning techniques with fuzzy logic in creating a fuzzy decision tree (FDT) tool for voltage collapse analysis. The algorithm utilises static power flow solution as data sets in partitioning the power system into strong and weak areas. From several test results and algorithm development, this research concludes with a possible voltage collapse analytical tool using a hybrid FDT approach based upon multiple attribute partitioning. This thesis concludes with discussions on test results highlighting the FDT performance and ends with a discussion on possible future development on the FDT in creating a more complete tool for voltage collapse analysis.
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Tyler, Nathan S. "Design, analysis and construction of a high voltage capacitor charging supply." Thesis, Monterey, Calif. : Naval Postgraduate School, 2008. http://handle.dtic.mil/100.2/ADA483580.
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Thesis (M.S. in Electrical Engineering)--Naval Postgraduate School, June 2008.Thesis Advisor(s): Julian, Alexander L. ; Maier, William B. "June 2008." Description based on title screen as viewed on August 29, 2008. Includes bibliographical references (p. 69). Also available in print.
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Weiser, Nicholas. "Dual High-Voltage Power Supply for use On Board a CubeSat." DigitalCommons@CalPoly, 2014. https://digitalcommons.calpoly.edu/theses/1204.
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Since their conception in 1999, CubeSats have come and gone a long way. The first few that went into space were more of a “proof of concept,” and were more focused on sending simple data and photographs back to Earth. Since then, vast improvements have been made by over 40 universities and private firms, and now CubeSats are beginning to look towards interplanetary travel. These small satellites could provide a cost effective means of exploring the galaxy, using off the shelf components and piggy-backing on other launch vehicles with more expensive payloads. However, CubeSats are traditionally launched into Low Earth Orbit (LEO), and if an interplanetary satellite is to go anywhere from there, it will need a propulsion system. This thesis project’s main goal will be to investigate the possibility and capability of an Ion-Spray propulsion system. Several problems are to be tackled in this project: how to take a 9 V supply and boost it to a maximum potential difference of 5,000 V, all while minimizing the noise and testing the feasibility of such a system being flown on board a CubeSat.
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Williams, Paul. "An investigation of neural networks for fault identification in the electricity supply industry." Thesis, Bangor University, 1994. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.261950.
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Wong, Wai Yu. "Supply-independent current-mode slew rate enhancement design /." View abstract or full-text, 2006. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202006%20WONG.
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Pande, Manish. "Three-phase voltage-type AC to DC power supply with improved performance." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1998. http://www.collectionscanada.ca/obj/s4/f2/dsk2/tape17/PQDD_0018/NQ35276.pdf.
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Jacobs, D. M. (Danver Maxwill). "Voltage control of medium to high power three-phase inverter supply systems." Thesis, Stellenbosch : Stellenbosch University, 2001. http://hdl.handle.net/10019.1/52608.
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Thesis (MScEng)--University of Stellenbosch, 2001.ENGLISH ABSTRACT: In this thesis a new voltage control method is developed for a three-phase inverter supply system. The inverter supply system consist of a Permanent Magnet Generator, a three-phase rectifier, a three-phase inverter plus LC-filter and a three-phase transformer in series. This system supplies power to a network or to a stand-alone load. The main focus of this thesis is on the control aspects of the inverter and the LC-filter. Different voltage control systems are investigated and compared to each other. From these methods the proposed voltage control method is developed where only the output voltages are measured to establish good voltage control. All these voltage control methods are also simulated with a software package. The proposed voltage control method compares very well with other voltage control methods. The results that are obtained in the simulations are satisfactory. The proposed voltage control method is also implemented in an 8 kW laboratory scale model and, again, very good practical results are obtained. A TMS320F240 nsp controller is used to implement the proposed voltage control method. The controller compensates well for load steps, and these results compare well to an alternative voltage control method, which was also evaluated practically.
AFRIKAANSE OPSOMMING: In hierdie tesis IS 'n nuwe spanningsbeheermetode ontwikkel VIr 'n drie-fase wisselrigter kragtoevoerstelsel. Die wisselrigter kragtoevoerstelsel bestaan uit 'n Permanent Magneet Generator, 'n drie-fase gelykrigter, 'n drie-fase wisselrigter plus Le-filter, en 'n drie-fase transformator in serie. Hierdie stelsel voorsien krag aan 'n netwerk sowel as aan 'n alleenstaande las. Die hooffokus van hierdie tesis is op die beheeraspekte van die wisselrigter en Le-filter. Verskillende spanningsbeheermetodes is deeglik ondersoek en vergelyk met mekaar. Uit hierdie metodes is dan die voorgestelde beheermetode ontwikkel waar slegs die uittreespanning gemeet word om goeie spanningsbeheer te kan doen. Al hierdie spanningsbeheermetodes is dan gesimuleer met 'n sagteware pakket. Die voorgestelde spanningsbeheermetode vergelyk baie goed met die ander spanningsbeheermetodes. Die resultate verky in die simulasies is ook baie bevredigend. Die voorgestelde beheermetode is ook geïmplementeer op 'n 8 kW laboratorium skaalmodel en weereens is baie goeie praktiese resultate verky. 'n TMS320F240 DSP-beheerder is gebruik om die voorgestelde beheermetode mee te implementeer. Die beheerder kompenseer baie goed vir lastrappe en vergelyk ook goed met 'n ander spanningsbeheermetode wat prakties ge-evalueer is.
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Chapman, Michael. "Development of a low voltage three phase power supply for educational use." Thesis, Chapman, Michael (2013) Development of a low voltage three phase power supply for educational use. Other thesis, Murdoch University, 2013. https://researchrepository.murdoch.edu.au/id/eprint/21670/.
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Electricity is supplied and consumed within our power system via alternating current (AC) using a three phase distribution systems which normally consists of the generation and transmission of three sinusoidal voltages of equal amplitudes with phases 120° spaced apart [1, p. 267].
Courses such as Murdoch University’s Electrical Power Engineering undergraduate degree exist to prepare future engineers for a career within the power industry; to be successful such courses need to incorporate exposure to both theoretical and practical concepts including the investigation of three phase power.
Currently Murdoch University does not possess equipment suitable to expose students to practical three phase concepts at low “safe” voltages. Students in their later years of study have achieved suitable knowledge to safely practice concepts at mains voltage levels but students in their first and second years of studies are restricted to considering concepts at a theoretical level only.
This project was concerned with developing a low voltage three phase function generator that could be used in teaching environments to allow students to proceed with experiments safely and relatively unsupervised. The design goals were to produce a device capable of producing a three phase supply at safe levels (around 12 volts RMS) with a controllable frequency switchable between at least 50 and 60 Hz. Features were to include real time voltage measurements of each phase and an ability to simulate an unbalanced supply fault.
The project was completed by incorporating an Arduino Uno microcontroller using direct digital synthesis to produce three distinct outputs in the form of pulse width modulated (PWM) signals representing sinusoidal waveforms. These PWM signals were used in turn to feed a three phase full bridge integrated circuit to produce amplified signals which, after being fed through a low pass filter, produce three sinusoidal waveforms spaced with 120° phase differences.
The output waveforms produced are considered to be of sufficient quality for the application as described; waveforms appear within 2.7° of the target 120° phase difference and total harmonic distortion values measured during testing phases range from 0.847% to 2.39%.
It has been recommended that future revisions of this device incorporate features including over voltage and over current protection to protect against misuse. Additionally, refinements to the output filter and peak follower circuit would provide improvements to the overall performance of the device.
This project is considered to have been successfully completed. The function generator prototype developed over the course of this project satisfied most design objectives and could be used immediately within a classroom environment.
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OTT, ANDREAS. "Supply-Embedded Communication in Differential Automotive Networks." Doctoral thesis, Università degli Studi di Milano-Bicocca, 2023. https://hdl.handle.net/10281/404718.
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Le ultime novita in ambito automotive sono dovute principalmente ai compoenenti elettronici ed
elettrici che favoriscono la riduzione dei livelli di emissione e creano maggiore sicurezza e comfort.
L’utilizzo di questi componenti sta aumentando sempre di più, ed essendo generalmente connessi
tramite dei bus, stanno rendendo il sistema di cablaggio sempre piu complesso fino a renderlo uno dei
blocchi piu critici da progettare.
Pertanto, si stanno cercando nuove tecniche per ridurre il numero di interconnessioni.
In questo lavoro si analizza un nuovo metodo per integrare la comunicazione e l'alimentazione su un
unico bus differenziale. Diversamente dai metodi Power over Ethernet (PoE), l'implementazione
proposta si basa sull’iniezione di cariche ben definite sul bus di comunicazione, che allo stesso tempo
alimenta i vari dispositivi, al fine di generare dei pulsi.
Sono proposti due approcci basati su capacità di commutazione: il Charge Alternation (CA) e il Charge
Pump (CP).
Il metodo CA, a 2Mbps, richiede solo il 50% della potenza di modulazione del carico resistivo, e il CP
migliora ancora di più le prestazioni grazie alla capacità di riutilizzare parzialmente la carica
immagazinata.
Entrambe i circuiti di transmissione sono validati da una scheda dimostrativa e da un test chip in
tecnologia 180nm BCD-on-SOI da cui si sono ottenuti risultati eccellenti.
Inoltre, un circuito di ricezione é mostrato ed implementato in un test chip che quindi realizza un
ricetrasmettitore completo.
La tesi é organizzata come segue: l'introduzione e le motivazioni alla base di questa attivitá sono
mostrate nel Capitolo 1. Nel capitolo 2 sono analizzati il concetto basico di transmissione e la
modellazione del bus differenziale. Il Capitolo 3 sono esaminate entrambe le implementazioni di
trasmettitori proposti, andando nel dettaglio della caratteristica dei pulsi, della codifica e del consumo
energetico. Una scheda dimostrativa fatta di componenti discreti e i relativi test sono presentati nel
capitolo 4, rimpiazzando con successo un layer fisico di un applicazione simil-CAN per illuminazione
interna delle auto. Vengono mostrati anche i risultati sulle emissioni elettromagnetiche che sono in linea
con i requisiti standard.
L'implentazione in silicio del trasmettitore, includendo entrambi circuiti sviluppati, é descritta
dettagliatamente nel capitolo 5. Viene mostrata l’architettura degli switch ad alta tensione, la
protezione ESD che fornisce un livello di HBM > 8kV e tutti i blocchi necessari per il funzionamento del
chip. Alla fine dello stesso capitolo vengono mostrate le prestazioni del chip integrato.
Nel Capitolo 6 si propone il circuito di ricezione e il composizione del chip che implementa il
ricetrasmettitore completo in una struttura simile a quella precedente. I test top level del chip sono
quindi esplicati prima di trarre le conclusioni finali.The advancements in modern vehicles are mainly due to electrical and electronic components that support an increasing demand for lower emission levels, higher safety and comfort. Increasingly, these components are connected by bus systems, which lead to more complex wire harnesses in modern cars, than ever before. Because of this, the wire harness of a car became one of the most complex building blocks. Therefore, techniques to reduce the wiring overhead are becoming increasingly important. In this work, a new method for integrating the communication and power supply of network participants on one differential bus, is investigated. Different to methods such as Power over Ethernet (PoE), the proposed implementations are using charges to emit defined pulses in to the communication bus, that is also carrying the power supply. Two switched capacitor approaches are proposed, the charge alternation (CA) and the charge pump (CP) method. While the suggested CA mode, operating at 2, requires only 50% of the power of a resistive load modulation that reaches a comparable signal level, the CP mode improves this even further due to the inherent charge-reuse capability of the concept. The approaches are verified with a demonstrator and a transmitter test chip fabricated in a 180nm BCD-on-SOI technology, that both shows the excellent performance of the concept and the silicon implementation. Furthermore, the receiver is discussed and implemented as part of a transceiver test chip, fabricated in the same technology. The reminder of the work is organized as follows: After the introduction and motivation for this research project in chapter 1, basic transmission concepts are described as well as the modelling of the differential bus based on a twisted pair, is analysed in chapter 2. Chapter 3 examines both switched capacitor transmission concepts in detail, regarding pulse shape, encoding, and power consumption. To check the proposed transmission schemes in a real-world environment, a demonstrator using off-the-shelf components will be discussed and evaluated in chapter 4, that successfully replaces the existing physical layer of a CAN-like state-of-the-art application for interior car illumination. It shows also, that standards for electromagnetic emissions can be met with the proposed solutions. A silicon implementation for the transmitter part, realizing both methods, is described in detail in chapter 5. The architecture of the required high-voltage switches, the design of the ESD protection that withstand an HBM stress level > 8 and all necessary building blocks for a chip implementation that can work in a real network environment, are discussed. At the end of this chapter, the performance of the real silicon results are discussed. Chapter 6 proposes the receiver concept, and the transceiver chip level implementation using the same framework as developed with the transmitter test chip. The top-level verification of the build transceiver test chip is presented before conclusions are drawn.
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Barnes, Lemuel Gregory. "Voltage-source inverter output waveform compensation using adaptive intelligent control /." This resource online, 1994. http://scholar.lib.vt.edu/theses/available/etd-10192006-115605/.
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Myhre, Jørgen Chr. "Electrical Power Supply to Offshore Oil Installations by High Voltage Direct Current Transmission." Doctoral thesis, Norwegian University of Science and Technology, Faculty of Information Technology, Mathematics and Electrical Engineering, 2001. http://urn.kb.se/resolve?urn=urn:nbn:no:ntnu:diva-383.
Full textAbstract:
This study was initiated to investigate if it could be feasible to supply offshore oil installations in the North Sea with electrical power from land. A prestudy of alternative converter topologies indicated that the most promising solution would be to investigate a conventional system with reduced synchronous compensator rating.
The study starts with a summary of the state of power supply to offshore installations today, and a short review of classical HVDC transmission. It goes on to analyse how a passive network without sources influences the inverter. The transmission, with its current controlled rectifier and large inductance, is simulated as a current source. Under these circumstances the analysis shows that the network frequency has to adapt in order to keep the active and reactive power balance until the controllers are able to react. The concept of firing angle for a thyristor is limited in a system with variable frequency, the actual control parameter is the firing delay time.
Sensitivity analysis showed some astonishing consequences. The frequency rises both by an increase in the active and in the reactive load. The voltage falls by an increase in the active load, but rises by an increase in the inductive load.
Two different control principles for the system of inverter, synchronous compensator and load are defined. The first takes the reference for the firing delay time from the fundamental voltage at the point of common coupling. The second takes the reference for the firing delay time from the simulated EMF of the synchronous compensator. Of these, the second is the more stable and should be chosen as the basis for a possible control system.
Two simulation tools are applied. The first is a quasi-phasor model running on Matlab with Simulink. The other is a time domain model in KREAN. The time domain model is primarily used for the verification of the quasi-phasor model, and shows that quasi-phasors is still a valuable tool for making a quick analysis of the main features when the details of the transients are of less importance.
The study indicates that power supply by HVDC transmission from land to offshore oil installations could be technically feasible, even without the large synchronous compensators normally required. It has been shown that in a network only supplied by an inverter, variations of active and reactive loads have significant influence on both voltage and frequency. Particularly it should be noted that the frequency shows a positive sensitivity to increases in load. This could make the system intrinsically unstable in the case of a frequency dependent load such as motors.
It was not a part of the study to optimize controllers, but even with simple controllers it was possible to keep the frequency within limits given by norms and regulations, but the voltages were dynamically outside the limits, though not very far. These voltage overswings take place in the first few instances after a disturbance, so it takes unrealistically fast controllers to handle them. They are partly due to the model, where the land based rectifier and the DC reactors are simulated by a constant current source, but partly they have to be handled by overdimensioning of the system.
The simulations indicate that it should be technically possible to supply an oil platform with electrical power from land by means of HVDC transmission with small synchronous compensators. Whether this is financially feasible has not been investigated. Neither has it been considered whether the necessary equipment can actually be installed on an oil platform.
Recently both ABB and Siemens have presented solutions for HVDC transmission in the lower and medium power range based on voltage source converters based on IGBTs. Fully controllable voltage source HVDC converters have properties that may be better suited than conventional line commutated current source thyristor inverters, to supply weak or passive networks, such as offshore oil installations, with electrical power. But they also have some disadvantages, and a complete technical and financial comparison must be performed in order to decide about any potential project.
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Devine, Phillip John. "A controllable, variable waveform, high voltage, switched mode power supply for electrostatic precipitators." Thesis, University of Leicester, 2000. http://hdl.handle.net/2381/30176.
Full textAbstract:
Increased awareness of the effects of atmospheric pollution has meant that electrostatic precipitators, which have been used since the early part of this century to separate particulate matter from process gas streams, are now required to achieve particulate collection efficiencies in excess of 99.7% for a number of processes. Increasingly stringent legislation concerning industrial particulate emissions has challenged the precipitation industry to consider how equipment can be improved to reduce, in particular, heavy metal and respirable size particulate discharges. Electrostatic precipitators charge dust particles in a gas stream by corona-producing electrodes, and remove the charged particles by electrostatic attraction under high electric fields. This thesis details the development of a prototype high frequency (20KHz), high voltage (50kV), high power (25 kW) switched mode precipitator power supply with technological advances over conventional units. A high frequency, high voltage, high power precipitator supply using high frequency inverter technology coupled to a novel ferrite cored, high voltage transformer-rectifier unit has been designed and built. It is capable of delivering in a controlled and responsive way 25kW at 50kV into a load that may suffer from sparking and flashover. The developmental stages of the prototype from initial concept through to field trials of the supply at a power station in the UK are detailed.
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Lee, Sunghyuk. "A zero-crossing based pipelined analog-to-digital converter with supply voltage scalibility." Thesis, Massachusetts Institute of Technology, 2010. http://hdl.handle.net/1721.1/62446.
Full textAbstract:
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2010.Cataloged from PDF version of thesis.
Includes bibliographical references (p. 73-76).
A zero-crossing based pipelined analog-to-digital converter (ADC) has been designed and is fabricated in a 65nm CMOS process. The highly digital implementation characteristic of the zero-crossing detection technique enables energy efficient operation and voltage scaling. Supply voltage scaling based on the required sampling frequency and resolution provides high energy efficiency over a wide range of sampling frequencies and resolutions. A two phase charge transfer scheme (course charge transfer and fine charge transfer) is used to achieve high speed and high resolution. Using switched capacitor circuit, two phase charge transfer scheme is implemented without increasing power and circuit complexity.
by Sunghyuk Lee.
S.M.
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Sturk, Murray Alan Carleton University Dissertation Engineering Mechanical. "Development and evaluation of a high voltage supply unit for electrorheological fluid dampers." Ottawa, 1993.
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Ma, Thi Thuong Huyen. "Evaluation of DC supply protection for efficient energy delivery in low voltage applications." Thesis, Lyon, 2018. http://www.theses.fr/2018LYSE1055/document.
Full textAbstract:
Actuellement, il y a une baisse du prix des ressources énergétiques distribuées, en particulier l'énergie solaire photovoltaïque, conduisant à la croissance significative de leur capacité d'installation dans de nombreux pays. D'autre part, les politiques encourageant l'efficacité énergétique ont favorisé le développement de charges DC dans les zones domestiques, telles que l'éclairage LED, les ordinateurs,, les téléphones, les téléviseurs, les moteurs DC efficaces et les véhicules électriques. Grace à ce changement, le système de distribution de microgrid DC devient plus attractive que le système de distribution à courant alternatif traditionnel. Les avantages principaux du microgrid DC sont l'efficacité énergétique plus élevée, plus facile à intégrer avec les sources d'énergie distribuées et le système de stockage. Alors que de nombreuses recherches se concentrent sur les stratégies de contrôle et la gestion de l'énergie dans le microgrid DC, sa protection reçoit une attention insuffisante et un manque de réglementation et d'expériences. La protection dans les réseaux DC est plus difficile que dans le réseau AC en raison de l'arc continu, de la valeur plus élevée du courant de courtcircuit et du taux de défaut de montée. En outre, dans les réseaux distribués à courant continu sont composés de nombreux dispositifs de commutation électroniques et semi-conducteurs, qui ne supportent le courant de défaut que quelques dizaines de microsecondes. Les disjoncteurs mécaniques, qui ont un temps de réponse de quelques dizaines de millisecondes, ne semblent pas satisfaire aux exigences de sécurité du microréseau à courant continu. L'absence d'un dispositif de protection efficace constitue un obstacle au développement du microgrid DC dans le système distribué. Cette thèse propose un disjoncteur DC auto-alimenté à courant continu utilisant normalement JFET SiC, qui offre un excellent dispositif de protection pour les microgrids DC grâce à son temps de réponse rapide et ses faibles pertes à l'état passant. La conception du disjoncteur DC à semi-conducteurs vise à répondre à deux objectifs: temps de réponse rapide et fiabilité. Les spécifications conçues et les énergies critiques qui entraînent la destruction du disjoncteur sont identifiées sur la base des résultats mesurés d'un JFET populaire dans le commerce. Un pilote de protection très rapide et fiable basé sur une topologie à convertisseur flyback avant est utilisé pour générer une tension négative suffisante pour tourner et maintenir le JFET SiC. Le convertisseur sera activé chaque fois que le disjoncteur détecte des défauts de court-circuit en détectant la tension de drain-source de JFET et crée une tension négative s'applique à la porte de JFET. Pour éviter une défaillance de la porte par surtension au niveau de la grille du JFET, la tension de sortie du convertisseur de retour vers l'avant est régulée à l'aide de la mesure coté primaire. Les résultats expérimentaux sur le prototype du disjoncteur DC ont validé les principes de fonctionnement proposés et ont confirmé que le disjoncteur DC à semi-conducteurs proposé peut interrompre le défaut en 3 μs. D'un autre côté, un modèle du JFET normalement activé dans l'environnement Matlab/Simulink est construit pour étudier les comportements du SSCB pendant une durée de court-circuit. L'accord entre la simulation et les résultats expérimentaux confirment que ce modèle JFET peut être utilisé pour simuler le fonctionnement d'un disjoncteur DC et dans l'étude du fonctionnement du microgrid DC pendant le processus de défaut et de compensationCurrently, there is a drop in the price of distributed energy resources, especially solar PVs, which leads to a significant growth of the installed capacities in many countries. On the other hand, policies encouraging energy efficiency have promoted the development of DC loads in domestic areas, such as LEDs lighting, computers, telephones, televisions, efficient DC motors and electric vehicles. Corresponding to these changes in sources and loads, DC microgrid distribution system becomes more attractive than the traditional AC distribution system. The main advantages of the DC microgrid are higher energy efficiency, easier in integrating with distributed energy sources and storage systems. While many studies concentrate on the control strategies and energy management in the DC microgrid, the protection still receives inadequate attention and lack of regulations and experiences. Protection in DC grids is more complex than AC grids due to the continuous arc, higher short circuit current value and fault rate of rising. Furthermore, the DC distributed grids are composed of many electronic and semiconductor switching devices, which only sustain the fault currents of some tens of microseconds. Mechanical circuit breakers, which have a response time in tens of milliseconds, seem not to meet the safety requirement of DC microgrids. The lack of effective protection devices is a barrier to the development of DC microgrids in the distributed systems. This thesis proposes a self-power solid state DC circuit breaker using normally-on SiC JFET, which offers a great protection device for DC microgrids due to its fast response time and low on-state losses. The design of the solid state DC circuit breaker aims to meet two objectives: fast response time and high reliability. The designed specifications and critical energies that result in the destruction of the circuit breaker are identified on the basis of the experiments of a commercial normally-on JFET. In addition, a very fast and reliable protection driver based on a forward-flyback converter topology is employed to generate a sufficient negative voltage to turn and hold off the SiC JFET. The converter will be activated whenever short-circuit faults are detected by sensing the drain-source voltage, then creating a negative voltage applied to the gate of JFET. To avoid gate failure by overvoltage at the gate of JFET, the output voltage of the forward-flyback converter is regulated using Primary Side Sensing technique. Experimental results validated the working principle of the proposed solid state DC circuit breaker with fault clearing time less than 3 μs. Additionally, a model of the normally-on JFET in Matlab/Simulink environment is built for exploring the behaviors of the solid-state DC circuit breaker during short-circuit faults. The agreement between the simulation and experimental results confirms that this JFET model can be appropriately used for the investigation of solid state DC circuit breaker operations and DC microgrids in general during fault evens and clearing fault processes
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Hu, Boxue. "Challenges and Solutions of Applying Medium-Voltage Silicon Carbide Devices in Medium and High-Voltage Systems." The Ohio State University, 2019. http://rave.ohiolink.edu/etdc/view?acc_num=osu1565967269661455.
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Jr-Wei, Chen. "Voltage Island Floorplanning for SoC design with Multiple Supply Voltages." 2006. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0016-1303200709271026.
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Chen, Jr-Wei, and 陳志維. "Voltage Island Floorplanning for SoC design with Multiple Supply Voltages." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/27314633841020986776.
Full textAbstract:
碩士國立清華大學
資訊工程學系
94
Reducing power is an important issue in modern core-based SOC designs. Using multiple supply voltages on a SoC design is an efficient way to achieve low power. However, it may lead to a complex power network and a huge number of level shifters if we just set the cores to operate at their respective lowest voltage levels. We present two formulations for the voltage level assignment problem. The first is exact but takes longer time to compute a solution. The second can be solved much faster with virtually no loss on optimality. In addition, we propose a modification to the traditional floorplanning framework. Unlike previous works, we can optimize the total power consumption, the level shifter overhead, and the power network complexity without compromising the wirelength and the chip area. In the experiments, we obtained 17- 53\% power savings with voltage island generation.
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Chen, Shin-Liang, and 陳信良. "Temperature and supply voltage independent current reference and voltage reference." Thesis, 2005. http://ndltd.ncl.edu.tw/handle/07939159195316351904.
Full textAbstract:
碩士北台科學技術學院
機電整合研究所
93
This paper presents two kinds of current references which are insensitive to supply voltage and without using resistors. The first current reference is composed of a positive supply voltage coefficient circuit and a negative supply voltage coefficient circuit. The positive supply voltage coefficient circuit exhibits the characteristic that the output current will increase as the supply voltage rises. However, the negative supply voltage coefficient circuit possesses the characteristic that the output current will decrease as the supply voltage rises. By combining these two components with adding operation, the supply voltage coefficient will be cancelled to zero and the output current will reject the variation of supply voltage. In addition, the second current reference is composed of two positive supply voltage coefficient circuits with subtraction operation. The output current of this current reference will also be insensitive to supply voltage. These two current references will be insensitive to supply voltage and identified not only by HSPICE simulation but also by the measured data from an integrated prototype. By applying the current references and the theory of the bandgap reference, we can derive a voltage reference insensitive to supply voltage and temperature.
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Wang, Chung-Chih, and 王寵智. "Design of A High Voltage Regulator Circuits for Low Supply Voltage." Thesis, 2005. http://ndltd.ncl.edu.tw/handle/53557650385828017980.
Full textAbstract:
碩士國立中興大學
電機工程學系
93
This thesis proposes a high voltage regulator circuit for low supply voltages, which includes ring oscillator circuit, four-phase generator circuit, high-amplitude generator circuit, charge pumping circuit, band-gap reference (BGR) circuit, voltage regulator circuit, voltage regulator controller circuit. The operations of these sub-circuits and the complete regulator are introduced. The thesis also analyzes the low voltage dual pumping circuit and compares, the results of measurement and simulations. In addition, the sub-1V CMOS band-gap reference circuit is analyzed. The theoretical derivation proves and explains why the output waveforms are different from those of the other band-gap reference circuits. Finally, the high voltage regulator circuit is used to generate the output voltages of 6V, 7V, and 8V. It has been taped out using 0.35m CMOS technology.
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Lee, Wan-Ping, and 李婉萍. "A Multiple-Supply-Voltage Design Flow from Voltage Assignment to Floorplanning." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/94882698579133304572.
Full textAbstract:
博士國立臺灣大學
電子工程學研究所
97
As the CMOS technology enters the nanometer era, power dissipation is increasing severely and becomes a key challenge in nanometer chip design. If the increasing trend of power dissipation is still not tamed, the temperature of chips may be overheated, and further the functionality of the chips may fail. To moderate the increasing power dissipation, the multiple-supply voltage (MSV) design style recently has been extensively applied to mitigate dynamic-power consumption. Concisely, MSV is a trade-off between power saving and performance; in other words, we may sacrifice the performance whiling conserving the energy. Therefore, how to make a good trade-off becomes a key point for MSV design. MSV lowers supply voltages of non-timing-critical cells for power saving while raising ones of timing-critical cells for performance guarantee. Although the MSV design paradigm mitigates dynamic-power consumption, it brings many crucial design challenges at the same time, especially in voltage assignment, floorplanning, and power-ring synthesis. For such complicated designs, it is desirable to develop a methodology dealing with MSV designs. In this dissertation, we propose an MSV design flow from voltage assignment, through floorplanning, to power-ring synthesis and adjustment. This system consists of three parts: (1) voltage assignment and MSV-aware floorplanning, (2) post-floorplanning voltage-island generation, and (3) MSV-aware post-floorplanning power ring synthesis. In this system, we first propose an effective voltage-assignment technique based on dynamic programming for MSV-aware technology mapping. For circuits without re-convergent fanouts, an optimal solution for the voltage assignment is guaranteed; (that is the power consumption is minimized while the timing constraint is satisfied.) for circuits with re-convergent fanouts, a near-optimal solution is obtained. After the voltage assignment, we then generate a level shifter for each net that connects two blocks in different voltage domains, and perform power-network aware floorplanning for the MSV design. Next, we present a general formulation of the voltage-island generation problem that considers level-shifter planning and power-network routing resources. To tackle the addressed problem, we employ an integer-linear programming (ILP) formulation which consists of (1) level-shifter aware wirelength estimation to capture the timing overhead caused by level shifters, (2) voltage-island-clustering inequalities to avoid complicated constraint transformations, and (3) inequalities to capture the power-network routing-resource usage. Unlike previous works that form the power rings as enclosing bounding boxes of voltage islands, we enable power rings alignment to the outer boundaries of voltage islands. With this new formulation, the power-ring estimation becomes more accurate during floorplanning, and the power-ring synthesis becomes more practical after floorplanning. We therefore propose a linear-time voltage-island power-ring search algorithm to identify the power rings of voltage islands and then present a linear-time optimal power-ring corner-patching algorithm to minimize the number of corners in the power rings by using post-floorplanning whitespaces.
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Tsai, Ya-Wen, and 蔡雅雯. "Dual Supply Voltage Scaling and Voltage Island Construction at Floorplan Stage." Thesis, 2007. http://ndltd.ncl.edu.tw/handle/27034339095850821458.
Full textAbstract:
碩士中原大學
資訊工程研究所
95
In the period of Deep Submicron Technology, the functions of portable electronic products are getting more and more complex, and the power consumption of the chips is also highly increased. Therefore, it’s a very important issue to reduce the power consumption of the chips in the modern VLSI designs. Using dual supply voltages on VLSI designs is an efficient method to reduce power consumption and maintain the circuit performance. In this paper, we proposed a voltage scaling, voltage island generation algorithm in the floorplanning stage to reduce power consumption and the requirement of power-network resource by using dual supply voltage. Our algorithm includes the following four stages: (1) Cluster the standard cells according to the connectivity and the slack. Floorplan the clusters to minimize the number of standard cells with negative slack and white space. (2) Assign the supply voltage of the standard cells with negative slack to high supply voltage. Use voltage scaling refinement under timing constraint to reduce power consumption. We reassign the supply voltage of the standard cells with high supply voltage according to their power gain. (3) Divide each mixed cluster which contains high supply voltage cells and low supply voltage cells into two single supply voltage clusters which contain only high supply voltage cells or low supply voltage cells under the timing constraint. (4) Use the floorplan refinement to minimize the requirement of power-network resource and the white space. We tested four ISCAS benchmarks, and the experimental results show that our algorithm is very effective in reducing the power consumption and the requirement of power-network resource. On average, our algorithm reduces the power consumption by 47.3%. And the average white space compared to the total area of floorplan layout is about 4.09%.
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HSU, WEN-CHUN, and 徐文俊. "Dual Supply Voltage Scaling and Voltage Island ConstructionRefinement at Floorplan Stage." Thesis, 2008. http://ndltd.ncl.edu.tw/handle/53511369270941648770.
Full textAbstract:
碩士中原大學
資訊工程研究所
96
With the improvement in the IC process technology, after IC Industry enters the Deep Submicron era, the function of portable electronic products is getting more complex, and the size is getting smaller with increasing in power consumption. Therefore, it’s a very important issue to reduce the power consumption of the chips and keep original performance of the chips in the modern VLSI designs. Using dual supply voltages on VLSI designs is an efficient method to reduce power consumption and maintain the circuit performance. In this paper, we propose a voltage scaling method, and then generate high or low voltage island in the floorplanning stage to reduce power consumption and the requirement of power-network resource by using dual supply voltage. Our algorithm includes the following four stages: (1) Analyze the circuit and cluster the standard cells according to the connectivity and the slack, and then floorplan the clusters to minimize the number of standard cells with negative slack and white space. (2) For fixing timing violation, assign the supply voltage of the standard cells with negative slack to high supply voltage. Under timing constraint, we reassign the supply voltage of the standard cells with high supply voltage to reduce power consumption. (3) Divide each mixed voltage cluster which contains high supply voltage cells and low supply voltage cells into two single supply voltage clusters. These clusters will contain only high supply voltage cells or low supply voltage cells. After the voltage island formation, if the timing constraint is not met, the voltage scaling refinement process will be repeated. (4) Use the floorplan refinement process to minimize the requirement of power-network resource and the white space. We use four cases in the ISCAS89 benchmarks, and the experimental results show that our algorithm is very effective in reducing the power consumption and the requirement of power-network resource. On average, our algorithm reduces the power consumption by 50.52% and reduce the requirement of power-netrwork resource by 27.90%. Finally, the white space compared to the total area of floorplan layout is about 3.58% on average.
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Chang, Chao-Kai, and 張朝凱. "Dual Voltage Supply Hall Effect Current Sensor." Thesis, 2012. http://ndltd.ncl.edu.tw/handle/a64m95.
Full textAbstract:
碩士國立臺北科技大學
機電整合研究所
100
The thesis is regarding to utilize the high-integration characteristics of semiconductor process to integrate discrete components of dual voltage supply Hall effect current sensor in an IC. This integration will overcome the shortcomings of non-linearity and low sensitivity when Hall effect current sensor is operated in low current. The IC also incorporates a voltage regultor to supply internal circuits and a bandgap circuit as a reference voltage of a source follower amplifier. This amplifier is adopted to provide a constant current to hall sensor hence Hall sensor can normally sense the change of magnetic field and output a relative voltage. This voltage will be differentiated and amplified by a push-pull amplifier. The new art of IC will reduce the quantity of passive components in PCB to a portion of 77.3%. The measurement equiment is a 8.5A Dual voltage supply Hall effect current sensor. The measured results show improvements compared to existed circuits. The improvement includes reducing amount of voltage lagging positive current and amount of voltage leading negative current; the former is 0.096V and the latter is 0.048V. This IC performs a good correction of lowering the output voltage error to 0.01V. This enhancement could avoid mal-function of motors or tools due to above mentioned lagging or leading. On the other hand, performance is increased when low output voltage is generated from low sensed current. Obvious promotion in output voltage linearity is seen when sensed current is within 0.5A.
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Chang, Wuchang, and 張武昌. "Design of low-power band-gap voltage reference circuits for low supply voltages." Thesis, 2002. http://ndltd.ncl.edu.tw/handle/63027796637562889403.
Full textAbstract:
碩士國立中興大學
電機工程學系
90
Reference voltage generators are widely used in many applications from analog circuit to mixed-signal circuits such as ADC, DAC, DRAM and flash memories. These structures are required to provide a stable voltage reference with a low sensitivity to temperature and supply voltage. One of the most popular architecture is the band-gap reference (BGR). Due to the need of battery-operated systems for portability, low supply voltages and low power consumption will be the trends in future VLSI products. Two new band-gap reference (BGR) circuits operated at low supply voltages using 0.6mm CMOS technology are presented in this thesis. The chip area of the new BGR circuit is small. The operation voltage can be down to 1.2V, while the reference voltage (Vref) can be set to almost any values. The deviation of Vref is less than 18ppm/ o C for the temperature range from -40°C to 125°C. In order to reduce the current consumption, we propose to use switches to control the BGR circuit connected or disconnected with power supplies. When the system is in power-saving mode, the BGR circuit is disconnected from power supplies to reduce the current consumption.
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Chang, Szu-Wei. "A Low Power Scheduling Method with Dual Supply Voltage and Dual Threshold Voltage." 2004. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-2906200415455400.
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Chang, Szu-Wei, and 張四維. "A Low Power Scheduling Method with Dual Supply Voltage and Dual Threshold Voltage." Thesis, 2004. http://ndltd.ncl.edu.tw/handle/71448988551644085022.
Full textAbstract:
碩士國立臺灣大學
資訊工程學研究所
92
Dynamic power consumption goes down quadratically with the supply voltage scaling down. It is naturally for the researchers to scale down the supply voltage to reduce power consumption. It is also possible to reduce the power consumption in a design without degrading the performance by reducing the supply voltage of those cells o® the critical path. This method is so-called dual/multiple supply voltage methodology. However, it is also possible to provide dual/multiple threshold voltage to reduce the power consumption. As in [1] [2] [3] [4] [5] [6] [8] [7], many researches focus on assigning dual supply/threshold voltage to gate-level design. In this paper, we proposed a partitioning methodology with multiple supply voltage and multiple threshold voltage in behavioral synthesis stage. By considering multiple voltages and multiple thresholds in higher level of the design flow, we can explore larger design space of power, area, and performance. Hence we can optimize the power consumption without losing circuit e±ciency and area. And because the scheduling problem has been proven to be a NP problem, so we can not find optimal solution in polynomial time. To solve this, we adopt a GA (Genetic Algorithm) based SA (Simulated Annealing) approach to find an approximation result.
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Cheng, Ching-Tsan, and 鄭景燦. "A low supply voltage oscillator with detecting process, voltage and temperature drift circuit." Thesis, 2012. http://ndltd.ncl.edu.tw/handle/07680147641949070292.
Full textAbstract:
碩士淡江大學
電機工程學系碩士班
100
This thesis presents two oscillators with detecting process, voltage and temperature (PVT) drift working in difference supply voltage for 25-MHz clock oscillator. The oscillator circuits are composed of current reference circuit and ring oscillator and CKAMR. The current reference circuit is composed of complementary-to-absolute-temperature (CTAT) and a proportional-to-absolute-temperature (PTAT) to compensated temperature variation. And output current adjustment circuit is used to overcome process variation. The voltage variation is compensated by the connecting structure between current reference and oscillator. The first oscillator is measured in TSMC 0.18μm CMOS technology. The measured temperature variation coefficient is 48.8 ppm/℃ across a temperature range of 0℃ to 100℃, and voltage variation coefficient is 0.13% for a supply voltage range from 1.62V to 1.98V. Power consumption is 64uW. Finally, in order to reduce power consumption, we design the oscillator circuit operates in 0.9V. And the output current adjustment circuit is replaced by Thermal Code Current Circuit to avoid glitch when current is changed. In post-simulation, temperature variation coefficient is 53.5 ppm/℃ across a temperature range of -25℃ to 125℃, and voltage variation coefficient is 0.76% for a supply voltage range from 1.62V to 1.98V. Power consumption is 13.4uW.
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Liu, Hong-Chang, and 劉洪昌. "20MHz Oscillator Independent of Supply Voltage and Temperature." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/6xbxp9.
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Chen, Kuang-Ting, and 陳冠廷. "A Single-Supply Low-Voltage 8T SRAM Cell." Thesis, 2008. http://ndltd.ncl.edu.tw/handle/36766446677988757360.
Full textAbstract:
碩士國立清華大學
電機工程學系
97
Write failure and read disturb limited the minimum operation voltage (VDDmin) of SRAM. We proposed a single supply 8-transistor SRAM cell with improved write margin (WM) and read-static noise margin (RSNM) to achieve low operation voltage.The proposed 8T SRAM cell employ differential data-aware supply voltage, which is supplied by a bitline pair, to enlarge its write margin. In addition, a bitline-boost scheme is proposed to improve read stability of the proposed 8T cell. Two 39Kb SRAM macros, 6T and proposed 8T, were fabricated using a 45nm CMOS technology. The measured VDDmin of our 8T SRAM macro is 210mV lower than that of 6T SRAM macro.
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Cheng-LinChuang and 莊政霖. "Power Network Planning in Multiple-Supply Voltage Design." Thesis, 2013. http://ndltd.ncl.edu.tw/handle/87715950786853010536.
Full textAbstract:
碩士國立成功大學
電機工程學系碩博士班
101
Powerplanning is an important issue in physical design flow for a long time. As process technology advances, dynamic power grows dramatically. Hence, a multiple-supply voltage (MSV) design is widely used to handle this problem, which makes Powerplanning become more difficult. In industries, powerplanning is usually made by handcraft and takes a lot of time, which increases Time-to-Market. Besides, it may waste unnecessary routing resource. Although there exist several works discussing powerplanning, most of these researches usually adjust metal widths to handle this problem, which is not adopted by industries. In order to satisfy requirements in industries, this thesis proposes a powerplanning methodology which can be applied in multiple-supply voltage designs. To reduce routing resource, a two-stage approach is proposed to adjust density of power meshes. Besides, powerplanning results are imported back to commercial tools. The experimental results demonstrate that power networks generated by our approach require less routing resource than those use regular power mesh.
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HSU, YAO-WEN, and 許耀文. "Single-Voltage-Supply Submicron Ga0.51In0.49P/In0.15Ga0.85As Power FET's." Thesis, 1998. http://ndltd.ncl.edu.tw/handle/17740972720119060300.
Full textAbstract:
碩士國立臺灣大學
電機工程學系研究所
86
English Abstract Power amplifier plays an important role in the di gital wireless communication system currently. The power of signal must be int ensified to a specification value before it successfully transmits out from an tenna. But, the active devices in the power amplifier stage are mainly compose d and designed by MESFET's or HEMT's which are depletion type transistor. Ther efore, a negative voltage is necessary for the active device. That is, a dual- polarity-supply scheme or a dc-to-dc converting circuit is needed for biasing the FET correctly. The generation of negative voltage essentially rises up the costs and the size of the communication system such as personal digital cellu lar phones. Base on the commercial factors, eliminating the demands of negativ e voltage supply and developing single-voltage-supply power FET's are emphasiz ed recently. By the reason of high bandgap of Ga0.51In0.49P, applyi ng this material as an insulating layer between gate metal and doped In0.15Ga0 .85As channel can make gate suffer from more positive voltage before gate leak age current generates. It has been discovered that the transconductance distri buted broadly and flatly in the positive VGS (gate-to-source voltage) region a nd the maximum value also occurred here. Thus, it can be expected that the FET 's can be biased at positive VGS region for power application. The fomer part of the thesis described the power performance of Ga0.51In0.49P/In0.15Ga0.85As doped-channel FET's including measurement data and calculating results. I n addition, in order to enhance the gain and the current level, it is necessar y to drop-off the gate length and the resistor results from ohmic contact and gate-to-source spacing. Hence, it is essential to develop submicron and self-a ligned fabrication technology. The remainder of the thesis is to describe how to fabricate a submicron gate. A method to fabricate submicron gate by the ref low property of photoresist and tri-level photoresist technology is proposed a nd demonstrated. By this method, a submicron T-gate can be achieved by convent ional normal UV lithography rather than expensive e-beam technology. And the s elf-aligned technology can also be developed by the T-shape gate to decrease t he distance of gate to source(drain).
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Xu, Yue-Wen, and 許耀文. "Single-Voltage-Supply Submicron Ga0.51In0.49P/In0.15Ga0.85As Power FET's." Thesis, 1998. http://ndltd.ncl.edu.tw/handle/16152848489975524599.
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Hung-WenChen and 陳鴻文. "Analysis and Implementation of High Voltage Power Supply." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/83599253900072512509.
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Lee, Hung-Hsie, and 李鴻禧. "A Low Power Driven Voltage Scaling Algorithm Using Dual Supply Voltage at Placement Stage." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/72941162832651866576.
Full textAbstract:
碩士中原大學
資訊工程研究所
94
With the improvement in the process technology, IC industry enters the deep sup-micron era, the number of cell on ICs increases dramatically. Power consumption has become one of the most important issues in a design theme. The method of using lower supply voltage to reduce power dissipation is a recent trend, but this technique has not been combined with the development in the physical design. In this paper we research the relation between placement and voltage scaling technique. There are three major phases in this algorithm. In the first phase, we develop a timing driven placer and a basic force directed placer. We place standard cells to its force-balanced position by using forced directed algorithm. And then according to the relative position of cells, we place cells until each cell is not overlapped to another. The second phase is voltage scaling phase. In this phase, we use the method “partition based voltage scaling” [2]. We add a new cost which is the distance between high voltage supply and gate into the gain of this method. The third phase is to create voltage rows and fix timing violation. We create high and low voltage rows according to the position of high and voltage cells, and then we move cells to the corresponding rows. After moving cells, if timing is incorrect, we fix the timing by gate sizing to guarantee that the timing is correct. In comparison with the power consumption of the circuit after placement, on average, our algorithm reduces the power consumption of the basic force directed placement by 45.1%, the power consumption of the timing placement by 45.6%, and the power consumption of commercial tool Placement(Cadence/SOC Encounter) by 36.7%.
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JHAO, SYUAN-NENG, and 趙炫能. "Integrated Power Supply with Linear and Switching Voltage Regulators." Thesis, 2016. http://ndltd.ncl.edu.tw/handle/tmtv5d.
Full textAbstract:
碩士南臺科技大學
電機工程系
104
The thesis proposed a hybrid power system with combined advantageous features of switching power supply and linear power amplifier. The switching power supply would provide the primary output voltage and power to the load, while the linear power amplifier would act as a correcting amplifying device to compensate for power ripple as a way to stabilize voltage output. Combination of these two components not only reduced the output voltage ripple but improved the overall efficiency simultaneously, as the power output level could be higher, in comparison with the low efficiency of a system with only the linear power amplifier. The thesis would explore two practical approaches of using alternating and direct current power supply. For alternating power supply, it combined the linear power amplifier and the full-bridge inverter to produce alternating voltage which had adjustable output frequency and voltage. The direct current power supply would use a linear power amplifier and a phase shift full-bridge converter to produce wide-ranged and low-rippled direct current which had adjustable output voltage. And, two prototypes of electric circuit with the maximum output power of 500W to produce final output of hybrid alternating power at 70 to 110 with the maximum frequency of 1 and a hybrid direct power at 5 to 50 would be modeled to prove the control method as practicable.
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Lin, Chung-Hung, and 林俊宏. "The application of adjusting current and voltage power supply." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/44164284897421261560.
Full textAbstract:
碩士中原大學
電機工程研究所
99
Abstract In recent years, the semiconductor integrated circuit technology developed, it changes in consumer electronics products updates and use short, gradually towards the purpose of facilitating the development，and gradually got used to save the battery can be used as component, but also makes batteries used in certain conditions to develope a variety of uses and specifications, and a wide range of applications in electronics, UPS systems, laptops and electric vehicles. In order to achieve low-cost sections of the CC-CV Battery Charger, this paper uses the general electronics store selling the fixed-voltage AC to DC switching power supply as the main charge structure, to achieve a control circuit for the use of electrical devices connection between the battery voltage feedback signal, so that it has changed the battery charging mode and adjustable voltage and current capabilities, thus achieving the effect of a low-cost and self-adjustment of intelligent charger.
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Li, Ren-Hao, and 李仁豪. "Modular Design of Adjustable High Voltage Pulsed Power Supply." Thesis, 2019. http://ndltd.ncl.edu.tw/handle/8u46ys.
Full textAbstract:
碩士國立臺灣科技大學
電機工程系
107
This thesis aims to achieve a modular design of an adjustable high voltage pulsed power supply. The proposed system includes a DC/DC converter and a circuit for controlling output pulse width. The DC/DC converter is structured by full-bridge LLC resonant circuit as a basic power module and combines through input parallel output series (IPOS) form to increase the output voltage and output power. Moreover, the digital controller is incorporated with a human-machine interface, where the different output specifications can be obtained according to the preset parameter values. In addition, in order to stabilize output voltage, the frequency modulation technique is used to reach the required level, and the duty cycle control is employed to balance the output voltage between power modules. Furthermore, the burst mode is added into the pulse width control strategy for eliminating voltage spike and resonant current spike. Finally, both the computer simulation and experimental results are used to verify the feasibility and validity of the proposed system.