Academic literature on the topic 'Viterbi Algorithm'

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Journal articles on the topic "Viterbi Algorithm"

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Monfared, Saleh Khalaj, Omid Hajihassani, Vahid Mohsseni, Dara Rahmati, and Saeid Gorgin. "A High-throughput Parallel Viterbi Algorithm via Bitslicing." ACM Transactions on Parallel Computing 8, no. 4 (December 31, 2021): 1–25. http://dx.doi.org/10.1145/3470642.

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In this work, we present a novel bitsliced high-performance Viterbi algorithm suitable for high-throughput and data-intensive communication. A new column-major data representation scheme coupled with the bitsliced architecture is employed in our proposed Viterbi decoder that enables the maximum utilization of the parallel processing units in modern parallel accelerators. With the help of the proposed alteration of the data scheme, instead of the conventional bit-by-bit operations, 32-bit chunks of data are processed by each processing unit. This means that a single bitsliced parallel Viterbi decoder is capable of decoding 32 different chunks of data simultaneously. Here, the Viterbi’s Add-Compare-Select procedure is implemented with our proposed bitslicing technique, where it is shown that the bitsliced operations for the Viterbi internal functionalities are efficient in terms of their performance and complexity. We have achieved this level of high parallelism while keeping an acceptable bit error rate performance for our proposed methodology. Our suggested hard and soft-decision Viterbi decoder implementations on GPU platforms outperform the fastest previously proposed works by and , achieving 21.41 and 8.24 Gbps on Tesla V100, respectively.
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Viterbi, Andrew. "Viterbi algorithm." Scholarpedia 4, no. 1 (2009): 6246. http://dx.doi.org/10.4249/scholarpedia.6246.

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Lou, H. L. "Implementing the Viterbi algorithm." IEEE Signal Processing Magazine 12, no. 5 (1995): 42–52. http://dx.doi.org/10.1109/79.410439.

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Muhammad, Shamsuddeen Hassan, and Abdulrasheed Mustapha. "A Form of List Viterbi Algorithm for Decoding Convolutional Codes." U.Porto Journal of Engineering 4, no. 2 (October 31, 2018): 42–48. http://dx.doi.org/10.24840/2183-6493_004.002_0004.

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Viterbi algorithm is a maximum likelihood decoding algorithm. It is used to decode convolutional code in several wireless communication systems, including Wi-Fi. The standard Viterbi algorithm gives just one decoded output, which may be correct or incorrect. Incorrect packets are normally discarded thereby necessitating retransmission and hence resulting in considerable energy loss and delay. Some real-time applications such as Voice over Internet Protocol (VoIP) telephony do not tolerate excessive delay. This makes the conventional Viterbi decoding strategy sub-optimal. In this regard, a modified approach, which involves a form of List Viterbi for decoding the convolutional code is investigated. The technique employed combines the bit-error correction capabilities of both the Viterbi algorithm and the Cyclic Redundancy Check (CRC) procedures. It first uses a form of ‘List Viterbi Algorithm’ (LVA), which generates a list of possible decoded output candidates after the trellis search. The CRC check is then used to determine the presence of correct outcome. Results of experiments conducted using simulation shows considerable improvement in bit-error performance when compared to classical approach.
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Xu, Hui Hong. "Speaker Recognition Study Based on Optimized HMM Algorithm." Advanced Materials Research 765-767 (September 2013): 2809–12. http://dx.doi.org/10.4028/www.scientific.net/amr.765-767.2809.

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The article has carried on the optimization to the HMM algorithms Viterbi algorithm and LBG algorithm, It can be proofed that the optimized algorithm improved the text dependent recognition efficiency throgh experiment.
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GOLOD, DANIIL, and DANIEL G. BROWN. "A TUTORIAL OF TECHNIQUES FOR IMPROVING STANDARD HIDDEN MARKOV MODEL ALGORITHMS." Journal of Bioinformatics and Computational Biology 07, no. 04 (August 2009): 737–54. http://dx.doi.org/10.1142/s0219720009004242.

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In this tutorial, we discuss two main algorithms for Hidden Markov Models or HMMs: the Viterbi algorithm and the expectation phase of the Baum–Welch algorithm, and we describe ways to improve their naïve implementations. For the Baum–Welch algorithm we first present an implementation of the expectation computations using constant space. We then discuss the classical implementation of this calculation and describe ways to reduce its space usage to logarithmic and [Formula: see text], with their respective CPU costs. We also note where each respective algorithm can be parallelized. For the Viterbi algorithm, we describe [Formula: see text] and logarithmic space algorithms which increase CPU use by a factor of two and by a logarithmic factor respectively. We also present two recent heuristics for decreasing space use, which in practice lead to logarithmic space use. Classical version of Viterbi cannot be parallelized by splitting sequence in several subsequences, but we show a parallelization that works if we are willing to pay a significant extra CPU cost. Finally we show a very simple parallelization trick which enables full usage of multiple CPUs/cores under the condition that they share memory.
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Ann Wen, Kuei, and Jau Yien Lee. "Parallel processing for Viterbi algorithm." Electronics Letters 24, no. 17 (1988): 1098. http://dx.doi.org/10.1049/el:19880745.

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Wei, L. "Iterative Viterbi Algorithm: Implementation Issues." IEEE Transactions on Wireless Communications 3, no. 2 (March 2004): 382–86. http://dx.doi.org/10.1109/twc.2003.821149.

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FOREMAN, LINDSEY A. "Generalisation of the Viterbi algorithm." IMA Journal of Management Mathematics 4, no. 4 (1992): 351–67. http://dx.doi.org/10.1093/imaman/4.4.351.

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Reeve, J. S. "A parallel Viterbi decoding algorithm." Concurrency and Computation: Practice and Experience 13, no. 2 (2001): 95–102. http://dx.doi.org/10.1002/cpe.539.

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Dissertations / Theses on the topic "Viterbi Algorithm"

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Dobson, Jonathan M. "ASIC implementations of the Viterbi Algorithm." Thesis, University of Edinburgh, 1999. http://hdl.handle.net/1842/13669.

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The Viterbi Algorithm is a popular method for decoding convolutional codes, receiving signals in the presence of intersymbol-interference, and channel equalization. In 1981 the European Telecommunications Administration (CEPT) created the Groupe Special Mobile (GSM) Committee to devise a unified pan-European digital mobile telephone standard. The proposed GSM receiver structure brings together Viterbi decoding and equilization. This thesis presents three VLSI designs of the Viterbi Algorithm with specific attention paid to the use of such modules within a GSM receiver. The first design uses a technique known as redundant number systems to produce a high speed decoder. The second design uses complementary pass-transistor logic to produce a low-power channel equalizer. The third design is a low area serial equalizer. In describing the three designs, redundant number systems and complementary pass-transistor logic are examined. It is shown that while redundant number systems can offer significant speed advantages over twos complement binary, there are other representations that can perform equally well, if not better. It will also be shown that complementary pass-transistor logic can offer a small improvement for VLSI circuits in terms of power consumption.
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Dujari, Rajeev. "Parallel Viterbi search algorithm for speech recognition." Thesis, Massachusetts Institute of Technology, 1992. http://hdl.handle.net/1721.1/13111.

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Ju, Zilong. "Fast Viterbi Decoder Algorithms for Multi-Core System." Thesis, KTH, Signalbehandling, 2012. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-98779.

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In this thesis, fast Viterbi Decoder algorithms for a multi-core system are studied. New parallel Viterbi algorithms for decoding convolutional codes are proposed based on tail biting trellises. The performances of the new algorithms are first evaluated by MATLAB and then Eagle (E-UTRA algorithms for LTE) link level simulations where the optimal parameter settings are obtained based on various simulations. One of the algorithms is proposed for implementation in the product due to its good BLER performance and low implementation complexity. The new parallel algorithm is then implemented on target DSPs for Ericsson internal multi-core system to decode the PUSCH (Physical Uplink Shared Channel) CQI (Channel Quality Indicator) in LTE (Long Term Evolution). And the performance of the new algorithm in the real multi-core system is compared against the current implementation regarding both cycle and memory consumption. As a fast decoder, the proposed parallel Viterbi decoder is computationally efficient which reduces significantly the decoding latency and solves memory limitation problems on DSP.
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Yamazato, Takaya, Iwao Sasase, and Shinsaku Mori. "A New Viterbi Algorithm with Adaptive Path Reduction Method." IEICE, 1993. http://hdl.handle.net/2237/7839.

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Werling, Brett W. "A VHDL Implementation of the Soft Output Viterbi Algorithm." International Foundation for Telemetering, 2010. http://hdl.handle.net/10150/604276.

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ITC/USA 2010 Conference Proceedings / The Forty-Sixth Annual International Telemetering Conference and Technical Exhibition / October 25-28, 2010 / Town and Country Resort & Convention Center, San Diego, California
In this paper we present a VHDL implementation of the soft output Viterbi algorithm (SOVA). We discuss the usefulness of the SOVA in a serially concatenated convolutional code (SCCC) system. We explore various hardware design decisions along with their implications. Finally, we compare the simulated performance of the hardware implementation to a software reference model over an additive white Gaussian noise (AWGN) channel for several bit widths and traceback window lengths.
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Bull, Tristan. "Implementation of the Viterbi Algorithm Using Functional Programming Languages." International Foundation for Telemetering, 2009. http://hdl.handle.net/10150/606012.

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ITC/USA 2009 Conference Proceedings / The Forty-Fifth Annual International Telemetering Conference and Technical Exhibition / October 26-29, 2009 / Riviera Hotel & Convention Center, Las Vegas, Nevada
In this paper, we present an implementation of the Viterbi algorithm using the functional programming language Haskell. We begin with a description of the functional implementation of the algorithm. Included are aspects of functional programming that must be considered when implementing the Viterbi algorithm as well as properties of Haskell that can be used to simplify or optimize the algorithm. Finally, we evaluate the performance of the Viterbi algorithm implemented in Haskell.
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Alam, Daniel. "Coded SOQPSK-TG Using the Soft Output Viterbi Algorithm." International Foundation for Telemetering, 2009. http://hdl.handle.net/10150/606121.

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ITC/USA 2009 Conference Proceedings / The Forty-Fifth Annual International Telemetering Conference and Technical Exhibition / October 26-29, 2009 / Riviera Hotel & Convention Center, Las Vegas, Nevada
In this paper we present a system-level description of a serially concatenated convolutional coding scheme for shaped offset quadrature phase shift keying, telemetry group (SOQPSK-TG). Our paper describes the operation of various system modules. In addition, implementation details and references for each module in the system are provided. The modified Soft Output Viterbi Algorithm (SOVA) is employed for decoding inner and outer convolutional codes. The modified SOVA possess strong performance and low-complexity cost. The comparison of the modified (SOVA) and Max-Log-maximum a posteriori (MAP) decoding algorithm is presented. The SOVA after a simple modification displays the same performance as Max-Log-MAP algorithm, which is demonstrated by the simulation results. The advantage of the simple implementation of the modified SOVA makes it superior to Max-Log-MAP for our purposes.
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Cui, Xiaoxiao. "MODIFIED VITERBI DECODING ALGORITHM FOR CIRCULAR TRELLIS-CODED MODULATION." Ohio University / OhioLINK, 2000. http://rave.ohiolink.edu/etdc/view?acc_num=ohiou1171649965.

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Lavin, Christopher. "THE IMPLEMENTATION OF AN IRREGULAR VITERBI TRELLIS DECODER." International Foundation for Telemetering, 2007. http://hdl.handle.net/10150/604495.

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ITC/USA 2007 Conference Proceedings / The Forty-Third Annual International Telemetering Conference and Technical Exhibition / October 22-25, 2007 / Riviera Hotel & Convention Center, Las Vegas, Nevada
The Viterbi algorithm has uses for both the decoding of convolutional codes and the detection of signals distorted by intersymbol interference (ISI). The operation of these processes is characterized by a trellis. An ARTM Tier-1 space-time coded telemetry receiver required the use of an irregular Viterbi trellis decoder to solve the dual antenna problem. The nature of the solution requires the trellis to deviate from conventional trellis structure and become time-varying. This paper explores the architectural challenges of such a trellis and presents a solution using a modified systolic array allowing the trellis to be realized in hardware.
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Shanker, M. Ravi. "A parallel implementation of the A*-Viterbi Algorithm for speech recognition /." Thesis, McGill University, 1993. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=69682.

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The problem of speech recognition is one that lends itself to parallelization. A common method used for speech recognition is the Viterbi algorithm. Unfortunately, this method is computationally expensive for large vocabularies. A new two pass method has been proposed, using the Viterbi algorithm as the first pass and the A$ sp *$ algorithm as the second, making use of the results of the Viterbi algorithm. Both these algorithms can be made faster by parallelizing them.
This thesis report describes the design and implementation of a parallel version of these algorithms on a BBN Butterfly multi-processor machine, and it also presents the outcome of the parallelization. It was observed that the parallel version of the Viterbi algorithm ran 8 times faster than the sequential version. This was observed for the recognition of both short words and long words. The A$ sp *$ algorithm, however, displayed different behaviour for short words as compared to long words. With a short word, the parallel version of the A$ sp *$ algorithm ran slightly slower than the sequential version; for a long word, it ran considerably faster than the sequential version--it was observed to run as much as 150 times faster.
This thesis comments on the results thus obtained, and attempts to explain the behaviour of the different parallel implementations.
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Books on the topic "Viterbi Algorithm"

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Turnbull, C. V. M. A coder-decoder chip using the viterbi algorithm. Manchester: University ofManchester, Department of Computer Science, 1995.

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Couble, K. A coder-decoder chip using the viterbi algorithm. Manchester: University of Manchester,Department of Computer Science, 1995.

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Feygin, G. Survivor sequence memory management in Viterbi Decoders. Toronto: Computer Systems Research Institute, University of Toronto, 1991.

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Lin, Shu. On decoding of multi-level MPSK modulation codes. Honululu, Hawaii: Dept. of Electrical Engineering, University of Hawaii at Manoa, 1990.

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University of Hawaii at Manoa. Dept. of Electrical Engineering. and Goddard Space Flight Center, eds. On decoding of multi-level MPSK modulation codes. Honululu, Hawaii: Dept. of Electrical Engineering, University of Hawaii at Manoa, 1990.

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Shu, Lin. On decoding of multi-level MPSK modulation codes. Honululu, Hawaii: Dept. of Electrical Engineering, University of Hawaii at Manoa, 1990.

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Eshraghi, Aria. A reduced complexity squaring function for the Viterbi algorithm. 1992.

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Book chapters on the topic "Viterbi Algorithm"

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Lagoudakis, Michail G., Thomas Zeugmann, and Claude Sammut. "Viterbi Algorithm." In Encyclopedia of Machine Learning, 1025. Boston, MA: Springer US, 2011. http://dx.doi.org/10.1007/978-0-387-30164-8_878.

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Wu, Jun. "Andrew Viterbi and the Viterbi algorithm." In The Beauty of Mathematics in Computer Science, 197–205. Boca Raton, FL : Taylor & Francis Group, 2019.: Chapman and Hall/CRC, 2018. http://dx.doi.org/10.1201/9781315169491-25.

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van Alphen, Paul, and Jeroen Döll. "Keyword Propagation Viterbi Algorithm." In Speech Recognition and Coding, 248–51. Berlin, Heidelberg: Springer Berlin Heidelberg, 1995. http://dx.doi.org/10.1007/978-3-642-57745-1_33.

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De Boom, Cedric, Jasper De Bock, Arthur Van Camp, and Gert de Cooman. "Robustifying the Viterbi Algorithm." In Probabilistic Graphical Models, 160–75. Cham: Springer International Publishing, 2014. http://dx.doi.org/10.1007/978-3-319-11433-0_11.

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Ivaniš, Predrag, and Dušan Drajić. "Convolutional Codes and Viterbi Algorithm." In Information Theory and Coding - Solved Problems, 327–83. Cham: Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-49370-1_7.

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Chowdhury, Rezaul, Pramod Ganapathi, Vivek Pradhan, Jesmin Jahan Tithi, and Yunpeng Xiao. "An Efficient Cache-oblivious Parallel Viterbi Algorithm." In Euro-Par 2016: Parallel Processing, 574–87. Cham: Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-43659-3_42.

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Mazurek, Przemysław. "Viterbi Algorithm for Noise Line Following Robots." In Advances in Intelligent Systems and Computing, 111–18. Cham: Springer International Publishing, 2015. http://dx.doi.org/10.1007/978-3-319-10662-5_14.

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Matczak, Grzegorz, and Przemysław Mazurek. "Adjustment of Viterbi Algorithm for Line Following Robots." In Image Processing and Communications Challenges 7, 159–66. Cham: Springer International Publishing, 2015. http://dx.doi.org/10.1007/978-3-319-23814-2_19.

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Suvitha, D., M. Vijayalakshmi, and P. M. Mohideen Sameer. "Traffic Prediction Using Viterbi Algorithm in Machine Learning Approach." In Communications in Computer and Information Science, 323–33. Singapore: Springer Singapore, 2018. http://dx.doi.org/10.1007/978-981-10-8657-1_25.

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Mazurek, Przemysław. "Directional Filter and the Viterbi Algorithm for Line Following Robots." In Computer Vision and Graphics, 428–35. Cham: Springer International Publishing, 2014. http://dx.doi.org/10.1007/978-3-319-11331-9_51.

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Conference papers on the topic "Viterbi Algorithm"

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Pulford, G. "The Viterbi algorithm." In IEE Seminar on Target Tracking: Algorithms and Applications. IEE, 2006. http://dx.doi.org/10.1049/ic:20060556.

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Schnall-Levin, Michael, Leonid Chindelevitch, and Bonnie Berger. "Inverting the Viterbi algorithm." In the 25th international conference. New York, New York, USA: ACM Press, 2008. http://dx.doi.org/10.1145/1390156.1390270.

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Bobbin, Jason. "An incremental viterbi algorithm." In Sixth International Conference on Machine Learning and Applications (ICMLA 2007). IEEE, 2007. http://dx.doi.org/10.1109/icmla.2007.49.

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Kerner, M., and O. Amrani. "Viterbi algorithm motives in turbo decoding." In IEEE Information Theory Workshop, 2005. IEEE, 2005. http://dx.doi.org/10.1109/itw.2005.1531865.

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Lee, Jin, and Sin-Chong Park. "MIMO Detector Based on Viterbi Algorithm." In 2007 IEEE Workshop on Signal Processing Systems. IEEE, 2007. http://dx.doi.org/10.1109/sips.2007.4387528.

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Ji, T., and W. E. Stark. "Modified Viterbi algorithm for predictive TCQ." In Proceedings DCC'99 Data Compression Conference (Cat. No. PR00096). IEEE, 1999. http://dx.doi.org/10.1109/dcc.1999.785689.

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Bongiovanni, Wilson, Adilson E. Guelfi, Elvis Pontes, A. A. A. Silva, Fen Zhou, and Sergio Takeo Kofuji. "Viterbi algorithm for detecting DDoS attacks." In 2015 IEEE 40th Conference on Local Computer Networks (LCN). IEEE, 2015. http://dx.doi.org/10.1109/lcn.2015.7366308.

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Haroun, Mohamed, and Sebastien Roy. "Adaptive block-length partitioned Viterbi algorithm." In 2015 IEEE 14th Canadian Workshop on Information Theory (CWIT). IEEE, 2015. http://dx.doi.org/10.1109/cwit.2015.7255164.

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Pollara, Fabrizio. "Concurrent Viterbi Algorithm With Trace-Back." In 30th Annual Technical Symposium, edited by Jeffrey M. Speiser. SPIE, 1986. http://dx.doi.org/10.1117/12.936894.

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Hu, Wei, Yimin Zhang, Qian Diao, and Shan Huang. "An efficient viterbi algorithm on DBNs." In 8th European Conference on Speech Communication and Technology (Eurospeech 2003). ISCA: ISCA, 2003. http://dx.doi.org/10.21437/eurospeech.2003-694.

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