Academic literature on the topic 'UPI SYSTEM'

This thesis explores if there is a connection between municipal demographics and how often the municipality involves users with disability in the development of its online services. The thesis derives its theory from previous studies on user involvement and participation (UPI),  e-government development and county bureaucracy. The method is quantitative, with data gathering through surveys aimed at municipality representatives as well as downloaded from Statistiska Centralbyrån. The analysis consists of statistical methods and tests of analysis using the software SPSS. The result is analyzed by being compared to previous studies to find explanations for any existing relationships. The thesis has found some correlation between the size of a county’s population and its user involvement, when developing public digital services. The thesis has also found some correlation between a county’s population size and how often they involve users with disability. Furthermore, the thesis has found some correlation between the mean of age of a county’s population and how often they involve users with disability. The study also shows a lack of awareness of the importance of user involvement. One explanation for the findings could be the bureaucracy that controls the municipal finances.<br>Uppsatsen undersöker om det finns ett samband mellan kommundemografi och hur ofta kommunerna involverar användare med funktionsnedsättning i utvecklingen av sina webbtjänster. Uppsatsen utgår ifrån tidigare forskning på användarinvolvering och utveckling av offentliga tjänster samt tar avstamp i principer och lagrum för kommunalt styre. Tillvägagångssättet är kvantitativt, med datainsamling genom enkätstudie riktad till kommunrepresentanter vilket kompletteras med demografisk data hämtat från Statistiska Centralbyrån. Analys baseras på statistiska analysmetoder och tester utförda i SPSS, varpå resultaten analyseras utifrån tidigare forskning för att finna förklaring till olika samband.  Uppsatsens resultat påvisar viss korrelation mellan kommunal populationsstorlek och generell användarinvolvering i kommunens utveckling av digitala offentliga tjänster. Resultatet påvisar även viss korrelation mellan kommuners populationsstorlek och användarinvolvering av individer med funktionsnedsättning. Ytterligare ett samband som påvisas är korrelation mellan genomsnittlig ålder i en kommunpopulation och kommunens användarinvolvering av individer med funktionsnedsättning. Författarna har även funnit en viss okunskap för behovet av användarinvolvering och att den rådande finansieringsprincipen som gäller i Sverige kan vara ett par av förklaringarna bakom de identifierade sambanden.

Theme of the Master's thesis is issue of backup power units and its attributes. There is also complete proposal of UPS power unit which can be used to control and monitor backup batteries. Power supply is fully controlled via Ethernet interface using TCI/IP protocol. The other chapter describes complete development of TCI/IP GSM unit which can be used for communication interface between GSM and Ethernet protocol. UPS and GSM modules are developed in details. The Master.s thesis includes all needed information for HW unit development and also for controlling software as well. Universal solution of the modules allows number possibilities of further development.

Syftet med detta examensarbete var att beräkna vad det kostar att ha UPS-kraft (Uninterruptible Power Supply). Arbetet utfördes för Västfastigheter på Södra Älvsborgs Sjukhus (SÄS) i Borås. Studien utfördes på en UPS i drift i byggnad 7. UPS: en i denna byggnad har 10 kVA kapacitet och är av dubbelkonverterande typ. Batterier av Ni-Cd (Nickel-Kadmium) typ används till backup med UPS: en. UPS av dubbelkonverterande typ är känd för att skapa mycket övertoner, men är fördelaktig för dess skyddande förmåga mot spänningsspikar.Mätningar har gjorts för att beräkna kostnadsberäkningarna. Ytterligare hjälp har fåtts i form av räkningar och UPS-leverantörer (Ups-teknik och Eurotech AB).<br>Uppsatsnivå: C

Thesis (MScEng (Electrical and Electronic Engineering))--University of Stellenbosch, 2011.<br>ENGLISH ABSTRACT: The digital control of UPS systems has been difficult in the past due to a lack of DSP technology. It was for this reason not possible to establishing the necessary control to regulate the voltages and currents of the UPS systems. Recent advances in DSP technology have however provided the means of establishing central control of the UPS system as well as incorporating more complex closed-loop control algorithms by utilising a single floating-point DSP. Closed-loop control strategies are investigated and the central control of a line-interactive UPS is established in this study. Both the status of the physical system as well as various system parameters are controlled. The system both regulates and charges the storage batteries when the main utility supply is maintained. In the event that the utility fails, the converter instantaneously changes power flow towards the load with the aim of maintaining an uninterrupted voltage supply. Several closed-loop deadbeat based control strategies are investigated for the regulation of the inductor current. A solution for the regulation of the DC-link is also developed and implemented. Furthermore, an intensive study is done on the regulation of the voltage supplied to the load in the event that the utility supply fails. The investigation is initially approached by considering classical control theory. Although these control strategies provided sufficient results, a predictive strategy that is based on the physical conditions of the switching converter is finally investigated to establish closed loop control of the output voltage. This resulted in a high-bandwidth voltage controller capable of maintaining control under a wide-array of load conditions.<br>AFRIKAANSE OPSOMMING: Die digitale beheer van UPS stelsels was moeilik in the verlede as gevolg van 'n gebrek aan DSP tegnologie. Dit was vir hierdie rede nie moontlik om beheer te kon bewerkstelling ten einde die spannings and strome in the UPS stelsels te kon reguleer nie. Onlangse vordering in DSP tegnologie het egter dit moontlik gemaak om sentrale beheer van die UPS stelsel te bewerkstellig sowel as om meer komplekse geslote lus beheer algoritmes te inkorporeer met behulp van 'n enkele DSP. Geslote lus beheer strategiëe word ondersoek en die sentrale beheer van die line-interaktiewe UPS word bewerkstellig in hierdie studie. Beide die huidige toestand van die fisiese stelsel sowel as die verskeie parameters word beheer. Die stelsel beide laai en reguleer die batterye terwyl die hooftoevoer onderhou word. In die geval dat die hooftoevoer faal, word die omsetter se rigting van drywingsvloei verander om die las te voorsien van 'n ononderbroke spannings toevoer. Verskeie geslote-lus “deadbeat” beheer strategiëe word ondersoek vir die regulasie van die induktor stroom. 'n Oplossing vir die regulasie van die GS-koppervlak word ook ontwikkel en geïmplementeer. Verder word 'n intensiewe studie gedoen op regulasie van die spanning wat aan die las gevoer word in die geval dat die hooftoevoer faal. Hierdie ondersoek word aanvanklik benader deur klassieke beheer teorie te bestudeer. Alhoewel hierdie beheer strategiëe voldoene resultate gebied het, was 'n voorspel beheerstrategie gebaseer op die fisiese toestand van die omsetter finaal ondersoek. Die resultaat is 'n hoë-bandwydte spannings beheerder wat daartoe instaat is om beheer te handhaaf onder 'n verskeidenheid van lastoestande.

With the increased usage of electrical equipment for various applications, the demand for quality power apart from continuous power availability has increased and hence requires the development of appropriate power conditioning system. A major factor during development of these systems is the requirement that they remain environment-friendly. This cannot be realized using the conventional systems as they use batteries and/or engine generators. Among various viable technologies, fuel cells have emerged as one of the most promising sources for both portable and stationary applications. In this thesis, a new battery less UPS system configuration powered by fuel cell is discussed. The proposed topology utilizes a standard offline UPS module and the battery is replaced by a supercapacitor. The system operation is such that the supercapacitor bank is sized to support startup and load transients and steady state power is supplied by the fuel cell. Further, the fuel cell runs continuously to supply 10% power in steady state. In case of power outage, it is shown that the startup time for fuel cell is reduced and the supercapacitor bank supplies power till the fuel cell ramps up from supplying 10% load to 100% load. A detailed design example is presented for a 200W/350VA 1- phase UPS system to meet the requirements of a critical load. The equivalent circuit and hence the terminal behavior of the fuel cell and the supercapacitor are considered in the analysis and design of the system for a stable operation over a wide range. The steady state and transient state analysis were used for stability verification. Hence, from the tests such as step load changes and response time measurements, the non-linear model of supercapacitor was verified. Temperature rise and fuel consumption data were measured and the advantages of having a hybrid source (supercapacitor in parallel with fuel cell) over just a standalone fuel cell source were shown. Finally, the transfer times for the proposed UPS system and the battery based UPS system were measured and were found to be satisfactory. Overall, the proposed system was found to satisfy the required performance specifications.

Asymmetric multi-cores (AMCs) are a successful architectural solution for both mobile devices and supercomputers. These architectures combine different types of processing cores designed at different performance and power optimization points, thus exposing a performance-power trade-off. By maintaining two types of cores, AMCs are able to provide high performance under the facility power budget. However, there are significant challenges when using AMCs such as scheduling and load balancing. This thesis initially explores the potential of AMCs when executing current HPC applications and searches for the most appropriate execution model. Specifically we evaluate several execution models on an Arm big.LITTLE AMC using the PARSEC benchmark suite that includes representative HPC applications. We compare schedulers at the user, OS and runtime system levels, using both static and dynamic options and multiple configurations, and assess the impact of these options on the well-known problem of balancing the load across AMCs. Our results demonstrate that scheduling is more effective when it takes place in the runtime system as it improves the user-level scheduling by 23%, while the heterogeneous-aware OS scheduling solution improves the user-level scheduling by 10%. Following this outcome, this thesis focuses on increasing performance of AMC systems by improving scheduling in the runtime system level. Scheduling in the runtime system level is provided by the use of task-based parallel programming models. These programming models offer programming flexibility as they consist of an interface and a runtime system to manage the underlying resources and threads. In this thesis we improve scheduling with task-based programming models by providing three novel task schedulers for AMCs. These dynamic scheduling policies reduce total execution time either by detecting the longest or the critical path of the dynamic task dependency graph of the application. They use dynamic scheduling and information discoverable during execution, fact that makes them implementable and functional without the need of off-line profiling. In our evaluation we compare these scheduling approaches with an existing state-of the art heterogeneous scheduler and we track their improvement over a FIFO baseline scheduler. We show that the heterogeneous schedulers improve the baseline by up to 1.45x on a real 8-core AMC and up to 2.1x on a simulated 32-core AMC. Another enhancement we provide in task-based programming models is the adaptability to fine grained parallelism. The increasing number of cores on modern CMPs is pushing research towards the use of fine grained workloads, which is an important challenge for task-based programming models. Our study makes the observation that task creation becomes a bottleneck when executing fine grained workloads with task-based programming models. As the number of cores increases, the time spent generating tasks is becoming more critical to the entire execution. To overcome this issue, we propose TaskGenX. TaskGenX minimizes task creation overheads and relies both on the runtime system and a dedicated hardware. On the runtime system side, TaskGenX decouples the task creation from the other runtime activities. It then transfers this part of the runtime to a specialized hardware. From our evaluation using 11 HPC workloads on both symmetric and AMC systems, we obtain performance improvements up to 15x, averaging to 3.1x over the baseline. Finally, this thesis presents a showcase for a real-time CPU scheduler with the goal to increase the frames per second (FPS) of the game-play on mobile devices with AMC systems. We design and implement the RTS scheduler in the Android framework. RTS provides an efficient scheduling policy that takes into account the current temperature of the system to perform task migration. RTS solution increases the median FPS of the baseline mechanisms by up to 7.5% and at the same time it maintains temperature stable.<br>Los procesadores multinúcleos asimétricos (AMC) son una solución arquitectónica exitosa para dispositivos móviles y supercomputadores. Estas arquitecturas combinan diferentes tipos de núcleos de procesamiento diseñados con diferentes propiedades de rendimiento y potencia. Al mantener dos o más tipos de núcleos, los AMCs pueden proporcionar un alto rendimiento con un consumo bajo de energía de las infraestructuras. Sin embargo, existen importantes desafíos al usar los AMC, como la programación y el equilibrio de carga. Esta tesis explora inicialmente el potencial de los AMC al ejecutar aplicaciones actuales de Computacion de Alto Rendimiento (HPC) y busca el modelo de ejecución más apropiado para ellas. Específicamente evaluamos varios modelos de ejecución en un procesador asimétrico Arm big.LITTLE utilizando las aplicaciones PARSEC que son aplicaciones representativas de HPC. En este trabajo se compara la programación en los niveles de usuario, sistema operativo y librería y evaluamos el impacto de estas opciones en el conocido problema de equilibrar la carga entre los AMCs. Nuestros resultados demuestran que la programación es más efectiva cuando se lleva a cabo en el nivel del runtime, ya que mejora la programación del nivel de usuario en un 23%, mientras que la solución de programación del sistema operativo heterogéneo mejora la programación del nivel de usuario en un 10%. Siguiendo este resultado, esta tesis se centra en aumentar el rendimiento de los sistemas AMC mejorando la programación al nivel de librería. La programación en este nivel se proporciona mediante el uso de Modelos de Programación Paralelos Basados en Tareas (MPBT). Estos modelos de programación ofrecen flexibilidad de programación, ya que consisten en una interfaz y un runtime para administrar los recursos e hilos subyacentes. En esta tesis, mejoramos la programación con MPBT al proporcionar tres nuevos planificadores de tareas para AMCs. Estos planificadores dinámicos reducen el tiempo total de ejecución ya sea detectando la camino más largo o el camino crítico del grafo de dependencia de tareas de la aplicación, que es generado dinámicamente. En nuestra evaluación, comparamos estos planificadores con un planificador heterogéneo existente y demonstramos su mejora sobre un planificador FIFO. Mostramos que los planificadores heterogéneos mejoran el planificador FIFO en hasta 1.45x en un AMC real de 8 núcleos y hasta 2.1x en un AMC simulado de 32 núcleos. Otra contribución en los MPBT es la adaptabilidad al paralelismo de grano fino. El creciente número de núcleos en los chip multinúcleos modernos está empujando la investigación hacia el uso de cargas de trabajo de grano fino, que es un desafío importante para los MPBT. Nuestro estudio observa que la creación de tareas bloquea la ejecución con cargas de trabajo de grano fino con MPBT. Cuando el número de núcleos aumenta, el tiempo empleado en generar tareas pasa a ser más crítico para toda la ejecución. Nuestra solución es TaskGenX, que minimiza los costes de creación de tareas y se basa en una extensión del runtime y en un hardware dedicado. En el runtime, TaskGenX desacopla la creación de tareas de las otras actividades del runtime, ejecutando esta actividad en un hardware especializado. Evaluamos 11 aplicaciones de HPC con TaskGenX en sistemas simétricos y AMC y obtenemos mejoras de rendimiento de hasta 15x, con un promedio de 3.1x sobre la implementación de referencia. Finalmente, esta tesis presenta un planificador de CPU con el objetivo de aumentar los fotogramas por segundo (FPS) para juegos en dispositivos móviles con sistemas AMC. Diseñamos e implementamos el planificador de Real-Time Scheduler (RTS) en Android. El RTS proporciona una política de programación eficiente que tiene en cuenta la temperatura actual del sistema para realizar la migración de tareas. La solución RTS aumenta la FPS mediana de los mecanismos de referencia

The memory system is a significant contributor for most of the current challenges in computer architecture: application performance bottlenecks and operational costs in large data-centers as HPC supercomputers. With the advent of emerging memory technologies, the exploration for novel designs on the memory hierarchy for HPC systems is an open invitation for computer architecture researchers to improve and optimize current designs and deployments. System simulation is the preferred approach to perform architectural explorations due to the low cost to prototype hardware systems, acceptable performance estimates, and accurate energy consumption predictions. Despite the broad presence and extensive usage of system simulators, their validation is not standardized; either because the main purpose of the simulator is not meant to mimic real hardware, or because the design assumptions are too narrow on a particular computer architecture topic. This thesis provides the first steps for a systematic methodology to validate system simulators when compared to real systems. We unveil real-machine´s micro-architectural parameters through a set of specially crafted micro-benchmarks. The unveiled parameters are used to upgrade the simulation infrastructure in order to obtain higher accuracy in the simulation domain. To evaluate the accuracy on the simulation domain, we propose the retirement factor, an extension to a well-known application´s performance methodology. Our proposal provides a new metric to measure the impact simulator´s parameter-tuning when looking for the most accurate configuration. We further present the delay queue, a modification to the memory controller that imposes a configurable delay for all memory transactions that reach the main memory devices; evaluated using the retirement factor, the delay queue allows us to identify the sources of deviations between the simulator infrastructure and the real system. Memory accesses directly affect application performance, both in the real-world machine as well as in the simulation accuracy. From single-read access to a unique memory location up to simultaneous read/write operations to a single or multiple memory locations, HPC applications memory usage differs from workload to workload. A property that allows to glimpse on the application´s memory usage is the workload´s memory footprint. In this work, we found a link between HPC workload´s memory footprint and simulation performance. Actual trends on HPC data-center memory deployments and current HPC application’s memory footprint led us to envision an opportunity for emerging memory technologies to include them as part of the reliability support on HPC systems. Emerging memory technologies such as 3D-stacked DRAM are getting deployed in current HPC systems but in limited quantities in comparison with standard DRAM storage making them suitable to use for low memory footprint HPC applications. We exploit and evaluate this characteristic enabling a Checkpoint-Restart library to support a heterogeneous memory system deployed with an emerging memory technology. Our implementation imposes negligible overhead while offering a simple interface to allocate, manage, and migrate data sets between heterogeneous memory systems. Moreover, we showed that the usage of an emerging memory technology it is not a direct solution to performance bottlenecks; correct data placement and crafted code implementation are critical when comes to obtain the best computing performance. Overall, this thesis provides a technique for validating main memory system simulators when integrated in a simulation infrastructure and compared to real systems. In addition, we explored a link between the workload´s memory footprint and simulation performance on current HPC workloads. Finally, we enabled low memory footprint HPC applications with resilience support while transparently profiting from the usage of emerging memory deployments.<br>El sistema de memoria es el mayor contribuidor de los desafíos actuales en el campo de la arquitectura de ordenadores como lo son los cuellos de botella en el rendimiento de las aplicaciones, así como los costos operativos en los grandes centros de datos. Con la llegada de tecnologías emergentes de memoria, existe una invitación para que los investigadores mejoren y optimicen las implementaciones actuales con novedosos diseños en la jerarquía de memoria. La simulación de los ordenadores es el enfoque preferido para realizar exploraciones de arquitectura debido al bajo costo que representan frente a la realización de prototipos físicos, arrojando estimaciones de rendimiento aceptables con predicciones precisas. A pesar del amplio uso de simuladores de ordenadores, su validación no está estandarizada ya sea porque el propósito principal del simulador no es imitar al sistema real o porque las suposiciones de diseño son demasiado específicas. Esta tesis proporciona los primeros pasos hacia una metodología sistemática para validar simuladores de ordenadores cuando son comparados con sistemas reales. Primero se descubren los parámetros de microarquitectura en la máquina real a través de un conjunto de micro-pruebas diseñadas para actualizar la infraestructura de simulación con el fin de mejorar la precisión en el dominio de la simulación. Para evaluar la precisión de la simulación, proponemos "el factor de retiro", una extensión a una conocida herramienta para medir el rendimiento de las aplicaciones, pero enfocada al impacto del ajuste de parámetros en el simulador. Además, presentamos "la cola de retardo", una modificación virtual al controlador de memoria que agrega un retraso configurable a todas las transacciones de memoria que alcanzan la memoria principal. Usando el factor de retiro, la cola de retraso nos permite identificar el origen de las desviaciones entre la infraestructura del simulador y el sistema real. Todos los accesos de memoria afectan directamente el rendimiento de la aplicación. Desde el acceso de lectura a una única localidad memoria hasta operaciones simultáneas de lectura/escritura a una o varias localidades de memoria, una propiedad que permite reflejar el uso de memoria de la aplicación es su "huella de memoria". En esta tesis encontramos un vínculo entre la huella de memoria de las aplicaciones de alto desempeño y su rendimiento en simulación. Las tecnologías de memoria emergentes se están implementando en sistemas de alto desempeño en cantidades limitadas en comparación con la memoria principal haciéndolas adecuadas para su uso en aplicaciones con baja huella de memoria. En este trabajo, habilitamos y evaluamos el uso de un sistema de memoria heterogéneo basado en un sistema emergente de memoria. Nuestra implementación agrega una carga despreciable al mismo tiempo que ofrece una interfaz simple para ubicar, administrar y migrar datos entre sistemas de memoria heterogéneos. Además, demostramos que el uso de una tecnología de memoria emergente no es una solución directa a los cuellos de botella en el desempeño. La implementación es fundamental a la hora de obtener el mejor rendimiento ya sea ubicando correctamente los datos, o bien diseñando código especializado. En general, esta tesis proporciona una técnica para validar los simuladores respecto al sistema de memoria principal cuando se integra en una infraestructura de simulación y se compara con sistemas reales. Además, exploramos un vínculo entre la huella de memoria de la carga de trabajo y el rendimiento de la simulación en cargas de trabajo de aplicaciones de alto desempeño. Finalmente, habilitamos aplicaciones de alto desempeño con soporte de resiliencia mientras que se benefician de manera transparente con el uso de un sistema de memoria emergente.<br>Arquitectura de Computadors

Solar Power and Uninterruptible Power Supply (UPS) are two technologies that are growing rapidly. The demand for solar energy is mainly driven by the trend towards cheaper solar cells, making it economically profitable for a larger range of applications. However, solar power has yet to reach grid parity in many geographical areas, which makes ways to reduce the cost of solar power systems important. This thesis investigates the possibility and potential economic synergies of combining solar power with UPS systems, which have been previously researched only from a purely technical point of view. This thesis instead evaluates the hypothesis that a combined solar and UPS system might save additional costs compared to regular grid-tied systems, even in a stable power grid. The primary reason is that on-line UPS systems rectifies and inverts all electricity, which means that solar energy can be delivered to the DC part of the UPS system instead of an AC grid, avoiding the installation of additional inverters in the solar power system. The study is divided into three parts. The first part is a computer simulation using MATLAB, which has an explorative method and aims to simulate a combined system before experimenting physically with it. The second part consists of experiments on a physical prototype system based on basic UPS and solar power components. The third part is an economical assessment of investment costs and energy balances, comparing two separate systems (UPS and solar power separate) to one combined (UPS &amp; solar power). The results from the prototype system show that adding solar power to an UPS system does not interfere with the UPS functionality in any major way, however for optimal performance some additional integration may be necessary. On the contrary, the additional power terminal that the solar panels constitute, can increase system performance during certain operational conditions. The result of the economic analysis shows that a combined system has potential for both a lower investment cost due to cheaper components and increased energy savings through lower conversion losses. The conclusion from the study is that a combined solar energy and UPS system is technically feasible. Furthermore, a combined system has clear economic advantages over two separate systems. This means that a combined system might be economically profitable even in situations where a separate system is not.<br>Solenergi och avbrottsfri kraftförsörjning (UPS) är två tekniker som växer snabbt. Efterfrågan på solenergi ökar huvudsakligen på grund av den snabba utvecklingen mot billigare solceller, vilket lett till att solenergi blivit lönsamt i en större mängd applikationer. I många områden är solenergi dock fortfarande inte kostnadsmässigt konkurrenskraftigt jämfört med traditionella energikällor, vilket gör en fortsatt sänkning av kostnaderna för solenergi till en viktig fråga för solenergiindustrin. Detta examensarbete har som syfte att undersöka om det är tekniskt möjligt att kombinera solenergi med UPS-system samt potentialen för ekonomiska synergier med denna kombination. Tidigare forskning inom området har endast undersökt denna kombination från en rent teknisk synvinkel. Detta examensarbete driver istället hypotesen att ett kombinerat solenergi- och UPS-system kan leda till större kostnadsbesparingar jämfört med ett traditionellt nätanslutet solenergisystem, även i ett stabilt elnät som i Sverige. En on-line UPS skyddar en känslig last genom att kontinuerligt likrikta och sedan åter växelrikta inkommande ström för att därmed både isolera lasten från nätet samt höja strömkvalitén. I UPS-systemet finns därmed en likströmsdel dit solpanelerna direkt kan kopplas istället för att skicka den genererade solenergin ut på elnätet. Därmed undviks inköp och installation av sol-växelriktare i solenergisystemet. Studien är uppdelad i tre delar. Första delen är en datorsimulering i MATLAB och syftar till att explorativt undersöka det kombinerade systemet för en optimerad design innan fysiska experiment utförs. Den andra delen av studien utgörs av experiment på ett fysiskt prototypsystem baserat på ett principiellt UPS- och solenergisystem. Den tredje delen av studien är en ekonomisk analys av både investeringskostnader och energibalanser som jämför ett kombinerat system (UPS &amp; sol) med två separata system (UPS &amp; sol separat). Resultaten från prototypsystemet visar att påkopplandet av solceller i en principiell UPS har mycket låg påverkan på UPS-systemets funktionalitet, samt att solcellerna som en extra energikälla under vissa driftförhållanden kan ha en positiv påverkan på UPS-systemet. För optimal prestanda kan dock en viss integration av systemen krävas.  Resultatet från den ekonomiska analysen visar att ett kombinerat system har potential att sänka investeringskostnaden genom billigare komponenter. Ett kombinerat system kan även leda till en högre energibesparing jämfört med ett nätanslutet solenergisystem eftersom konverteringsförlusterna i UPS-systemet sjunker i det kombinerade systemet. Slutsatsen av studierna är att ett kombinerat solenergi- och UPS-system är tekniskt möjligt. Dessutom finns betydande ekonomiska synergier med ett kombinerat system. Detta innebär att ett kombinerat system kan vara lönsamt även i fall där ett separat solelsystem inte är det.

Arbetet utfördes för Västfastigheter på Södra Älvsborgs Sjukhus i Borås. Studiengenomfördes i byggnad 13 där dagens UPS-aggregat börjar bli överbelastat. UPS:en i dennabyggnad har 120kVA kapacitet och försörjer med avbrottsfri kraft övriga avdelningar.Studien gjordes på följande avdelningar: Röntgenklinik, MAVA, KAVA, HIA, Dialys,Medicinavdelning 4, Dagkirurgi, Hudmottagning och AVC (Akutvårdcentral). Syftet meddetta examensarbete är att hitta orsakerna till att befintligt UPS-system är överbelastat ochvilka åtgärder som kan vidtas för att komma till rätta med problemet. Metoden har varit attgöra en grundlig inventering av lokalernas utformning samt en analys av personalenskunskaper i korrekt anslutning av el-förbrukande apparater.Resultatet visar att personalens kunskaper i hur man prioriterar rätt anslutning av elförbrukandeapparater är bristfällig, samt att förutsättningarna för att alltid kunna göra enkorrekt anslutning ibland saknas p.g.a. att korrekt vägguttag inte är åtkomlig.

The thesis deals with Uninterruptible Power Supply (UPS) and associated problems of backup power in case of unexpected outages of electricity. Start of work is dedicated to limitation of the electricity supplies, as well as their causes and consequences. Furthermore, brief history of UPS and subsequently distinguish between UPS’s architectures. There is also a description of the energy sources such as batteries, flywheels or fuel cells. Part of thesis describes security of electricity supply in health care facilities, including requirements for emergency power. The own design of UPS is described in the end.