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1

Hähnel, D., M. Oehme, M. Sarlija, A. Karmous, M. Schmid, J. Werner, O. Kirfel, I. Fischer, and J. Schulze. "Germanium vertical Tunneling Field-Effect Transistor." Solid-State Electronics 62, no. 1 (August 2011): 132–37. http://dx.doi.org/10.1016/j.sse.2011.03.011.

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2

Chou, S. Y., J. S. Harris, and R. F. W. Pease. "Lateral resonant tunneling field‐effect transistor." Applied Physics Letters 52, no. 23 (June 6, 1988): 1982–84. http://dx.doi.org/10.1063/1.99656.

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3

GHOREISHI, SEYED SALEH, KAMYAR SAGHAFI, and MOHAMMAD KAZEM MORAVVEJ-FARSHI. "A NOVEL GRAPHENE NANO-RIBBON FIELD EFFECT TRANSISTOR WITH SCHOTTKY TUNNELING DRAIN AND OHMIC TUNNELING SOURCE." Modern Physics Letters B 27, no. 26 (October 10, 2013): 1350189. http://dx.doi.org/10.1142/s0217984913501893.

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In this paper, we propose a novel tunneling graphene nanoribbon field effect transistor by modification of the conventional structure in a way that its drain high-doped extension part is replaced by lightly linear doped region. Then the proposed structure has a Schottky contact at the drain side. As the source contact is ohmic and the drain contact is Schottky, this structure is called Schottky–Ohmic tunneling graphene nanoribbon field effect transistor. Electrical behaviors of the proposed device are investigated by mode space nonequilibrium Green's function (NEGF) formalism in the ballistic limit. Simulation results show that without increasing transistor length, I OFF , I ON /I OFF , ambipolar behavior, delay time and PDP of the proposed structure improve, in comparison with the conventional tunneling graphene nanoribbon field effect transistor with the same dimension. Also subthreshold swing which is one of the evident characteristics of the tunneling FET is preserved in this structure.
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4

Oh, Jong Hyeok, and Yun Seop Yu. "Investigation of Tunneling Effect for a N-Type Feedback Field-Effect Transistor." Micromachines 13, no. 8 (August 16, 2022): 1329. http://dx.doi.org/10.3390/mi13081329.

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In this paper, the tunneling effect for a N-type feedback field-effect transistor (NFBFET) was investigated. The NFBFET has highly doped N-P junction in the channel region. When drain-source voltage is applied at the NFBFET, the aligning between conduction band of N-region and valence band of P-region occur, and band-to-band tunneling (BTBT) current can be formed on surface region of N-P junction in the channel of the NFBFET. When the doping concentration of gated-channel region (Ngc) is 4 × 1018 cm−3, the tunneling current makes off-currents increase approximately 104 times. As gate-source voltage is applied to NFBFET, the tunneling rate decreases owing to reducing of aligned region between bands by stronger gate-field. Eventually, the tunneling currents are vanished at the BTBT vanishing point before threshold voltage. When Ngc increase from 4 × 1018 to 6 × 1018, the tunneling current is generated not only at the surface region but also at the bulk region. Moreover, the tunneling length is shorter at the surface and bulk regions, and hence the leakage currents more increase. The BTBT vanishing point also increases due to increase of tunneling rates at surface and bulk region as Ngc increases.
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5

Capasso, Federico, Susanta Sen, and Alfred Y. Cho. "Negative transconductance resonant tunneling field‐effect transistor." Applied Physics Letters 51, no. 7 (August 17, 1987): 526–28. http://dx.doi.org/10.1063/1.98387.

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6

Ismail, K., D. A. Antoniadis, and H. I. Smith. "A planar resonant-tunneling field-effect transistor." IEEE Transactions on Electron Devices 36, no. 11 (November 1989): 2617. http://dx.doi.org/10.1109/16.43732.

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7

YOUSEFI, REZA, and SEYED SALEH GHOREYSHI. "NUMERICAL STUDY OF OHMIC-SCHOTTKY CARBON NANOTUBE FIELD EFFECT TRANSISTOR." Modern Physics Letters B 26, no. 15 (May 17, 2012): 1250096. http://dx.doi.org/10.1142/s0217984912500960.

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MOS-like transistors are one of the transistor topologies based on the carbon nanotubes. Some modified structures have been proposed to improve their electrical characteristics, such as band to band tunneling (BTBT) and switching behavior. Unfortunately, most of them increase the transistor length due to the use of additional regions. In this paper, we propose a structure that improves the OFF state and switching behavior of the transistor without increase in the transistor length. The proposed structure is constructed by a modification of the conventional structure in a way that its drain high-doped extension part is replaced by a lightly linear doped region. Then, the proposed structure has a Schottky contact at the drain side. With a nonequilibrium Green's function (NEGF) formalism, we have studied the characteristics of the proposed device and compared them with those obtained by a conventional structure with the same channel length. The results show that the proposed structure enjoys from better switching characteristics and OFF-state behavior, especially at low currents, in comparison to the main structure and, as a result, can be a good candidate for the low-power applications.
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8

Abdul-Kadir, Firas Natheer, Yasir Hashim, Muhammad Nazmus Shakib, and Faris Hassan Taha. "Electrical characterization of si nanowire GAA-TFET based on dimensions downscaling." International Journal of Electrical and Computer Engineering (IJECE) 11, no. 1 (February 1, 2021): 780. http://dx.doi.org/10.11591/ijece.v11i1.pp780-787.

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This research paper explains the effect of the dimensions of Gate-all-around Si nanowire tunneling field effect transistor (GAA Si-NW TFET) on ON/OFF current ratio, drain induces barrier lowering (DIBL), sub-threshold swing (SS), and threshold voltage (VT). These parameters are critical factors of the characteristics of tunnel field effect transistors. The Silvaco TCAD has been used to study the electrical characteristics of Si-NW TFET. Output (gate voltage-drain current) characteristics with channel dimensions were simulated. Results show that 50nm long nanowires with 9nm-18nm diameter and 3nm oxide thickness tend to have the best nanowire tunnel field effect transistor (Si-NW TFET) characteristics.
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9

Peng-Fei Guo, Li-Tao Yang, Yue Yang, Lu Fan, Gen-Quan Han, G. S. Samudra, and Yee-Chia Yeo. "Tunneling Field-Effect Transistor: Effect of Strain and Temperature on Tunneling Current." IEEE Electron Device Letters 30, no. 9 (September 2009): 981–83. http://dx.doi.org/10.1109/led.2009.2026296.

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10

Kim, Hyun Woo, and Daewoong Kwon. "Analysis on Tunnel Field-Effect Transistor with Asymmetric Spacer." Applied Sciences 10, no. 9 (April 27, 2020): 3054. http://dx.doi.org/10.3390/app10093054.

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Tunnel field-effect transistor (Tunnel FET) with asymmetric spacer is proposed to obtain high on-current and reduced inverter delay simultaneously. In order to analyze the proposed Tunnel FET, electrical characteristics are evaluated by technology computer-aided design (TCAD) simulations with calibrated tunneling model parameters. The impact of the spacer κ values on tunneling rate is investigated with the symmetric spacer. As the κ values of the spacer increase, the on-current becomes enhanced since tunneling probabilities are increased by the fringing field through the spacer. However, on the drain-side, that fringing field through the drain-side spacer increases ambipolar current and gate-to-drain capacitance, which degrades leakage property and switching response. Therefore, the drain-side low-κ spacer, which makes the low fringing field, is adapted asymmetrically with the source-side high-κ spacer. This asymmetric spacer results in the reduction of gate-to-drain capacitance and switching delay with the improved on-current induced by the source-side high-κ spacer.
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11

Pang, Chin-Sheng, Shu-Jen Han‬, and Zhihong Chen. "Steep slope carbon nanotube tunneling field-effect transistor." Carbon 180 (August 2021): 237–43. http://dx.doi.org/10.1016/j.carbon.2021.03.068.

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12

Cherik, Iman Chahardah, and Saeed Mohammadi. "Double quantum-well nanotube tunneling field-effect transistor." Materials Science in Semiconductor Processing 142 (May 2022): 106514. http://dx.doi.org/10.1016/j.mssp.2022.106514.

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13

Tucker, J. R., Chinlee Wang, and P. Scott Carney. "Silicon field‐effect transistor based on quantum tunneling." Applied Physics Letters 65, no. 5 (August 1994): 618–20. http://dx.doi.org/10.1063/1.112250.

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14

Kim, Hyun Woo, Sihyun Kim, Kitae Lee, Junil Lee, Byung-Gook Park, and Daewoong Kwon. "Demonstration of Tunneling Field-Effect Transistor Ternary Inverter." IEEE Transactions on Electron Devices 67, no. 10 (October 2020): 4541–44. http://dx.doi.org/10.1109/ted.2020.3017186.

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15

Yue Yang, Xin Tong, Li-Tao Yang, Peng-Fei Guo, Lu Fan, and Yee-Chia Yeo. "Tunneling Field-Effect Transistor: Capacitance Components and Modeling." IEEE Electron Device Letters 31, no. 7 (July 2010): 752–54. http://dx.doi.org/10.1109/led.2010.2047240.

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16

Wang, Ying, Wen-hao Zhang, Cheng-hao Yu, and Fei Cao. "Sandwich double gate vertical tunneling field-effect transistor." Superlattices and Microstructures 93 (May 2016): 138–43. http://dx.doi.org/10.1016/j.spmi.2016.03.026.

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17

Robbins, Matthew C., Prafful Golani, and Steven J. Koester. "Right-Angle Black Phosphorus Tunneling Field Effect Transistor." IEEE Electron Device Letters 40, no. 12 (December 2019): 1988–91. http://dx.doi.org/10.1109/led.2019.2946763.

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18

Yan, Xiao, Chunsen Liu, Chao Li, Wenzhong Bao, Shijin Ding, David Wei Zhang, and Peng Zhou. "Tunable SnSe2 /WSe2 Heterostructure Tunneling Field Effect Transistor." Small 13, no. 34 (July 17, 2017): 1701478. http://dx.doi.org/10.1002/smll.201701478.

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19

Guo, P., Y. Yang, Y. Cheng, G. Han, C. K. Chia, and Y. C. Yeo. "Tunneling Field-Effect Transistor (TFET) with Novel Ge/In0.53Ga0.47As Tunneling Junction." ECS Transactions 50, no. 9 (March 15, 2013): 971–78. http://dx.doi.org/10.1149/05009.0971ecst.

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20

Guo, Pengfei, Yue Yang, Yuanbing Cheng, Genquan Han, Jisheng Pan, Ivana, Zheng Zhang, et al. "Tunneling field-effect transistor with Ge/In0.53Ga0.47As heterostructure as tunneling junction." Journal of Applied Physics 113, no. 9 (March 7, 2013): 094502. http://dx.doi.org/10.1063/1.4794010.

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21

Han, Tao, Hongxia Liu, Shupeng Chen, Shulong Wang, and Wei Li. "A Doping-Less Tunnel Field-Effect Transistor with Si0.6Ge0.4 Heterojunction for the Improvement of the On–Off Current Ratio and Analog/RF Performance." Electronics 8, no. 5 (May 24, 2019): 574. http://dx.doi.org/10.3390/electronics8050574.

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In this paper, a novel doping-less tunneling field-effect transistor with Si0.6Ge0.4 heterojunction (H-DLTFET) is proposed using TCAD simulation. Unlike conventional doping-less tunneling field-effect transistors (DLTFETs), in H-DLTFETs, germanium and Si0.6Ge0.4 are used as source and channel materials, respectively, to provide higher carrier mobility and smaller tunneling barrier width. The energy band and charge carrier tunneling efficiency of the tunneling junction become steeper and higher as a result of the Si0.6Ge0.4 heterojunction. In addition, the effects of the source work function, gate oxide dielectric thickness, and germanium content on the performance of the H-DLTFET are analyzed systematically, and the below optimal device parameters are obtained. The simulation results show that the performance parameters of the H-DLTFET, such as the on-state current, on/off current ratio, output current, subthreshold swing, total gate capacitance, cutoff frequency, and gain bandwidth (GBW) product when Vd = 1 V and Vg = 2 V, are better than those of conventional silicon-based DLTFETs. Therefore, the H-DLTFET has better potential for use in ultra-low power devices.
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22

Mangel, Shai, Maxim Skripnik, Katharina Polyudov, Christian Dette, Tobias Wollandt, Paul Punke, Dongzhe Li, et al. "Electric-field control of single-molecule tautomerization." Physical Chemistry Chemical Physics 22, no. 11 (2020): 6370–75. http://dx.doi.org/10.1039/c9cp06868f.

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The combination of a graphene field-effect transistor and a gate-tunable scanning tunneling microscope enables independent control over the electric field. Using this method, we studied the electric field effect on the tautomerization reaction.
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23

Gupta, Abhinav, and Sneh Saurabh. "Novel attributes of a dual pocket tunnel field-effect transistor." Japanese Journal of Applied Physics 61, no. 3 (February 18, 2022): 035001. http://dx.doi.org/10.35848/1347-4065/ac3722.

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Abstract In this paper, we propose the application of a dual pocket adjacent to the source in a tunnel field effect transistor (TFET) to improve its electrical characteristics. Using two-dimensional device simulations, we demonstrate that if appropriate doping concentration and length are chosen for the dual pocket, then a sharp curvature is obtained in the energy bands at the onset of tunneling. Consequently, a smaller tunneling width and higher band-to-band tunneling are obtained in a dual pocket TFET (DP-TFET). We demonstrate that the proposed DP-TFET exhibits a 64% smaller average subthreshold swing (SS) compared to a conventional TFET and a 39% smaller average SS compared to a TFET in which a single fully depleted counter-doped pocket adjacent to the source is added. Moreover, the proposed technique of inserting a dual pocket is effective at lower supply voltage (V DD = 0.5 V). Therefore, we can obtain a high ON-current to OFF-current ratio at lower supply voltages and the proposed technique can be employed in future TFETs for low power applications.
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24

Najam, Faraz, and Yun Seop Yu. "Compact Trap-Assisted-Tunneling Model for Line Tunneling Field-Effect-Transistor Devices." Applied Sciences 10, no. 13 (June 28, 2020): 4475. http://dx.doi.org/10.3390/app10134475.

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Trap-assisted-tunneling (TAT) is a well-documented source of severe subthreshold degradation in tunneling field-effect-transistors (TFET). However, the literature lacks in numerical or compact TAT models applied to TFET devices. This work presents a compact formulation of the Schenk TAT model that is used to fit experimental drain-source current (Ids) versus gate-source voltage (Vgs) data of an L-shaped and line tunneling type TFET. The Schenk model incorporates material-dependent fundamental physical constants that play an important role in influencing the TAT generation (GTAT) including the lattice relaxation energy, Huang–Rhys factor, and the electro-optical frequency. This makes fitting any experimental data using the Schenk model physically relevant. The compact formulation of the Schenk TAT model involved solving the potential profile in the TFET and using that potential profile to calculate GTAT using the standard Schenk model. The GTAT was then approximated by the Gaussian distribution function for compact implementation. The model was compared against technology computer-aided design (TCAD) results and was found in reasonable agreement. The model was also used to fit an experimental device’s Ids–Vgs characteristics. The results, while not exactly fitting the experimental data, follow the general experimental Ids–Vgs trend reasonably well; the subthreshold slope was loosely similar to the experimental device. Additionally, the ON-current, especially to make a high drain-source bias model accurate, can be further improved by including effects such as electrostatic degradation and series resistance.
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25

Wan, J., C. Le Royer, A. Zaslavsky, and S. Cristoloveanu. "A tunneling field effect transistor model combining interband tunneling with channel transport." Journal of Applied Physics 110, no. 10 (November 15, 2011): 104503. http://dx.doi.org/10.1063/1.3658871.

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26

Vinter, B., and A. Tardella. "Tunneling transfer field‐effect transistor: A negative transconductance device." Applied Physics Letters 50, no. 7 (February 16, 1987): 410–12. http://dx.doi.org/10.1063/1.98186.

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27

Dubey, Prabhat Kumar, and Brajesh Kumar Kaushik. "T-Shaped III-V Heterojunction Tunneling Field-Effect Transistor." IEEE Transactions on Electron Devices 64, no. 8 (August 2017): 3120–25. http://dx.doi.org/10.1109/ted.2017.2715853.

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28

Britnell, L., R. V. Gorbachev, R. Jalil, B. D. Belle, F. Schedin, A. Mishchenko, T. Georgiou, et al. "Field-Effect Tunneling Transistor Based on Vertical Graphene Heterostructures." Science 335, no. 6071 (February 2, 2012): 947–50. http://dx.doi.org/10.1126/science.1218461.

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29

Chen, J., C. H. Yang, and R. A. Wilson. "Modeling of a new field‐effect resonant tunneling transistor." Journal of Applied Physics 71, no. 3 (February 1992): 1537–39. http://dx.doi.org/10.1063/1.351226.

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30

Takagi, Shinichi, Kimihiko Kato, and Mitsuru Takenaka. "Group IV Based Bi-Layer Tunneling Field Effect Transistor." ECS Transactions 93, no. 1 (October 22, 2019): 23–27. http://dx.doi.org/10.1149/09301.0023ecst.

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31

Zhao, Pei, Randall M. Feenstra, Gong Gu, and Debdeep Jena. "SymFET: A Proposed Symmetric Graphene Tunneling Field-Effect Transistor." IEEE Transactions on Electron Devices 60, no. 3 (March 2013): 951–57. http://dx.doi.org/10.1109/ted.2013.2238238.

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32

Ryzhii, Victor, Maxim Ryzhii, and Taiichi Otsuji. "Tunneling Current–Voltage Characteristics of Graphene Field-Effect Transistor." Applied Physics Express 1, no. 1 (December 28, 2007): 013001. http://dx.doi.org/10.1143/apex.1.013001.

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33

Agarwal, Sapan, James T. Teherani, Judy L. Hoyt, Dimitri A. Antoniadis, and Eli Yablonovitch. "Engineering the Electron–Hole Bilayer Tunneling Field-Effect Transistor." IEEE Transactions on Electron Devices 61, no. 5 (May 2014): 1599–606. http://dx.doi.org/10.1109/ted.2014.2312939.

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34

Cho, Min Su, Ra Hee Kwon, Jae Hwa Seo, Young Jun Yoon, Young In Jang, Chul-Ho Won, Jeong-Gil Kim, et al. "Electrical Performances of InN/GaN Tunneling Field-Effect Transistor." Journal of Nanoscience and Nanotechnology 17, no. 11 (November 1, 2017): 8355–59. http://dx.doi.org/10.1166/jnn.2017.15134.

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35

Salimian, Faranak, and Daryoosh Dideban. "A resonant tunneling field effect transistor utilizing silicene nanoribbon." AEU - International Journal of Electronics and Communications 110 (October 2019): 152841. http://dx.doi.org/10.1016/j.aeue.2019.152841.

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36

Lan, Yann-Wen, Carlos M. Torres, Shin-Hung Tsai, Xiaodan Zhu, Yumeng Shi, Ming-Yang Li, Lain-Jong Li, Wen-Kuan Yeh, and Kang L. Wang. "Atomic-Monolayer MoS2Band-to-Band Tunneling Field-Effect Transistor." Small 12, no. 41 (September 4, 2016): 5676–83. http://dx.doi.org/10.1002/smll.201601310.

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37

Song, Hyun-Dong, Hyeong-Sub Song, Sunil Babu Eadi, Hyun-Woong Choi, Ga-Won Lee, and Hi-Deok Lee. "Temperature Dependence of Low Frequency Noise in Silicon on Insulator Tunneling Field Effect Transistor." Journal of Nanoscience and Nanotechnology 20, no. 8 (August 1, 2020): 4699–703. http://dx.doi.org/10.1166/jnn.2020.17796.

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In this work, noise mechanism of a tunneling field-effect transistor (TFET) on a silicon-on-insulator substrate was studied as a function of temperature. The results show that the drain current and subthreshold slope increase with increase in temperature. This temperature dependence is likely caused by the generation of greater current flow owing to decreased silicon band gap and leakage. Further, the TFET noise decreases with increase in temperature. Therefore, the effective tunneling length between the source and the channel appears to decrease and Poole–Frenkel tunneling occurs.
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38

Juang, M. H., Y. S. Peng, J. L. Wang, D. C. Shye, C. C. Hwang, and S. L. Jang. "Submicron-meter polycrystalline-SiGe thin-film transistors with tunneling field-effect-transistor structure." Solid-State Electronics 54, no. 12 (December 2010): 1686–89. http://dx.doi.org/10.1016/j.sse.2010.08.009.

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39

Juang, Miin-Horng, P. S. Hu, and S. L. Jang. "Formation of polycrystalline-Si thin-film transistors with tunneling field-effect-transistor structure." Thin Solid Films 518, no. 14 (May 2010): 3978–81. http://dx.doi.org/10.1016/j.tsf.2009.11.017.

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40

Najam, Faraz, and Yun Seop Yu. "Compact Model for L-Shaped Tunnel Field-Effect Transistor Including the 2D Region." Applied Sciences 9, no. 18 (September 6, 2019): 3716. http://dx.doi.org/10.3390/app9183716.

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The L-shaped tunneling field-effect transistor (LTFET) is the only line-tunneling type of TFET to be experimentally demonstrated. To date, there is no literature available on the compact model of LTFET. In this paper, a compact model of LTFET is presented. LTFET has both one-dimensional (1D) and 2D band-to-band tunneling (BTBT) components. The 2D BTBT part dominates in the subthreshold region, whereas the 1D BTBT dominates at higher gate-source biases. The model consists of 1D and 2D BTBT models. The 2D BTBT model is based on the assumption that the electric field originating from the gate and terminating at the source edge is perfectly circular. Tunneling path length is obtained by calculating the distance along an electric field arc that runs from gate to source. The 1D BTBT model is based on a simultaneous solution of the 1D Poisson equation in source and channel regions. Expressions for electric field and potential obtained from integrating the Poisson equation in source and channel regions are solved simultaneously to find the surface potential. Once the surface potential is known, all the other unknown variables, including junction potential and source depletion length, can be calculated. Using the potential profile, tunneling lengths were found for both the source-to-channel BTBT regime, and channel-to-channel BTBT regime. The tunneling lengths were used to calculate the BTBT tunneling rate, and finally, the drain-source current as a function of gate-source, and drain-source bias was calculated. The model results were compared against technology computer-aided design (TCAD) simulation results and were found to be in reasonable agreement for a compact model.
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41

Sharma, Awanit, and Shyam Akashe. "Analyze the Tunneling Effect on Gate-All-Around Field Effect Transistor." International Journal of Advanced Science and Technology 63 (February 28, 2014): 9–22. http://dx.doi.org/10.14257/ijast.2014.63.02.

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42

Duan, Xiaoling, Jincheng Zhang, Jiabo Chen, Tao Zhang, Jiaduo Zhu, Zhiyu Lin, and Yue Hao. "High Performance Drain Engineered InGaN Heterostructure Tunnel Field Effect Transistor." Micromachines 10, no. 1 (January 21, 2019): 75. http://dx.doi.org/10.3390/mi10010075.

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A drain engineered InGaN heterostructure tunnel field effect transistor (TFET) is proposed and investigated by Silvaco Atlas simulation. This structure uses an additional metal on the drain region to modulate the energy band near the drain/channel interface in the drain regions, and increase the tunneling barrier for the flow of holes from the conduction band of the drain to the valence band of the channel region under negative gate bias for n-TFET, which induces the ambipolar current being reduced from 1.93 × 10−8 to 1.46 × 10−11 A/μm. In addition, polar InGaN heterostructure TFET having a polarization effect can adjust the energy band structure and achieve steep interband tunneling. The average subthreshold swing of the polar drain engineered heterostructure TFET (DE-HTFET) is reduced by 53.3% compared to that of the nonpolar DE-HTFET. Furthermore, ION increases 100% from 137 mA/mm of nonpolar DE-HTFET to 274 mA/mm of polar DE-HTFET.
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43

Hernandez, N., M. Cahay, J. Ludwick, T. Back, H. Hall, and J. O’Mara. "Physics based model of an AlGaN/GaN vacuum field effect transistor." Journal of Vacuum Science & Technology B 40, no. 5 (September 2022): 053201. http://dx.doi.org/10.1116/6.0001959.

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A vacuum field effect transistor (VacFET) is proposed that consists of a modification of a conventional AlGaN/GaN high electron mobility transistor to include a nanogap near the gate on either the source (cathode) or drain (anode) side of the device. The current flowing through the two-dimensional electron gas (2DEG) under the gate is obtained using a charge-control model, which is forced to be equal to the tunneling current across the nanogap. The latter is modeled using a modified version of Simmons tunneling theory of a metal–insulator–metal junction to include the effect of barrier lowering across the nanogap. When compared to other recently fabricated VacFETs, the proposed device has potential for much higher emission current densities and transconductance levels, of the order of several hundreds of mA/mm and tens of mS/mm, respectively. For similar material parameters and physical dimensions, the proposed VacFET has a turn-on voltage that depends on the location of the nanogap on either the source or drain side of the gate. It is shown that the current–voltage characteristics of VacFETs with a nanogap either on the drain or source side of the gate are highly sensitive to their physical parameters and biasing conditions, making them a very strong candidate for chemical or gas sensing applications. This is due to the sensitivity of the tunneling current to the effective barrier height and field enhancement factor of the nanogap.
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44

Hong, Jungmin, Jaewoong Park, Jeawon Lee, Jeonghun Ham, Kiron Park, and Jongwook Jeon. "Alpha Particle Effect on Multi-Nanosheet Tunneling Field-Effect Transistor at 3-nm Technology Node." Micromachines 10, no. 12 (December 4, 2019): 847. http://dx.doi.org/10.3390/mi10120847.

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The radiation effects on a multi-nanosheet tunneling-based field effect transistor (NS-TFET) were investigated for a 3-nm technology node using a three-dimensional (3D) technology computer-aided design (TCAD) simulator. An alpha particle was injected into a field effect transistor (FET), which resulted in a drain current fluctuation and caused the integrated circuit to malfunction as the result of a soft-error-rate (SER) issue. It was subsequently observed that radiation effects on NS-TFET were completely different from a conventional drift-diffusion (DD)-based FET. Unlike a conventional DD-based FET, when an alpha particle enters the source and channel areas in the current scenario, a larger drain current fluctuation occurs due to a tunneling mechanism between the source and the channel, and this has a significant effect on the drain current. In addition, as the temperature increases, the radiation effect increases as a result of a decrease in silicon bandgap energy and a resultant increase in band-to-band generation. Finally, the radiation effect was analyzed according to the energy of the alpha particle. These results can provide a guideline by which to design a robust integrated circuit for radiation that is totally different from the conventional DD-FET approach.
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45

Woodward, T. K., T. C. McGill, R. D. Burnham, and H. F. Chung. "Resonant tunneling field-effect transistors." Superlattices and Microstructures 4, no. 1 (January 1988): 1–9. http://dx.doi.org/10.1016/0749-6036(88)90257-1.

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46

Kim, HuiJung, Seongwook Choi, NakWon Yoo, SeungMan Rhee, Myoung Jin Lee, and Young June Park. "Analysis of a modified recessed active tunneling field-effect transistor." Japanese Journal of Applied Physics 55, no. 7 (June 9, 2016): 074201. http://dx.doi.org/10.7567/jjap.55.074201.

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47

YUN WOO, Sung, Young JUN YOON, Jae HWA SEO, Gwan MIN YOO, Seongjae CHO, and In MAN KANG. "InGaAs/Si Heterojunction Tunneling Field-Effect Transistor on Silicon Substrate." IEICE Transactions on Electronics E97.C, no. 7 (2014): 677–82. http://dx.doi.org/10.1587/transele.e97.c.677.

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48

Gundapaneni, Suresh, Aranya Goswami, Oves Badami, Ramya Cuduvally, Aniruddha Konar, Mohit Bajaj, and Kota V. R. M. Murali. "Tunneling-triggered bipolar action in junctionless tunnel field-effect transistor." Applied Physics Express 7, no. 12 (December 1, 2014): 124302. http://dx.doi.org/10.7567/apex.7.124302.

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49

Bala Kumar, S., Gyungseon Seol, and Jing Guo. "Modeling of a vertical tunneling graphene heterojunction field-effect transistor." Applied Physics Letters 101, no. 3 (July 16, 2012): 033503. http://dx.doi.org/10.1063/1.4737394.

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50

Kim, K. R., D. H. Kim, K. W. Song, G. Baek, H. H. Kim, J. I. Huh, J. D. Lee, and B. G. Park. "Silicon-Based Field-Induced Band-to-Band Tunneling Effect Transistor." IEEE Electron Device Letters 25, no. 6 (June 2004): 439–41. http://dx.doi.org/10.1109/led.2004.829668.

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