Relevant bibliographies by topics / True Random Number Generator (TRNG)

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Academic literature on the topic 'True Random Number Generator (TRNG)'

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Published: 25 May 2024

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Journal articles on the topic "True Random Number Generator (TRNG)"

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Xingyuan, Wang, Qin Xue, and Teng Lin. "A Novel True Random Number Generator Based on Mouse Movement and a One-Dimensional Chaotic Map." Mathematical Problems in Engineering 2012 (2012): 1–9. http://dx.doi.org/10.1155/2012/931802.

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We propose a novel true random number generator using mouse movement and a one-dimensional chaotic map. We utilize thex-coordinate of the mouse movement to be the length of an iteration segment of our TRNs and they-coordinate to be the initial value of this iteration segment. And, when it iterates, we perturb the parameter with the real value produced by the TRNG itself. And we find that the TRNG we proposed conquers several flaws of some former mouse-based TRNGs. At last we take experiments and test the randomness of our algorithm with the NIST statistical test suite; results illustrate that our TRNG is suitable to produce true random numbers (TRNs) on universal personal computers (PCs).
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Randa, Maulana, Mohammad Samie, and Ian K. Jennions. "Delay-Based True Random Number Generator in Sub-Nanomillimeter IoT Devices." Electronics 9, no. 5 (May 15, 2020): 817. http://dx.doi.org/10.3390/electronics9050817.

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True Random Number Generators (TRNGs) use physical phenomenon as their source of randomness. In electronics, one of the most popular structures to build a TRNG is constructed based on the circuits that form propagation delays, such as a ring oscillator, shift register, and routing paths. This type of TRNG has been well-researched within the current technology of electronics. However, in the future, where electronics will use sub-nano millimeter (nm) technology, the components become smaller and work on near-threshold voltage (NTV). This condition has an effect on the timing-critical circuit, as the distribution of the process variation becomes non-gaussian. Therefore, there is an urge to assess the behavior of the current delay-based TRNG system in sub-nm technology. In this paper, a model of TRNG implementation in sub-nm technology was created through the use of a specific Look-Up Table (LUT) in the Field-Programmable Gate Array (FPGA), known as SRL16E. The characterization of the TRNG was presented and it shows a promising result, in that the delay-based TRNG will work properly, with some constraints in sub-nm technology.
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Akashi, Nozomi, Kohei Nakajima, Mitsuru Shibayama, and Yasuo Kuniyoshi. "A mechanical true random number generator." New Journal of Physics 24, no. 1 (January 1, 2022): 013019. http://dx.doi.org/10.1088/1367-2630/ac45ca.

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Abstract Random number generation has become an indispensable part of information processing: it is essential for many numerical algorithms, security applications, and in securing fairness in everyday life. Random number generators (RNGs) find application in many devices, ranging from dice and roulette wheels, via computer algorithms, lasers to quantum systems, which inevitably capitalize on their physical dynamics at respective spatio-temporal scales. Herein, to the best of our knowledge, we propose the first mathematically proven true RNG (TRNG) based on a mechanical system, particularly the triple linkage of Thurston and Weeks. By using certain parameters, its free motion has been proven to be an Anosov flow, from which we can show that it has an exponential mixing property and structural stability. We contend that this mechanical Anosov flow can be used as a TRNG, which requires that the random number should be unpredictable, irreproducible, robust against the inevitable noise seen in physical implementations, and the resulting distribution’s controllability (an important consideration in practice). We investigate the proposed system’s properties both theoretically and numerically based on the above four perspectives. Further, we confirm that the random bits numerically generated pass the standard statistical tests for random bits.
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Prasannanjali, C. "Ring Oscillator Based True Random Number Generator." International Journal for Research in Applied Science and Engineering Technology 12, no. 2 (February 29, 2024): 276–83. http://dx.doi.org/10.22214/ijraset.2024.58320.

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Abstract: A true random number generator (TRNG), also known as a hardware random number generator (HRNG), does not use a computer algorithm. Instead, it uses an external unpredictable physical variable such as stochastic models to generate random numbers. Here it gathers data from random electronic signals. Then, the data is converted into digital form and any patterns registered are removed to make it random. This data is used to create random numbers. It is mainly used in Cryptographic Security, authentication, secure communications, e-commerce transactions, Digital Signatures etc. In Existing Method, LFSR based TRNGs generate pseudo random numbers. They produce sequences of bits that appear random but are deterministic and repeat after a certain number of cycles known as the period. They are easy to predict and are not suitable for high security applications. This project aim is to overcome such circumstances, we use TERO(Three Edge Ring Oscillator) based TRNG. Three edges are simultaneously injected by each inverting NAND stage with enable signal Run. These edges will have an identical mean period since they propagate through the same stages. The TERO generates an oscillating signal with a frequency determined by the delay of inverters. TDC (Time to Digital Converter) is used to precisely measure the time intervals between the rising edges of TEROs output signal. Then, it converts time intervals into digital values, effectively generating truly random numbers. Power consumption depends on factors like operating frequency and load capacitance. The Software used is Xilinx Vivado/Xilinx ISE Tools. Here the Proposed Method exquisitely balances Low design effort and resource consumption with high throughput and high randomness.
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Zong, Yi, Lihua Dong, and Xiaoxin Lu. "Entropy Model of Rosin Autonomous Boolean Network Digital True Random Number Generator." Electronics 13, no. 6 (March 20, 2024): 1140. http://dx.doi.org/10.3390/electronics13061140.

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A True Random Number Generator (TRNG) is an important component in cryptographic algorithms and protocols. The Rosin Autonomous Boolean Network (ABN) digital TRNG has been widely studied due to its nice properties, such as low energy consumption, high speed, strong platform portability, and strong randomness. However, there is still a lack of suitable entropy models to deduce the requirement of design parameters to ensure true randomness. The current model to evaluate the entropy of oscillator-based TRNGs is not applicable for Rosin ABN TRNGs due to low-frequency noise. This work presents a new, suitable stochastic model to evaluate the entropy of Rosin ABN TRNGs. Theoretical analysis and simulation experiments verify the correctness and the effectiveness of the model, and, finally, the appropriate sampling parameters for Rosin ABN TRNGs are given for sufficient entropy per random bit to ensure true randomness.
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Gupta, Ramji, Alpana Pandey, and R. K.Baghel. "Efficient design of chaos based 4 bit true random number generator on FPGA." International Journal of Engineering & Technology 7, no. 3 (August 22, 2018): 1783. http://dx.doi.org/10.14419/ijet.v7i3.16586.

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True random number generator is a basic building block of any modern secure communication and cryptography system. FPGA implementation of any system has a flexible architecture and low-cost test cycle. In this paper, we present an FPGA implementation of a high speed true random number generator based on chaos oscillator which gives optimize ratio of bit rate to area. The proposed generator is faster and more compact than the existing chaotic oscillator based TRNGs. The Experimental result shows that the proposed TRNG gives 1439 Mbps with optimizing the use of LUTs and registers. It is verified that the generator passes all the NIST SP 800-22 tests. The proposed TRNG is implemented in two FPGA families Nexus 4 (Artix 7) DDR XC7A100TCSG-1 and Basys 3 XC7A35T1CPG236C (Artix 7) using Xilinx Vivado v.2017.3 design suite.
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Nor Hashim, Noor Alia, Julius Teo Han Loong, Azrul Ghazali, and Fazrena Azlee Hamid. "Memristor based ring oscillators true random number generator with different window functions for applications in cryptography." Indonesian Journal of Electrical Engineering and Computer Science 14, no. 1 (April 1, 2019): 201. http://dx.doi.org/10.11591/ijeecs.v14.i1.pp201-209.

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<span>Cryptographic applications require numbers that are random and pseudorandom. Keys must be produced in a random manner in order to be used in common cryptosystems. Random or pseudorandom inputs at different terminals are also required in a lot of cryptographic protocols. For example, producing digital signatures using supporting quantities or in verification procedures that requires generating challenges. Random number generation is an important part of cryptography because there are flaws in random number generation that can be taken advantage by attackers that compromised encryption systems that are algorithmically secure. True random number generators (TRNGs) are the best in producing random numbers. This paper presents a True Random Number Generator that uses memristor based ring oscillators in the design. The designs are implemented in 0.18 µm complementary metal oxide semiconductor (CMOS) technology using LT SPICE IV. Different window functions for the memristor model was applied to the TRNG and compared. Statistical tests results of the output random numbers produced showed that the proposed TRNG design can produce random output regardless of the window function.</span>
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Khan, Mohammad Nasim Imtiaz, Chak Yuen Cheng, Sung Hao Lin, Abdullah Ash-Saki, and Swaroop Ghosh. "A Morphable Physically Unclonable Function and True Random Number Generator Using a Commercial Magnetic Memory." Journal of Low Power Electronics and Applications 11, no. 1 (January 14, 2021): 5. http://dx.doi.org/10.3390/jlpea11010005.

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We use commercial magnetic memory to realize morphable security primitives, a Physically Unclonable Function (PUF) and a True Random Number Generator (TRNG). The PUF realized by manipulating the write time and the TRNG is realized by tweaking the number of write pulses. Our analysis indicates that more than 75% bits in the PUF are unusable without any correction due to their inability to exhibit any randomness. We exploit temporal randomness of working columns to fix the unusable columns and write latency to fix the unusable rows during the enrollment. The intra-HD, inter-HD, energy, bandwidth and area of the proposed PUF are found to be 0, 46.25%, 0.14 pJ/bit, 0.34 Gbit/s and 0.385 μm2/bit (including peripherals) respectively. The proposed TRNG provides all possible outcomes with a standard deviation of 0.0062, correlation coefficient of 0.05 and an entropy of 0.95. The energy, bandwidth and area of the proposed TRNG is found to be 0.41 pJ/bit, 0.12 Gbit/s and 0.769 μm2/bit (including peripherals). The performance of the proposed TRNG has also been tested with NIST test suite. The proposed designs are compared with other magnetic PUFs and TRNGs from other literature.
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Lee, Kyungroul, and Manhee Lee. "True Random Number Generator (TRNG) Utilizing FM Radio Signals for Mobile and Embedded Devices in Multi-Access Edge Computing." Sensors 19, no. 19 (September 24, 2019): 4130. http://dx.doi.org/10.3390/s19194130.

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As transmissions of data between mobile and embedded devices in multi-access edge computing (MEC) increase, data must be protected, ensuring confidentiality and integrity. These issues are usually solved with cryptographic algorithms systems, which utilize a random number generator to create seeds and keys randomly. Their role in cryptography is so important that they need to be generated securely. In this paper, a true random number generator (TRNG) utilizing FM radio signals as a source is proposed. The proposed method can generate random numbers with high entropy, increased by at least 118% and up to 431% compared to existing generators.
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G, Anahita, Krishnapriya KPM, Shiva Prasad R, and Mohan Kumar N. "HD-Sign: Hardware Based Digital Signature Generation Using True Random Number Generator." International Journal of Engineering & Technology 7, no. 3.8 (July 7, 2018): 147. http://dx.doi.org/10.14419/ijet.v7i3.8.16850.

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With the recent advancements in the field of computing, a fair share of easier and safer practices to exchange and share information between multiple parties have propped up. While some of these are improvisations, a few such as the Digital Signatures, have fast replaced conventional signing practices. It’s wide use and acceptance in the industry as well as officially, has necessitated higher security to protect data integrity and privacy. These digital Signatures are generated on the basis of various schemes that are designed to accommodate efficiency, crypto security and algorithmic complexity. This paper proposes an alternate method named HD-SIGN for generating these digital signatures in accordance with Secure Hash Function and 512-bit SRNN cryptographic algorithm. With the aid of a TRNG module, a modification to produce a large number with two prime factors and a set of natural numbers in a pair of public and private keys has been incorporated. The LSFR based TRNG module which helps maintain the ‘True Randomness’ of any generated number has been used for this purpose. Further, the random nature of the generated sequence to be used in the digital signature, has been tested with the help of standard NIST tests. The Hamming distance has also been analyzed as a security metric for the proposal, implying the degree of unpredictability of the generated true random sequences.
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Dissertations / Theses on the topic "True Random Number Generator (TRNG)"

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Petura, Oto. "True random number generators for cryptography : Design, securing and evaluation." Thesis, Lyon, 2019. http://www.theses.fr/2019LYSES053.

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Les nombres aléatoires sont essentiels pour les systèmes cryptographiques modernes. Ils servent de clés cryptographiques, de nonces, de vecteurs d’initialisation et de masques aléatoires pour la protection contre les attaques par canaux cachés. Dans cette thèse, nous traitons des générateurs de nombres aléatoires dans les circuits logiques (FPGA et ASIC). Nous présentons les méthodes fondamentales de génération de nombres aléatoires dans des circuits logiques. Ensuite, nous discutons de différents types de TRNG en utilisant le jitter d’horloge comme source d’aléa. Nous faisons une évaluation rigoureuse de divers noyaux TRNG conformes à la norme AIS-20/31 et mis en œuvre dans trois familles de FPGA différentes: Intel Cyclone V, Xilinx Spartan-6 et Microsemi SmartFusion2. Puis, nous présentons l’implémentation des noyaux TRNG sélectionnés dans des ASIC et leur évaluation. Ensuite, nous étudions en profondeur PLL-TRNG afin de fournir une conception sécurisée de ce TRNG ainsi que des tests intégrés. Enfin, nous étudions les TRNG basés sur les oscillateurs. Nous comparons de différentes méthodes d'extraction d’aléa ainsi que de différents types d'oscillateurs et le comportement du jitter d'horloge à l'intérieur de chacun d'eux. Nous proposons également des méthodes de mesure du jitter intégrée pour le test en ligne des TRNG basés sur les oscillateurs
Random numbers are essential for modern cryptographic systems. They are used as cryptographic keys, nonces, initialization vectors and random masks for protection against side channel attacks. In this thesis, we deal with random number generators in logic devices (Field Programmable Gate Arrays – FPGAs and Application Specific Integrated Circuits – ASICs). We present fundamental methods of generation of random numbers in logic devices. Then, we discuss different types of TRNGs using clock jitter as a source of randomness. We provide a rigorous evaluation of various AIS-20/31 compliant TRNG cores implemented in three different FPGA families : Intel Cyclone V, Xilinx Spartan-6 and Microsemi SmartFusion2. We then present the implementation of selected TRNG cores in custom ASIC and we evaluate them. Next, we study PLL-TRNG in depth in order to provide a secure design of this TRNG together with embedded tests. Finally, we study oscillator based TRNGs. We compare different randomness extraction methods as well as different oscillator types and the behavior of the clock jitter inside each of them. We also propose methods of embedded jitter measurement for online testing of oscillator based TRNGs
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Karanam, Shashi Prashanth. "Tiny true random number generator." Fairfax, VA : George Mason University, 2009. http://hdl.handle.net/1920/4587.

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Thesis (M.S.)--George Mason University, 2009.
Vita: p. 91. Thesis director: Jens-Peter Kaps. Submitted in partial fulfillment of the requirements for the degree of Master of Science in Computer Engineering. Title from PDF t.p. (viewed Oct. 12, 2009). Includes bibliographical references (p. 88-90). Also issued in print.
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Mureddu, Ugo. "Génération d'aléa dans les circuits électroniques numériques exploitant des cellules oscillantes." Thesis, Lyon, 2019. http://www.theses.fr/2019LYSES018.

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Les objets connectés sont omniprésents dans notre société actuelle (ex. véhicules, transports en commun, santé, domotique, smartphone, moyen de paiement, etc.). La connexion et l'accès à distance des appareils d'usage quotidien améliorent considérablement notre confort et notre efficacité dans notre vie professionnelle comme personnelle. Cependant, cela peut également nous confronter à des problèmes de sécurité sans précédent. Les risques liés à la large expansion des systèmes embarqués et de l'internet des objets sont doubles :- L'accès d'une personne non autorisée aux données pour la lecture, la copie, l'écriture ou l'effacement complet. - L'utilisation de l'objet connecté pour une action non prévue par celui-ci, sa mise hors service du système ou bien sa destruction.Pour répondre à de tels risques, il est nécessaire de mettre en place des mécanismes de sécurité permettant le chiffrement des données sensibles, ainsi qu'une authentification et une autorisation pour chaque appareil de l'internet des objets. Fort heureusement, les fonctions cryptographiques permettent de répondre à ces besoins en garantissant confidentialité, authenticité, intégrité et non-répudiation. Dans ce contexte, les générateurs physiques d'aléa (Générateurs de nombres aléatoires et fonctions physiques non clonables) sont essentiels puisqu'ils assurent le bon fonctionnement des fonctions cryptographiques. En effet, ils exploitent des sources de bruit analogique présentes dans les circuits électroniques pour générer: des clés secrètes permettant de chiffrer les données, ou encore, des identifiants uniques permettant l'authentification des circuits. La sécurité des fonctions cryptographiques repose sur la qualité des clés et identifiant générés par ces générateurs d'aléa. Les nombres produits par ces générateurs doivent être imprévisibles. A défaut, les clés utilisées pour chiffrer les données pourraient être cassées et les identifiants recopiés. C'est pourquoi il est d'une extrême nécessité d'étudier les générateurs physiques d'aléa. Dans ce manuscrit, nous proposons tout d'abord une approche rigoureuse d'implémentation et de comparaison de TRNG et de PUF sur les circuits électroniques numériques, suivis d'une intégration au sein d'un système complet de ces générateurs physiques d'aléa. Ensuite, nous amorçons une démarche de modélisation des PUF afin d'améliorer l'évaluation de leur imprévisibilité. Nous réalisons aussi une étude complète de l'impact du phénomène de verrouillage sur les cellules oscillantes et le. conséquences sur les générateurs physiques d'aléa. Enfin, nous démontrons la sensibilité d'un type particulier de PUF à une attaque par analyse électromagnétique
With the sharp increase in the deployment and integration of the Internet of Things, one challenge is to ensure security with respect to privacy and trust issues. With billions of connected devices, there is a huge risk of unauthorized use or abuse. To protect from such risks, security mechanisms are neede for per-device authentication and authorization, integrated in early design stages. Thankfully, cryptographic functions allow ciphering of sensitive data, as well as per-device authentication and authorization since they guarantee confidentialify, authenticity, integrity and non-repudiation. In this context, physical random generator (random number generator TRNG and physical unclonable functions PUF) are particularly useful since they generate secret keys, random masks or unique identifiers. The robustness of the cryptographic functions stand by the quality of the physical random generators. For that, numbers provided by those generators must be entropic. Otherwise, keys used to cipher data could be broken and identifiers could be retrieved. That's why, it is necessary to study physical random generators. In this thesis, we provide a rigorous approach to implement TRNGs and PUFs in reconfigurable logic devices. After that, we integrate those generators in a complete system. We also propose an innovative approach to evaluate the quality of PUF by modeling their behavior prior to designing it. This should he!p designers anticipate PUF quality in term of randomness. We also realize a complete a study of two kind of threats on physical random generators using oscillating cells: the locking phenomena and the EM analysis
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Noumon, Allini Elie. "Caractérisation, évaluation et utilisation du jitter d'horloge comme source d'aléa dans la sécurité des données." Thesis, Lyon, 2020. http://www.theses.fr/2020LYSES019.

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Cette thèse, financée par la DGA, est motivée par la problématique d’évaluation des TRNG pour des applications à très haut niveau de sécurité. Les standards actuels tels que AIS-31 n’étant pas suffisants pour ces types d’applications, la DGA propose une procédure complémentaire, validée sur les TRNG utilisant les oscillateurs en anneau (RO), qui vise à caractériser la source d’aléa des TRNG afin d’identifier les bruits électroniques présents dans celle-ci. Ces bruits se traduisent dans les circuits numériques par le jitter d’horloge générée dans les RO. Ils peuvent être caractérisés par leur densité spectrale de puissance reliée à la variance d’Allan temporelle qui permet, contrairement à la variance standard pourtant encore largement utilisée, de discriminer ces différents types de bruit (thermique, flicker principalement). Cette étude a servi de base à l’estimation de la part du jitter due au bruit thermique utilisé dans les modèles stochastiques décrivant la sortie des TRNG. Afin d’illustrer et de valider l’approche de certification DGA sur d’autres principes de TRNG que les RO, nous proposons une caractérisation de la PLL en tant que source d’aléa. Nous avons modélisé la PLL en termes de fonctions de transfert. Cette modélisation a conduit à l’identification de la source de bruit en sortie de la PLL, ainsi que de sa nature en fonction des paramètres physiques de la PLL. Cela a permis de proposer des recommandations quant au choix des paramètres afin de garantir une entropie maximale. Afin d’aider à la conception de ce type de TRNG, nous proposons également un outil de recherche des paramètres non physiques du générateur assurant le meilleur compromis sécurité/débit
This thesis, funded by the DGA, is motivated by the problem of evaluation of TRNG for applications with a very high level of security. As current standards such as AIS-31 are not sufficient for these types of applications, the DGA proposes a complementary procedure, validated on TRNG using ring oscillators (RO), which aims to characterize the source of randomness of TRNG in order to identify electronic noises present in it. These noises are manifested in the digital circuits by the clock jitter generated in the RO. They can be characterized by their power spectral density related to the time Allan variance which allows, unlike the standard variance which is still widely used, to discriminate these different types of noise (mainly thermal, flicker). This study was used as a basis for estimating the proportion of jitter due to thermal noise used in stochastic models describing the output of TRNG. In order to illustrate and validate the DGA certification approach on other principles of TRNG apart from RO, we propose a characterization of PLL as a source of randomness. We have modeled the PLL in terms of transfer functions. This modeling has led to the identification of the source of noise at the output of the PLL, as well as its nature as a function of the physical parameters of the PLL. This allowed us to propose recommendations on the choice of parameters to ensure maximum entropy. In order to help in the design of this type of TRNG, we also propose a tool to search for the non-physical parameters of the generator ensuring the best compromise between security and throughput
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Mitchum, Sam. "Digital Implementation of a True Random Number Generator." VCU Scholars Compass, 2010. http://scholarscompass.vcu.edu/etd/2327.

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Random numbers are important for gaming, simulation and cryptography. Random numbers have been generated using analog circuitry. Two problems exist with using analog circuits in a digital design: (1) analog components require an analog circuit designer to insure proper structure and functionality and (2) analog components are not easily transmigrated into a different fabrication technology. This paper proposes a class of random number generators that are constructed using only digital components and typical digital design methodology. The proposed classification is called divergent path since the path of generated numbers through the range of possible values diverges at every sampling. One integrated circuit was fabricated and several models were synthesized into a FPGA. Test results are given.
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Yadav, Avantika. "Design and Analysis of Digital True Random Number Generator." VCU Scholars Compass, 2013. http://scholarscompass.vcu.edu/etd/3229.

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Random number generator is a key component for strengthening and securing the confidentiality of electronic communications. Random number generators can be divided as either pseudo random number generators or true random number generators. A pseudo random number generator produces a stream of numbers that appears to be random but actually follow predefined sequence. A true random number generator produces a stream of unpredictable numbers that have no defined pattern. There has been growing interest to design true random number generator in past few years. Several Field Programmable Gate Array (FPGA) and Application Specific Integrated Circuit (ASIC) based approaches have been used to generate random data that requires analog circuit. RNGs having analog circuits demand for more power and area. These factors weaken hardware analog circuit-based RNG systems relative to hardware completely digital-based RNGs systems. This thesis is focused on the design of completely digital true random number generator ASIC.
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Bazzi, Hussein. "Resistive memory co-design in CMOS technologies." Electronic Thesis or Diss., Aix-Marseille, 2020. http://www.theses.fr/2020AIXM0567.

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De nombreuses applications (internet des objets, systèmes embarqués automobiles et médicales, intelligence artificielle) ont besoin d’un circuit intégré (ou SoC pour System on Chip) avec des mémoires non volatiles embarquées performantes pour fonctionner de manière optimale. Bien que la mémoire Flash soit largement utilisée aujourd'hui, cette technologie nécessite une tension élevée pour les opérations de programmation et présente des problèmes de fiabilité difficiles à gérer au-delà du nœud technologique 18 nm, augmentant les coûts de conception et de fabrication des circuits. Dans ce contexte, l'industrie du semi-conducteur est à la recherche d’une mémoire non volatile alternative pouvant remplacer les mémoires Flash. Parmi les candidats actuellement étudiés (MRAM - mémoire à accès aléatoire magnétique, PCM - mémoire à changement de phase, FeRAM - mémoire à accès aléatoire Ferroélectrique), les mémoires résistives (RRAM) offrent de meilleures performances sur différents points capitaux : compatibilité avec le processus de fabrication standard CMOS, consommation de courant, rapidité de fonctionnement, etc. La technologie RRAM peut être aisément introduite dans n'importe quel flot de conception ouvrant la voie au développement de nouvelles architectures qui répondent à l’engorgement des systèmes classiques Von Neumann. Dans cette thèse, l'objet principal est de montrer le potentiel d’intégration des dispositifs RRAM avec la technologie CMOS, à l’aide de simulation et de mesures électriques, afin d’élaborer différentes structures hybrides : mémoires à accès aléatoire statique (SRAM) non volatiles, générateurs de nombres aléatoires (TRNG) et réseaux de neurones artificiels
Many diversified applications (internet of things, embedded systems for automotive and medical applications, artificial intelligence) require an integrated circuit (SoC, System on Chip) with high-performance non-volatile memories to operate optimally. Although Flash memory is widely used today, this technology needs high voltage for programing operations and has reliability issues that are hard to handle beyond 18 nm technological node, increasing the cost of circuit design and fabrication. In this context, the semiconductor industry seeks an alternative non-volatile memory that can replace Flash memories. Among possible candidates (MRAM - Magnetic Random Access Memory, PCM - Phase Change Memory, FeRAM - Ferroelectric Random Access Memory), Resistive memories (RRAMs) offer superior performances on essential key points: compatibility with CMOS manufacturing processes, scalability, current consumption (standby and active), operational speed. Due to its relatively simple structure, RRAM technology can be easily integrated in any design flow opening the way for the development of new architectures that answer Von Neumann bottleneck. In this thesis, the main object is to show the integration abilities of RRAM devices with CMOS technology, using circuit design and electrical measurements, in order to develop different hybrid structures: non-volatile Static Random Access Memories (SRAM), True Random Number Generator (TRNG) and artificial neural networks
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Shanmuga, Sundaram Prassanna. "Development of a FPGA-based True Random Number Generator for Space Applications." Thesis, Linköping University, Electronics System, 2010. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-54534.

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Random numbers are required for cryptographic applications such as IT security products, smart cards etc. Hardwarebased random number generators are widely employed. Cryptographic algorithms are implemented on FieldProgrammable Gate Arrays (FPGAs). In this work a True Random Number Generator (TRNG) employed for spaceapplication was designed, investigated and evaluated. Several cryptographic requirements has to be satisfied for therandom numbers. Two different noise sources was designed and implemented on the FPGA. The first design wasbased on ring oscillators as a noise source. The second design was based on astable oscillators developed on a separatehardware board and interfaced with the FPGA as another noise source. The main aim of the project was to analyse theimportant requirement of independent noise source on a physical level. Jitter from the oscillators being the source forthe randomness, was analysed on both the noise sources. The generated random sequences was finally subjected tostatistical tests.

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Gärtner, Joel. "Analysis of Entropy Usage in Random Number Generators." Thesis, KTH, Skolan för datavetenskap och kommunikation (CSC), 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-214567.

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Cryptographically secure random number generators usually require an outside seed to be initialized. Other solutions instead use a continuous entropy stream to ensure that the internal state of the generator always remains unpredictable. This thesis analyses four such generators with entropy inputs. Furthermore, different ways to estimate entropy is presented and a new method useful for the generator analysis is developed. The developed entropy estimator performs well in tests and is used to analyse entropy gathered from the different generators. Furthermore, all the analysed generators exhibit some seemingly unintentional behaviour, but most should still be safe for use.
Kryptografiskt säkra slumptalsgeneratorer behöver ofta initialiseras med ett oförutsägbart frö. En annan lösning är att istället konstant ge slumptalsgeneratorer entropi. Detta gör det möjligt att garantera att det interna tillståndet i generatorn hålls oförutsägbart. I den här rapporten analyseras fyra sådana generatorer som matas med entropi. Dessutom presenteras olika sätt att skatta entropi och en ny skattningsmetod utvecklas för att användas till analysen av generatorerna. Den framtagna metoden för entropiskattning lyckas bra i tester och används för att analysera entropin i de olika generatorerna. Alla analyserade generatorer uppvisar beteenden som inte verkar optimala för generatorns funktionalitet. De flesta av de analyserade generatorerna verkar dock oftast säkra att använda.
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Botha, Roelof Cornelis. "The development of a hardware random number generator for gamma-ray astronomy / R.C. Botha." Thesis, North-West University, 2005. http://hdl.handle.net/10394/581.

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Pulsars, as rotating magnetised neutron stars got much attention during the last 40 years since their discovery. Observations revealed them to be gamma-ray emitters with energies continuing up to the sub 100 GeV region. Better observation of this upper energy cut-off region will serve to enhance our theoretical understanding of pulsars and neutron stars. The H-test has been used the most extensively in the latest periodicity searches, whereas other tests have limited applications and are unsuited for pulsar searches. If the probability distribution of a test statistic is not accurately known, it is possible that, after searching through many trials, a probability for uniformity can be given, which is much smaller than the real value, possibly leading to false detections. The problem with the H-test is that one must obtain the distribution by simulation and cannot do so analytically. For such simulations, random numbers are needed and are usually obtained by utilising so-called pseudo-random number generators, which are not truly random. This immediately renders such generators as useless for the simulation of the distribution of the H-test. Alternatively there exists hardware random number generators, but such devices, apart from always being slow, are also expensive, large and most still don't exhibit the true random nature required. This was the motivation behind the development of a hardware random number generator which provides truly random U(0,l) numbers at very high speed and at low cost The development of and results obtained by such a generator are discussed. The device delivered statistically truly random numbers and was already used in a small simulation of the H-test distribution.
Thesis (M.Sc. (Physics))--North-West University, Potchefstroom Campus, 2005.
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Book chapters on the topic "True Random Number Generator (TRNG)"

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Tehranipoor, Mark, N. Nalla Anandakumar, and Farimah Farahmandi. "True Random Number Generator (TRNG)." In Hardware Security Training, Hands-on!, 19–33. Cham: Springer International Publishing, 2023. http://dx.doi.org/10.1007/978-3-031-31034-8_2.

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Carboni, Roberto. "Characterization and Modeling of Spin-Transfer Torque (STT) Magnetic Memory for Computing Applications." In Special Topics in Information Technology, 51–62. Cham: Springer International Publishing, 2021. http://dx.doi.org/10.1007/978-3-030-62476-7_5.

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AbstractWith the ubiquitous diffusion of mobile computing and Internet of Things (IoT), the amount of data exchanged and processed over the internet is increasing every day, demanding secure data communication/storage and new computing primitives. Although computing systems based on microelectronics steadily improved over the past 50 years thanks to the aggressive technological scaling, their improvement is now hindered by excessive power consumption and inherent performance limitation associated to the conventional computer architecture (von Neumann bottleneck). In this scenario, emerging memory technologies are gaining interest thanks to their non-volatility and low power/fast operation. In this chapter, experimental characterization and modeling of spin-transfer torque magnetic memory (STT-MRAM) are presented, with particular focus on cycling endurance and switching variability, which both present a challenge towards STT-based memory applications. Then, the switching variability in STT-MRAM is exploited for hardware security and computing primitives, such as true-random number generator (TRNG) and stochastic spiking neuron for neuromorphic and stochastic computing.
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Lugrin, Thomas. "Random Number Generator." In Trends in Data Protection and Encryption Technologies, 31–34. Cham: Springer Nature Switzerland, 2023. http://dx.doi.org/10.1007/978-3-031-33386-6_7.

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AbstractMost modern encryption and authentication methods rely on generating random numbers for key generation, initial vectors, or nonces. A Random Number Generator is cryptographically secure if the sequences of numbers that it generates are unpredictable. They are typically grouped into two categories: Pseudo-Random Number Generators and True Random Number Generators. Small-size, low-cost true Random Number Generators have already been integrated into off-the-shelf devices such as smartphones, computers, and hardware security modules. In addition, applications involving particularly sensitive data can combine the output from two or more independent sources of randomness for improved security.
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Saki, Abdullah Ash, Mahabubul Alam, and Swaroop Ghosh. "Quantum True Random Number Generator." In Design Automation of Quantum Computers, 69–86. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-15699-1_4.

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Fischer, Viktor, and Miloš Drutarovský. "True Random Number Generator Embedded in Reconfigurable Hardware." In Cryptographic Hardware and Embedded Systems - CHES 2002, 415–30. Berlin, Heidelberg: Springer Berlin Heidelberg, 2003. http://dx.doi.org/10.1007/3-540-36400-5_30.

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Siripragada, Anirudh, R. Shiva Prasad, and N. Mohankumar. "Power Efficient PUF-Based Random Reseeding True Random Number Generator." In Advances in Intelligent Systems and Computing, 549–59. Singapore: Springer Singapore, 2019. http://dx.doi.org/10.1007/978-981-13-3600-3_52.

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Rai, Shubham, Nishant Gupta, Abhiroop Bhattacharjee, Ansh Rupani, Michael Raitza, Jens Trommer, Thomas Mikolajick, and Akash Kumar. "END-TRUE: Emerging Nanotechnology-Based Double-Throughput True Random Number Generator." In VLSI-SoC: Technology Advancement on SoC Design, 175–203. Cham: Springer Nature Switzerland, 2022. http://dx.doi.org/10.1007/978-3-031-16818-5_9.

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Li, Gang, Haoyang Sun, Peiqi Wu, Zehua Li, Zhenbing Li, Xiaochuan Fang, DeXu Chen, and Guangjun Wen. "A True Random Number Generator Based on ADC Random Interval Sampling." In Advances in Artificial Intelligence and Security, 705–14. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-031-06764-8_56.

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Priyatharishini, M., and M. Nirmala Devi. "Realization of Re-configurable True Random Number Generator on FPGA." In Communications in Computer and Information Science, 247–56. Singapore: Springer Singapore, 2020. http://dx.doi.org/10.1007/978-981-15-4825-3_20.

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Fischer, Viktor, Miloš Drutarovský, Martin Šimka, and Nathalie Bochard. "High Performance True Random Number Generator in Altera Stratix FPLDs." In Field Programmable Logic and Application, 555–64. Berlin, Heidelberg: Springer Berlin Heidelberg, 2004. http://dx.doi.org/10.1007/978-3-540-30117-2_57.

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Conference papers on the topic "True Random Number Generator (TRNG)"

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Arciuolo, Thomas, and Khaled M. Elleithy. "Parallel, True Random Number Generator (P-TRNG): Using Parallelism for Fast True Random Number Generation in Hardware." In 2021 IEEE 11th Annual Computing and Communication Workshop and Conference (CCWC). IEEE, 2021. http://dx.doi.org/10.1109/ccwc51732.2021.9375939.

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Sharma, Rahul, Ramya Ullagaddimath, Amit Baran Roy, Apratim Halder, and Veena Hegde. "Optical theremin based true Random Number Generation (TRNG) system." In 2015 International Conference on Advances in Computing, Communications and Informatics (ICACCI). IEEE, 2015. http://dx.doi.org/10.1109/icacci.2015.7275670.

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Ansari, Uzma, Akhilesh Kumar Chaudhary, and Sudhanshu Verma. "True Random Number Generator (TRNG) Using Sensors for Low Cost IoT Applications." In 2022 International Conference on Communication, Computing and Internet of Things (IC3IoT). IEEE, 2022. http://dx.doi.org/10.1109/ic3iot53935.2022.9767999.

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Ansari, Uzma, Akhilesh Kumar Chaudhary, and Sudhanshu Verma. "Enhanced True Random Number Generator (TRNG) using Sensors for IoT Security Applications." In 2022 Third International Conference on Intelligent Computing Instrumentation and Control Technologies (ICICICT). IEEE, 2022. http://dx.doi.org/10.1109/icicict54557.2022.9917919.

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Ji, Zhigang, James Brown, and Jianfu Zhang. "True Random Number Generator (TRNG) for Secure Communications in the Era of IoT." In 2020 China Semiconductor Technology International Conference (CSTIC). IEEE, 2020. http://dx.doi.org/10.1109/cstic49141.2020.9282535.

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Tao, Sha, and Elena Dubrova. "TVL-TRNG: Sub-Microwatt True Random Number Generator Exploiting Metastability in Ternary Valued Latches." In 2017 IEEE 47th International Symposium on Multiple-Valued Logic (ISMVL). IEEE, 2017. http://dx.doi.org/10.1109/ismvl.2017.10.

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Deotare, Vilas, Dinesh Padole, and Lalitkumar Wadhwa. "Parameter Dependencies and Optimization of True Random Number Generator (TRNG) using Genetic Algorithm (GA)." In 2021 8th International Conference on Smart Computing and Communications (ICSCC). IEEE, 2021. http://dx.doi.org/10.1109/icscc51209.2021.9528264.

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Ribeiro, Wellinton Costa, and Marcus Tadeu Pinheiro Silva. "Evaluating the Randomness of the RNG in a Commercial Smart Card." In Simpósio Brasileiro de Segurança da Informação e de Sistemas Computacionais. Sociedade Brasileira de Computação - SBC, 2017. http://dx.doi.org/10.5753/sbseg.2017.19531.

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This paper brings results concerning the quality evaluation for the pseudo-random number generator (PRNG) in a commercial smart card. The RNG is a fundamental part for the cryptography carried out in several applications. We have acquired a huge quantity of random numbers from three samples of a commercial smart card. These data were evaluated using the statistical computation package developed by National Institute of Standards and Technology. In order to be used as gold benchmark and to validate our methodology, we have also tested the true random number generator (TRNG) included in a commercial integrated circuit. Our results show that the card PRNG owns quality too inferior than the TRNG. Due to card vendor confidentiality policy is not possible state the tested PRNG is base for the device cryptography. However, if this occurs, results lead us to conclude the tested PRNG is not adequate to provide the required security in the systems that adopt the evaluated smart card.
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Olgun, Ataberk, Minesh Patel, A. Giray Yaglikci, Haocong Luo, Jeremie S. Kim, F. Nisa Bostanci, Nandita Vijaykumar, Oguz Ergin, and Onur Mutlu. "QUAC-TRNG: High-Throughput True Random Number Generation Using Quadruple Row Activation in Commodity DRAM Chips." In 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA). IEEE, 2021. http://dx.doi.org/10.1109/isca52012.2021.00078.

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Xiao, Y., E. R. Hsieh, Steve S. Chung, T. R. Chen, S. A. Huang, T. J. Chen, and Osbert Cheng. "Novel Concept of the Transistor Variation Directed Toward the Circuit Implementation of Physical Unclonable Function (PUF) and True-random-number Generator (TRNG)." In 2019 IEEE International Electron Devices Meeting (IEDM). IEEE, 2019. http://dx.doi.org/10.1109/iedm19573.2019.8993496.

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