Dissertations / Theses on the topic 'Transmitter-receivers'

Thesis (Ph. D.)--Ohio State University, 2005.
Title from first page of PDF file. Document formatted into pages; contains xv, 128 p.; also includes graphics (some col.). Includes bibliographical references (p. 125-128). Available online via OhioLINK's ETD Center

The objective of the proposed research is to develop simplified reconfigurable transmission systems with frequency multipliers for the transmission of complex modulated signals. Because they rely on nonlinear properties, frequency multiplier-based transmission systems require proper linearization techniques and accurate modeling of the signal transfer function. To accomplish these two goals, the author has developed techniques to model and linearize frequency multipliers and to digitize feedback signals for nonlinear characterization. First, adaptive predistortion techniques and zonal transfer theories have been developed for modeling and linearization. The predistortion system has been verified by applying an IS-95B signal to various frequency multipliers built by the author. Second, because the output signals at higher harmonic zones occupy wider frequency bandwidths than the signal in the fundamental zone does and thus make it harder to use traditional sampling techniques, a simplified but effective method called the sub-Nyquist sampling rate was developed and verified. Third, two methods for reconfigurable transmitters using frequency multipliers in conjunction with digital predistortion linearizers were developed. Both methods make it possible to transmit complex signals via frequency multipliers by using dual-band transmission systems that incorporate frequency multipliers that are based on linearization techniques. One of these methods uses a circuit topology that can be switched between a fundamental-mode in-phase combined amplifier and a push-push frequency doubler using input phasing. The second suggested method uses a fundamental-frequency power amplifier followed by a varactor multiplier that can be bypassed with an RF switch. This work will contribute to the development of low-cost and size-effective reconfigurable transmission systems because it requires fewer transmitting components and needs less sampling of the feedback networks.

In downlink multi-user multiple-input multiple-output (MU-MIMO) systems, different users, even multiple data streams serving one user, might require different quality-of-services (QoS). The transceiver should allocate resources to different users aiming at satisfying their QoS requirements. In order to design the optimal transceiver, channel state information is necessary. In practice, channel state information has to to be estimated, and estimation error is unavoidable. Therefore, robust transceiver design, which takes the channel estimation uncertainty into consideration, is important. For the previous robust transceiver designs, bounded estimation errors or Gaussian estimation errors were assumed. However, if there exists unknown distributed interference, the distribution of the channel estimation error cannot be modeled accurately a priori. Therefore, in this thesis, we investigate the robust transceiver design problem in downlink MU-MIMO system under probabilistic QoS constraints with arbitrary distributed channel estimation error. To tackle the probabilistic QoS constraints under arbitrary distributed channel estimation error, the transceiver design problem is expressed in terms of worst-case probabilistic constraints. Two methods are then proposed to solve the worst-case problem. Firstly, the Chebyshev inequality based method is proposed. After the worst-case probabilistic constraint is approximated by the Chebyshev inequality, an iteration between two convex subproblems is proposed to solve the approximated problem. The convergence of the iterative method is proved, the implementation issues and the computational complexity are discussed. Secondly, in order to solve the worst-case probabilistic constraint more accurately, a novel duality method is proposed. After a series of reformulations based on duality and S-Lemma, the worst-case statistically constrained problem is transformed into a deterministic finite constrained problem, with strong duality guaranteed. The resulting problem is then solved by a convergence-guaranteed iteration between two subproblems. Although one of the subproblems is still nonconvex, it can be solved by a tight semidefinite relaxation (SDR). Simulation results show that, compared to the non-robust method, the QoS requirement is satisfied by both proposed algorithms. Furthermore, among the two proposed methods, the duality method shows a superior performance in transmit power, while the Chebyshev method demonstrates a lower computational complexity.
published_or_final_version
Electrical and Electronic Engineering
Master
Master of Philosophy

Thesis (Ph.D.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2008.
Committee Chair: John Papapolymerou; Committee Chair: Manos Tentzeris; Committee Member: Gordon Stuber; Committee Member: John Cressler; Committee Member: John Z. Zhang; Committee Member: Joy Laskar

This paper introduces a component of the Radio Frequency transceiver called the mixer. The mixer is a critical component in the RF systems, because of its ability for frequency conversion. This passage focuses on the design analysis and simulation of multiple topologies for the active down-conversion mixer. This mixer is characterized by its important design properties which consist of conversion gain, linearity, noise figure, and port isolation. The topologies that are given in this passage range from the most commonly known mixer design, to implemented design techniques that are used to increase the mixers important design properties as the demand of CMOS technology and the overall RF system rises. All mixer topologies were designed and simulated using TSMC 0.18 micrometer] CMOS technology in Advanced Design Systems, a simulator used specifically for RF designs.
ID: 030646192; System requirements: World Wide Web browser and PDF reader.; Mode of access: World Wide Web.; Thesis (M.S.E.E.)--University of Central Florida, 2011.; Includes bibliographical references.
M.S.E.E.
Masters
Electrical Engineering and Computing
Engineering and Computer Science
Electrical Engineering

The global market of mobile and wireless communications is witnessing explosive growth in size as well as radical changes. Third generation (3G) wireless systems have recently been deployed and some are still in the process. 3G wireless systems promise integration of voice and data communications with higher data rates and a superior quality of service compared to second generation systems. Unfortunately, more and more communication standards continue to be developed which ultimately requires specific RF/MW and baseband communication integrated circuits that are designed for functionality and compatibility with a specific type of network. Although communication devices such as cellular phones integrate different services such as voice, Bluetooth, GPS, and WLAN, each service requires its own dedicated radio transceiver which results in high power consumption and larger PCB area usage. With the rapid advances in silicon CMOS integrated circuit technology combined with extensive research, a global solutionswhich aims at introducing a global communication system that encompasses all communication standards appears to be emerging. State of the art CMOS technology not only has the capability of operation in the GHz range, but it also provides the advantage of low cost and high level of integration. These features propel CMOS technology as the ideal candidate for current trends, which currently aim to integrate more RF/MW circuits on the same chip. Armed with such technology ideas such as software radio look more attainable than they ever were in the past. Unfortunately, realizing true software radio for mobile applications still remains a tremendous challenge since it requires a high sampling rate and a wide-bandwidth Analog-to-Digital converter which is extremely power hungry and not suitable for battery operated mobile devices. Another approach to realize a flexible and reconfigurable RF/MW transceiver that could operate in a diverse mobile environment and provides a multiband and multistandard solution. The work presented in this thesis focuses on the design of an integrated and tunable low-noise amplifier as part of software defined radio (SDR).

Thesis (M.S.)--Worcester Polytechnic Institute.
Keywords: precision personnel locator; digital systems; embedded systems; waveform generation; data communication. Includes bibliographical references (leaves 108-110).

SiGe BiCMOS technology has many advantageous properties that, when leveraged, enable circuit design for extreme environments. This work will focus on designs targeted for space system avioinics platforms under the NASA ETDP program. The program specifications include operation under temperatures ranging from -180 C to +125 C and with radiation tolerance up to total ionizing dose of 100 krad with built-in single-event latch-up tolerance. To the author's knowledge, this work presents the first design and measurement of a wide temperature range enabled, radiation tolerant as built, RS-485 wireline transceiver in SiGe BiCMOS technology. This work also includes design and testing of a charge amplification channel front-end intended to act as the interface between a piezoelectric sensor and an ADC. An additional feature is the design and testing of a 50 Ohm output buffer utilized for testing of components in a lab setting.

The objective of the research presented in this dissertation is to explore the achievable dynamic range limits in high-performance RF front-ends designed using SiGe HBTs, with a focus on complementary (npn + pnp) SiGe technologies. The performance requirements of RF front-ends are high gain, high linearity, low dc power consumption, very low noise figure, and compactness. The research presented in this dissertation shows that all of these requirements can easily be met by using complementary SiGe HBTs. Thus, a strong case is made in favor of using SiGe technologies for designing high dynamic range RF front-ends. The contributions from this research are summarized as follows: 1. The first-ever comparison study and comprehensive analysis of small-signal linearity (IIP3) for npn and pnp SiGe HBTs on SOI. 2. A novel comparison of large-signal robustness of npn and pnp SiGe HBTs for use in high-performance RF front-ends. 3. A systematic and rigorous comparison of SiGe HBT compact models for high-fidelity distortion modeling. 4. The first-ever feasibility study of using weakly-saturated SiGe HBTs for use in severely power constrained RF front-ends. 5. A novel X-band Low Noise Amplifier (LNA) using weakly-saturated SiGe HBTs. 6. Design and comprehensive analysis of RF switches with enhanced large-signal linearity. 7. Development of novel methods to reduce crosstalk noise in mixed-signal circuits and the first-ever analysis of crosstalk noise across temperature. 8. Design of a very high-linearity cellular band quadrature modulator for use in base-station applications using first-generation complementary SiGe HBTs.

Thesis (Ph.D)--Electrical and Computer Engineering, Georgia Institute of Technology, 2009.
Committee Chair: Cressler, John; Committee Member: Gerhardt, Rosario; Committee Member: Ingram, Mary Ann; Committee Member: Papapolymerou, John; Committee Member: Shen, Shyh-Chiang. Part of the SMARTech Electronic Thesis and Dissertation Collection.

The development of multi-standard wireless communication systems with low cost and high integration is continuously requested and accompanied by the explosive growth of the wireless communication market. Although CMOS technology can provide most building blocks in RF transceivers, the implementation of CMOS RF power amplifiers is still a challenging task. The objective of this research is to develop design techniques to implement fully-integrated multi-mode power amplifiers using CMOS technology. In this dissertation, a load modulation technique with tunable matching networks and a pre-distortion technique in a multi-stage PA are proposed to support multi-communication standards with a single PA. A fully-integrated dual-mode GSM/EDGE PA was designed and implemented in a 0.18 um CMOS technology to achieve high output power for the GSM application and high linearity for the EDGE application. With the suggested power amplifier design techniques, fully-integrated PAs have been successfully demonstrated in GSM and EDGE applications. In Addition to the proposed techniques, a body-switched cascode PA core is also proposed to utilize a single PA in multi-mode applications without hurting the performance. With the proposed techniques, a fully-integrated multi-mode PA has been implemented in a 0.18 um CMOS technology, and the power amplifier has been demonstrated successfully for GSM/EDGE/WCDMA applications. In conclusion, the research in this dissertation provides CMOS RF power amplifier solutions for multiple standards in mobile wireless communications with low cost and high integration.

In this dissertation, the development of the first 60 GHz-standard compatible fully integrated 4-channel phase-locked loop (PLL) frequency synthesizer has been presented. The frequency synthesizer features third-order single loop architecture with completely integrated passive loop filter that does not require any additional external passive component. Two possible realizations of fully integrated clock and data recovery (CDR) circuits suitable for 60 GHz-standard compliant base band signal processing have been presented for the first time as well. The two CDRs have been optimized for either high data rate (3.456 Gb/s) or very low power consumption (5 mW) and they both work with a single 1 V supply. The frequency synthesizer is intended to generate a variable LO frequency in a fixed-IF heterodyne transceiver architecture. In such configuration the channel selection is implemented by changing the LO frequency by the required frequency step. This method avoids quadrature 50 GHz up/down-conversion thereby lowering the LO mixer design complexity and simplifying the LO distribution network. The measurement results show the PLL locking correctly on each of the four channels while consuming 60 mW from a 1 V power supply. The worst case phase noise is measured to be -80.1 dBc/Hz at 1 MHz offset from the highest frequency carrier (56.16 GHz). The output spectrum shows a reference spur attenuation of -32 dBc. The high data rate CDR features a maximum operating data rate in excess of 3.456 Gb/s while consuming 30 mW of power. The low power CDR consumes only 5 mW and operates at a maximum data rate of 1.728 Gb/s. Over a 1.5 m 60 GHz wireless link, both CDRs allow 95% reduction of the pulse shaping generated input peak-to-peak jitter from 450 ps down to 50 ps.

Thesis (M. S.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2009.
Committee Chair: Allen Phillip; Committee Member: Hasler Paul; Committee Member: Keezer David; Committee Member: Kenny James; Committee Member: Pan Ronghua.

The wireless communication industry has experienced a rapid technological evolution from its basic first generation (1G) wireless systems to the latest fourth generation (4G) wireless broadband systems. Wireless broadband systems are becoming increasingly popular with consumers and the technological strength of 4G has played a major role behind the success of wireless broadband systems. The IEEE 802.16m standard of the Worldwide Interoperability for Microwave Access (WiMAX) has been accepted as a 4G standard by the Institute of Electrical and Electronics Engineers in 2011. The IEEE 802.16m is fully optimised for wireless communications in fixed environments and can deliver very high throughput and excellent quality of service. In mobile communication environments however, WiMAX consumers experience a graceful degradation of service as a direct function of vehicular speeds. At high vehicular speeds, the throughput drops in WiMAX systems and unless proactive measures such as forward error control and packet size optimisation are adopted and properly adjusted, many applications cannot be facilitated at high vehicular speeds in WiMAX communications. For any proactive measure, bit error rate estimation as a function of vehicular speed, serves as a useful tool. In this thesis, we present an analytical model for bit error rate estimation in WiMAX communications using the Nakagami-m fading model. We also show, through an analysis of the data collected from a practical WiMAX system, that the Nakagami-m model can be made adaptive as a function of speed, to represent fading in fixed environments as well as mobile environments.

[ES] Las comunicaciones ópticas inalámbricas (OWC) constituyen una tecnología muy prometedora para el desarrollo de futuras comunicaciones inalámbricas. De hecho, ha despertado un interés creciente entre los investigadores y varias empresas de todo el mundo trabajan actualmente en el desarrollo de redes inalámbricas de muy alta velocidad. Las comunidades científica e industrial consideran la OWC como una tecnología complementaria en sus diversas formas: comunicaciones ópticas en el espacio libre (FSO), comunicaciones de luz visible (VLC) o fidelidad de la luz (Li-Fi). El espectro óptico ha sido considerado durante muchos años como una gran oportunidad para las comunicaciones inalámbricas, especialmente debido a la saturación del espectro de radiofrecuencia (RF). Esta disertación trata del uso de fuentes de banda ancha en sistemas de transmisión de luz visible (VLC), así como en sistemas de transmisión en el espectro infrarrojo por fibra óptica. En el trabajo de investigación realizado se pueden distinguir tres partes: En la primera parte, se considera el estudio y la simulación de componentes de Diodos Emisores de Luz (LED) con el software WIEN2k centrándose en las propiedades ópticas y eléctricas de los elementos II-VI. La segunda parte trata del diseño, la implementación y las pruebas de diferentes prototipos de comunicación VLC para la transmisión analógica y digital en modo simplex y semidúplex. Hemos demostrado un sistema OWC empleando una fuente de banda ancha (LED) para la transmisión no sólo de datos, sino también para la transmisión inalámbrica de energía. Además, se aborda el problema de la sincronización y la detección del nivel "1" o "0" de un bit en los sistemas de comunicación inalámbrica óptica implementados que surge como consecuencia de la atenuación de la luz a lo largo de la distancia y al problema de la pérdida de línea de visión (NLOS) entre el emisor y el receptor. Para hacer frente a este problema, se ha proporcionado un protocolo de comunicación que garantiza la transmisión fiable de datos digitales con un algoritmo de detección de nivel de bits adaptativo y se ha demostrado su eficacia mediante la transmisión de textos e imágenes. Además, esta tesis aporta una solución para la implementación de transmisores multiplexados en redes con división de longitud de onda (WDM) para formatos de modulación con multiplexación por división de frecuencia ortogonal (OFDM) basados en el uso de fuentes de banda ancha en el espectro infrarrojo para redes de fibra bidireccionales centralizadas. A pesar de las limitaciones impuestas por la dispersión cromática en el uso de este tipo de fuentes ópticas, la inclusión de ciertas estructuras antes de la detección permite la transmisión de señales OFDM en enlaces ópticos. En este trabajo se ha demostrado experimentalmente la reutilización de portadoras, la asignación dinámica de ancho de banda y la transmisión de señales OFDM multibanda mediante el uso de fuentes ópticas de banda ancha en redes WDM. Los principales resultados obtenidos en cada parte de esta tesis doctoral muestran los procedimientos de estudio, la eficacia de las soluciones propuestas y las limitaciones encontradas.
[CA] Les comunicacions òptiques sense fils (OWC) constitueixen una tecnologia molt prometedora per al desenvolupament de futures comunicacions sense fils. De fet, ha despertat un interés creixent entre els investigadors i diverses empreses de tot el món treballen actualment en el desenvolupament de xarxes sense fils de molt alta velocitat. Les comunitats científica i industrial consideren la OWC com una tecnologia complementària en les seues diverses formes: comunicacions òptiques en l'espai lliure (FSO), comunicacions de llum visible (VLC) o fidelitat de la llum (Li-Fi). L'espectre òptic ha sigut considerat durant molts anys com una gran oportunitat per a les comunicacions sense fils, especialment a causa de la saturació de l'espectre de radiofreqüència (RF). Aquesta dissertació tracta de l'ús de fonts de banda ampla en sistemes de transmissió de llum visible (VLC), així com en sistemes de transmissió en l'espectre infraroig per fibra òptica. En el treball de recerca realitzat es poden distingir tres parts: ¿ En la primera part, es considera l'estudi i la simulació de components de Díodes Emissors de Llum (LED) amb el software WIEN2k centrant-se en les propietats òptiques i elèctriques dels elements II-VI. ¿ La segona part tracta del disseny, la implementació i les proves de diferents prototips de comunicació VLC per a la transmissió analògica i digital de manera simplex i semidúplex. Hem demostrat un sistema OWC emprant una font de banda ampla (LED) per a la transmissió no sols de dades, sinó també per a la transmissió sense fil d'energia. A més, s'aborda el problema de la sincronització i la detecció del nivell "1" o "0" d'un bit en els sistemes de comunicació sense fil òptica implementats, que sorgeix a conseqüència de l'atenuació de la llum al llarg de la distància i al problema de la pèrdua de línia de visió (NLOS) entre l'emissor i el receptor. Per a fer front a aquest problema, s'ha proporcionat un protocol de comunicació que garanteix la transmissió fiable de dades digitals amb un algorisme de detecció de nivell de bits adaptatiu i s'ha demostrat la seua eficàcia mitjançant la transmissió de textos i imatges. ¿ A més, aquesta tesi aporta una solució per a la implementació de transmissors multiplexats en xarxes amb divisió de longitud d'ona (WDM) per a formats de modulació amb multiplexació per divisió de freqüència ortogonal (OFDM) basats en l'ús de fonts de banda ampla en l'espectre infraroig per a xarxes de fibra bidireccionals centralitzades. Malgrat les limitacions imposades per la dispersió cromàtica en l'ús d'aquest tipus de fonts òptiques, la inclusió d'unes certes estructures abans de la detecció permet la transmissió de senyals OFDM en enllaços òptics. En aquest treball s'ha demostrat experimentalment la reutilització de portadores, l'assignació dinàmica d'amplada de banda i la transmissió de senyals OFDM multibanda mitjançant l'ús de fonts òptiques de banda ampla en xarxes WDM. Els principals resultats obtinguts en cada part d'aquesta tesi doctoral mostren els procediments d'estudi, l'eficàcia de les solucions proposades i les limitacions trobades.
[EN] Optical wireless communication (OWC) is a very promising technology for future wireless communications developments. It has attracted increasing interest from researchers and several companies around the world are currently working on the development of very high-speed wireless networks. The scientific and industrial communities believe that OWC will be a complementary technology in its various forms: Free Space Optical communications (FSO), Visible Light Communications (VLC), Light Fidelity (Li-Fi). In fact, the optical spectrum has been considered for many years as a great opportunity for wireless communications especially due to the saturation of the radio frequency (RF) spectrum. This dissertation deals with the use of broadband sources in visible light transmission systems (VLC) as well as fiber optic systems. To carry out the research, three parts can be distinguished: In the first part, we consider the study and simulation of Light Emitting Diode (LED) components with the WIEN2k software by focusing on the optical and electrical properties of elements II-VI. The second part deals with the design, implementation and testing of different VLC communication prototypes for analog and digital transmission in simplex and half-duplex mode. We have demonstrated that an OWC system using a broadband source (i.e. an LED) can be used not only for data transmission, but also for wireless power transmission. Moreover, the synchronization problem and the detection of level "1" or "0" of a bit often arise in the optical wireless communication systems. This is a result of the attenuation nature of the light over the distance and the problem of Non Line-Of-Sight (NLOS) between the emitter and the receiver. To deal with this problem, a communication protocol ensuring reliable digital data transmission with an adaptive bit level detection algorithm has been provided and its effectiveness has been demonstrated by the transmission of texts and images. In addition, this thesis provides a solution for the implementation of wavelength division multiplexed - orthogonal frequency division multiplexed (WDM-OFDM) transmitters based on the use of broadband sources in the infrared spectrum for centralized bidirectional fiber networks. Despite the chromatic dispersion that avoids the use of this type of optical sources, the inclusion of certain structures before detection allows the transmission of OFDM signals in optical links. Carrier reuse, dynamic bandwidth allocation and multiband OFDM signals transmission will be experimentally demonstrated by using optical broadband sources in WDM networks. The main results obtained during this thesis work demonstrate the study procedures, for each part, the effectiveness of the proposed solutions as well as the constraints encountered.
Sekkiou, I. (2021). Design of communication systems based on broadband sources for fiber and free space optical links [Tesis doctoral]. Universitat Politècnica de València. https://doi.org/10.4995/Thesis/10251/172542
TESIS

This study examines the birth of television and the modern media corporation that launched it, through the archives of the designer of the "first" set, John Vassos, a Greek-born American industrial designer, interior decorator, and illustrator (1898-1985). Vassos's early career is used as a case study to analyze the historical and cultural forces that shaped the emergence of this new media and the new profession of industrial design, through archival materials housed in the Archives of American Art at the Smithsonian Institution in Washington D.C. and at Syracuse University. Specifically, this thesis unites various parts of Vassos's early career, from his modernist illustrations to industrial design, through the aesthetics and practices of modernism. As RCA's lead industrial designer for over 40 years, Vassos was involved in the design and promotion of RCA's electronic products, including radios and televisions and studio equipment. Vassos also designed the new spaces carved out for their use in the home including the "living room of the future" featured at the 1939 World's Fair. Drawing from his skills as an illustrator, designer and display expert, Vassos helped develop RCA's public image at a time of its greatest expansion in radio and television manufacturing and broadcasting. This reading of Vassos's work is both diachronic, taking into account his work over the early part of his career to analyze his specific contribution and synchronic, in relationship to other designers working contemporaneously. Thus, this thesis explores Vassos's double role as a participant, with active agency within the emergence of the new field and as a subject, constrained by social roles and forces. Ranging from turnstile to the transmitter, Vassos along with other industrial designers used the streamlined aesthetic to create visual unity among mechanical and electronic products, from home to office, from subway to skyline.

In this paper, we analyze the achievable secrecy rates in the two-hop wiretap channel with four nodes, where the transmitter and the receiver have multiple antennas while the relay and the eavesdropper have only a single antenna each. The relay is operating in amplify-and-forward mode and all the channels between the nodes are known perfectly by the transmitter. We discuss different transmission and protection schemes like artificial noise (AN). Furthermore, we introduce interference neutralization (IN) as a new protection scheme. We compare the different schemes regarding the high-SNR slope and the high-SNR power offset and illustrate the performance by simulation results. It is shown analytically as well as by numerical simulations that the high SNR performance of the proposed IN scheme is better than the one of AN.

In this paper, we analyze the achievable secrecy rates in the two-hop wiretap channel with four nodes, where the transmitter and the receiver have multiple antennas while the relay and the eavesdropper have only a single antenna each. The relay is operating in amplify-and-forward mode and all the channels between the nodes are known perfectly by the transmitter. We discuss different transmission and protection schemes like artificial noise (AN). Furthermore, we introduce interference neutralization (IN) as a new protection scheme. We compare the different schemes regarding the high-SNR slope and the high-SNR power offset and illustrate the performance by simulation results. It is shown analytically as well as by numerical simulations that the high SNR performance of the proposed IN scheme is better than the one of AN.

O objectivo desta dissertação é aprofundar o estudo de tecnologias que permitam atingir comunicações mais eficientes e fiáveis nas futuras redes sem fios. Uma das tecnologias estudadas nesta dissertação e que ainda não existem muitos estudos é o Complex Rotation Matrix (CRM). Esta tecnologia é bastante útil em sistemas que usem multi-portadoras como o Orthogonal Frequency Division Multiplexing (OFDM) pois permite dividir a informação pelas várias sub-portadoras. Caso este sistema use também a tecnologia MIMO ainda permitirá a divisão da informação por várias antenas. As constelações hierárquicas são outro dos temas abordados nesta dissertação e são um método eficiente de entregar o mesmo conteúdo a diferentes utilizadores. Esta técnica poderá ser bastante útil tanto em sistemas de uma portadora como multi-portadoras. O Single Carrier (SC) é outra das tecnologias abordadas nesta dissertação. Um dos standards em que poderia ser utilizado tanto o OFDM com o SC é no Digital Video Broadcasting – Satellite services to Handhelds (DVB-SH). Este esquema de comunicação tem com propósito a entrega de conteúdos multimédia aos terminais móveis via comunicação com estações base ou por satélite. O uso de o OFDM no downlink (DL) e do SC no uplink (UL) no mesmo standard/protocolo teria repercussões também ao nível dos terminais móveis pois permitiria uma melhor eficiência na duração das baterias. Os resultados obtidos nesta tese visam sobretudo o estudo do CRM, estimação de canal e constelações hierárquicas. Para a obtenção de resultados foram efectuadas simulações com o método de Monte Carlo e Turbo Códigos. Os simuladores foram desenvolvidos em Matlab.
The main purpose of this dissertation is the study of technologies that allow achieving more reliable and efficient communications in wireless systems. One of the technologies studied in this dissertation and practically new is the Complex Rotation Matrix (CRM). This technology is useful in systems that use multi-carrier as the Orthogonal Frequency Division Multiplexing (OFDM). The hierarchical constellations are other theme approached in this dissertation and it purpose efficiently is to deliver the same content to different users. Another technology studied in this dissertation was the Single Carrier (SC) with Frequency Division Equalization. The SC is a well-know technology and is used in several telecommunications systems. The goal is the future wireless communications adopt the two technologies in the same system and use one of them depending of the situation. The Digital Video Broadcasting – Satellite services to Handhelds (DVB-SH) is one standard that can take advantage of the using of the OFDM and SC in the same system. The main goal of the DVB-SH is deliver multimedia content via satellite communications or communications with base stations to mobile terminals. The mobile terminals can achieve a more efficiency in their batteries whether in a standard/protocol that uses OFDM in DL and SC in UL. The results obtained with this thesis have the purpose to study the CRM, channel estimation and hierarchical constellation. The simulators were developed in Matlab platform and Turbo Codes are the codification used, channel estimation is also used and all the simulations were made with the Monte Carlo method.

Silicon photonics is recognized as a disruptive technology that has the potential to reshape many application areas, for example, data center communication, telecommunications, high-performance computing, and sensing. The key capability that silicon photonics offers is to leverage CMOS-style design, fabrication, and test infrastructure to build compact, energy-efficient, and high-performance integrated photonic systems-on- chip at low cost. As the need to squeeze more data into a given bandwidth and a given footprint increases, silicon photonics becomes more and more promising. This work develops and demonstrates novel devices, methodologies, and architectures to resolve the challenges facing the next-generation silicon photonic transceivers. The first part of this thesis focuses on the topology optimization of passive silicon photonic devices. Specifically, a novel device optimization methodology - particle swarm optimization in conjunction with 3D finite-difference time-domain (FDTD), has been proposed and proven to be an effective way to design a wide range of passive silicon photonic devices. We demonstrate a polarization rotator and a 90◦ optical hybrid for polarization-diversity and phase-diversity communications - two important schemes to increase the communication capacity by increasing the spectral efficiency. The second part of this thesis focuses on the design and characterization of the next- generation silicon photonic transceivers. We demonstrate a polarization-insensitive WDM receiver with an aggregate data rate of 160 Gb/s. This receiver adopts a novel architecture which effectively reduces the polarization-dependent loss. In addition, we demonstrate a III-V/silicon hybrid external cavity laser with a tuning range larger than 60 nm in the C-band on a silicon-on-insulator platform. A III-V semiconductor gain chip is hybridized into the silicon chip by edge-coupling to the silicon chip. The demonstrated packaging method requires only passive alignment and is thus suitable for high-volume production. We also demonstrate all silicon-photonics-based transmission of 34 Gbaud (272 Gb/s) dual-polarization 16-QAM using our integrated laser and silicon photonic coherent transceiver. The results show no additional penalty compared to commercially available narrow linewidth tunable lasers. The last part of this thesis focuses on the chip-scale optical interconnect and presents two different types of reconfigurable memory interconnects for multi-core many-memory computing systems. These reconfigurable interconnects can effectively alleviate the memory access issues, such as non-uniform memory access, and Network-on-Chip (NoC) hot-spots that plague the many-memory computing systems by dynamically directing the available memory bandwidth to the required memory interface.

Low power, high speed serial transceivers are employed in a wide range of applications ranging from chip-to-chip, backplane, and optical interconnects. Apart from being capable of handling a wide range of data rates, the transceivers should have low power consumption (mW/Gbps) and be fully integrated. This work discusses enabling techniques to implement such transceivers. Specifically, three designs: (1) a 0.5-4 Gbps serial link which uses current recycling to reduce power dissipation and (2) a 0.5-2.5 Gbps reference-less clock and data recovery circuit which uses a novel frequency detector to achieve unlimited acquisition range and (3) a 2-4 Gbps low power receiver architecture capable of resolving multiple signalling formats with a simplified XOR based phase rotating PLL will be presented. All the three circuit topologies are highly digital and aim to address the requirements of wide operating range, low power dissipation while being fully integrated. Measured results obtained from the prototypes illustrate the effectiveness of the proposed design techniques.
Graduation date: 2012
Access restricted to the OSU Community at author's request from Dec. 2, 2011 - June 2, 2012

Cheng Wang Chi.
"October 2004."
Thesis (Ph.D.)--Chinese University of Hong Kong, 2004.
Includes bibliographical references (p. 135-139)
Electronic reproduction. Hong Kong : Chinese University of Hong Kong, [2012] System requirements: Adobe Acrobat Reader. Available via World Wide Web.
Mode of access: World Wide Web.
Abstracts in English and Chinese.

Wireless devices have become an integral part of our everyday lives. Cell-phones, PDA's, Wi-Fi enabled laptops, smart homes and appliances, and automated highway systems are some of the examples of wireless devices and networks in common use. More and more applications and functionalities are constantly being added to these devices, and to support these new applications high data rate communication is required between the wireless devices. Achieving high data rates with wireless communication is impeded by severe fluctuations in the received signal strength (called fading) due to mobility, the exponential attenuation of signal power with distance (called path loss), and interference due to simultaneous transmissions by different users at the same time or over same frequency band. Two of the promising techniques to mitigate the effects of fading, path loss, and interference are: using multiple antennas at the transmitter and receiver, and employing extra nodes (called relays) in between the transmitter and its receiver to relay the transmitter's message to its receiver. This dissertation identifies the optimal transmit and receive strategy with multiple antennas that maximizes the transmission capacity of an ad-hoc wireless network. The transmission capacity is defined as the maximum number of transmitter-receiver pairs that can simultaneously communicate under a per transmission quality of service constraint. This dissertation also presents novel relay transmission strategies for multiple antenna equipped relay based communication that achieve near optimal performance, with Shannon capacity and diversity-multiplexing tradeoff (DMT) as the performance metrics. The Shannon capacity is defined as the maximum rate of reliable communication, while the DMT characterizes the maximum diversity gain for a given value of multiplexing gain in a multiple antenna system. DMT is used as the benchmark, since transmission strategies that meet the DMT are guaranteed to leverage both the advantages of multiple antenna systems.
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The determination of the optimal location of transceivers is a critical design factor when deploying a wireless local area network (WLAN). The performance of the WLAN will improve in a variety of aspects when the transceivers' locations are adequately determined, including the overall cell coverage to the battery life of the client units. Currently, the most common method to determine the appropriate location of transceivers is known as a site survey, which is normally a very time and energy consuming process. The main objective of this research was to improve current methodologies for the optimal or near-optimal placement of APs in a WLAN installation. To achieve this objective, several improvements and additions were made to an existing computational tool to reflect the evolution that WLAN equipment has experienced in recent years. Major additions to the computational tool included the addition of the capability to handle multiple power levels for the transceivers, the implementation of a more adequate and precise representation of the passive interference sources for the path loss calculations, and the definition of a termination criterion to achieve reasonable computational times without compromising the quality of the solution. An experiment was designed to assess how the improvements made to the computational tool provided the desired balance between computational time and the quality of the solutions obtained. The controlled factors were the level of strictness of the termination criterion (i.e., high or low), and the number of runs performed (i.e., 1, 5, 10, 15, and 20 runs). The low level of strictness proved to dramatically reduce (i.e., from 65 to 70%) the running time required to obtain an acceptable solution when compared to that obtained at the high level of strictness. The quality of the solutions found with a single run was considerably lower than that obtained with the any other number of runs. On the other hand, the quality of the solutions seemed to stabilize at and after 10 runs, indicating that there is no added value to the quality of the solution when 15 or 20 runs are performed. In summary, having the computational tool developed in this research execute 5 runs with the low level of strictness would generate high quality solutions in a reasonable running time.
Graduation date: 2004

Hon Kwok-Wai.
Thesis (M.Phil.)--Chinese University of Hong Kong, 2000.
Includes bibliographical references (leaves 89-91).
Abstracts in English and Chinese.
Chapter 1. --- System Architecture --- p.1
Chapter 1.1 --- Introduction --- p.1
Chapter 1.2 --- Receiver Architectures --- p.2
Chapter 1.2.1 --- Superheterodyne Receiver --- p.2
Chapter 1.2.2 --- Homodyne Receiver --- p.3
Chapter 1.2.3 --- Image-Reject Receiver --- p.5
Chapter 1.2.4 --- Low intermediate frequency Receiver --- p.7
Chapter 1.3 --- Double Intermediate Frequency Receivers --- p.8
Chapter 1.3.1 --- Introduction --- p.8
Chapter 1.3.2 --- Background Theory --- p.8
Chapter 2. --- Receiver Fundamentals --- p.23
Chapter 2.1 --- Noise model --- p.23
Chapter 2.1.1 --- Thermal noise of resistors --- p.23
Chapter 2.1.2 --- Channel noise of transistors --- p.24
Chapter 2.2 --- Noise Figure --- p.26
Chapter 2.3 --- Linearity --- p.26
Chapter 2.3.1 --- 1 -dB Compression point --- p.27
Chapter 2.3.2 --- Third Intercept point (IP3) --- p.28
Chapter 2.3.3 --- Dynamic Range (DR) --- p.30
Chapter 2.3.3.1 --- Spurious-Free Dynamic Range (SFDR) --- p.30
Chapter 2.3.3.2 --- Blocking Dynamic Range (BDR) --- p.32
Chapter 3. --- Spiral Inductor --- p.33
Chapter 3.1 --- Spiral inductor modeling --- p.34
Chapter 3.2 --- Spiral Inductor model parameters --- p.36
Chapter 3.3 --- Characteristic of spiral inductor --- p.36
Chapter 3.4 --- Inductor Design and Optimization --- p.37
Chapter 4. --- Low Noise Amplifier (LNA) --- p.39
Chapter 4.1 --- Introduction --- p.39
Chapter 4.2 --- Common LNA Architectures --- p.39
Chapter 4.2.1 --- Resistive Termination --- p.39
Chapter 4.2.2 --- 1/gm Termination --- p.42
Chapter 4.2.3 --- Shunt-Series Feedback --- p.43
Chapter 4.2.4 --- Inductive Source Degeneration --- p.43
Chapter 4.3 --- Full Schematic diagram of the Low Noise Amplifier --- p.45
Chapter 4.4 --- Full noise analysis of the LNA using inductive source degeneration --- p.46
Chapter 4.4.1 --- Output noise due to channel noise --- p.46
Chapter 4.4.1.1 --- Output noise due to i2d --- p.47
Chapter 4.4.1.2 --- "Output noise due to i2g,u" --- p.47
Chapter 4.4.1.3 --- "Output noise due to i2g,c and i2d" --- p.49
Chapter 4.4.2 --- "Output noise due to Rg R,l Rs" --- p.51
Chapter 4.4.3 --- Noise factor calculation --- p.52
Chapter 4.4.3.1 --- Rl calculation --- p.52
Chapter 4.4.3.2 --- Rg calculation --- p.52
Chapter 4.4.3.3 --- Ql calculation --- p.53
Chapter 4.4.3.4 --- wT calculation --- p.53
Chapter 4.4.3.5 --- x calculation --- p.53
Chapter 4.5 --- Simulation Result of the low noise amplifier (100 finger gate poly) --- p.54
Chapter 4.5 --- Experimental Result of the low noise amplifier (100 finger gate poly) --- p.56
Chapter 5. --- Down-conversion Mixer --- p.58
Chapter 5.1 --- Introduction --- p.58
Chapter 5.2 --- Gilbert Cell Mixer --- p.59
Chapter 5.2.1 --- Circuit Description --- p.59
Chapter 5.2.2 --- Basic Operation --- p.60
Chapter 5.2.3 --- Simulation Result of the Gilbert Cell Mixer --- p.62
Chapter 5.3 --- Single-ended to Differential-ended Converter --- p.66
Chapter 5.3.1 --- Simulation Result of the Single-Ended to Differential-Ended Converter --- p.68
Chapter 5.4 --- Experimental Result of The Gilbert Cell Mixer --- p.70
Chapter 5.4.1 --- 1-dB compression point experiment --- p.70
Chapter 5.4.2 --- IIP3 experimental setup and result --- p.72
Chapter 5.4.3 --- "Experimental result of 1 -dB compression point, IIP3, conversion gain, SFDR and BDR" --- p.74
Chapter 5.4.4 --- LO power verse conversion gain --- p.75
Chapter 5.4.5 --- Intermediate frequency verse conversion gain --- p.77
Chapter 5.4.6 --- Experimental result of input matching and isolation --- p.78
Chapter 6. --- Asymmetric Polyphase Network --- p.81
Chapter 6.1 --- Introduction --- p.81
Chapter 6.2 --- Performance of the Asymmetric Polyphase Network --- p.81
Chapter 6.2.1 --- First Building Block --- p.82
Chapter 6.2.2 --- Second Building Block --- p.83
Chapter 6.2.3 --- Third Building Block --- p.84
Chapter 6.2.4 --- Forth Building Block --- p.84
Chapter 6.3 --- Simulation result of the asymmetric polyphase network --- p.85
Chapter 6.4 --- Experimental result of the asymmetric polyphase network --- p.86
Chapter 7. --- Conclusion --- p.87
Chapter 8. --- Reference --- p.89
Chapter 9. --- Appendix A --- p.92
Chapter 10. --- Appendix B --- p.95
Chapter 11. --- Appendix C --- p.98
Chapter 12. --- Appendix D --- p.99

The wide bandwidth employed in the UWB system allows for high data-rate communications, while its broadband nature requires it to coexist with other systems. For instance, several communication systems, such as digital TV, wireless LANs, WiMAX, and satellite receivers, utilize spectrum that is in the UWB band. According to Federal Communications Commission (FCC) regulations, the power spectral density (PSD) of UWB devices for communication applications is limited to less than -41.25dBm/MHz in the 3.1-10.6GHz frequency band, to minimize the impact of UWB on other systems. The impact of narrowband signals on UWB systems can also be significant, even though these signals may occupy a small part of the UWB spectrum, due to their much larger power. The performance and capacity of UWB systems can be significantly degraded by these narrowband interferers. In-band interference can be tolerated by increasing the dynamic-range of the receiver such that the interferers are accommodated within the linear range of the receiver. Alternatively, if the interferers can be avoided altogether, the excessive linearity requirements imposed by the interferers can be relaxed. Such an avoidance mechanism requires the ability to detect interferers. This work presents a low-power and low-cost detector for this purpose that can be employed in multi-band approaches to UWB, including pulse-based schemes, and those employing OFDM. The UWB band is divided into narrower sub-bands in these schemes. During transmission, the carrier hops to a new sub-band every symbol. The detector is designed to provide a profile of interference over the entire UWB spectrum, during each symbol period. This information would be available to the main-path UWB receiver to decide a frequency sequence of sub-band hopping, in order to avoid sub-bands occupied by large interferers. This relaxes the dynamic-range requirement, and hence the power dissipation of the main-path receiver, thus compensating for the extra power dissipation of the detector. The detector is based on a cascade of image-reject downconverter stages. An implementation of the architecture is demonstrated in a 0.13[mu]m CMOS process.
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Orthogonal frequency division multiplexing (OFDM) has become the foundation technique in modern broadband wireless communications, such as wireless local area network (WLAN, IEEE 802.11a,g,n), wireless metropolitan area network (WiMAX,IEEE 802.16) and cellular network (long term evolution (LTE) and 4G). However, future OFDM systems see challenging problems, associated with increased data rate and signal bandwidth requirement. Signal with larger bandwidth not only leads to severer frequency-domain channel fading, but also imposes more constraints and challenges on hardware. For example, in multi-band OFDM UWB systems, where the bandwidth of signal is more than 500MHz, analog to digital converter (ADC) becomes one of the bottlenecks of system development. Spectrum efficiency becomes more important due to the scarce spectrum resource and increased bandwidth requirement. OFDM improves spectrum efficiency by removing the guard band required in conventional frequency division systems, however, the temporal guarding interval used in OFDM is questioned as a factor that reduces spectrum efficiency. Some alternative approaches have been investigated to reduce the overhead, for example, the pseudo-random prefix (PRP). One better way of improving spectrum efficiency is to apply resource optimization techniques, which assign system resources to users adaptively according to users' link requirements and channel conditions. Spatial division multiple access (SDMA), as an extension of the optimization technique to multi-access systems, exploits spacial redundancy and significantly increases system capacity. This thesis investigates several solutions for these challenging problems, with focus on addressing the difference between using zero padding and cyclic padding, ADC solution for signals with extremely large bandwidth, and joint design of transmit and receive beamforming for SDMA systems. It is highlighted that timing error in zero-padded OFDM system causes intercarrier interference, which is very different to OFDM system with cyclic prefix where only phase rotation is arisen; Frequency-channelized ADC is proposed for OFDM systems with very large bandwidth, and receiver baseband implementation including synchronization and equalization is studied. The proposed receiver does not require a signal reconstruction module which was commonly needed in such systems; Some novel joint beamforming design schemes are proposed within the framework of multiuser multiple-input multiple-output systems following minimum mean square error (MMSE) criterion. In a SDMA system with codebook based channel feedback, the proposed schemes can efficiently mitigate the multiuser interference due to the channel quantization error, and speed up the searching process significantly.

The application of digital signal processing to radio communications has come of age with the advent of low power, high speed microprocessors and over the past five years, various transceiver architectures, utilizing this new technology have been extensively researched. Due to the flexible nature of a software based transceiver, a myriad of possible applications exist and currently the emphasis is on the development of suitable algorithms. The principal aim of this research is the derivation of optimized digital signal processing algorithms applicable to three separate areas of radio communications. Optimized, as used by the author within this dissertation, implies a reasonable compromise between performance, complexity and numerical processing efficiency. This compromise is necessary since the algorithms are applied to a portable transceiver where power consumption, size and weight are limited. The digital signal processing algorithms described by this research is as follows:- 1. The derivation and assessment of a multirate speech amplitude modulation demodulator which exhibits low distortion (typically less than 2%) for a wide range of modulation indices, carrier frequency offsets and deviations. The demodulator is processing efficient and requires only five multiplications and five decisions for every output sample. 2. The derivation and assessment of a low sampling rate speech frequency modulation demodulator for signals whose bandwidth exceed quarter the sampling frequency. The demodulator exhibits low distortion (typically less than 2%) and is processing efficient requiring eighteen multiplications and three decisions for every output sample. 3. The derivation and assessment of a multirate single-sideband suppressed carrier automatic frequency control system which is a combination of a simple second order adaptive line enhancer and a digital phase-locked loop. The processing efficient automatic frequency control system is suited for low signal to noise power conditions, in both stationary and mobile communication channels.
Thesis (Ph.D.)-University of Natal, Durban, 1992.

M.Ing.
The increase of interest in the development of radio communications, both terrestrial and satellite is reaching far and beyond the most optimistic expectations. There has been an accelerated emergence of newer technologies, all claiming highly coveted radio frequency spectrum resources. With the push for the development of location based services, utilizing satellite com- communications for military purposes and later for civilian use; there has been a parallel development in terrestrial communications technology making it possible to implement cost efficient reliable user systems for voice and data services ...

High speed serial links are critical components for addressing the growing demand for I/O bandwidth in next-generation computing applications, such as many-core systems, backplane and optical data communications. Due to continued process scaling and circuit innovations, today's CMOS serial link transceivers can achieve tens of Gb/s per pin. However, most of their reported power efficiency improves much slower than the rise of data rate. Therefore, aggregate I/O power is increasing and will exceed the power budget if the trend for more off-chip bandwidth is sustained. In this work, a system level statistical analysis of serial links is first described, and compares the link performance of Non-Return-to-Zero (2-PAM) with higher-order modulation (duobinary) signaling schemes. This method enables fast and accurate BER distribution simulation of serial link transceivers that include channel and circuit imperfections, such as finite pulse rise/fall time, duty cycle variation, and both receiver and transmitter forwarded-clock jitter. Second, in order to address link power efficiency, two test chips have been implemented. The first one describes a quad-lane, 6.4-7.2 Gb/s serial link receiver prototype using a forwarded clock architecture. A novel phase deskew scheme using injection-locked ring oscillators (ILRO) is proposed that achieves greater than one UI of phase shift for multiple clock phases, eliminating phase rotation and interpolation required in conventional architectures. Each receiver, optimized for power efficiency, consists of a low-power linear equalizer, four offset-cancelled quantizers for 1:4 demultiplexing, and an injection-locked ring oscillator coupled to a low-voltage swing, global clock distribution. Measurement results show a 6.4-7.2Gb/s data rate with BER < 10⁻¹² across 14 cm of PCB, and an 8Gb/s data rate through 4cm of PCB. Designed in a 1.2V, 90nm CMOS process, the ILRO achieves a wide tuning range from 1.6-2.6GHz. The total area of each receiver is 0.0174mm², resulting in a measured power efficiency of 0.6mW/Gb/s. Improving upon the first test chip, a second test chip for 8Gb/s forwarded clock serial link receivers exploits a low-power super-harmonic injection-locked ring oscillator for symmetric multi-phase local clock generation and deskewing. Further power reduction is achieved by designing most of the receiver circuits in the near-threshold region (0.6V supply), with the exception of only the global clock buffer, test buffers and synthesized digital test circuits at nominal 1V supply. At the architectural level, a 1:10 direct demultiplexing rate is chosen to achieve low supply operation by exploiting high-parallelism. Fabricated in 65nm CMOS technology, two receiver prototypes are integrated in this test chip, one without and the other with front-end boot-strapped S/Hs. Including the amortized power of global clock distribution, the proposed serial link receivers consume 1.3mW and 2mW respectively at 8Gb/s input data rate, achieving a power efficiency of 0.163mW/Gb/s and 0.25mW/Gb/s. Measurement results show both receivers achieve BER < 10⁻¹² across a 20-cm FR4 PCB channel.
Graduation date: 2012

Ultra-wideband technology (UWB) has received tremendous attention since the FCC license release in 2002, which expedited the research and development of UWB technologies on consumer products. The applications of UWB range from ground penetrating radar, distance sensor, through wall radar to high speed, short distance communications. The CMOS integrated circuit is an attractive, low cost approach for implementing UWB technology. The improving cut-off frequency of the transistor in CMOS process makes the CMOS circuit capable of handling signal at multi-giga herz. However, some design challenges still remain to be solved. Unlike regular narrow band signal, the UWB signal is discrete pulse instead of continuous wave (CW), which results in the occupancy of wide frequency range. This demands that UWB front-end circuits deliver both time domain and frequency domain signal processing over broad bandwidth. Witnessing these technique challenges, this dissertation aims at designing novel, high performance components for UWB signal generation, down-conversion, as well as accurate timing control using low cost CMOS technology. We proposed, designed and fabricated a carrier based UWB transmitter to facilitate the discrete feature of the UWB signal. The transmitter employs novel twostage -switching to generate carrier based UWB signal. The structure not only minimizes the current consumption but also eliminates the use of a UWB power amplifier. The fabricated transmitter is capable of delivering tunable UWB signal over the complete 3.1GHz -10.6GHz UWB band. By applying the similar two-stage switching approach, we were able to implement a novel switched-LNA based UWB sampling receiver frontend. The proposed front-end has significantly lower power consumption compared to previously published design while keep relatively high gain and low noise at the same time. The designed sampling mixer shows unprecedented performance of 9-12dB voltage conversion gain, 16-25dB noise figure, and power consumption of only 21.6mW(with buffer) and 11.7mW(without buffer) across dc to 3.5GHz with 100M-Hz sampling frequency. The implementation of a precise delay generator is also presented in the dissertation. It relies on an external reference clock to provide accurate timing against process, supply voltage and temperature variation through a negative feedback loop. The delay generator prototype has been verified having digital programmability and tunable delay step resolution. The relative delay shift from desired value is limited to within 0.2%.