Dissertations / Theses on the topic 'Switch faults'

In the future, the performance of the railway system must be improved to accommodate increasing passenger volumes and service quality demands. Track switches are a vital part of the rail infrastructure, enabling traffic to take different routes. All modern switch designs have evolved from a design first patented in 1832. However, switches present single points of failure, require frequent and costly maintenance interventions, and restrict network capacity. Fault tolerance is the practice of preventing subsystem faults propagating to whole-system failures. Existing switches are not considered fault tolerant. This thesis describes the development and potential performance of fault-tolerant railway track switching solutions. The work first presents a requirements definition and evaluation framework which can be used to select candidate designs from a range of novel switching solutions. A candidate design with the potential to exceed the performance of existing designs is selected. This design is then modelled to ascertain its practical feasibility alongside potential reliability, availability, maintainability and capacity performance. The design and construction of a laboratory scale demonstrator of the design is described. The modelling results show that the performance of the fault tolerant design may exceed that of traditional switches. Reliability and availability performance increases significantly, whilst capacity gains are present but more marginal without the associated relaxation of rules regarding junction control. However, the work also identifies significant areas of future work before such an approach could be adopted in practice.

La pile à combustible, en raison de son faible niveau de tension de fonctionnement et de sa caractéristique volt-ampèremétrique non linéaire, nécessite la présence d’un convertisseur statique de type DC-DC pour la relier à la charge dans le but d’augmenter le niveau de tension et de réguler cette dernière à une valeur constante. Le convertisseur DC-DC du type hacheur élévateur à phases parallèles et à commandes entrelacées est un choix intéressant de part une conception assez simple, une bonne fiabilité, une faible ondulation du courant d'entrée, ce qui est bénéfique pour le fonctionnement à long terme de la pile à combustible. Cependant, le contrôle de cette topologie de convertisseur doit prendre en compte certains critères comme les incertitudes de valeurs au niveau des composants passifs (résistance parasite et tolérance d'inductance / capacité) et des perturbations de l’association pile à combustible – convertisseur – charge (variations du courant de charge et de la tension de la pile à combustible selon le point de fonctionnement envisagé et prise en compte des défauts électriques internes au convertisseur). Dans le but d'améliorer les performances statique et dynamique du système pile à combustible en modes de fonctionnement sain et défaillant, la commande du convertisseur à phases parallèles et à commandes entrelacées avec prise en compte de la robustesse face aux perturbations internes et externes est étudiée dans cette thèse.Pour mieux gérer les incertitudes liées aux paramètres électriques du convertisseur et les perturbations externes (pile à combustible ou charge), un contrôleur de tension robuste basé sur un observateur d'état étendu (ESO) dans le cadre de l'algorithme de contrôle actif du rejet de perturbation (ADRC) est proposé et appliqué à la topologie de convertisseur envisagée pour une application pile à combustible. La comparaison avec le contrôleur du type PI montre que la méthode proposée peut obtenir une meilleure capacité de rejet des perturbations sans dépassement de la réponse à la suite d’un échelon du courant de charge ou à une variation du niveau de tension d’entrée. Le contrôleur proposé est également validé sur une seconde topologie de convertisseur qui est une variante de la première et permettant un gain d’élévation en tension plus élevé.L’apparition d’un défaut électrique sur les interrupteurs de puissance du convertisseur entraîne généralement la perte d’une phase de celui-ci. Ceci occasionne des effets néfastes considérables sur les performances du contrôleur. Par conséquent, un contrôleur adaptatif amélioré, avec la prise en compte des défauts électriques sur les interrupteurs est proposé sur la base du contrôleur développé précédemment. Le contrôleur proposé peut maintenir un fonctionnement continu et obtenir de bonnes performances en cas de défauts. De plus, une méthode de diagnostic basé-modèle de défauts d’interrupteurs de puissance en s’appuyant sur un observateur de mode glissant est proposée et appliquée au système pile à combustible étudié. L'approche proposée dans ce manuscrit permet de diagnostiquer efficacement un défaut d’interrupteur de puissance et de montrer une forte robustesse à l'incertitude des paramètres du convertisseur et aux perturbations externes. Enfin, pour optimiser l'ondulation du courant d'entrée élevée à la suite de la perte d’une phase du convertisseur provoquée par un défaut sur l’un des interrupteurs, une nouvelle méthode de reconfiguration de la commande en appliquant une adaptation du déphasage entre les phases restantes est proposé. En comparaison avec une reconfiguration classique par un déphasage uniforme entre les phases, celle proposée permet une réduction significative de l'ondulation du courant d’entrée après l’apparition, la détection et la reconfiguration d’un défaut. Les différentes méthodes proposées sont toutes validées par des résultats de simulation et expérimentaux
The relatively low voltage and the nonlinear volt-ampere curve of the fuel cell (FC) stack necessitate the interface with the DC-DC power converter, in order to boost and regulate a constant DC bus voltage to satisfy the load requirement. The multi-phase interleaved converter by associating basic converter units via parallel structure is an attractive choice. It features high reliability, and it enables a low input current ripple via phase interleaving, which is beneficial for the long-time operation of the FC stack. The converter for FC application suffers from the converter uncertainties (parasitic resistance and inductance / capacitance tolerance), the external disturbances (dynamic load demand on the output side and variable source voltage on the input side), and the device fault (e.g., switch fault) uncertainty. Aiming to improve the steady-state and dynamic performance under healthy and switch fault mode of the system, the control of the interleaved converter with switch fault consideration for FC application is studied in this thesis.To better deal with the converter uncertainty and external disturbance, a robust voltage controller based on extended state observer (ESO) within the framework of active disturbance rejection control (ADRC) algorithm is proposed and applied to an interleaved boost converter for FC application. The comparison with PI control shows that the proposed method can achieve better disturbance rejection ability without overshoot in step response. The application of the proposed method to another interleaved converter (i.e., floating interleaved boost converter, FIBC) validates again its feasibility.The switch fault generally leads to the loss of the phase of the interleaved converter, which has considerable adverse effects on the controller performance. Therefore, an improved adaptive controller is proposed and applied to a FIBC with switch fault consideration, based on the previously developed controller. The proposed controller adapts the parameter in real-time. It can maintain continuous operation and achieve good performance in both healthy and switch fault mode. Furthermore, a switch fault diagnosis method based on sliding mode observer is proposed and applied to the FIBC for FC application. The proposed approach can diagnose the switch fault effectively, and it shows strong robustness to the converter uncertainties and external disturbances. Finally, to optimize the undesired high input current ripple of the FIBC caused by the switch fault, a novel post-fault control method by applying uneven phase shift reconfiguration is proposed. In comparison with the even phase shift reconfiguration, the proposed one can achieve significant improvement in reducing the post-fault current ripple. The effectiveness of the proposed methods is validated by the simulation and experimental results

The present thesis deals with fault impact mitigation in grid connected converters used for High Voltage Direct Current transmission. Certain critical fault cases require additional obstructing protection actions to ease the impact on the converter valves. DC sided faults drives high fault currents through the converters. Single phase to ground faults at the converter AC bus results in overvoltages across the converter valve arms. The phenomenon of these faults are described both for symmetric and asymmetric configurations. Different available solutions are explained and evaluated. Simulations in PSCAD/EMTDC show the impact of the protection measures. A three phase short circuit introduced on the tertiary winding of the transformer is an effective temporary measure against the destructive fault cases. It is shown in this report that a tertiary shortcircuit will greatly reduce the overvoltages after converter bus faults and redirect a large part of the fault currents after DC faults. With the lower voltage on the tertiary winding, it is a suitable connection point for short circuit devices.

Large-scale changes are common in genomes, and are often associated with pathological disorders. In the work presented in this dissertation, I provide insights into how inverted repeat sequences in budding yeast fuse during replication. Fusion leads to the formation of dicentric chromosomes, a translocation, and other chromosomal rearrangements.Using extensive genetics and some molecular analyses, I demonstrate that dicentric chromosomes are key intermediates in genome instability of a specific chromosome in budding yeast. I provide three pieces of evidence that is consistent with this conclusion. First, I detect a recombination fusion junction that is diagnostic of a dicentric chromosome (using a PCR technique). Second, I show a strong correlation between the amount of the dicentric fragment and the frequency of instability of the entire chromosome. Third, I demonstrate that a mutant known to stabilize dicentric chromosomes suppress instability. Based on these observations, I conclude that dicentric chromosomes are intermediates in causing genome instability in this system.Next, we demonstrate that fusion of inverted repeats is general. Both endogenous and synthetic nearby inverted repeats can fuse. Using genetics, I also show that many DNA repair and checkpoint pathways suppress fusion of nearby inverted repeats and genome instability. Based on our analysis, we propose a novel mechanism for fusion of inverted repeats that we term `faulty template switching.'Lastly, I discuss two genes that are necessary for fusion of nearby inverted repeats. I identified a mutant of the Exonuclease 1 (Exo1) and a mutant of anaphase inhibitor securin (Pds1) that suppress nearby inverted repeat fusion and genome instability. Studies of Exo1 and Pds1 provide us with insights into the molecular mechanisms of fusion.Our finding that nearby inverted repeats can fuse to form dicentric chromosomes that lead to genome instability may have great implications. The generality of this fusion reaction raises the possibility that dicentric chromosomes formed by inverted repeats can lead to genome instability in mammalian cells, and thereby contribute to a cancer phenotype.

One of the most parts of VOIP management is fault management and, in having a good fault management, finding good mechanisms to detect faults in the network have to be considered.

The main focus of this project is to implement different types of fast fault recovery protocols in networks, especially networks that carry IP telephony. Having a complete understanding of some common link failure detection and fault recovery protocols, such as spanning tree protocol (STP), rapid spanning tree protocol (RSTP) and per-VLAN spanning tree protocol (PVSTP), and also having a complete understanding of three other common techniques for fault detection and fault recovery, such as hot standby routing protocol (HSRP), virtual router redundancy protocol (VRRP) and gateway load balancing protocol (GLBP) will be regarded in the project. We are going to test some fault recovery protocols which can be used in IP telephony networks and choose the best. We intend to focus on this issue in LAN environment in theoretical descriptions and practical implementations.

The final outcome of the thesis is implementation in the Halmstad University’s lab environment to obtain the final result. For doing our thesis, we are going to use some technical tools as hardware tools (Cisco L3 and L2 switches, Routers, IP Phones) and tools which are used for network performance monitoring, like as CommVeiw.

In order to provide improved service quality to applications, networks need to address the need for reliability of data delivery. Reliability can be improved by incorporating fault tolerance into network routing, wherein a set of multiple routes are used for routing between a given source and destination. This thesis proposes a new fault-tolerant protocol, called the Multipath Fault Tolerant Protocol for Routing (MFTPR), to improve the reliability of network routing services. The protocol is based on a multipath discovery algorithm, the Quasi-Shortest Multipath (QSMP), and is designed to work in conjunction with the routing protocol employed by the network. MFTPR improves upon the QSMP algorithm by finding more routes than QSMP, and also provides for maintenance of these routes in the event of failure of network components. In order to evaluate the resilience of a pair of paths to failure, this thesis proposes metrics that evaluate the non-disjointness of a pair of paths and measure the probability of simultaneous failure of these paths. The performance of MFTPR to find alternate routes based on these metrics is analyzed through simulation.

As the world moves towards a cleaner and greener future, electrical machines for various industrial purposes and transport applications have gained a lot of attention. Permanent magnet synchronous machines (PMSMs) are usually the solution for electric vehicle (EV) applications thanks to their high efficiency, compactness and high-power density. On the downside, although the price of rare-earth materials has recovered close to historical levels, concerns still remain and the questions on the environmental sustainability of these materials have also been raised, which has encouraged the researchers to consider rare-earth-free machines.The switched reluctance machine (SRM) is one of the competitive alternatives, thanks to the simple and robust construction, high reliability and inherent fault tolerance capability. However, it has a bad reputation when it comes to torque ripple and acoustic noise. And the highly nonlinear characteristic brings much difficulty to routine design purposes and machine optimisation.Therefore, some of the above mentioned problems are addressed - a torque-ripple-reduction, reliable and low-cost system of SRMs is presented in this thesis. Firstly from the modelling point of view, a combined magnetic equivalent circuit (MEC) and finite element (FE) model of SRMs is developed for fast characterization the nonlinear behavior. Secondly from the control point of view, various torque-ripple reduction techniques are implemented and compared. Moreover, a minimal current sensing strategy with enhanced fault-detection capability is proposed and validated experimentally. It requires two current sensors, to replace the phase current sensors, with no additional devices for fault detection, to achieve a more compact and low-cost drive. Finally from the reliability point of view, an interturn short-circuit fault detection method and a rotor position estimation approach are investigated and validated experimentally, which leads to a more reliable system.
Doctorat en Sciences de l'ingénieur et technologie
info:eu-repo/semantics/nonPublished

The aerospace industry is moving towards more-electric aircraft. These electrical systems are lighter, more efficient and smaller compared to present hydraulic system. The permanent magnet electrical machine is an obvious choice to replace these hydraulic systems because of its high torque density. However for low speed applications, there are significant drag torque issues which negate some of the machine’s advantages. This thesis introduces a new permanent magnet assisted segmental rotor switched reluctance machine. This machine was first designed by using finite element software and then compared with a conventional segmental rotor switched reluctance machine, showing an increase in torque by increasing non saturation region of the stator lamination. On this basis, a fault-tolerant permanent magnet assisted segmental rotor switched reluctance machine was designed to replace the permanent magnet machine used in the nose wheel of the aeroplane. Both two-dimensional and three-dimensional finite element analyses were conducted to analyse the dominant end winding effect. Fault-tolerant segmental rotor switched reluctance machine was then built and tested. Static analysis was conducted to determine current-flux linkage and torque values at different rotor angles. The machine was analysed both with and without magnets to assess the effect of reverse magnetization with magnets at the stator tooth tip. Mutual inductance was also found using the same test rig. Dynamic testing of the machine was done to determine open circuit voltage and short-circuit current. A novel pot core permanent magnet assisted inductor was also designed and compared with the conventional E-E core inductor. The magnet was used to hold the inductance of the inductor constant for high current values and the inductor was then tested to determine magnet’s effect. A dominant inner loop effect was found which was proved by doing several tests. Various recommendations were made to further improve overall performance of the machine and the inductor.

De nos jours, les véhicules électriques et hybrides ont suscité un très grand intérêt en raison de préoccupations environnementales et énergétiques. Dans ces véhicules, les machines électriques utilisées sont des machines conventionnelles asynchrones et synchrones à aimants permanents. La machine à réluctance variable est une technologie candidate potentielle pour les chaînes de traction électriques et hybrides. Cette machine conçue sans aimants et redondante peut réunir la robustesse et le faible coût de la machine asynchrone aux bonnes performances de la machine synchrone à aimants permanents. Dans ce contexte, le premier objectif de cette thèse est de proposer des stratégies de commandes robustes de la machine à réluctance variable par la prise en compte des contraintes des chaînes de traction électriques en vue de réaliser une étude comparative des performances. Dans cette étude, les commandes proposées sont les commandes classiques de type PI, les commandes par mode glissant et les commandes par mode glissant d'ordre supérieur. Le deuxième objectif consiste à développer des observateurs d'état pour la commande sans capteur de position mécanique de la machine à réluctance variable. Des observateurs robustes basés sur la théorie du filtre de Kalman étendu et les modes glissants sont synthétisés pour atteindre cet objectif. Enfin, le troisième objectif est de faire une analyse des défauts électriques de type circuit ouvert de l'étage électronique de puissance par l'approche signal afin de développer une méthodologie de détection et de localisation automatique de ces défauts
Nowadays, electric and hybrid vehicles are gaining increased attention due to environmental and energy concerns. In these vehicles, the electrical machines used are the conventional machines, namely induction and permanent magnet synchronous machines. The switched reluctance machine is a potential candidate technology for electric and hybrid drivetrains. This machine designed without magnets and redundant windings, can combine the robustness and low cost of induction machines to the good performance of permanent magnet synchronous machines. In this context, the first objective of this thesis is to propose robust control strategies of the switched reluctance machine, taking into account the constraints of electric vehicles in order to make a comparative performance study. In this study, PI control, sliding mode control and higher order sliding mode control are proposed. The second objective is to develop state observers for sensorless control. Robust observers based on extended Kalman filter theory and sliding modes are synthesized to achieve this goal. Finally, the third objective is to make an analysis of electrical open-circuit faults of the electronic power stage using the signal approach in order to develop a methodology of automatic fault isolation

Markov jump linear systems find application in many areas including economics, fault-tolerant control, and networked control. Despite significant attention paid to Markov jump linear systems in the literature, few authors have investigated Markov jump linear systems with time-inhomogeneous Markov chains (Markov chains with time-varying transition probabilities), and even fewer authors have considered time-inhomogeneous Markov chains with a priori unknown transition probabilities. This dissertation provides a formal stability and disturbance attenuation analysis for a Markov jump linear system where the underlying Markov chain is characterized by an a priori unknown sequence of transition probability matrices that assumes one of finitely-many values at each time instant. Necessary and sufficient conditions for uniform stochastic stability and uniform stochastic disturbance attenuation are reported. In both cases, conditions are expressed as a set of finite-dimensional linear matrix inequalities (LMIs) that can be solved efficiently. These finite-dimensional LMI analysis results lead to nonconservative LMI formulations for optimal controller synthesis with respect to disturbance attenuation. As a special case, the analysis also applies to a Markov jump linear system with known transition probabilities that vary in a finite set.
Ph. D.

This thesis presents the design and analysis of specialised control systems for switched reluctance (SR) and permanent magnet (PM) machines in vehicular electric applications. Control systems for operation in motoring and power generation are considered for both the types of machines. The SR machine operation considered in this thesis is mainly focused towards the application of aero-engine starter/generators. The control designs for PM machines are formulated considering general fault-tolerant and isolated multiphase PM machines which can be applied in the majority of safety-critical vehicular power and propulsion applications. The SR motoring mode presented in this thesis considers the control design for operation from zero speed to a high speed range, while SR generation mode is confined to the high speed range, such as for the requirements of aero-engine starter/generator operation. This thesis investigates applied control methods for both single-pulse and chopping modes of operation. Classical excitation control versus peak current control and the introduction of a zero-voltage interval are compared for SR motor operation. Optimized excitation control versus two classical forms of excitation control are developed and compared for SR generator operation. Studies include simulation of a 12/8 250kW machine and experimental work on a 6/4 300W machine. The PM motoring and power generation considered in this thesis focuses on a special class of PM machines and drives which are specifically designed for fault-tolerant operation. Optimized control strategies for the operation of PM machines with the parallel H-bridge per-phase converter architecture are investigated. Mathematical modelling of the machine and drive with a consideration of harmonics is presented. The developed control methods are then evaluated by means of finite-element model based simulations of a 125kW five phase surface PM rotor machine and an interior PM rotor machine.

Au sein d'un convertisseur la défaillance d'un composant de puissance est un événement critique tant par le risque d'explosion du boitier et sa propagation au sein du système (forte énergie stockée dans l'alimentation) que par l'interruption de service qui en découle (systèmes embarqués, systèmes de production en flux tendu). Ce mémoire de thèse propose un ensemble de solutions nouvelles portant sur la problématique de l'isolement ultime de défauts "derniers secours" d'une part, et sur la connexion "automatique" et à faible "coût" d'un circuit en secours. L'objectif de cette approche globale est de concilier "sécurité électrique absolue" et "continuité de service" pour les systèmes de conversion sensibles devant être intégrés au coeur des applications critiques. Le premier chapitre et son annexe permettent de rappeler les causes et les conséquences des défauts internes au sein d'une structure de base d'onduleur à deux niveaux de tension, laquelle fait l'objet de nombreuses simulations de modes dégradés en configuration variateur de vitesse sur machine synchrone. De cette analyse il ressort qu'une structure d'isolement symétrique à deux voies couplées, placées sur les pôles du bus DC, à déclenchement spontané (fusible) et/ou commande (rupteur), est à même de sécuriser toutes les mailles du circuit, de façon modulaire et non intrusive
In all these traditional industries, or in more sensitive sectors and high technology, it appears that the safe operation of power systems becomes a critical and strategic area essential. In the area of application that focuses, design dependability and now rests primarily on an approach to reliability of components used, the use of close protection, monitoring alarms and management stop / reset / recovery. In our view, this approach is incomplete quickly when electrical safety and absolute continuity of a permanent mission should be carried out simultaneously in the presence of an internal failure of sensitive functions for low and medium power (eg, orders and bodies actuation of vehicles) or highly critical (nuclear). In this area, topologies and failure modes are at the heart of the problem. In this paper, we will focus primarily on the inverters and choppers structures at two levels of voltage (single-cell arm, <1kV), with simple configuration and multiphase parallel, although the concepts are presented, as examples, partially extrapolated to the structures of three voltage levels (arms multicellular) and rectifier (low-frequency phase control and high-frequency switching PWM). We will highlight the need to limit the intensity of these failures and to electrically isolate the defective cell and symmetrically of this inverter by multipole devices, passive or spontaneous breaking mixed cut ordered in the form of fuses integrated and distributed of multi-channel passive isolators, to imagine and develop. We will show that this process of isolation of the last backup is needed to connect, form series or parallel to the defective cell, a cell rescue in passive redundancy. The cell structure backup connection pooled by spontaneous (automatic) is especially promising as detailed in our eyes because of its simplicity and its integrability. Next, we present the isolation technologies fuse (not included, miniatures, CMS and multilayer chip fuse), their characteristics, their current limitations and operating in a switching cell test. A methodology and design of symmetrical two-way fuse (dual-fuse) on FR4 PCB - Copper will be presented in Comsol ™ and evaluated initially in static thermal IR. A passive two-way switch, relatively original material for integrating energy embedded in FR4 substrate, will be presented and fully dimensioned plans on electrical, thermal and mechanical also using finite element simulations in Comsol ™. Another aspect of exploratory analysis, mainly experimental, or to characterize the failure modes of bullets and casings ultimate power compared between the technologies of encapsulation by epoxy resin (standard discrete case) and a silicone gel (module) is provided under conditions of stress controlled and reproducible. This step is necessary to characterize the resistive mode of a chip based on faulty stresses and stability over time of the residual strength according to the nature of the encapsulant, ie the very sustainability of this failure mode. A mixed-encapsulant resin - gel will be presented and characterized, providing an excellent compromise for medium power applications. Positive results and little known today, will allow us to exploit in the next chapter, this property of stable ohmic mode of the chip failed in a structure to aid automated connection series interesting. In the end, we will detail the demonstrator prototype and introduced to the context with which we will validate the isolation structures and prototypes fuses the property of stable ohmic mode highlighted in the aspect of technological analysis of selected devices. These results allow us to refine the solutions adopted for specifications and guide future management strategy of defects whether internal or external to the topology. Supervisor digital device - sensor for the detection and reconfiguration of internal control orders will be assessed

FPGAs are frequently used in network systems to provide the performance and flexibility that is required of modern computer networks while allowing network vendors to bring products to market quickly. Like all electronic devices, FPGAs are vulnerable to ionizing radiation which can cause applications operating on an FPGA to fail. These low-level failures can have a wide range of negative effects on the performance of a network system. As computer networks play a larger role in modern society, it becomes increasingly important that these soft errors are addressed in the design of network systems.This work presents a framework for testing the soft-error reliability of FPGA-based networking systems. The framework consists of the NetFPGA development board, a custom traffic generator, and a custom high-speed JTAG configuration device. The NetFPGA development board is versatile and can be used to implement a wide range of network applications. The traffic generator is used to exercise the network system on the NetFPGA and to determine the health of that system. The JTAG configuration device is used to manage reliability experiments, to perform fault injection into the FPGA, and to monitor the NetFPGA during radiation tests.This thesis includes soft-error reliability tests that were performed on an Ethernet switch network system. Using both fault injection and accelerate radiation testing, the soft error sensitivity of the Ethernet switch was measured. The Ethernet switch design was then mitigated using triple module redundancy and duplication with compare. These mitigated designs were also tested and compared against the baseline design. Radiation testing shows that TMR provides a 5.05x improvement in reliability over the baseline design. DWC provides a 5.22x improvement in detectability over the baseline design without reducing the reliability of the system.

The awareness of the human responsibility in global warming has led to various private and public initiatives to reduce the emission of greenhouse gases, up to international level. In this context the development of renewable technologies in two sectors having an important ecological footprint, i.e. production of electricity and transportation, is targeted.In the firstly mentioned sector, the progression of wind energy is at present the most rapid among all renewable energies. But wind turbines still suffer from a global lack of reliability and accessibility compared to classical power plants, leading to potentially important production losses and repair costs. The first part of the present work focuses on the improvement of the electrical chain reliability by the combination of an estimator and a fault-detection algorithm to achieve sensor-fault tolerance, taking benefit from the already available measurement redundancies on doubly-fed-induction-machine (DFIG) drives.Estimators and sensor-fault detection and isolation (FDI) in DFIGs have been the object of many research papers. However, most of them only consider one unique type of measurement and only a few works consider magnetic saturation. A new combination of a closed-loop observer with a cumulative-sum-based FDI technique, considering magnetic saturation and using limited computational resources is proposed here to estimate electromagnetic torque, rotor currents and position for sensor-fault detection and tolerance. This algorithm is then validated in steady state and in case of moderate transients, unbalanced conditions and misestimation of DFIG parameters. The estimator can also start on the fly during the start-up process of the generator.In the transportation sector, new hybrid and full-electric vehicles start to be visible on the roads, but still need important technological improvements in terms of autonomy, performances, but also produced noise and vibrations. The objectives of the second part of this doctoral thesis are related to this last challenge and consist of the experimental investigation of noise, vibration and harshness (NVH) aspects of an 8/6 switched-reluctance machine (SRM) designed for an electrical vehicle (EV).The NVH issues of SRMs, limiting their usage in automotive and other domains, have been the subject of various papers. However, most of them focus on modal analysis or detailed phenomena, while a global evaluation of NVH aspects of SRMs in normal working conditions is rarely made, as well as the use of reproducible sound metrics. A global and relatively fast experimental method to assess the evolution of noise and vibration is proposed. Tests are performed in transient regime, using continuously varying working conditions when possible, for the excitation of a large band of frequencies. The resulting current, radial vibration and acoustic noise are presented as spectrograms for an easy distinction of affected and unaffected frequencies and compared with the associated loudness and sharpness.Furthermore, the implementation of a new faster-sampled current-hysteresis controller has allowed to improve the quality of the control and of the acoustic noise by reducing the current-ripple amplitude and the excitation of resonances. The various tests show that the switching frequency has to be high enough to avoid exciting the ovalization mode of the SRM, but not too high to avoid producing a too sharp noise. The ripple amplitude also has to be considered to limit the loudness. Therefore, soft chopping, or a reduced DC-bus voltage at low speeds, has to be preferred with a relative small hysteresis bandwidth. Finally, the case of an open-phase fault has been investigated showing amplified even current orders in the vibration and acoustic-noise plots.
La prise de conscience de la responsabilité humaine dans le réchauffement climatique est à la source de nombreuses initiatives publiques et privées parfois internationales pour réduire les émissions de gaz à effet de serre. Dans ce contexte, le développement de technologies durables dans deux secteurs à forte empreinte écologique est visé: la production d'énergie électrique et les transports. Dans le premier secteur, la progression de l'éolien est à présent la plus rapide parmi toutes les énergies renouvelables. Cependant, les éoliennes souffrent d'un manque global de fiabilité et d'accessibilité par rapport aux centrales électriques classiques, ce qui conduit potentiellement à des pertes de production et des coûts de réparation importants. La première partie de ce travail se focalise sur l'amélioration de la chaîne électrique en la rendant tolérante aux défauts de capteurs au moyen de la combinaison d'un estimateur et d'un algorithme de détection de défauts, tirant avantage de la redondance de mesures déjà présente sur les entraînements à machines asynchrones à double alimentation (MADA). Les estimateurs et la détection et l'isolation de défauts de capteurs sur les MADA a fait l'objet de nombreuses publications scientifiques. Cependant, la plupart d'entre elles considèrent un seul type de mesure et peu de travaux prennent en compte la saturation magnétique. Une nouvelle combinaison d'un observateur et d'un algorithme de détection de défauts de type ‘CUSUM', considérant la saturation magnétique et nécessitant une puissance de calcul limitée, est proposée dans cette thèse pour l'estimation du couple électromagnétique, des courants et de la position rotoriques en vue d'obtenir la tolérance aux défauts de capteurs. Cet algorithme est validé en régime permanent et cas de transitoires modérés, de tensions du réseau déséquilibrées et d'erreurs d'estimation des paramètres de laMADA. L'estimateur est aussi capable de démarrer seul lors du démarrage de la génératrice. Dans le secteur des transports, des véhicules hybrides et électriques commencent à être visibles sur les routes, malgré que des progrès technologiques importants en termes d'autonomie, de performances, mais aussi de bruits et vibrations soient encore nécessaires pour une utilisation plus intensive. L'objectif de la deuxième partie de cette thèse se rapporte à ce dernier défi et consiste à analyser les aspects acoustiques et vibratoires d'une machine à réluctance variable 8/6 conçue pour propulser un véhicule électrique. Ces problèmes acoustiques et vibratoires, qui limitent notamment l'usage de telles machines dans des applications de propulsion, ont été l'objet de divers articles scientifiques. Cependant, la plupart d'entre eux sont focalisés sur des analyses modales ou de phénomènes particuliers, alors qu'une évaluation globale des problèmes de bruit et de vibration des machines à réluctance variable en conditions normales de fonctionnement est rarement proposée, de même que l'utilisation de critères de qualité sonore. Une méthode expérimentale globale et relativement rapide pour évaluer l'évolution du bruit et des vibrations est proposée dans ce travail. Les essais sont réalisés en régime transitoire pour exciter une large bande de fréquences et en faisant varier continuellement, quand cela est possible, les conditions de fonctionnement. Les courants, vibrations radiales et bruits acoustiques résultants sont présentés sous formes de cartographies couleur pour une distinction aisée des fréquences affectées et non-affectées et comparés aux niveaux calculés de bruyance et d'acuité correspondants. Par ailleurs, la mise en place d'un nouveau régulateur à hystérèse en courant à plus grande fréquence d'échantillonnage a permis d'améliorer la qualité de la commande et du bruit acoustique associé en réduisant l'amplitude des oscillations de courant et l'excitation des fréquences de résonance. Les essais montrent que la fréquence de commutation doit être suffisamment élevée pour éviter l'excitation du mode d'ovalisation de la machine, mais pas trop pour éviter une trop grande acuité du son produit. L'amplitude des oscillations doit aussi être considérée pour limiter la bruyance. En conséquence, une commande en ‘soft chopping', ou une tension réduite du bus continu à basse vitesse, doit être combinée à une bande d'hystérèse relativement faible. Enfin, le cas d'un défaut de phase ouverte a été étudié et a montré une amplification des ordres pairs du courant dans les spectres vibratoires et acoustiques.
De bewustwording van de menselijke verantwoordelijkheid in de opwarming van de aarde heeft tot verschillende private en publieke initiatieven geleid om de uitstoot van broeikasgassen te verminderen. In deze context is de ontwikkeling van hernieuwbare technologieën hoofdzakelijk gericht op twee sectoren met een belangrijke ecologische impact: elektriciteitsproductie en transport.In de eerste sector ontwikkelt windenergie zich op dit moment sneller dan alle andere hernieuwbare energieën. Maar windturbines lijden nog steeds aan een gebrek aan betrouwbaarheid en toegankelijkheid, en dus aan potentieel hogere productieverliezen en herstelkosten, als ze met klassieke krachtcentrales worden vergeleken. In het eerste deel van deze doctoraatsthesis wordt op de verbetering van de elektrische keten geconcentreerd door de combinatie van een schatter en een foutdetectie- en -isolatiealgoritme (FDI-algoritme) om sensorfouttolerantie te verkrijgen dankzij de reeds aanwezige meetovertolligheid op dubbelgevoede inductiemachine (DFIG) aandrijvingen.Schatters en sensor-FDI-algoritmen zijn het onderwerp van vele wetenschappelijke artikelen geweest. Meestal wordt maar één sensortype beschouwd en met de magnetische verzadiging wordt niet vaak rekening gehouden. Een nieuwe combinatie van een schatter met gesloten terugkoppeling en een FDI-techniek gebaseerd op het ‘cumulative-sum' principe is voorgesteld. Zo kan het elektromagnetische koppel, de rotorstromen en positie worden geschat voor sensor FDI en fouttolerantie met beperkte rekenkosten en zonder de magnetische verzadering te verwaarlozen. Het algoritme wordt in stabiele toestand gevalideerd, maar ook in het geval van gematigde transiënte situaties, onevenwichtige netwerkomstandigheden en een verkeerde schatting van DFIG parameters. Het kan ook vanzelf starten tijdens de startprocedure van de generator.In de vervoersector beginnen hybride en elektrische voertuigen op de wegen te rijden. Maar vooreen intensiever gebruik van zo'n wagens zijn er nog technologische verbeteringen nodig met betrekking tot autonomie, prestaties en ook geluid en trillingen (NVH). Het tweede deel van de thesis betreft die laatste uitdaging en bestaat uit het experimentele onderzoek van geluid en trillingen op een 8/6 variabelereluctantiemachine (SRM) ontwikkeld voor elektrische voertuigen.De NVH-problemen van SRM's beperken hun gebruik in automobiele en andere toepassingen enonderzoek wordt erover voortgezet. Vele wetenschappelijke artikelen focussen toch op modale analyse of gedetailleerde fenomenen terwijl een globale evaluatie van NVH aspecten in SRM's in gewone operatiecondities nauwelijks wordt gemaakt. Hetzelfde geldt voor het gebruik van reproduceerbare geluidsmetrieken. Een globale en vrij vlugge experimentele methode is hier voorgesteld om het NVH gedrag te schatten. Testen worden in transiënte situaties uitgevoerd om een brede frequentieband te exciteren, indien mogelijk met voortdurend variërende condities. De gemeten fasestroom, trilling en geluid worden als kleurmappen geplot om het verschil tussen beïnvloede en niet geaffecteerde frequenties te vergemakkelijken en met de berekende akoestische luidheid en scherpte vergeleken.Bovendien heeft de implementatie van een sneller bemonsterd stroomhysteresisregelaar geleid tot een verbetering van de regulatie- en akoestische kwaliteit door de amplitude van de stroomrimpeling en de excitatie van resonantiefrequenties te verminderen. De testresultaten tonen dat de schakelfrequentie voldoende hoog moet zijn om de excitatie van de ovale vervormingsmode te vermijden, maar niet te hoog om de scherpte van het geluid te beperken. De amplitude van de rimpel beïnvloedt ook de luidheid en daarvoor moet in aanmerking worden genomen. Bijgevolg zou ‘soft chopping'mode, of een lagere spanning op de DC-bus bij lage toerentallen, met een relatief klein hysteresisband beter worden gebruikt. Uiteindelijk wordt het geval van een openfasefout bestudeerd en onthult versterkte gelijke frequentievolgorden in de trilling- en geluidplots.
Doctorat en Sciences de l'ingénieur et technologie
info:eu-repo/semantics/nonPublished

Ce document synthétise mes travaux de thèse de doctorat en Automatique Productiqueà Grenoble INP (Institut National Polytechnique), thèse préparée au sein dudépartement automatique du laboratoire GIPSA-lab (Grenoble Image Parole Signal etAutomatique). Ce travail s’inscrit dans le cadre du contrôle local et de la supervisiondes systèmes de trafic routier. Les principales contributions portent sur la modélisation,la supervision et la commande locale des systèmes de trafic routier.La contribution apportée à la modélisation du trafic est l’ajout d’un modèle d’incertitudesur le modèle CTM (Cell Transmission Model [Daganzo, 1994]). Ce nouveaumodèle permet de prendre en compte les incertitudes sur différents paramètres dumodèle pour in-fine proposer de nouvelles stratégies de commandes commutées robustes.Outre cette approche de modélisation, nous proposons un niveau de supervisionpermettant d’une part d’estimer en temps réel le mode de fonctionnement et d’autrepart de détecter, localiser et estimer certaines fautes sur le système. L’estimation dynamiquede mode de fonctionnement nous permet de connaître l’état de congestion (ou denon-congestion) de l’aménagement routier considéré. Nous sommes en mesure de détecterdes fautes telles que des chutes de vitesse ou des chutes de capacité survenant sur la route.Enfin, nous proposons deux lois de commandes locales basées sur la théorie dessystèmes à commutations. Ainsi, le schéma de contrôle s’adaptera dynamiquementaux changements de propriétés du système. Ces lois de commande ont pour objet des’insérer dans un schéma de régulation hiérarchique
This document synthesizes my Phd thesis work in Automatic Control in Grenoble-INP. This thesis has been prepared in the automatic control department of thelaboratory GIPSA-lab. This work is situated in the area of traffic systems control andsupervision. Our contributions are about modeling, supervision and local traffic control.The CTM traffic model has been extended with a model of uncertainties. Thisnews model allows us to take into account the uncertain parameters of the model, topropose new robust switched control law.In addition to this modeling approach, we propose some developments on supervisionof trafic systems. On one hand, we can estimate the operating mode of thesystem in real time and on the other hand to estimate some faults on the system. Thedynamical estimation of the operating mode allows us to know the state of congestion(or non congestion) of the road. We are able to estimate faults such as speed fall andcapacities drop that may appear.Finally, we propose two control laws based on switching systems control. The developedcontrollers adapt their geometry to the properties of the system. The purposeof these controllers is to be inserted in a hierarchic control scheme

Ce travail de thèse traite de la problématique d’estimation des défauts et de l’étathybride pour une classe de systèmes linéaires à commutations. L’objectif est de développerune méthode afin de synthétiser un observateur et un estimateur dédiésrespectivement à l’estimation de l’état hybride et des défauts. Après la présentationd’un état de l’art sur les techniques d’estimation, de stabilité et de diagnosticpour les systèmes linéaires à commutations, la thèse est scindée en deux parties.La première partie propose une méthode d’estimation de l’état continu et desdéfauts dans le cas où l’état discret du système est connu. En se basant sur unetransformation de coordonnées qui découple un sous-ensemble de l’état du systèmedes défauts, nous avons synthétisé dans un premier temps un observateur hybridepour estimer l’état continu du système, et dans un second temps, un estimateurpermettant la reconstruction des défauts. L’estimateur de défauts proposé dépendde la dérivée de la sortie du système. Pour cette raison, un différenciateur robusteet exact basé sur des techniques des modes glissants est utilisé. Dans la secondepartie de ce mémoire, l’état discret du système est supposé inconnu. Une approchebasée sur des méthodes algébriques est proposée afin d’estimer les instants decommutation entre les différents sous-systèmes. Par la suite, l’estimation de l’étathybride (état continu et état discret) et des défauts est considérée dans le cas oùl’état discret du système est inconnu. Ce dernier est reconstruit en se basant surles instant de commutation estimé et sur une séquence de commutation connue.L’état continu du système est estimé en se basant sur une méthode de placementde pôles permettant d’améliorer les performances de la phase transitoire. Enfin, enexploitant des résultats trouvés dans la première partie, l’estimation des défautsest considérée en estimant la sortie du système avec un différenciateur algébrique.Ce différenciateur donne des résultats plus intéressants vis-à-vis du bruit par rapportau différenciateur basé sur les techniques des modes glissants utilisé dans lapremière partie
This work deals with the problem of estimation of fault and hybrid state for a classof switched linear systems. The objective is to develop a method to synthesize anobserver and an estimator dedicated respectively to the estimation of the hybridstate and the faults. After presenting a state of the art for estimation, stabilityand diagnostic techniques for switched linear systems, the report is divided intotwo parts. The first part proposes a method for estimating the continuous stateand the faults in the case where the discrete state of the system is known. Basedon a coordinate transformation which decouples a subset of the state of the systemof faults, we first synthesized a hybrid observer to estimate the continuous stateof the system and, in a second step, an estimator allowing the reconstructionof faults. The proposed fault estimator depends on the derivative of the systemoutput. For this reason, a robust and accurate differentiator based on sliding modetechniques is used. In the second part of this paper, the discrete state of the systemis assumed unknown. An algebraic approach is proposed to estimate the switchingtimes between the different subsystems. Thereafter, the estimation of the hybridstate (continuous and discrete state) and of the faults is considered in the casewhere the discrete state of the system is unknown. The latter is reconstructedfrom the estimated switching times and on a known switching sequence. Thecontinuous state of the system is estimated using a pole placement method allowingimprove the performances of the transient phase. Finally, by exploiting the resultsfound in the first part, the estimation of the faults is considered by estimatingthe output of the system with an algebraic differentiator. This differentiator givesmore interesting results at the noise compared to the differentiator based on thesliding mode techniques used in the first part

Ce travail de thèse porte, en premier lieu et principalement, sur le diagnostic à base de modèle d’une classe de SLC (Systèmes Linéaires à Commutations). Une problématique récurrente dans ce type de problème concerne la prise en considération de façon explicite les deux aspects, continu et discret, constituant un SLC. Dans ce cadre, nous avons proposé une méthodologie de détection et de localisation de défauts qui combine les outils initialement dédiés au diagnostic des systèmes continus et d’autres spécifiques aux SED (Systèmes à Evénement Discrets). L’approche proposée est conçue autour de trois modules : deux types de générateurs de résidus (issus de l’Automatique continue) et un estimateur en-ligne de l’état discret, appelé diagnostiqueur (issu de l’Automatique événementielle). Notre diagnostiqueur utilise les deux types de résidus, provenant de la partie continue, afin d’identifier le mode de fonctionnement du SLC et d’isoler les défauts de capteurs. Les résidus utilisés pour la localisation des défauts de capteurs sont générés à travers un générateur développé autour d’un schéma DOS (Dedicated Observer Scheme) à base d’observateurs hybrides,à la fois robustes vis-à-vis des entrées inconnues et sensibles aux défauts de capteurs. En second lieu, sur la base des résultats obtenus à l’aide de l’approche de diagnostic développée, nous avons proposé une approche préliminaire de synthèse de lois de commande tolérantes aux défauts de capteurs stabilisante via un retour d’état. Cette approche permet de préserver les performances nominales du système (situation non défaillante)en présence d’un défaut de capteurs. L’idée consiste à reconfigurer le retour d’état en remplaçant le vecteur d’état estimé à partir d’une sortie en défaut par un autre estimé à partir d’une sortie saine. La redondance des estimations est assurée dans cette approche par un banc d’observateurs hybrides robustes qui fournit plusieurs estimations correctes des vecteurs d’état et de sorties
This thesis focuses, in first and foremost, on the model-based diagnosis of a class of SLC (Switched Linear Systems). The basic idea is to consider the continuous and discrete aspects, forming an SLC, explicitly.In this context, we proposed a methodology for detecting and locating faults that combines the tools originally dedicated to the continuous systems and the DES (discrete event systems) diagnosis. The proposed approach is designed around three modules: two types of residual generators (from the continuous Automatic) and anon-line estimator of the discrete state, called diagnoser (from the event Automatic). Our diagnoser uses the residual generators issue from the continuous part to identify the SLC mode and isolate sensor faults.Residues used for fault location sensors are generated through a generator developed around a scheme DOS(Dedicated Observer Scheme) based on hybrid observers. These observers are robust vis-à-vis the unknown input and sensitive to sensor faults. Secondly, based on the obtained results using the previous diagnosis approach, we proposed a preliminary approach for fault-tolerant state-feedback control law synthesis. This approach preserves the nominal performance of the system (as non-defaulting) in the presence of defective sensors. The idea is to reconfigure the state feedback by replacing the state vector estimated from defected output by another estimated from non-defected one. Redundancy estimates is provided in this approach by a bank of robust hybrid observer that provides several accurate estimates of state vectors and outputs

Vodní energie se nyní stala nejlepším zdrojem elektrické energie na zemi. Vyrábí se pomocí energie poskytované pohybem nebo pádem vody. Historie dokazuje, že náklady na tuto elektrickou energii zůstávají konstantní v průběhu celého roku. Vzhledem k mnoha výhodám, většina zemí nyní využívá vodní energie jako hlavní zdroj pro výrobu elektrické energie.Nejdůležitější výhodou je, že vodní energie je zelená energie, což znamená, že žádné vzdušné nebo vodní znečišťující látky nejsou vyráběny, také žádné skleníkové plyny jako oxid uhličitý nejsou vyráběny, což činí tento zdroj energie šetrný k životnímu prostředí. A tak brání nebezpečí globálního oteplování. Použití internetové techniky k ovladání několika vodních elektráren má velmi významné výhody, jako snížení provozních nákladů a flexibilitu uspokojení změny poptávky po energii na straně spotřeby. Také velmi efektivně čelí velkým narušením elektrické sítě, jako je například přidání nebo odebrání velké zátěže, a poruch. Na druhou stranu, systém získávání dat poskytuje velmi užitečné informace pro typické i vědecké analýzy, jako jsou ekonomické náklady, predikce poruchy systémů, predikce poptávky, plány údržby, systémů pro podporu rozhodování a mnoho dalších výhod. Tato práce popisuje všeobecný model, který může být použit k simulaci pro sběr dat a kontrolní systémy pro vodní elektrárny v prostředí Matlab / Simulink a TrueTime Simulink knihovnu. Uvažovaná elektrárna sestává z vodní turbíny připojené k synchronnímu generátoru s budicí soustavou, generátor je připojen k veřejné elektrické síti. Simulací vodní turbíny a synchronního generátoru lze provést pomocí různých simulačních nástrojů. V této práci je upřednostňován SIMULINK / MATLAB před jinými nástroji k modelování dynamik vodní turbíny a synchronního stroje. Program s prostředím MATLAB SIMULINK využívá k řešení schematický model vodní elektrárny sestavený ze základních funkčních bloků. Tento přístup je pedagogicky lepší než komplikované kódy jiných softwarových programů. Knihovna programu Simulink obsahuje funkční bloky, které mohou být spojovány, upravovány a modelovány. K vytvoření a simulování internetových a Real Time systémů je možné použít bud‘ knihovnu simulinku Real-Time nebo TRUETIME, v práci byla použita knihovna TRUETIME.

碩士
國立高雄應用科技大學
電機工程系博碩士班
106
This thesis investigates the fault behavior and analysis for open-switch damages in active neutral point clamped inverters.This thesis analyzes the influence of the terminal voltage on the four working areas of the inverter operation first, and summarizes the fault analysis results.Then the Active neutral point clamped inverter is modeled in MATLAB/Simulink to analyze the performance of this inverter.This thesis analyses the working situation of the switching devices under the open-circuit fault, studies the specific fault characteristics and typical waveforms in detail.Finally, the simulation results illustrate that open switch faults diagnosis system can get correct and fast effect for identification.

碩士
國立清華大學
資訊科學學系
83
This paper proposes a fault-tolerant shuffleout ATM (asynchronous transfer mode) switch. As the switch size grows larger, reliability become more decisive. Any component failure could make the switch breakdown or crash the system performance if no fault-tolerant capability is provided. To achieve a high performance and reliability switch, we augment the shuffleout switch by adding some extra links and multiplexers between adjacent stages. When one fault occur, the performance requirement can be still satisfied with weakening that fault switch element. In addition, the level of performance is maintained with acceptable cell delay even through the number of faulty components increase.

碩士
國立清華大學
資訊科學學系
83
This thesis considers the problem of providing fault-tolerant capability for ATM (Asynchronous Transfer Mode) switching systems. The Knockout-banyan switch proposed by W. J. Cheng and W. T. Chen is self-routing, cost-effective, and very efficient at handling uniform traffic. However, any faults in links or switch elements may cause the performance of the switch degrades rapidly. To obtain a reliable and high-performance switching fabric, we add control lines to the switch element and modify the shared-links design of the Knockout-banyan switch to provide redundant paths from any source to any destination. The reliability of the proposed switch is analyzed. The analytical results show that the fault-tolerant design provides fault tolerance for any single failure and robust in the presence of multiple faults. A simulation study is also presented to evaluate the performance of the proposed architecture. It is shown that when faults occur, the performance of the Knockout-banyan switch will degrade gracefully.

碩士
國立交通大學
電子研究所
82
In the thesis, we investigate the fault-tolerant architectures of Shared Buffer Memory Switch(SBMS). The original SBMS proposed by Hitachi Ltd is based on single linked list to attain buffer management. However, if there is one error in the address chain memory which record the address of the next cell in the SBMS, the erroneous situation will spread over all all links in the SBMS. From our simulation, if one error injected into one port under uniform traffic with load 0.9, all eight ports will output cells not belonging to the original ports in about 80 cell slot time. In order to prevent from the fault spread problem, we propose two double linked list based architectures to combat adress chain failure. These two methods are Flush and In-Seq schemes. According to our simulation, if the error injection rate is low, the performance of In-Seq scheme experiences slight degradation comapred with error free situation.

碩士
國立清華大學
資訊工程學系
99
With the growing of cloud computing, the need of computing power no longer can be satisfied with a few powerful servers or small scale parallel computer systems. More and more servers are connected together as a data center network. Then, fault tolerance becomes an import issue when building a massive data center network. Currently, many researches focus on building fat-tree data center networks. In this paper, we propose a load balanced fat-tree architecture with uniform mapping connection patterns to provide higher fault tolerant capability for heavy traffic load networks. Two fault tolerated 4 × 4 banyan type switch designs are introduced to improve the fault tolerant capability of fat-tree networks. Finally, fault tolerant capability evaluations of link or switch faults in fat-tree network are given to support our idea, and a 4 × 4 banyan type switch IC is demonstrated as the commodity switch for building the fault tolerant fat-tree data center networks. The 4 × 4 banyan type switch IC is fabricated in 90 nm CMOS technology, and the maximum operation rate of the IC is 5.8 Gbps with only 23 ps peak-to-peak jitter.

碩士
國立臺北科技大學
製造科技研究所
107
Safety is the most important thing in the railway industry. The signal is the driving safety control system for protecting online trains; all trains operate in accordance with the signal system command to achieve safety objectives. The switch machine is the key equipment to Signal Interlocking System. In order to improve the reliability, the writer collects the switch machine data of fault, analyze it then propose a solution. Furthermore, the failure mode, effect and critical analysis (FMECA) is used to analyze the defects, weaknesses of the signaling system design to improve the design. The writer gathers fault statistics of the abnormality for a certain signaling system switch machine that operates in Taiwan, analyzes the data and proposes the solution. The conclusions obtained from the data analysis are as follows: (1) The higher number of inversions, the higher the failure rate. (2) The highest fault ratio is when the gap size between the switch machine and the track gap is not conformity with the specification and it needs to be adjusted. (3) Due to rainy, foggy and windy winds factors, the failure rate in hilly terrain is higher than the general terrain (4) The switch machine failure rate is 81.5% in the rainy season. (5) In the rainy season, rainwater and moisture are brought into the tunnel with the acceleration of the operating trains. Therefore, the failure probability of the switch machine in the tunnel section is not much different from the unsheltered section during the rainy season. (6) The failure rate in the hilly area during the rainy season is obviously higher. If there is enough manpower, it is suggested to have inspection monthly instead of quarterly from May to September. (7) There is no obvious correlation between the switch machine in the climbing section and the failure rate.

碩士
國立交通大學
資訊科學學系
83
In this thesis, we propose a new method to build a fault tolerant ATM switch. By this method, we can build an ATM switch which has two non-overlapping paths between each input/output pair. The key component in the proposed switch is a 2x2 FTSE (Fault Tolerant Switching Element) which can be the basic building block for high speed ATM switches. The design of the FTSE-based fault tolerant ATM switch is based on a multi-path, self-routing principle. The FTSE is made with the ability of fault tolerance by adding a few spares to the traditional Switching Element (SE) : mainly one spare Input Controller (IC) and two spare Output Controllers (OCs). By mathematical analysis, we conclude that our ATM switch uses less SEs and have more redundant paths than the other ATM siwtches. To eliminate the blocking problem we provide two shared buffers in the FTSE. The two shared buffers can make the usage of the buffers more efficient and fault tolerant as well. The ATM switch has been described by using VHDL. By VHDL simulation, we have verified the functionality of the switch. We also synthesize the ATM switch to evaluate its delay and area. The simulation and synthesis results demonstrate that the reliability/cost ratio of the FTSE-based fault tolerant ATM switch is better than that of other switches.

In recent years, with the development of micro and power electronics, the switched reluctance machine has been gaining popularity. This type of machine is attractive because it has a cheap and easy construction, having absence of rotor windings and permanent magnets. It has also an inherent fault tolerance ability. Due to this fault tolerance it has gained the attention of industries and applications that require safe and reliable operation. However, the machine is only fault tolerant to a point and, with the aim of improving its already high fault tolerance, multiple studies were conducted on the subject. In this dissertation a new passive fault tolerant method, comprising on simple modifications in the windings, converter and control method will be presented. Worth notice that one of the modifications is already discussed in the cited literature. This method is aimed principally at open circuit faults in the windings with the machine working as a motor in the low speed zone. The effectiveness of this method will be studied by comparison of a regular SRM with one with the solution through simulation of winding fault conditions, namely open and short circuits faults. In order to do this, first finite element analysis was performed, with the software Flux2D®, in order to obtain the magnetic and torque characteristics of the machines. This was followed by dynamic simulations in Matlab-simulink®. It will be shown that the method is very effective for open circuit faults but will only have negligible improvements in case of winding short circuits.

碩士
國立成功大學
電腦與通信工程研究所
98
In order to realize the various flexible, confidential and survivable capacities over passive optical network (PON), and to provide alternative routing paths while distribution fiber occurs errors. A new random fault-recovery mechanism with arrayed-waveguide grating-based (AWG-based) automatic optical switches (OSWs) are proposed and configured on optical code-division multiple-access transmissions over wavelength- division multiplexing PON scheme (the abbreviation will be WDM/OCDMA in this thesis). Under the conventional architecture without fault-recovery mechanism, the most concern is to decrease the construction processing and to prohibit too many duplicated redundant elements such as fiber/transceiver. When the transmission medium (only the distribution fiber will be discussed) occurs failures, the proposed AWG-based automatic optical switches are configured into a virtual star-mesh topology to transfer the affected ONU groups’ upstream or downstream wavebands to the others fibers which in the normal working state immediately. Moreover, the effect of multiple-access interference (MAI) and phase-induced intensity noise (PIIN) are investigated. By using these results and the concepts of “repeated combination”, we can obtain the weighted-average bit error rate (BER) of the conventional spectral-amplitude coding OCDMA (SAC-OCDMA) and our WDM/OCDMA (i.e., grouped SAC-OCDMA). However, under the same BER requirements, the results have shown that the proposed WDM/OCMDA scheme can provide more simultaneous active users than the conventional SAC-OCDMA scheme. Furthermore, while the new ONU groups (users) joined to our WDM/OCDMA transmission network, only connected them to the corresponding port of primary AWG-based OSW via the short interconnection fibers (IFs), then they also can obtain the fault-recovery capability. For these reasons, compared with the others related researches no matter in TDM- or WDM-PON, the proposed fault-recovery mechanism provides an alternative fault-recovery solution and achieves more scalability, flexibility and confidentiality.

碩士
國立高雄應用科技大學
電機工程系博碩士班
102
Currently, the street light system were managed by Taiwan Power Company that includes power supply, vanishing point control, repairing and maintenance. The street light system adopted parallel power supply and serial control in Taiwan, but the maintenance relys on manual handling work. Recently, Taiwan Power Company reflects that the street light switches always breakdown in Low Voltage System, and lead to the workers repairing frequently. The purpose of this study is to analyze the damage reason for the street light switches that Taiwan Power Company used. The first step is to collect the damaged cases of street light switches and discuss the design of the street light switches circuit and component specification. Besides, Using Equipment to make an experiment on surge test, temperature, and humidity for analyzing the street light switches in different environment. Finally, to select the monitoring place by the information, and building the real-time street light switch monitoring system. Though the GPRS Wireless communication technology, the information which includes voltage, current, temperature, and humidity will send back to data server, and display on the website. In the future, user can take the historical information to diagnosis by exporting the run chart to analyze the voltage, current, temperature and humidity. Keywords：Street Light Switch, Component Specification, Surge Test

碩士
國立高雄應用科技大學
電機工程系博碩士班
103
This paper investigates the circuit operation mode of three-level T-type inverter, analyses the three-level space vector modulation(SVM) and equivalent two-level space vector modulation, and studies the diagnosis strategy of a T-type inverter with an open-switch fault. The preliminary design is implemented in MATLAB/Simulink environment. The T-type inverter power circuit and the SVM signal generation module and the diagnosis module of open-switch fault are built. Then the characteristics of these two SVM methods are compared and the influence of switch-faults on circuit are discussed. Use the ISE software provided by Xilinx construct SVM control module and switch fault diagnosis system, and download the program to a development board for realization. According to the actual measurement results and compared with simulation ones, it is confirmed that the realization of SVM signal generator for T-type inverter and switch fault diagnosis system function by FPGA technology presents well performance.

碩士
國立高雄應用科技大學
電機工程系博碩士班
102
This thesis investigates the space vector modulation (SVM) applied to neutral-point-clamped inverters (NPC). Principles of three-level space vector modulation and equivalent two-level space vector modulation are discussed, then the performance of two modulation methods are analyzed in controlling the neutral point clamped inverter. The fault phenomenon is studied when the inverter unexpectedly failed during normal operation, and a fault diagnosis system is proposed to determine the position of fault switch. The Matlab/Simulink software is used for simulation. In the end, FPGA is used as a core technology in developing the SVM signal generator and fault diagnosis system. The design and simulation are implemented in Quartus II environment, and the program is downloaded to a development board for realization. From the actual measurement results illustrate that FPGA implementation of space vector modulation function is correct and fault diagnosis system can get correct effect for fault identification.

碩士
中原大學
電機工程研究所
106
This study presents a fault detection, classification and localization using the multiresolution analysis (MRA) of the discrete wavelet transform (DWT) and a Taguchi-based artificial neural network (ANN). The difference of wavelet energies of the three-phase fault voltages, three-phase fault currents and the wavelet energy of the ground fault current are utilized as inputs to the neural network. The wavelet energies are obtained from the local fault signals at the static switch located at the secondary side of the main transformer in the microgrid. The neural network identifies the faulty phase and the location of the fault. The neural network determines the control action (open or close) of the static switch when both the fault location and phase are identified. The proposed method is implemented in Renesas RX62T microcontroller. The microcontroller is then implemented in a Chip-in-the-loop with a real-time digital simulator. The DWT is also implemented using a 50-kVA static switch hardware.

碩士
國立交通大學
資訊科學學系
82
In this thesis, we propose two general crossbar switch models, the modified one-sided crossbar switch and the ripple k one- sided crossbar switch, which both balance between cost and fault tolerance degree. The two-sided crossbar switch and the one-sided crossbar switch are just two special cases of the above two new structures. These two structures provide choices for compromising structures between the two-sided crossbar siwtch and the one-sided crossbar switch in terms of cost and fault tolerance degree. We have derive a mathematical model to simulate the effective bandwidth of each crossbar switch. Simulation with VHDL has been performed to verify the functionality of each crossbar system. Synthesis has also been conducted to evaluate delay and area for each crossbar design.

This thesis is an investigation into structures and strategies for fault-tolerant communication. We assume the existence of some set of nodes--people, telephones, processors--with a need to pass messages--telephone calls, signals on a wire, data packets--amongst themselves. In Part I, our goal is to create a structure, that is, a pattern of interconnection, in which a designated source node can broadcast a message to (and through) a group of recipient nodes. We seek a structure in which every node has tightly limited fan-out, but which is nonetheless able to function reliably even when challenged with significant numbers of node failures. The structures are described only in terms of their connectivity, and we therefore use the language of graph theory. Part II is based on the observation that certain transformations of the graphs in Part I produce graphs that look like previously studied structures called non-blocking switches. We show that these transformations, when applied to other graphs, yield new, easier approaches to, and proofs of, some known theorems. Part III is an independent body of work describing some investigations into possible extensions of the theory of Kolmogorov-Chaitin complexity into the foundations of pattern recognition. We prove the existence of an information theoretic metric on strings in which the distance between two strings is a measure of the amount of specification required for a universal computer to interconvert the strings. We also prove two topological theorems about this metric.

碩士
國立交通大學
資訊科學學系
83
In this thesis, we analyse the reliability of three crossbar switches for shared memory multiprocessor systems: the one- sided crossbar switch}, the modified one-sided crossbar switch, and the ripple K one-sided crossbar switch. We also use FPGA tools to implement these three fault-tolerant one-sided crossbar switches. In a traditional two-sided crossbar switch, there is a unique-path between a processor and a memory module. It results in no fault-tolerance in the two-sided crossbar switch. The one-sided crossbar switch enhances the fault tolerance ability by providing multiple paths between a processor and a memory module. However, the cost of the one- sided crossbar switch is almost twice than that of the traditional two-sided crossbar switch. The drawback prevents the one-sided crossbar switch from applying in multiprocessor systems widespreadly. The two new switches can provide a trade- off between fault tolerance ability and cost. However, their reliabilities should be further verified. Results indicate reliability (R(t)) of either of these two switches remains 1 for first ten hours of operation as failure rate = 0.01. This prompts them to be applied to multiprocessors systems to enhance performance and reliability as well. In addition, we use the Synopsys FPGA (Field Programmable Gate Array) Compiler and the Xilinx tools to realize the three fault-tolerant one- sided crossbar switches using FPGAs. The main contribution of this thesis is promoting to adopt the two novel fault-tolerant one-sided crossbar switches in multiprocessor systems by further demonstrating their cost-effectiveness via reliability/ cost analysis and FPGA prototyping.

The main goal of this thesis is to develop practical digital controller architectures for multi-phase dc-dc converters utilized in low power (up to few hundred watts) and cost-sensitive applications. The proposed controllers are suitable for on-chip integration while being capable of providing advanced features, such as dynamic efficiency optimization, inductor current estimation, converter component identification, as well as combined dynamic current sharing and fast transient response. The first part of this thesis addresses challenges related to the practical implementation of digital controllers for low-power multi-phase dc-dc converters. As a possible solution, a multi-use high-frequency digital PWM controller IC that can regulate up to four switching converters (either interleaved or standalone) is presented. Due to its configurability, low current consumption (90.25 μA/MHz per phase), fault-tolerant work, and ability to operate at high switching frequencies (programmable, up to 10 MHz), the IC is suitable to control various dc-dc converters. The applications range from dc-dc converters used in miniature battery-powered electronic devices consuming a fraction of watt to multi-phase dedicated supplies for communication systems, consuming hundreds of watts. A controller for multi-phase converters with unequal current sharing is introduced and an efficiency optimization method based on logarithmic current sharing is proposed in the second part. By forcing converters to operate at their peak efficiencies and dynamically adjusting the number of active converter phases based on the output load current, a significant improvement in efficiency over the full range of operation is obtained (up to 25%). The stability and inductor current transition problems related to this mode of operation are also resolved. At last, two reconfigurable digital controller architectures with multi-parameter estimation are introduced. Both controllers eliminate the need for external analog current/temperature sensing circuits by accurately estimating phase inductor currents and identifying critical phase parameters such as equivalent resistances, inductances and output capacitance. A sensorless non-linear, average current-mode controller is introduced to provide fast transient response (under 5 μs), small voltage deviation and dynamic current sharing with multi-phase converters. To equalize the thermal stress of phase components, a conduction loss-based current sharing scheme is proposed and implemented.

Indiana University-Purdue University Indianapolis (IUPUI)
The substantial increase demand for electrical energy requires high efficient apparatus dealing with energy conversion. Several technologies have been suggested to implement power supplies with higher efficiency, such as multilevel and interleaved converters. This thesis proposes an energy conversion unit with an optimized number of output voltage levels per number of switches nL=nS. The proposed five-level four-switch per phase converter has nL=nS=5/4 which is by far the best relationship among the converters presented in technical literature. A comprehensive literature review on existing five-level converter topologies is done to compare the proposed topology with conventional multilevel converters. The most important characteristics of the proposed configuration are: (i) reduced number of semiconductor devices, while keeping a high number of levels at the output converter side, (ii) only one DC source without any need to balance capacitor voltages, (iii) high efficiency, (iv) there is no dead-time requirement for the converters operation, (v) leg isolation procedure with lower stress for the DC-link capacitor. Single-phase and three-phase version of the proposed converter is presented in this thesis. Details regarding the operation of the configuration and modulation strategy are presented, as well as the comparison between the proposed converter and the conventional ones. Simulated results are presented to validate the theoretical expectations. In addition a fault tolerant converter based on proposed topology for micro-grid systems is presented. A hybrid pulse-width-modulation for the pre-fault operation and transition from the pre-fault to post-fault operation will be discussed. Selected steady-state and transient results are demonstrated to validate the theoretical modeling.