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Journal articles on the topic 'Stencil mask'

Author: Grafiati
Published: 28 June 2021
Last updated: 5 February 2022

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1

Lee, Yong‐Won, Keun‐Soo Kim, and Katsuaki Suganuma. "The behaviour of solder pastes in stencil printing with electropolishing process." Soldering & Surface Mount Technology 25, no. 3 (June 21, 2013): 164–74. http://dx.doi.org/10.1108/ssmt-12-2012-0027.

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PurposeThe purpose of this paper is to study the effect of the electropolishing time of stencil manufacturing parameters and solder‐mask definition methods of PCB pad design parameters on the performance of solder paste stencil printing process for the assembly of 01005 chip components.Design/methodology/approachDuring the study, two types of stencils were manufactured for the evaluations: electroformed stencils and electropolished laser‐cut stencils. The electroformed stencils were manufactured using the standard electroforming process and their use in the paste printing process was compared against the use of an electropolished laser‐cut stencil. The electropolishing performance of the laser‐cut stencil was evaluated twice at the following intervals: 100 s and 200 s. The performance of the laser‐cut stencil was also evaluated without electropolishing. An optimized process was established after the polished stencil apertures of the laser‐cut stencil were inspected. The performance evaluations were made by visually inspecting the quality of the post‐surface finishing for the aperture wall and the quality of that post‐surface finishing was further checked using a scanning electron microscope. A test board was used in a series of designed experiments to evaluate the solder paste printing process.FindingsThe results demonstrated that the length of the electropolishing time had a significant effect on the small stencil's aperture quality and the solder paste's stencil printing performance. In this study, the most effective electropolishing time was 100 s for a stencil thickness of 0.08 mm. The deposited solder paste thickness was significantly better for the enhanced laser‐cut stencil with electropolishing compared to the conventional electroformed stencils. In this printing‐focused work, print paste thickness measurements were also found to vary across different solder‐mask definition methods of printed circuit board pad designs with no change in the size of the stencil aperture. The highest paste value transfer consistently occurred with solder‐mask‐defined pads, when an electropolished laser‐cut stencil was used.Originality/valueDue to important improvements in the quality of the electropolished laser‐cut stencil, and based on the results of this experiment, the electropolished laser‐cut stencil is strongly recommended for the solder paste printing of fine‐pitch and miniature components, especially in comparison to the typical laser‐cut stencil. The advantages of implementing a 01005 chip component mass production assembly process include excellent solder paste release, increased solder volume, good manufacture‐ability, fast turnaround time, and greater cost saving opportunities.
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2

Shibata, T., K. Suguro, K. Sugihara, T. Nishihashi, J. Fujiyama, and Y. Sakurada. "Stencil mask ion implantation technology." IEEE Transactions on Semiconductor Manufacturing 15, no. 2 (May 2002): 183–88. http://dx.doi.org/10.1109/66.999589.

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3

Deshmukh, Mandar M., D. C. Ralph, M. Thomas, and J. Silcox. "Nanofabrication using a stencil mask." Applied Physics Letters 75, no. 11 (September 13, 1999): 1631–33. http://dx.doi.org/10.1063/1.124777.

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4

Takenaka, H., H. Yamashita, Y. Tomo, Y. Kojima, M. Watanabe, T. Iwasaki, and M. Yamabe. "Dynamic analysis of a stencil mask." Microelectronic Engineering 61-62 (July 2002): 227–32. http://dx.doi.org/10.1016/s0167-9317(02)00543-9.

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5

SATO, Keiichi, Kazuhiro YOSHIDA, and Joon-wan KIM. "Development of magnetic material stencil mask." Proceedings of Yamanashi District Conference 2017 (2017): 205. http://dx.doi.org/10.1299/jsmeyamanashi.2017.205.

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6

Nishihashi, T., K. Kashimoto, J. Fujiyama, Y. Sakurada, T. Shibata, K. Suguro, K. Sugihara, et al. "Ion-graphy implanter with stencil mask." Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures 20, no. 3 (2002): 914. http://dx.doi.org/10.1116/1.1475982.

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7

Yamashita, Hiroshi, Kunio Takeuchi, and Hideki Masaoka. "Mask split algorithm for stencil mask in electron projection lithography." Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures 19, no. 6 (2001): 2478. http://dx.doi.org/10.1116/1.1412897.

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8

Reu, P., R. Engelstad, E. Lovell, C. Magg, and M. Lercel. "Modeling mask fabrication and pattern transfer distortions for EPL stencil masks." Microelectronic Engineering 57-58 (September 2001): 467–73. http://dx.doi.org/10.1016/s0167-9317(01)00470-1.

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9

Sprague, M., W. Semke, R. Engelstad, E. Lovell, A. Chalupka, H. Löschner, and G. Stengl. "Stencil mask distortion control using nonsymmetric perforation rings." Microelectronic Engineering 41-42 (March 1998): 225–28. http://dx.doi.org/10.1016/s0167-9317(98)00051-3.

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10

Butschke, J., A. Ehrmann, B. Höfflinger, M. Irmscher, R. Käsmaier, F. Letzkus, H. Löschner, et al. "SOI wafer flow process for stencil mask fabrication." Microelectronic Engineering 46, no. 1-4 (May 1999): 473–76. http://dx.doi.org/10.1016/s0167-9317(99)00043-x.

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11

Amemiya, Isao, Hiroshi Yamashita, Sakae Nakatsuka, Tadashi Sakurai, Ikuru Kimura, Mitsuharu Tsukahara, and Osamu Nagarekawa. "Stencil Mask Technology for Electron-Beam Projection Lithography." Japanese Journal of Applied Physics 42, Part 1, No. 6B (June 30, 2003): 3811–15. http://dx.doi.org/10.1143/jjap.42.3811.

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12

Didenko, L., J. Melngailis, H. Löschner, G. Stengl, A. Chalupka, and A. Shimkunas. "Analysis of stencil mask distortion in ion projection lithography." Microelectronic Engineering 35, no. 1-4 (February 1997): 443–46. http://dx.doi.org/10.1016/s0167-9317(96)00182-7.

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13

Riordon, James. "Stencil mask temperature measurement and control during ion irradiation." Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures 14, no. 6 (November 1996): 3900. http://dx.doi.org/10.1116/1.588690.

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14

Wasson, J. R. "Ion absorbing stencil mask coatings for ion beam lithography." Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures 15, no. 6 (November 1997): 2214. http://dx.doi.org/10.1116/1.589616.

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15

Zhang, Z. Q., D. Chiappe, A. Toma, C. Boragno, J. D. Guo, E. G. Wang, and F. Buatier de Mongeot. "GaAs nanostructuring by self-organized stencil mask ion lithography." Journal of Applied Physics 110, no. 11 (December 2011): 114321. http://dx.doi.org/10.1063/1.3665693.

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16

Yamashita, Hiroshi, Kimitoshi Takahashi, Isao Amemiya, Kunio Takeuchi, Hideki Masaoka, Hiroshi Takenaka, and Masaki Yamabe. "Complementary mask pattern split for 8 in. stencil masks in electron projection lithography." Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures 20, no. 6 (2002): 3015. http://dx.doi.org/10.1116/1.1518019.

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17

Lishchynska, Maryna, Victor Bourenkov, Marc A. F. van den Boogaart, Lianne Doeswijk, Juergen Brugger, and James C. Greer. "Predicting mask distortion, clogging and pattern transfer for stencil lithography." Microelectronic Engineering 84, no. 1 (January 2007): 42–53. http://dx.doi.org/10.1016/j.mee.2006.08.003.

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18

Rangelow, I. W. "p-n junction-based wafer flow process for stencil mask fabrication." Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures 16, no. 6 (November 1998): 3592. http://dx.doi.org/10.1116/1.590500.

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19

Ehrmann, A., T. Struck, A. Chalupka, E. Haugeneder, H. Löschner, J. Butschke, M. Irmscher, et al. "Comparison of silicon stencil mask distortion measurements with finite element analysis." Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures 17, no. 6 (1999): 3107. http://dx.doi.org/10.1116/1.590962.

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20

Maebashi, Hiroo, Takao Okabe, and Jun Taniguchi. "Stencil mask using ultra-violet-curable positive-tone electron beam resist." Microelectronic Engineering 214 (June 2019): 21–27. http://dx.doi.org/10.1016/j.mee.2019.04.022.

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21

Higashi, Kazuhiko, Kazuhiro Uchida, Atsushi Hotta, Koichi Hishida, and Norihisa Miki. "Micropatterning of Silica Nanoparticles by Electrospray Deposition through a Stencil Mask." Journal of Laboratory Automation 19, no. 1 (February 2014): 75–81. http://dx.doi.org/10.1177/2211068213495205.

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22

Amemiya, Isao, Hiroshi Yamashita, Sakae Nakatsuka, Ikuru Kimura, Mitsuharu Tsukahara, Satoshi Yasumatsu, and Osamu Nagarekawa. "Fabrication of complete 8 in. stencil mask for electron projection lithography." Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures 20, no. 6 (2002): 3010. http://dx.doi.org/10.1116/1.1523024.

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23

Dhamgaye, V. P., G. S. Lodha, B. Gowri Sankar, and C. Kant. "Beamline BL-07 at Indus-2: a facility for microfabrication research." Journal of Synchrotron Radiation 21, no. 1 (November 2, 2013): 259–63. http://dx.doi.org/10.1107/s1600577513024934.

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The X-ray lithography beamline on Indus-2 is now operational, with two modes of operation. With a pair of X-ray mirrors it is possible to tune the energy spectrum between 1 and 20 keV with a controlled spectral bandwidth. In its `no optics' mode, hard X-rays up to 40 keV are available. Features and performance of the beamline are presented along with some example structures. Structures fabricated include honeycomb structures in PMMA using a stainless steel stencil mask and a compound refractive X-ray lens using a polyimide–gold mask in SU-8.
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24

DeMarco, Anthony J., and John Melngailis. "Lateral growth of focused ion beam deposited platinum for stencil mask repair." Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures 17, no. 6 (1999): 3154. http://dx.doi.org/10.1116/1.590971.

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25

Yamashita, Hiroshi, Eiichi Nomura, Shoko Manako, Hideo Kobinata, Ken Nakajima, and Hiroshi Nozue. "Proximity effect correction by the GHOST method using a scattering stencil mask." Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures 17, no. 6 (1999): 2860. http://dx.doi.org/10.1116/1.591084.

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26

Shade, Paul A., Sang-Lan Kim, Robert Wheeler, and Michael D. Uchic. "Stencil mask methodology for the parallelized production of microscale mechanical test samples." Review of Scientific Instruments 83, no. 5 (May 2012): 053903. http://dx.doi.org/10.1063/1.4720944.

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27

Puce, Salvatore, Elisa Sciurti, Francesco Rizzi, Barbara Spagnolo, Antonio Qualtieri, Massimo De Vittorio, and Urs Staufer. "3D-microfabrication by two-photon polymerization of an integrated sacrificial stencil mask." Micro and Nano Engineering 2 (March 2019): 70–75. http://dx.doi.org/10.1016/j.mne.2019.01.004.

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28

Yoshizawa, Masaki. "Sub-50 nm stencil mask for low-energy electron-beam projection lithography." Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures 20, no. 6 (2002): 3021. http://dx.doi.org/10.1116/1.1521739.

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29

Okagawa, T., K. Matsuoka, Y. Kojima, A. Yoshida, S. Matsui, I. Santo, N. Anazawa, and T. Kaito. "Inspection of stencil mask using transmission electrons for character projection electron beam lithography." Microelectronic Engineering 46, no. 1-4 (May 1999): 279–82. http://dx.doi.org/10.1016/s0167-9317(99)00081-7.

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30

Kim, B. "Optimization of the temperature distribution across stencil mask membranes under ion beam exposure." Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures 16, no. 6 (November 1998): 3602. http://dx.doi.org/10.1116/1.590312.

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31

Arscott, Steve. "On evaporation via an inclined rotating circular lift-off shadow or stencil mask." Journal of Vacuum Science & Technology B 37, no. 1 (January 2019): 011602. http://dx.doi.org/10.1116/1.5057404.

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32

Shih, Fu-Yu, Shao-Yu Chen, Cheng-Hua Liu, Po-Hsun Ho, Tsuei-Shin Wu, Chun-Wei Chen, Yang-Fang Chen, and Wei-Hua Wang. "Residue-free fabrication of high-performance graphene devices by patterned PMMA stencil mask." AIP Advances 4, no. 6 (June 2014): 067129. http://dx.doi.org/10.1063/1.4884305.

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33

Couderc, Sandrine, Vincent Blech, and Beomjoon Kim. "New Surface Treatment and Microscale/Nanoscale Surface Patterning Using Electrostatically Clamped Stencil Mask." Japanese Journal of Applied Physics 48, no. 9 (September 24, 2009): 095007. http://dx.doi.org/10.1143/jjap.48.095007.

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34

Mekaru, Harutaka, Takayuki Takano, Yoshiaki Ukita, Yuichi Utsumi, and Masaharu Takahashi. "A Si stencil mask for deep X-ray lithography fabricated by MEMS technology." Microsystem Technologies 14, no. 9-11 (January 9, 2008): 1335–42. http://dx.doi.org/10.1007/s00542-007-0513-z.

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35

Presmanes, Lionel, Vignesh Gunasekaran, Yohann Thimont, Inthuga Sinnarasa, Antoine Barnabe, Philippe Tailhades, Frédéric Blanc, Chabane Talhi, and Philippe Menini. "Sub-ppm NO2 Sensing in Temperature Cycled Mode with Ga Doped ZnO Thin Films Deposited by RF Sputtering." Proceedings 14, no. 1 (June 19, 2019): 48. http://dx.doi.org/10.3390/proceedings2019014048.

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In this work Ga doped ZnO thin films have been deposited by RF magnetron sputtering onto a silicon micro-hotplate and their structural, microstructural and gas sensing properties have been studied. ZnO:Ga thin film with a thickness of 50 nm has been deposited onto a silicon based micro-hotplates without any photolithography process thanks to a low cost and reliable stencil mask process. Sub-ppm sensing (500 ppb) of NO2 gas at low temperature (50 °C) has been obtained with promising responses R/R0 up to 18.
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36

Letzkus, F., J. Butschke, B. Höfflinger, M. Irmscher, C. Reuter, R. Springer, A. Ehrmann, and J. Mathuni. "Dry etch improvements in the SOI wafer flow process for IPL stencil mask fabrication." Microelectronic Engineering 53, no. 1-4 (June 2000): 609–12. http://dx.doi.org/10.1016/s0167-9317(00)00388-9.

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37

MAEDA, Norihiro, Tasuku NAKAHARA, and Kazuyuki MINAMI. "Development of transfer seal type of thin-film stencil mask for reactive ion etching." Proceedings of Conference of Chugoku-Shikoku Branch 2019.57 (2019): 411. http://dx.doi.org/10.1299/jsmecs.2019.57.411.

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38

MINAMI, Kazuyuki, Mabito TSUKIMORI, and Katsuya SATO. "3307 Oxygen Reactive Ion Etching of Poly(L-Lactide) by using Flexible Stencil Mask." Proceedings of the JSME annual meeting 2007.7 (2007): 301–2. http://dx.doi.org/10.1299/jsmemecjo.2007.7.0_301.

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39

Niizeki, T., H. Kubota, Y. Ando, and T. Miyazaki. "Fabrication of ferromagnetic single-electron tunneling devices by utilizing metallic nanowire as hard mask stencil." Journal of Applied Physics 97, no. 10 (May 15, 2005): 10C909. http://dx.doi.org/10.1063/1.1850408.

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40

Sharma, Intu, Yogita Batra, V. Flauraud, Jürgen Brugger, and Bodh Raj Mehta. "Growth of Large-Area 2D MoS2 Arrays at Pre-Defined Locations Using Stencil Mask Lithography." Journal of Nanoscience and Nanotechnology 18, no. 3 (March 1, 2018): 1824–32. http://dx.doi.org/10.1166/jnn.2018.14265.

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41

Kobinata, Hideo, Hiroshi Yamashita, Eiichi Nomura, Ken Nakajima, and Yukinori Kuroki. "Proximity Effect Correction by Pattern Modified Stencil Mask in Large-Field Projection Electron-Beam Lithography." Japanese Journal of Applied Physics 37, Part 1, No. 12B (December 30, 1998): 6767–73. http://dx.doi.org/10.1143/jjap.37.6767.

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42

Sawamura, J., K. Suzuki, S. Omori, I. Ashida, and H. Ohnuma. "Approach to full-chip simulation and correction of stencil mask distortion for proximity electron lithography." Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures 22, no. 6 (2004): 3092. http://dx.doi.org/10.1116/1.1821503.

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43

Behringer, U. "Intelligent design splitting in the stencil mask technology used for electron- and ion-beam lithography." Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures 11, no. 6 (November 1993): 2400. http://dx.doi.org/10.1116/1.586994.

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44

Nah, Jae-Woong, Peter A. Gruber, Paul A. Lauro, and Claudius Feger. "Mask and mask-less injection molded solder (IMS) technology for fine pitch substrate bumping." International Symposium on Microelectronics 2010, no. 1 (January 1, 2010): 000348–54. http://dx.doi.org/10.4071/isom-2010-tp5-paper5.

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We report the results of a new pre-solder bumping technology of injection molded solder (IMS) for fine pitch organic substrates. Pure molten solder is injected through a reusable film mask (mask IMS) or directly injected without a mask (mask-less IMS) on the pads of an organic substrate to overcome the limitation of current pre-solder bumping technologies such as solder paste stencil printing and micro-ball mounting. In the case of mask IMS, targeted solder height over the solder resist (SR) is designed into the mask which has desirable thickness and hole sizes. Three different solder bump heights such as 30, 50, and 70 microns over SR were demonstrated for commercial organic substrates which have a pitch of 150 μm for 5,000 area array pads. To show the extendibility of the mask IMS bumping method to very fine pitch applications, 100 μm pitch bumping of 10,000 pads and 80 μm pitch bumping of 15,000 pads were demonstrated. In mask-less IMS, the pure molten solder is directly filled into the opening volume of the SR. After the injection of molten solder, solidification of the solder under low oxygen leads to solder protrusions above the SR surface because 100 % pure solder is filled into the whole SR opening volume. For a 150 μm pitch commercial substrate, we demonstrated minimum bump heights of 15 μm over the 20 μm thick SR. Since there is no need to align mask and substrate, the maskless IMS method lowers process costs and makes the process more reliable. By manipulating the opening in the SR, it is possible to enable variations in the height of the solder bumps. Flux or formic acid is not needed during solder injection of both described processes, but a low oxygen environment must be maintained. In this paper, we will discuss laboratory scale processes and bump inspection data, along with the discussion of manufacturing strategies for IMS solder bumping technology for fine pitch organic substrates.
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45

Kim, Chiho, In-Yong Kang, and Yong-Chae Chung. "Optimization of Low-Energy Electron Beam Proximity Lithography Stencil Mask Structure Factors by Monte Carlo Simulation." Japanese Journal of Applied Physics 43, no. 3 (March 10, 2004): 1196–98. http://dx.doi.org/10.1143/jjap.43.1196.

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46

Mekaru, Harutaka, Takayuki Takano, Koichi Awazu, and Ryutaro Maeda. "Fabrication of a Si stencil mask for the X-ray lithography using a dry etching technique." Journal of Physics: Conference Series 34 (April 1, 2006): 859–64. http://dx.doi.org/10.1088/1742-6596/34/1/142.

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47

Kim, J.-W., Y. Yamagata, B. J. Kim, and T. Higuchi. "Direct and dry micro-patterning of nano-particles by electrospray deposition through a micro-stencil mask." Journal of Micromechanics and Microengineering 19, no. 2 (January 26, 2009): 025021. http://dx.doi.org/10.1088/0960-1317/19/2/025021.

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48

Sharma, Intu, and Bodh Raj Mehta. "KPFM and CAFM based studies of MoS2 (2D)/WS2 heterojunction patterns fabricated using stencil mask lithography technique." Journal of Alloys and Compounds 723 (November 2017): 50–57. http://dx.doi.org/10.1016/j.jallcom.2017.06.203.

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49

Xi, Yue, Tao Wang, Qi Mu, Congcong Huang, Shuming Duan, Xiaochen Ren, and Wenping Hu. "Stencil mask defined doctor blade printing of organic single crystal arrays for high-performance organic field-effect transistors." Materials Chemistry Frontiers 5, no. 7 (2021): 3236–45. http://dx.doi.org/10.1039/d1qm00097g.

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50

Barnabé, A., M. Lalanne, L. Presmanes, J. M. Soon, Ph Tailhades, C. Dumas, J. Grisolia, et al. "Structured ZnO-based contacts deposited by non-reactive rf magnetron sputtering on ultra-thin SiO2/Si through a stencil mask." Thin Solid Films 518, no. 4 (December 2009): 1044–47. http://dx.doi.org/10.1016/j.tsf.2009.03.232.

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