Relevant bibliographies by topics / Speculative Architecture

Academic literature on the topic 'Speculative Architecture'

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Published: 10 December 2022
Last updated: 28 January 2023

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Journal articles on the topic "Speculative Architecture"

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Yu, Jiyong, Mengjia Yan, Artem Khyzha, Adam Morrison, Josep Torrellas, and Christopher W. Fletcher. "Speculative taint tracking (STT)." Communications of the ACM 64, no. 12 (December 2021): 105–12. http://dx.doi.org/10.1145/3491201.

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Speculative execution attacks present an enormous security threat, capable of reading arbitrary program data under malicious speculation, and later exfiltrating that data over microarchitectural covert channels. This paper proposes speculative taint tracking (STT), a high security and high performance hardware mechanism to block these attacks. The main idea is that it is safe to execute and selectively forward the results of speculative instructions that read secrets, as long as we can prove that the forwarded results do not reach potential covert channels. The technical core of the paper is a new abstraction to help identify all micro-architectural covert channels, and an architecture to quickly identify when a covert channel is no longer a threat. We further conduct a detailed formal analysis on the scheme in a companion document. When evaluated on SPEC06 workloads, STT incurs 8.5% or 14.5% performance overhead relative to an insecure machine.
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Sha, Xin Wei. "Minor architecture: poetic and speculative architectures in public space." AI & SOCIETY 26, no. 2 (September 16, 2010): 113–22. http://dx.doi.org/10.1007/s00146-010-0290-6.

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Letkemann, Joel. "A Spectacle of Speculative Architecture." Science Fiction Studies 47, no. 1 (2020): 125–28. http://dx.doi.org/10.1353/sfs.2020.0025.

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Letkemann. "A Spectacle of Speculative Architecture." Science Fiction Studies 47, no. 1 (2020): 125. http://dx.doi.org/10.5621/sciefictstud.47.1.0125.

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Puiggali, Joan, Boleslaw K. Szymanski, Teo Jové, and Jose L. Marzo. "Dynamic branch speculation in a speculative parallelization architecture for computer clusters." Concurrency and Computation: Practice and Experience 25, no. 7 (June 29, 2012): 932–60. http://dx.doi.org/10.1002/cpe.2872.

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Martínez, José F., and Josep Torrellas. "Speculative synchronization." ACM SIGOPS Operating Systems Review 36, no. 5 (December 2002): 18–29. http://dx.doi.org/10.1145/635508.605400.

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Wei, Norman. "Pacific Man – A Future Speculation Developed from Pacific Architectonics." Ekistics and the new habitat 81, no. 3 (September 30, 2022): 10–23. http://dx.doi.org/10.53910/26531313-e2021813546.

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Characterised by flexible joints and renewable use of materials, Pacific Architecture contains an integrated tectonic system that is historically used to construct both buildings and highly efficient watercrafts, enabling civilizations to flourish in Oceania. However, its significant architectural languages are widely dismissed in today’s utilitarian society. Witnessed in museum, cultural faculties and resorts, Pacific Architecture is often perceived as a cultural artefact that lacks of practical application. As a celebration of Pacific Architecture, the paper aims to discover how tectonics and construction systems from the Pacific could be revived, radically developed and utilised to accommodate “Future Pacific Living” in the rapidly changing world. Through a collective of speculative architectural propositions, the paper proposes alternatives to the existing postcolonial built environment while fully embracing future technologies. The first part of the paper is a review of the author’s past project ‘The Lomipeau Speculation’, a macro-scale visionary proposal to conceive of a city formed by Pacific tectonics. The second part, Pacific Men, is a narrative developed from the past project, exploring how Pacific Architecture can re-define humans’ relationship with the Ocean at a micro-scale. The speculation will be presented through architectural drawings with references to ekistic units.
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Krishnan, V., and J. Torrellas. "A chip-multiprocessor architecture with speculative multithreading." IEEE Transactions on Computers 48, no. 9 (1999): 866–80. http://dx.doi.org/10.1109/12.795218.

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Liu, Cong, Wen Wang, and Zhi Ying Wang. "Speculative High Performance Computation on Heterogeneous Multi-Core." Advanced Materials Research 1049-1050 (October 2014): 2126–30. http://dx.doi.org/10.4028/www.scientific.net/amr.1049-1050.2126.

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Thread level speculation has been proposed and researched to parallelize traditional sequential applications on homogeneous multi-core architecture. In this paper, a heterogeneous multi-core hardware simulation system is present, which provides with TLS execution mechanism. With a novel TLS programming model and a number of new speculative tuning techniques, benchmarkGzipis parallelized from-3% to 195% on a four-core processor, and the speedup of the test benchmarks are 30%, 43% and 156%, respectively with arbitrary, hotspot and insight speculation.
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Aimoniotis, Pavlos, Christos Sakalis, Magnus Sjalander, and Stefanos Kaxiras. "Reorder Buffer Contention: A Forward Speculative Interference Attack for Speculation Invariant Instructions." IEEE Computer Architecture Letters 20, no. 2 (July 1, 2021): 162–65. http://dx.doi.org/10.1109/lca.2021.3123408.

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Dissertations / Theses on the topic "Speculative Architecture"

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Xekalakis, Polychronis. "Mixed speculative multithreaded execution models." Thesis, University of Edinburgh, 2010. http://hdl.handle.net/1842/3282.

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The current trend toward chip multiprocessor architectures has placed great pressure on programmers and compilers to generate thread-parallel programs. Improved execution performance can no longer be obtained via traditional single-thread instruction level parallelism (ILP), but, instead, via multithreaded execution. One notable technique that facilitates the extraction of parallel threads from sequential applications is thread-level speculation (TLS). This technique allows programmers/compilers to generate threads without checking for inter-thread data and control dependences, which are then transparently enforced by the hardware. Most prior work on TLS has concentrated on thread selection and mechanisms to efficiently support the main TLS operations, such as squashes, data versioning, and commits. This thesis seeks to enhance TLS functionality by combining it with other speculative multithreaded execution models. The main idea is that TLS already requires extensive hardware support, which when slightly augmented can accommodate other speculative multithreaded techniques. Recognizing that for different applications, or even program phases, the application bottlenecks may be different, it is reasonable to assume that the more versatile a system is, the more efficiently it will be able to execute the given program. As mentioned above, generating thread-parallel programs is hard and TLS has been suggested as an execution model that can speculatively exploit thread-level parallelism (TLP) even when thread independence cannot be guaranteed by the programmer/ compiler. Alternatively, the helper threads (HT) execution model has been proposed where subordinate threads are executed in parallel with a main thread in order to improve the execution efficiency (i.e., ILP) of the latter. Yet another execution model, runahead execution (RA), has also been proposed where subordinate versions of the main thread are dynamically created especially to cope with long-latency operations, again with the aim of improving the execution efficiency of the main thread (ILP). Each one of these multithreaded execution models works best for different applications and application phases. We combine these three models into a single execution model and single hardware infrastructure such that the system can dynamically adapt to find the most appropriate multithreaded execution model. More specifically, TLS is favored whenever successful parallel execution of instructions in multiple threads (i.e., TLP) is possible and the system can seamlessly transition at run-time to the other models otherwise. In order to understand the tradeoffs involved, we also develop a performance model that allows one to quantitatively attribute overall performance gains to either TLP or ILP in such combined multithreaded execution model. Experimental results show that our combined execution model achieves speedups of up to 41.2%, with an average of 10.2%, over an existing state-of-the-art TLS system and speedups of up to 35.2%, with an average of 18.3%, over a flavor of runahead execution for a subset of the SPEC2000 Integer benchmark suite. We then investigate how a common ILP-enhancingmicroarchitectural feature, namely branch prediction, interacts with TLS.We show that branch prediction for TLS is even more important than it is for single core machines. Unfortunately, branch prediction for TLS systems is also inherently harder. Code partitioning and re-executions of squashed threads pollute the branch history making it harder for predictors to be accurate. We thus propose to augment the hardware, so as to accommodate Multi-Path (MP) execution within the existing TLS protocol. Under the MP execution model, all paths following a number of hard-to-predict conditional branches are followed. MP execution thus, removes branches that would have been otherwise mispredicted helping in this way the processor to exploit more ILP. We show that with only minimal hardware support, one can combine these two execution models into a unified one, which can achieve far better performance than both TLS and MP execution. Experimental results show that our combied execution model achieves speedups of up to 20.1%, with an average of 8.8%, over an existing state-of-the-art TLS system and speedups of up to 125%, with an average of 29.0%, when compared with multi-path execution for a subset of the SPEC2000 Integer benchmark suite. Finally, Since systems that support speculative multithreading usually treat all threads equally, they are energy-inefficient. This inefficiency stems from the fact that speculation occasionally fails and, thus, power is spent on threads that will have to be discarded. We propose a profitability-based power allocation scheme, where we “steal” power from non-profitable threads and use it to speed up more useful ones. We evaluate our techniques for a state-of-the-art TLS system and show that, with minimalhardware support, we achieve improvements in ED of up to 25.5% with an average of 18.9%, for a subset of the SPEC 2000 Integer benchmark suite.
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Lindskog, Ellen. "Danvikens Hospital - A speculative investigation." Thesis, KTH, Arkitektur, 2021. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-298799.

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This thesis project is an investigation of time and endurance. Temporality and change. It is an intuitive journey through the past. By collecting, redrawing and speculating I have explored the past and present of a site and a building. The hospital institution Danvikens Hospital dates back to the 16th century, and the current building from 1719 can be seen as the first monumental hospital building in Sweden. The site went through irreversible infrastructural changes at the beginning of the 20th century, with the excavation of Hammarby canal. Following this, the building has had short identities as an archive, workshop and hotel. This project work with findings from the past, using textile to create a new identity and life for the building.
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Weate, Jeremy. "Phenomenology and difference : the body, architecture and race." Thesis, University of Warwick, 1998. http://wrap.warwick.ac.uk/2472/.

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The aim of the thesis is to consider the position of phenomenology in contemporary thought in order to argue that only on its terms can a political ontology of difference be thought. To inaugurate this project I being by questioning Heidegger's relation to phenomenology. I take issue with the way that Heidegger privileges time over space in "Being and Time". In this way, the task of the thesis is clarified as the need to elaborate a spatio-temporal phenomenology. After re-situating Heidegger's failure in this respect within a Kantian background, I suggest that the phenomenological grounding of difference must work through the body. I contend that the body is the ontological site of both the subject and the object. I use Whitehead and Merleau-Ponty to explore the ramifications of this thesis. I suggest first of all that architecture should be grounded ontologically in the body, and as such avoids being a 'master discourse'. Secondly, by theorising the body and world as reciprocally transformative, my reading of Merleau-Ponty emphasises the ways in which his thinking opens up a phenomenology of embodied difference. It is on the basis of these themes that I develop this thinking in the direction of race, exploring the dialectics of visibility and invisibility in the work of Frantz Fanon and James Baldwin. I argue that embodied difference attests to variations in the agent's freedom to act in the world. If freedom is understood through Merleau-Ponty as being the embodied ground of historicity, we must ask after unfreedom. I suggest that the "flesh" ontology of a pre-thetic community should be rethought as a regulative ideal, the ideal of a justice that can never be given. In this light, phenomenology becomes as much as poetics. Beyond being though of as conservative, phenomenology henceforth unleashes the possibility of thinking a transformative embodied agency.
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Li, Wentong. "High Performance Architecture using Speculative Threads and Dynamic Memory Management Hardware." Thesis, University of North Texas, 2007. https://digital.library.unt.edu/ark:/67531/metadc5150/.

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With the advances in very large scale integration (VLSI) technology, hundreds of billions of transistors can be packed into a single chip. With the increased hardware budget, how to take advantage of available hardware resources becomes an important research area. Some researchers have shifted from control flow Von-Neumann architecture back to dataflow architecture again in order to explore scalable architectures leading to multi-core systems with several hundreds of processing elements. In this dissertation, I address how the performance of modern processing systems can be improved, while attempting to reduce hardware complexity and energy consumptions. My research described here tackles both central processing unit (CPU) performance and memory subsystem performance. More specifically I will describe my research related to the design of an innovative decoupled multithreaded architecture that can be used in multi-core processor implementations. I also address how memory management functions can be off-loaded from processing pipelines to further improve system performance and eliminate cache pollution caused by runtime management functions.
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Li, Wentong Kavi Krishna M. "High performance architecture using speculative threads and dynamic memory management hardware." [Denton, Tex.] : University of North Texas, 2007. http://digital.library.unt.edu/permalink/meta-dc-5150.

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Weingarten, Lauren Ariel. "Building on the edge of reason : the Institute for Speculative Science, M.I.T." Thesis, Massachusetts Institute of Technology, 1989. http://hdl.handle.net/1721.1/79003.

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Thesis (M. Arch.)--Massachusetts Institute of Technology, Dept. of Architecture, 1989.
This thesis sprang from a fascination with and respect for speculative thought in science. One need walk no further than down the "infinite corridor" to feel the pulse of experimentation that has earned M.I.T. the reputation of being one of the principal research institutes of the world. But, even with the commitment to research found at M.I.T. market demands point toward specialization. This creates an environment where speculative science in its classic sense cannot occur. It is the aim of this project to reconnect contemporary higher science with ancient ideas of a unified world view. To do this, the scientists at M.I.T. will be provided with a physically different environment from the everyday scientific workplace, with its gadgetry and budgetary constraints, if even for a short time. The site I propose to locate the Institute for Speculative Science is removed from Boston but is close enough to remain in the scientists' frame of reference. Located between Quincy and Thompson Island in the Boston Harbor, the institute for Speculative Science builds on the tension between built and natural states: urban to exurban; mainland to island; rock to water. This project will occupy the space between the mainland (Quincy) and surrounding islands, currently treated as an orphan of the big city. From the vantage point of the Institute for Speculative Science, you can see the Boston skyline but Boston cannot see you. You walk on a natural and wild beach, but this beach is littered with debris, relics of Boston's industrial recent past. The models and drawings in this book are scaled representations of the proposed project, they are how ever drawn and made as worlds in their own right which the participant in this book can experience. To communicate the idea of a building on the edge of reason, I've looked to bring to light a project that you feel before you understand.
by Lauren Ariel Weingarten.
M.Arch.
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ESTILL, ALEXANDER CLAYTON. "VITRUVIAN DELIGHT: CUSTOMIZATION WITHIN THE SPECULATIVE MODEL." University of Cincinnati / OhioLINK, 2005. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1129233879.

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Khan, Salman. "Putting checkpoints to work in thread level speculative execution." Thesis, University of Edinburgh, 2010. http://hdl.handle.net/1842/4676.

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With the advent of Chip Multi Processors (CMPs), improving performance relies on the programmers/compilers to expose thread level parallelism to the underlying hardware. Unfortunately, this is a difficult and error-prone process for the programmers, while state of the art compiler techniques are unable to provide significant benefits for many classes of applications. An interesting alternative is offered by systems that support Thread Level Speculation (TLS), which relieve the programmer and compiler from checking for thread dependencies and instead use the hardware to enforce them. Unfortunately, data misspeculation results in a high cost since all the intermediate results have to be discarded and threads have to roll back to the beginning of the speculative task. For this reason intermediate checkpointing of the state of the TLS threads has been proposed. When the violation does occur, we now have to roll back to a checkpoint before the violating instruction and not to the start of the task. However, previous work omits study of the microarchitectural details and implementation issues that are essential for effective checkpointing. Further, checkpoints have only been proposed and evaluated for a narrow class of benchmarks. This thesis studies checkpoints on a state of the art TLS system running a variety of benchmarks. The mechanisms required for checkpointing and the costs associated are described. Hardware modifications required for making checkpointed execution efficient in time and power are proposed and evaluated. Further, the need for accurately identifying suitable points for placing checkpoints is established. Various techniques for identifying these points are analysed in terms of both effectiveness and viability. This includes an extensive evaluation of data dependence prediction techniques. The results show that checkpointing thread level speculative execution results in consistent power savings, and for many benchmarks leads to speedups as well.
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Ioannou, Nikolas. "Complementing user-level coarse-grain parallelism with implicit speculative parallelism." Thesis, University of Edinburgh, 2012. http://hdl.handle.net/1842/7900.

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Multi-core and many-core systems are the norm in contemporary processor technology and are expected to remain so for the foreseeable future. Parallel programming is, thus, here to stay and programmers have to endorse it if they are to exploit such systems for their applications. Programs using parallel programming primitives like PThreads or OpenMP often exploit coarse-grain parallelism, because it offers a good trade-off between programming effort versus performance gain. Some parallel applications show limited or no scaling beyond a number of cores. Given the abundant number of cores expected in future many-cores, several cores would remain idle in such cases while execution performance stagnates. This thesis proposes using cores that do not contribute to performance improvement for running implicit fine-grain speculative threads. In particular, we present a many-core architecture and protocols that allow applications with coarse-grain explicit parallelism to further exploit implicit speculative parallelism within each thread. We show that complementing parallel programs with implicit speculative mechanisms offers significant performance improvements for a large and diverse set of parallel benchmarks. Implicit speculative parallelism frees the programmer from the additional effort to explicitly partition the work into finer and properly synchronized tasks. Our results show that, for a many-core comprising 128 cores supporting implicit speculative parallelism in clusters of 2 or 4 cores, performance improves on top of the highest scalability point by 44% on average for the 4-core cluster and by 31% on average for the 2-core cluster. We also show that this approach often leads to better performance and energy efficiency compared to existing alternatives such as Core Fusion and Turbo Boost. Moreover, we present a dynamic mechanism to choose the number of explicit and implicit threads, which performs within 6% of the static oracle selection of threads. To improve energy efficiency processors allow for Dynamic Voltage and Frequency Scaling (DVFS), which enables changing their performance and power consumption on-the-fly. We evaluate the amenability of the proposed explicit plus implicit threads scheme to traditional power management techniques for multithreaded applications and identify room for improvement. We thus augment prior schemes and introduce a novel multithreaded power management scheme that accounts for implicit threads and aims to minimize the Energy Delay2 product (ED2). Our scheme comprises two components: a “local” component that tries to adapt to the different program phases on a per explicit thread basis, taking into account implicit thread behavior, and a “global” component that augments the local components with information regarding inter-thread synchronization. Experimental results show a reduction of ED2 of 8% compared to having no power management, with an average reduction in power of 15% that comes at a minimal loss of performance of less than 3% on average.
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Duan, Kewei. "Resource-oriented architecture based scientific workflow modelling." Thesis, University of Bath, 2016. https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.698986.

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This thesis studies the feasibility and methodology of applying state-of-the-art computer technology in scientific workflow modelling, within a collaborative environment. The collaborative environment also indicates that the people involved include non-computer scientists or engineers from other disciplines. The objective of this research is to provide a systematic methodology based on a web environment for the purpose of lowering the barriers brought by the heterogeneous features of multi-institutions, multi-platforms and geographically distributed resources which are implied in the collaborative environment of scientific workflow.
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Books on the topic "Speculative Architecture"

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R, Kaeli David, and Yew Pen-Chung 1950-, eds. Speculative execution in high-performance computer architectures. Boca Raton, FL: Chapman & Hall/CRC, 2005.

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Mayrhofer-Hufnagl, Ingrid, ed. Architecture, Futurability and the Untimely. Bielefeld, Germany: transcript Verlag, 2022. http://dx.doi.org/10.14361/9783839461112.

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The planetary instantaneity that digital technologies have enabled is leading to an effacement of the divisions that separate the past from the future, ensuring that the present is ubiquitous. While contemporary architecture seems to have lost the capacity to conceive of the past as a transformative force, this book stresses the need to rethink today's complex temporal mechanisms through the notion of the untimely. This concept opens up a whole spectrum of possibilities to go beyond what seems predictable. The contributors to this book employ critical concepts and architectural design tools in order to offer experimental and speculative approaches for unknown futures of architecture.
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Lavin, Anne. Leinster Square (with Prince Arthur Terrace) Rathmines, Dublin: An early suburban speculative terraced housingdevelopment 1830-1852. Dublin: University College Dublin, 1995.

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1969-, Allen Laura, and Bartlett School of Architecture and Planning (London, England), eds. Bartlett designs: Speculating with architecture. Chichester, West Sussex, U.K: John Wiley & Sons, 2009.

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Allen, Laura. Bartlett designs: Speculating with architecture. Chichester, West Sussex, U.K: John Wiley & Sons, 2009.

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Tuned city: Zwischen Klang- und Raumspekulation = Between sound and space speculation. Idstein: Kookbooks, 2008.

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Jencks, Charles. The garden of cosmic speculation. London: Frances Lincoln, 2003.

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Luria, Sarah. Capital speculations: Writing and building Washington, D.C. Durham, N.H: University of New Hampshire Press, 2006.

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Capital speculations: Writing and building Washington, D.C. Durham, N.H: University of New Hampshire Press, 2006.

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Totalization: Speculative Practice in Architectural Education. Park Books, 2018.

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Book chapters on the topic "Speculative Architecture"

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Tsai, You-Jan, and Jong-Jiann Shieh. "Speculative Issue Logic." In Advances in Computer Systems Architecture, 323–35. Berlin, Heidelberg: Springer Berlin Heidelberg, 2005. http://dx.doi.org/10.1007/11572961_26.

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Li, Xiao-Feng, Chen Yang, Zhao-Hui Du, and Tin-fook Ngai. "Exploiting Thread-Level Speculative Parallelism with Software Value Prediction." In Advances in Computer Systems Architecture, 367–88. Berlin, Heidelberg: Springer Berlin Heidelberg, 2005. http://dx.doi.org/10.1007/11572961_29.

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Ramesh, Peddi, M. Sreevani, and G. Upender. "Design of VLSI-Architecture for 128 Bit Inexact Speculative." In Intelligent Computing in Engineering, 767–77. Singapore: Springer Singapore, 2020. http://dx.doi.org/10.1007/978-981-15-2780-7_83.

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Nagpal, Rahul, and Anasua Bhowmik. "Criticality Based Speculation Control for Speculative Multithreaded Architectures." In Lecture Notes in Computer Science, 31–40. Berlin, Heidelberg: Springer Berlin Heidelberg, 2005. http://dx.doi.org/10.1007/11573937_6.

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Plowright, Philip D. "Speculation." In Making Architecture Through Being Human, 212–14. Abingdon, Oxon ; New York, NY : Routledge, 2020.: Routledge, 2019. http://dx.doi.org/10.4324/9780429261718-59.

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Kim, Seon Wook, and Rudolf Eigenmann. "Compiling for Speculative Architectures." In Languages and Compilers for Parallel Computing, 464–67. Berlin, Heidelberg: Springer Berlin Heidelberg, 2000. http://dx.doi.org/10.1007/3-540-44905-1_32.

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Sohi, Gurindar S., and T. N. Vijaykumar. "Speculatively Multithreaded Architectures." In Integrated Circuits and Systems, 111–43. Boston, MA: Springer US, 2009. http://dx.doi.org/10.1007/978-1-4419-0263-4_4.

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Li, Meirong, Yinliang Zhao, and You Tao. "Dynamically Spawning Speculative Threads to Improve Speculative Path Execution." In Algorithms and Architectures for Parallel Processing, 192–206. Cham: Springer International Publishing, 2014. http://dx.doi.org/10.1007/978-3-319-11194-0_15.

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Kelly, Daniel R., and Braden J. Phillips. "Arithmetic Data Value Speculation." In Advances in Computer Systems Architecture, 353–66. Berlin, Heidelberg: Springer Berlin Heidelberg, 2005. http://dx.doi.org/10.1007/11572961_28.

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Li, Yuxiang, Yinliang Zhao, and Bin Liu. "Similar Samples Cleaning in Speculative Multithreading." In Algorithms and Architectures for Parallel Processing, 108–21. Cham: Springer International Publishing, 2014. http://dx.doi.org/10.1007/978-3-319-11194-0_9.

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Conference papers on the topic "Speculative Architecture"

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Unger, A., Th Ungerer, and E. Zehendner. "Simultaneous Speculation Scheduling." In International Symposium on Computer Architecture and High Performance Computing. Sociedade Brasileira de Computação, 1999. http://dx.doi.org/10.5753/sbac-pad.1999.19787.

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Simultaneous Speculation Scheduling (S3) is a combined compiler and architecture technique to control multiple path execution. lt can be applied for dual path branch speculation in case of unpredictable branches and for multiple path speculative execution of loop iterations. Loop-carried dependences are handled by data dependence prediction. Architectural requirements are a minimal form of multithreaded processor architecture and three new instructions (fork, sync, wait). Simulation results show performance gains of up to 40% over purely static scheduling techniques by applying the S3 technique to branches in kernel sections of SPECint95 benchmark programs.
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Kuma, Taichi. "Shrink Film Architecture." In CAADRIA 2014: Rethinking Comprehensive Design: Speculative Counterculture. CAADRIA, 2014. http://dx.doi.org/10.52842/conf.caadria.2014.181.

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Kuma, Taichi. "Shrink Film Architecture." In CAADRIA 2014: Rethinking Comprehensive Design: Speculative Counterculture. CAADRIA, 2014. http://dx.doi.org/10.52842/conf.caadria.2014.181.

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Chen, Haibo, Xi Wu, Liwei Yuan, Binyu Zang, Pen-chung Yew, and Frederic T. Chong. "From Speculation to Security: Practical and Efficient Information Flow Tracking Using Speculative Hardware." In 2008 35th International Symposium on Computer Architecture (ISCA). IEEE, 2008. http://dx.doi.org/10.1109/isca.2008.18.

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Vachharajani, Neil, Ram Rangan, Easwaran Raman, Matthew J. Bridges, Guilherme Ottoni, and David I. August. "Speculative Decoupled Software Pipelining." In 16th International Conference on Parallel Architecture and Compilation Techniques (PACT 2007). IEEE, 2007. http://dx.doi.org/10.1109/pact.2007.4336199.

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Moya, Rafael, Simon Watkins, Yan Ding, Jane Burry, and Mark C. Burry. "Aerodynamic Features as Auxiliary Architecture." In CAADRIA 2014: Rethinking Comprehensive Design: Speculative Counterculture. CAADRIA, 2014. http://dx.doi.org/10.52842/conf.caadria.2014.295.

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Grobman, Yasha, and Roy Kozlovsky. "On the Shores of Architecture." In CAADRIA 2014: Rethinking Comprehensive Design: Speculative Counterculture. CAADRIA, 2014. http://dx.doi.org/10.52842/conf.caadria.2014.853.

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Moya, Rafael, Simon Watkins, Yan Ding, Jane Burry, and Mark C. Burry. "Aerodynamic Features as Auxiliary Architecture." In CAADRIA 2014: Rethinking Comprehensive Design: Speculative Counterculture. CAADRIA, 2014. http://dx.doi.org/10.52842/conf.caadria.2014.295.

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Grobman, Yasha, and Roy Kozlovsky. "On the Shores of Architecture." In CAADRIA 2014: Rethinking Comprehensive Design: Speculative Counterculture. CAADRIA, 2014. http://dx.doi.org/10.52842/conf.caadria.2014.853.

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Agarwal, Mayank, Kshitiz Malik, Kevin M. Woley, Sam S. Stone, and Matthew I. Frank. "Exploiting Postdominance for Speculative Parallelization." In 2007 IEEE 13th International Symposium on High Performance Computer Architecture. IEEE, 2007. http://dx.doi.org/10.1109/hpca.2007.346207.

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Reports on the topic "Speculative Architecture"

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Hammond, Lance, Benedict A. Hubbert, Michael Siu, Manohar K. Prabhu, and Michael Chen. Chip Multiprocessors Offer an Economical, Scalable Architecture for Future Microprocessors, Thread-Level Speculation Support Allows Them to Speed Up Past Software. Fort Belvoir, VA: Defense Technical Information Center, April 2000. http://dx.doi.org/10.21236/ada420740.

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Cohen, Shabtai, Melvin Tyree, Amos Naor, Alan N. Lakso, Terence L. Robinson, and Yehezkiel Cohen. Influence of hydraulic properties of rootstocks and the rootstock-scion graft on water use and productivity of apple trees. United States Department of Agriculture, 2001. http://dx.doi.org/10.32747/2001.7587219.bard.

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Abstract:
This one year exploratory project investigated hydraulic architecture of apple dwarfing rootstocks. The hypothesis was that hydraulic conductance is correlated with rootstock vigor. A previous study of trees on three rootstocks in Israel showed that dwarfed trees used less water than un-dwarfed trees. Analysis showed that if the tree maintains leaf water potentials above minimum values, then this implies that the dwarfed trees have lower leaf conductance, which may also be the cause of dwarfing. The current project studied small 2-year old unworked rootstock trees, and full sized trees bearing commercial yields. In both cases hydraulic conductance was determined with two methods - the non-destructive evaporative flux (EF)-leaf water potential (L WP) method, and a destructive method in which water was forced through the plant at known pressure using the "high pressure flow meter" (HPFM). Detailed work allowed measurement of conductance of the rootstock-scion union. This was achieved both with the HPFM and with the EF-LWP methods, the former in the US and the latter in Israel. Direct measurements of leaf conductance were made, and carbon isotope ratios ( d ¹³ C) were determined for leaves sampled at the end of the season. The latter can indicate sustained differences in leaf conductance behavior. HPFM and EF-LWP methods did not give the same results. In the small plants results were similar in magnitude, but not significantly correlated. In large trees, EF- L WP measurements were a fraction of those obtained with the HPFM. The latter indicates that some of the xylem is not normally functional but transports water when pressurized. Additional experimental work targeted this result. Xylem was stained before and after perfusion with water at high pressure. This showed that at least for one rootstock a significant amount of xylem was blocked before perfusion. The "air method" for determining xylem vessel properties was improved and employed. Length, radius and density of xylem vessels of different rootstocks were found to be similar, and significant differences found were not clearly related to rootstock vigor. Measurements in the commercial orchard in Israel showed that the graft union in a dwarfing rootstock was a large obstacle for water transport (i.e. had a high resistance). This apparently led to low leaf conductance to water vapor, as indicated by lower d ¹³ C, which implies low internal CO ₂ concentrations. In the US orchard, d ¹³ C in 2001 was correlated with rootstock vigor, and significant differences were found in leaf conductance. However, the d ¹³ C differences were not observed in 2002, were opposite to those found in the Israeli orchard, and measurements of the graft union with the HPFM did not find large resistances. We speculate that the graft union is not necessarily a large impediment to water transport unless the scion starts to separate from the rootstock. It was concluded that significant differences in hydraulic conductance exist between different dwarfing rootstocks. These differences may be caused by differences in xylem properties and in the degree of cavitation, as well as resistance in the graft union. However, no general relationship to rootstock vigor was found. Therefore, hydraulic conductance alone cannot explain dwarfing, but may be one of two or more factors that lead to dwarfing. Future work should integrate more factors with hydraulic relations, e.g. nutrient and solute transport and production of hormones.
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