Dissertations / Theses on the topic 'Software verification'
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Wang, Xuan. "Verification of Digital Controller Verifications." BYU ScholarsArchive, 2005. https://scholarsarchive.byu.edu/etd/681.
Full textKattenbelt, Mark Alex. "Automated quantitative software verification." Thesis, University of Oxford, 2010. http://ora.ox.ac.uk/objects/uuid:62430df4-7fdf-4c4f-b3cd-97ba8912c9f5.
Full textTaylor, Ramsay G. "Verification of hardware dependent software." Thesis, University of Sheffield, 2012. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.575744.
Full textJobredeaux, Romain J. "Formal verification of control software." Diss., Georgia Institute of Technology, 2015. http://hdl.handle.net/1853/53841.
Full textKirschenbaum, Jason P. "Investigations in Automating Software Verification." The Ohio State University, 2011. http://rave.ohiolink.edu/etdc/view?acc_num=osu1306862918.
Full textFerro, Sara <1996>. "Software Verification of PLC programs." Master's Degree Thesis, Università Ca' Foscari Venezia, 2020. http://hdl.handle.net/10579/17637.
Full textOlliaro, Martina <1991>. "String analysis for software verification." Doctoral thesis, Università Ca' Foscari Venezia, 2021. http://hdl.handle.net/10579/18470.
Full textZucchelli, D. "Combination Methods for Software Verification." Doctoral thesis, Università degli Studi di Milano, 2008. http://hdl.handle.net/2434/45877.
Full textDomagoj, Babić. "Exploiting structure for scalable software verification." Thesis, University of British Columbia, 2008. http://hdl.handle.net/2429/1502.
Full textHughes, Roger Brett. "Automated interactive software verification and synthesis." Thesis, Brunel University, 1992. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.306741.
Full textJackson, David Mark. "Logical verification of reactive software systems." Thesis, University of Oxford, 1992. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.305989.
Full textLeonardsson, Carl. "Verification of Software under Relaxed Memory." Doctoral thesis, Uppsala universitet, Avdelningen för datorteknik, 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-297201.
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Tagore, Aditi. "Techniques to Improve Automated Software Verification." The Ohio State University, 2014. http://rave.ohiolink.edu/etdc/view?acc_num=osu1397661277.
Full textBallis, Demis. "Rule-Based Software Verification and Correction." Doctoral thesis, Universitat Politècnica de València, 2008. http://hdl.handle.net/10251/1948.
Full textBallis, D. (2005). Rule-Based Software Verification and Correction [Tesis doctoral no publicada]. Universitat Politècnica de València. https://doi.org/10.4995/Thesis/10251/1948
Palancia
Addy, Edward A. "Verification and validation in software product line engineering." Morgantown, W. Va. : [West Virginia University Libraries], 1999. http://etd.wvu.edu/templates/showETD.cfm?recnum=1068.
Full textTitle from document title page. Document formatted into pages; contains vi, 75 p. : ill. (some col.). Includes abstract. Includes bibliographical references (p. 35-39).
Powell, Daniel, and n/a. "Formal Methods For Verification Based Software Inspection." Griffith University. School of Computing and Information Technology, 2003. http://www4.gu.edu.au:8080/adt-root/public/adt-QGU20030925.154706.
Full textPowell, Daniel. "Formal Methods For Verification Based Software Inspection." Thesis, Griffith University, 2003. http://hdl.handle.net/10072/366466.
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Doctor of Philosophy (PhD)
School of Computing and Information Technology
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Johnsen, Andreas. "Architecture-Based Verification of Software-Intensive Systems." Thesis, Mälardalen University, School of Innovation, Design and Engineering, 2010. http://urn.kb.se/resolve?urn=urn:nbn:se:mdh:diva-8917.
Full textDevelopment of software-intensive systems such as embedded systems for telecommunications, avionics and automotives occurs under severe quality, schedule and budget constraints. As the size and complexity of software-intensive systems increase dramatically, the problems originating from the design and specification of the system architecture becomes increasingly significant. Architecture-based development approaches promise to improve the efficiency of software-intensive system development processes by reducing costs and time, while increasing quality. This paradox is partially explained by the fact that the system architecture abstracts away unnecessary details, so that developers can concentrate both on the system as a whole, and on its individual pieces, whether it's the components, the components' interfaces, or connections among components. The use of architecture description languages (ADLs) provides an important basis for verification since it describes how the system should behave, in a high level view and in a form where automated tests can be generated. Analysis and testing based on architecture specifications allow detection of problems and faults early in the development process, even before the implementation phase, thereby reducing a significant amount of costs and time. Furthermore, tests derived from the architecture specification can later be applied to the implementation to see the conformance of the implementation with respect to the specification. This thesis extends the knowledge base in the area of architecture-based verification. In this thesis report, an airplane control system is specified using the Architecture Analysis and Description Language (AADL). This specification will serve as a starting point of a system development process where developed architecture-based verification algorithms are applied.
Dimovski, Aleksandar. "Compositional software verification based on game semantics." Thesis, University of Warwick, 2007. http://wrap.warwick.ac.uk/2398/.
Full textvon, Spakovsky Alexis P., Reffela Davidson, Ashley Mathis, and David Patterson. "Software Independent Verification and Validation (SIVandV) simplified." Monterey, California. Naval Postgraduate School, 2006. http://hdl.handle.net/10945/10063.
Full textSIVandV has been in existence for some 40 years, and many people still know little about its existence. Software IVandV certifies the quality of the software and independently validates and verifies that it meets or exceeds the customer[alpha]s expectations. Independent VandV for component or element software development activities encompasses the following: 1) review and thorough evaluations of the software development, 2) review and comment on software documentation, 3) participation in all software requirements and design reviews, and 4) participation in software integration and testing for each software build. This thesis will explore and explain the benefits and rationale for Software Independent Verification and Validation. It will identify SIVandV processes that are used to support acquisition weapon systems. [beta]SIVandV Simplified[gamma] will translate, into understandable terms, why SIVandV is considered [beta]Cheap Insurance[gamma] and why it is needed. Additionally, this thesis serves as a tutorial, providing suggested policy and guidance, suggested software Computer-Aided Software Engineering (CASE) tools, criteria, and lessons learned for implementing a successful SIVandV program.
Arno, Matthew G. (Matthew Gordon). "Verification and validation of safety related software." Thesis, Massachusetts Institute of Technology, 1994. http://hdl.handle.net/1721.1/33517.
Full textBarquin, Murguia Alberto Isaac. "SmallSat Payload Simulation for Onboard-Software Verification." Thesis, Luleå tekniska universitet, Institutionen för system- och rymdteknik, 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:ltu:diva-59928.
Full textGetir, Yaman Sinem. "Quantitative Modeling and Verification of Evolving Software." Doctoral thesis, Humboldt-Universität zu Berlin, 2021. http://dx.doi.org/10.18452/23310.
Full textSoftware plays an innovative role in many different domains, such as car industry, autonomous and smart systems, and communication. Hence, the quality of the software is of utmost importance and needs to be properly addressed during software evolution. Several approaches have been developed to evaluate systems’ quality attributes, such as reliability, safety, and performance of software. Due to the dynamic nature of modern software systems, probabilistic models representing the quality of the software and their transition probabilities change over time and fluctuate, leading to a significant problem that needs to be solved to obtain correct evaluation results of quantitative properties. Probabilistic models need to be continually updated at run-time to solve this issue. However, continuous re-evaluation of complex probabilistic models is expensive. Recently, incremental approaches have been found to be promising for the verification of evolving and self-adaptive systems. Nevertheless, substantial improvements have not yet been achieved for evaluating structural changes in the model. Probabilistic systems are usually represented in a matrix form to solve the equations based on states and transition probabilities. On the other side, evolutionary changes can create various effects on theese models and force them to re-verify the whole system. Run-time models, such as matrices or graph representations, lack the expressiveness to identify the change effect on the model. In this thesis, we develop a framework using stochastic regular expression trees, which are modular, with action-based probabilistic logic in the model checking context. Such a modular framework enables us to develop change operations for the incremental computation of local changes that can occur in the model. Furthermore, we describe probabilistic change patterns to apply efficient incremental quantitative verification using stochastic regular expression trees and evaluate our results.
Zhang, Lu. "Runtime Verification and Debugging of Concurrent Software." Diss., Virginia Tech, 2016. http://hdl.handle.net/10919/71882.
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Krone, Joan. "The role of verification in software reusability /." The Ohio State University, 1988. http://rave.ohiolink.edu/etdc/view?acc_num=osu1487594970650373.
Full textSPINOSO, SERENA. "Verification and Configuration of Software-based Networks." Doctoral thesis, Politecnico di Torino, 2017. http://hdl.handle.net/11583/2676611.
Full textYan, Weiwei. "Software-hardware Cooperative Embedded Verification System Fusing Fingerprint Verification and Shared-key Authentication." Thesis, KTH, Skolan för informations- och kommunikationsteknik (ICT), 2011. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-66677.
Full textLewis, Matt. "Precise verification of C programs." Thesis, University of Oxford, 2014. http://ora.ox.ac.uk/objects/uuid:34b5ed5a-160b-4e2c-8dac-eab62a24f78c.
Full textLatham, J. T. "Abstraction in program verification." Thesis, University of Manchester, 1985. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.372026.
Full textWoo, Yan, and 胡昕. "A dynamic integrity verification scheme for tamper-resistancesoftware." Thesis, The University of Hong Kong (Pokfulam, Hong Kong), 2005. http://hub.hku.hk/bib/B34740478.
Full textGarner, Scott A. "Metrics directed verification of UML designs." Virtual Press, 2005. http://liblink.bsu.edu/uhtbin/catkey/1328113.
Full textDepartment of Computer Science
Wickerson, John Peter. "Concurrent verification for sequential programs." Thesis, University of Cambridge, 2013. https://www.repository.cam.ac.uk/handle/1810/265613.
Full textBatten, Ian Gilbert. "Trusted execution : applications and verification." Thesis, University of Birmingham, 2016. http://etheses.bham.ac.uk//id/eprint/6684/.
Full textWoo, Yan. "A dynamic integrity verification scheme for tamper-resistance software." Click to view the E-thesis via HKUTO, 2005. http://sunzi.lib.hku.hk/hkuto/record/B34740478.
Full textWahab, Matthew. "Object code verification." Thesis, University of Warwick, 1998. http://wrap.warwick.ac.uk/61068/.
Full textFlobakk, Rune. "Automated verification of design adherence in software implementation." Thesis, Norwegian University of Science and Technology, Department of Computer and Information Science, 2007. http://urn.kb.se/resolve?urn=urn:nbn:no:ntnu:diva-8808.
Full textSoftware design and architecture specify how a system should be implemented to achieve the required quality attributes. Being able to automatically verify the design adherence during implementation will continuously assure that the system realizes the quality attributes, as well as over time does not drift away from them. This thesis investigates how a software design can be used to automatically verify and enforce rules for implementation. The current tool support for automatic design enforcement is assessed and reviewed. In addition, a prototype contribution to this practice, a plug-in for the Maven software project management system, is presented.
Freitas, Arthur. "Hardware/Software Co-Verification Using the SystemVerilog DPI." Universitätsbibliothek Chemnitz, 2007. http://nbn-resolving.de/urn:nbn:de:swb:ch1-200700941.
Full textUlu, Cemil. "Specification And Verification Of Confidentiality In Software Architectures." Phd thesis, METU, 2004. http://etd.lib.metu.edu.tr/upload/12604809/index.pdf.
Full textTraub, Johannes [Verfasser]. "Formal Verification of Concurrent Embedded Software / Johannes Traub." Kiel : Universitätsbibliothek Kiel, 2016. http://d-nb.info/1105472175/34.
Full textArgote, Garcia Gonzalo. "Formal verification and testing of software architectural models." FIU Digital Commons, 2009. http://digitalcommons.fiu.edu/etd/1308.
Full textMoturu, Krishna Priya Darsini. "Application of reinforcement learning algorithms to software verification." Master's thesis, Québec : Université Laval, 2006. http://www.theses.ulaval.ca/2006/23583/23583.pdf.
Full textRoth, Andreas. "Specification and verification of object oriented software components." Karlsruhe : Univ.-Verl. Karlsruhe, 2006. http://www.uvka.de/univerlag/volltexte/2006/130/.
Full textRakamarić, Zvonimir. "Modular verification of shared-memory concurrent system software." Thesis, University of British Columbia, 2011. http://hdl.handle.net/2429/32572.
Full textDietsch, Daniel [Verfasser], and Andreas [Akademischer Betreuer] Podelski. "Automated verification of system requirements and software specifications." Freiburg : Universität, 2016. http://d-nb.info/112274286X/34.
Full textEllis, William James. "An integrated approach to high integrity software verification." Thesis, Heriot-Watt University, 2010. http://hdl.handle.net/10399/2353.
Full textSwart, Riaan. "A language to support verification of embedded software." Thesis, Stellenbosch : Stellenbosch University, 2004. http://hdl.handle.net/10019.1/49823.
Full textENGLISH ABSTRACT: Embedded computer systems form part of larger systems such as aircraft or chemical processing facilities. Although testing and debugging of such systems are difficult, reliability is often essential. Development of embedded software can be simplified by an environment that limits opportunities for making errors and provides facilities for detection of errors. We implemented a language and compiler that can serve as basis for such an experimental environment. Both are designed to make verification of implementations feasible. Correctness and safety were given highest priority, but without sacrificing efficiency wherever possible. The language is concurrent and includes measures for protecting the address spaces of concurrently running processes. This eliminates the need for expensive run-time memory protection and will benefit resource-strapped embedded systems. The target hardware is assumed to provide no special support for concurrency. The language is designed to be small, simple and intuitive, and to promote compile-time detection of errors. Facilities for abstraction, such as modules and abstract data types support implementation and testing of bigger systems. We have opted for model checking as verification technique, so our implementation language is similar in design to a modelling language for a widely used model checker. Because of this, the implementation code can be used as input for a model checker. However, since the compiler can still contain errors, there might be discrepancies between the implementation code written in our language and the executable code produced by the compiler. Therefore we are attempting to make verification of executable code feasible. To achieve this, our compiler generates code in a special format, comprising a transition system of uninterruptible actions. The actions limit the scheduling points present in processes and reduce the different interleavings of process code possible in a concurrent system. Requirements that conventional hardware places on this form of code are discussed, as well as how the format influences efficiency and responsiveness.
AFRIKAANSE OPSOMMING: Ingebedde rekenaarstelsels maak deel uit van groter stelsels soos vliegtuie of chemiese prosesseerfasiliteite. Hoewel toetsing en ontfouting van sulke stelsels moeilik is, is betroubaarheid dikwels onontbeerlik. Ontwikkeling van ingebedde sagteware kan makliker gemaak word met 'n ontwikkelingsomgewing wat geleenthede vir foutmaak beperk en fasiliteite vir foutbespeuring verskaf. Ons het 'n programmeertaal en vertaler geïmplementeer wat as basis kan dien vir so 'n eksperimentele omgewing. Beide is ontwerp om verifikasie van implementasies haalbaar te maak. Korrektheid en veiligheid het die hoogste prioriteit geniet, maar sonder om effektiwiteit prys te gee, waar moontlik. Die taal is gelyklopend en bevat maatreëls om die adresruimtes van gelyklopende prosesse te beskerm. Dit maak duur looptyd-geheuebeskerming onnodig, tot voordeel van ingebedde stelsels met 'n tekort aan hulpbronne. Daar word aangeneem dat die teikenhardeware geen spesiale ondersteuning vir gelyklopendheid bevat nie. Die programmeertaal is ontwerp om klein, eenvoudig en intuïtief te wees, en om vertaaltyd-opsporing van foute te bevorder. Fasiliteite vir abstraksie, byvoorbeeld modules en abstrakte datatipes, ondersteun implementering en toetsing van groter stelsels. Ons het modeltoetsing as verifikasietegniek gekies, dus is die ontwerp van ons programmeertaal soortgelyk aan dié van 'n modelleertaal vir 'n modeltoetser wat algemeen gebruik word. As gevolg hiervan kan die implementasiekode as toevoer vir 'n modeltoetser gebruik word. Omdat die vertaler egter steeds foute kan bevat, mag daar teenstrydighede bestaan tussen die implementasie geskryf in ons implementasietaal, en die uitvoerbare masjienkode wat deur die vertaler gelewer word. Daarom poog ons om verifikasie van die uitvoerbare masjienkode haalbaar te maak. Om hierdie doelwit te bereik, is ons vertaler ontwerp om 'n spesiale formaat masjienkode te genereer bestaande uit 'n oorgangstelsel wat ononderbreekbare (atomiese) aksies bevat. Die aksies beperk die skeduleerpunte in prosesse en verminder sodoende die aantal interpaginasies van proseskode wat moontlik is in 'n gelyklopende stelsel. Die vereistes wat konvensionele hardeware aan dié spesifieke formaat kode stel, word bespreek, asook hoe die formaat effektiwiteit en reageerbaarheid van die stelsel beïnvloed.
Traub, Johannes Frederik Jesper [Verfasser]. "Formal Verification of Concurrent Embedded Software / Johannes Traub." Kiel : Universitätsbibliothek Kiel, 2016. http://nbn-resolving.de/urn:nbn:de:gbv:8-diss-186183.
Full textAntti, William. "Virtualized Functional Verification of Cross-Platform Software Applications." Thesis, Luleå tekniska universitet, Institutionen för system- och rymdteknik, 2019. http://urn.kb.se/resolve?urn=urn:nbn:se:ltu:diva-74599.
Full textUbhayakar, Sonali S. "Evalutation of program specification and verification systems." Monterey, Calif. : Springfield, Va. : Naval Postgraduate School ; Available from National Technical Information Service, 2003. http://library.nps.navy.mil/uhtbin/hyperion-image/03Jun%5FUbhayakar.pdf.
Full textWang, Xuan. "Verification of digital controller implementations /." Diss., CLICK HERE for online access, 2005. http://contentdm.lib.byu.edu/ETD/image/etd1073.pdf.
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