Relevant bibliographies by topics / Software Codesign

Academic literature on the topic 'Software Codesign'

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Published: 4 June 2021
Last updated: 1 February 2022

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Journal articles on the topic "Software Codesign"

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Jerraya, A. "Hardware-software codesign." IEEE Design and Test of Computers 17, no. 1 (January 2000): 92–99. http://dx.doi.org/10.1109/mdt.2000.825680.

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Gupta, P. "Hardware-software codesign." IEEE Potentials 20, no. 5 (2002): 31–32. http://dx.doi.org/10.1109/45.983337.

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Maillet-Contoz, L. "Codesign [hardware/software partitioning]." IEEE Potentials 16, no. 4 (1997): 13–14. http://dx.doi.org/10.1109/45.624333.

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Hsiung, Pao-Ann. "Embedded software verification in hardware–software codesign." Journal of Systems Architecture 46, no. 15 (December 2000): 1435–50. http://dx.doi.org/10.1016/s1383-7621(00)00034-5.

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De Micheli, G. "Computer-aided hardware-software codesign." IEEE Micro 14, no. 4 (August 1994): 10–16. http://dx.doi.org/10.1109/40.296153.

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Färber, G. "Hardware-Software-Codesign eingebetteter Systeme." e & i Elektrotechnik und Informationstechnik 115, no. 3 (March 1998): 128–37. http://dx.doi.org/10.1007/bf03159563.

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Schrott, G., and T. Tempelmeier. "Putting Hardware-Software Codesign into Practice." IFAC Proceedings Volumes 30, no. 23 (September 1997): 15–22. http://dx.doi.org/10.1016/s1474-6670(17)41385-1.

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Tempelmeier, T. "A Note on Hardware-Software Codesign." IFAC Proceedings Volumes 27, no. 6 (June 1994): 121–26. http://dx.doi.org/10.1016/s1474-6670(17)45977-5.

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Schrott, G., and T. Tempelmeier. "Putting hardware–software codesign into practice." Control Engineering Practice 6, no. 3 (March 1998): 397–402. http://dx.doi.org/10.1016/s0967-0661(98)00019-7.

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Gong, Jie, Daniel D. Gajski, and Smita Bakshi. "Model refinement for hardware-software codesign." ACM Transactions on Design Automation of Electronic Systems 2, no. 1 (January 1997): 22–41. http://dx.doi.org/10.1145/250243.250247.

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Dissertations / Theses on the topic "Software Codesign"

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Hilton, Adrian J. "High integrity hardware-software codesign." Thesis, Open University, 2004. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.402249.

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King, Myron Decker. "A methodology for hardware-software codesign." Thesis, Massachusetts Institute of Technology, 2013. http://hdl.handle.net/1721.1/84891.

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Thesis (Ph. D.)--Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2013.
Cataloged from PDF version of thesis.
Includes bibliographical references (pages 150-156).
Special purpose hardware is vital to embedded systems as it can simultaneously improve performance while reducing power consumption. The integration of special purpose hardware into applications running in software is difficult for a number of reasons. Some of the difficulty is due to the difference between the models used to program hardware and software, but great effort is also required to coordinate the simultaneous execution of the application running on the microprocessor with the accelerated kernel(s) running in hardware. To further compound the problem, current design methodologies for embedded applications require an early determination of the design partitioning which allows hardware and software to be developed simultaneously, each adhering to a rigid interface contract. This approach is problematic because often a good hardware-software decomposition is not known until deep into the design process. Fixed interfaces and the burden of reimplementation prevent the migration of functionality motivated by repartitioning. This thesis presents a two-part solution to the integration of special purpose hardware into applications running in software. The first part addresses the problem of generating infrastructure for hardware-accelerated applications. We present a methodology in which the application is represented as a dataflow graph and the computation at each node is specified for execution either in software or as specialized hardware using the programmer's language of choice. An interface compiler as been implemented which takes as input the FIFO edges of the graph and generates code to connect all the different parts of the program, including those which communicate across the hardware/software boundary. This methodology, which we demonstrate on an FPGA platform, enables programmers to effectively exploit hardware acceleration without ever leaving the application space. The second part of this thesis presents an implementation of the Bluespec Codesign Language (BCL) to address the difficulty of experimenting with hardware/software partitioning alternatives. Based on guarded atomic actions, BCL can be used to specify both hardware and low-level software. Based on Bluespec SystemVerilog (BSV) for which a hardware compiler by Bluespec Inc. is commercially available, BCL has been augmented with extensions to support more efficient software generation. In BCL, the programmer specifies the entire design, including the partitioning, allowing the compiler to synthesize efficient software and hardware, along with transactors for communication between the partitions. The benefit of using a single language to express the entire design is that a programmer can easily experiment with many different hardware/software decompositions without needing to re-write the application code. Used together, the BCL and interface compilers represent a comprehensive solution to the task of integrating specialized hardware into an application.
by Myron King.
Ph.D.
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Dave, Nirav Hemant 1982. "A unified model for hardware/software codesign." Thesis, Massachusetts Institute of Technology, 2011. http://hdl.handle.net/1721.1/68171.

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Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2011.
This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.
Cataloged from student submitted PDF version of thesis.
Includes bibliographical references (p. 179-188).
Embedded systems are almost always built with parts implemented in both hardware and software. Market forces encourage such systems to be developed with dierent hardware-software decompositions to meet dierent points on the price-performance-power curve. Current design methodologies make the exploration of dierent hardware-software decompositions difficult because such exploration is both expensive and introduces signicant delays in time-to-market. This thesis addresses this problem by introducing, Bluespec Codesign Language (BCL), a united language model based on guarded atomic actions for hardware-software codesign. The model provides an easy way of specifying which parts of the design should be implemented in hardware and which in software without obscuring important design decisions. In addition to describing BCL's operational semantics, we formalize the equivalence of BCL programs and use this to mechanically verify design refinements. We describe the partitioning of a BCL program via computational domains and the compilation of dierent computational domains into hardware and software, respectively.
by Nirav Dave.
Ph.D.
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Bales, Jason M. "Multi-channel hardware/software codesign on a software radio platform." Fairfax, VA : George Mason University, 2008. http://hdl.handle.net/1920/3400.

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Thesis (M.S.)--George Mason University, 2008.
Vita: p. 89. Thesis director: David D. Hwang. Submitted in partial fulfillment of the requirements for the degree of Master of Science in Electrical Engineering. Title from PDF t.p. (viewed Mar. 9, 2009). Includes bibliographical references (p. 85-88). Also issued in print.
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Cai, Jianming. "An object-based codesign methodology." Thesis, Sheffield Hallam University, 2001. http://shura.shu.ac.uk/19418/.

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The research into Codesign of Hardware and Software stems from the development of embedded systems, on which various systems restrictions are imposed. Typical restrictions can be the overall time (latency) to complete an assigned function and the space/power limits within the system. Although software can be used to undertake most tasks in an embedded system, ASIC (Application Specific Integrated Circuits) hardware components sometimes have to be recruited to meet the system constraints. Designing the restricted embedded system with both software and hardware components in it involves the analysis of not only individual hardware/software components but also their mutual influences. Using co-design principles, the approach is to consider both hardware and software from a coherent viewpoint. This thesis presents the results from our research project in the area of Codesign of Hardware and Software. In this project, we investigated previously published codesign approaches and their methodological supports. The investigation has identified shortcomings and problems with the existing codesign methodologies. A new object-based codesign approach (Co-PARSE) is thus developed in this project, which is supported by successive phases, guidelines, and techniques. This methodology offers a coherent design framework for real-time embedded systems and incorporates the criteria of system performance and hardware cost. Tools have been developed to facilitate the use of the methodology. Within the methodology, a high-level system modeling and specification approach has been developed and formalised in the Co-BSL (Codesign Behavior Specification Language). The means of transforming Co-BSL specifications to C and VHDL implementations is defined, and a library of VHDL components provided. The thesis documents the partitioning approach taken within the methodology and proposes a new multi-layered bus architecture as a basis for more flexible and efficient implementations. A means of simulating the performance characteristics of this architecture under different configurations is provided, and examples of simulation results are presented. A new embedded system (the Radio Data Computing System) is designed and simulated in the Co-PARSE methodology and simulation results analysed. The thesis concludes with an evaluation of the work carried out in the project and proposals for extending the results obtained in future research. The major contributions reported in this thesis can be summarised as follows. First, the unified system specification means has been designed, which is embodied in the Co-BSL. It captures overall dynamic aspects and performance constraints in the system under development. This high-level specification language is independent of implementation and does not bias the designer towards the use of hardware or software components at this early stage. Second, within Co-PARSE, the target architecture of the system under development has been exploited to improve the system performance and at the same time to reduce hardware cost. This novel concept has been realised by the introduction of an asynchronous bus protocol and the multi-layer bus communication structure. Third, in order to evaluate the strength and practicability of the Co-PARSE methodology, an extensive case study has been carried out. The new RDC (Radio Dada Computing) System has been designed in the proposed codesign approach. Codesign phases are subsequently applied and the guidelines and tools that are specially developed in support of the methodology are fully utilized.
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Motiwala, Quaeed. "Optimizations for acyclic dataflow graphs for hardware-software codesign." Thesis, This resource online, 1994. http://scholar.lib.vt.edu/theses/available/etd-06302009-040504/.

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Mendoza, Jose Antonio Kougianos Elias. "Hardware & software codesign of a JPEG200 watermarking encoder." [Denton, Tex.] : University of North Texas, 2008. http://digital.library.unt.edu/permalink/meta-dc-9752.

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Mendoza, Jose Antonio. "Hardware and Software Codesign of a JPEG2000 Watermarking Encoder." Thesis, University of North Texas, 2008. https://digital.library.unt.edu/ark:/67531/metadc9752/.

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Analog technology has been around for a long time. The use of analog technology is necessary since we live in an analog world. However, the transmission and storage of analog technology is more complicated and in many cases less efficient than digital technology. Digital technology, on the other hand, provides fast means to be transmitted and stored. Digital technology continues to grow and it is more widely used than ever before. However, with the advent of new technology that can reproduce digital documents or images with unprecedented accuracy, it poses a risk to the intellectual rights of many artists and also on personal security. One way to protect intellectual rights of digital works is by embedding watermarks in them. The watermarks can be visible or invisible depending on the application and the final objective of the intellectual work. This thesis deals with watermarking images in the discrete wavelet transform domain. The watermarking process was done using the JPEG2000 compression standard as a platform. The hardware implementation was achieved using the ALTERA DSP Builder and SIMULINK software to program the DE2 ALTERA FPGA board. The JPEG2000 color transform and the wavelet transformation blocks were implemented using the hardware-in-the-loop (HIL) configuration.
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Junior, Carlos Alberto Oliveira de Souza. "A hardware/software codesign for the chemical reactivity of BRAMS." Universidade de São Paulo, 2017. http://www.teses.usp.br/teses/disponiveis/55/55134/tde-21092017-170006/.

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Several critical human activities depend on the weather forecasting. Some of them are transportation, health, work, safety, and agriculture. Such activities require computational solutions for weather forecasting through numerical models. These numerical models must be accurate and allow the computers to process them quickly. In this project, we aim at migrating a small part of the software of the weather forecasting model of Brazil, BRAMS Brazilian developments on the Regional Atmospheric Modelling System to a heterogeneous system composed of Xeon (Intel) processors coupled to a reprogrammable circuit (FPGA) via PCIe bus. According to the studies in the literature, the chemical equation from the mass continuity equation is the most computationally demanding part. This term calculates several linear systems Ax = b. Thus, we implemented such equations in hardware and provided a portable and highly parallel design in OpenCL language. The OpenCL framework also allowed us to couple our circuit to BRAMS legacy code in Fortran90. Although the development tools present several problems, the designed solution has shown to be viable with the exploration of parallel techniques. However, the performance was below of what we expected.
Várias atividades humanas dependem da previsão do tempo. Algumas delas são transporte, saúde, trabalho, segurança e agricultura. Tais atividades exigem solucões computacionais para previsão do tempo através de modelos numéricos. Estes modelos numéricos devem ser precisos e ágeis para serem processados no computador.Este projeto visa portar uma pequena parte do software do modelo de previsão de tempo do Brasil, o BRAMSBrazilian developments on the Regional Atmospheric Modelling Systempara uma arquitetura heterogênea composta por processadores Xeon (Intel) acoplados a um circuito reprogramável em FPGA via barramento PCIe. De acordo com os estudos, o termo da química da equação de continuidade da massa é o termo mais caro computacionalmente. Este termo calcula várias equações lineares do tipo Ax = b. Deste modo, este trabalho implementou estas equações em hardware, provendo um ´codigo portável e paralelo na linguagem OpenCL. O framework OpenCL também nos permitiu acoplar o código legado do BRAMS em Fortran90 junto com o hardware desenvolvido. Embora as ferramentas de desenvolvimento tenham apresentado vários problemas, a solução implementada mostrou-se viável com a exploração de técnicas de paralelismo. Entretando sua perfomance ficou muito aquém do desejado.
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Nagaonkar, Yajuvendra. "FPGA-based Experiment Platform for Hardware-Software Codesign and Hardware Emulation." Diss., CLICK HERE for online access, 2006. http://contentdm.lib.byu.edu/ETD/image/etd1294.pdf.

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Books on the topic "Software Codesign"

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Ha, Soonhoi, and Jürgen Teich, eds. Handbook of Hardware/Software Codesign. Dordrecht: Springer Netherlands, 2017. http://dx.doi.org/10.1007/978-94-017-7358-4.

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Hurk, Joris van den. Hardware/software codesign: An industrial approach. Eindhoven: University of Eindhoven, 1996.

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Tan, Woei-Wen. Hardware/software codesign of data encryption algorithms. Manchester: UMIST, 1996.

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A practical introduction to hardware/software codesign. New York: Springer, 2010.

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Schaumont, Patrick R. A Practical Introduction to Hardware/Software Codesign. Boston, MA: Springer US, 2010. http://dx.doi.org/10.1007/978-1-4419-6000-9.

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Schaumont, Patrick R. A Practical Introduction to Hardware/Software Codesign. Boston, MA: Springer US, 2013. http://dx.doi.org/10.1007/978-1-4614-3737-6.

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service), SpringerLink (Online, ed. A Practical Introduction to Hardware/Software Codesign. 2nd ed. Boston, MA: Springer US, 2013.

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Soussan, M. F. Hardware and software codesign of data compression algorithms. Manchester: UMIST, 1996.

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Hübner, Michael, and João M. P. Cardoso. Reconfigurable computing: From FPGAs to hardware/software codesign. New York: Springer, 2011.

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Zhu, Yifan. A kernel design for an embedded hardware/software codesign system. Manchester: UMIST, 1997.

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Book chapters on the topic "Software Codesign"

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Gessler, Ralf. "Hardware-Software-Codesign." In Entwicklung Eingebetteter Systeme, 105–18. Wiesbaden: Springer Fachmedien Wiesbaden, 2020. http://dx.doi.org/10.1007/978-3-658-30549-9_6.

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Kumar, Sanjaya, James H. Aylor, Barry W. Johnson, and WM A. Wulf. "Hardware/Software Codesign Research." In The Codesign of Embedded Systems: A Unified Hardware/Software Representation, 39–63. Boston, MA: Springer US, 1996. http://dx.doi.org/10.1007/978-1-4613-1293-2_3.

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Kumar, Sanjaya, James H. Aylor, Barry W. Johnson, and WM A. Wulf. "Codesign Concepts." In The Codesign of Embedded Systems: A Unified Hardware/Software Representation, 65–94. Boston, MA: Springer US, 1996. http://dx.doi.org/10.1007/978-1-4613-1293-2_4.

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Ha, Soonhoi, Jürgen Teich, Christian Haubelt, Michael Glaß, Tulika Mitra, Rainer Dömer, Petru Eles, Aviral Shrivastava, Andreas Gerstlauer, and Shuvra S. Bhattacharyya. "Introduction to Hardware/Software Codesign." In Handbook of Hardware/Software Codesign, 3–26. Dordrecht: Springer Netherlands, 2017. http://dx.doi.org/10.1007/978-94-017-7267-9_41.

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Ha, Soonhoi, Jürgen Teich, Christian Haubelt, Michael Glaß, Tulika Mitra, Rainer Dömer, Petru Eles, Aviral Shrivastava, Andreas Gerstlauer, and Shuvra S. Bhattacharyya. "Introduction to Hardware/Software Codesign." In Handbook of Hardware/Software Codesign, 1–24. Dordrecht: Springer Netherlands, 2017. http://dx.doi.org/10.1007/978-94-017-7358-4_41-1.

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Gajski, Daniel D., Jianwen Zhu, and Rainer Dömer. "Essential Issues in Codesign." In Hardware/Software Co-Design: Principles and Practice, 1–45. Boston, MA: Springer US, 1997. http://dx.doi.org/10.1007/978-1-4757-2649-7_1.

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Kumar, Sanjaya, James H. Aylor, Barry W. Johnson, and WM A. Wulf. "A Methodology for Codesign." In The Codesign of Embedded Systems: A Unified Hardware/Software Representation, 95–111. Boston, MA: Springer US, 1996. http://dx.doi.org/10.1007/978-1-4613-1293-2_5.

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Schaumont, Patrick R. "Hardware/Software Interfaces." In A Practical Introduction to Hardware/Software Codesign, 259–301. Boston, MA: Springer US, 2010. http://dx.doi.org/10.1007/978-1-4419-6000-9_9.

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Sarma, Santanu, and Nikil Dutt. "Architecture and Cross-Layer Design Space Exploration." In Handbook of Hardware/Software Codesign, 247–70. Dordrecht: Springer Netherlands, 2017. http://dx.doi.org/10.1007/978-94-017-7267-9_9.

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Mitra, Tulika. "Application-Specific Processors." In Handbook of Hardware/Software Codesign, 1–33. Dordrecht: Springer Netherlands, 2016. http://dx.doi.org/10.1007/978-94-017-7358-4_13-1.

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Conference papers on the topic "Software Codesign"

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Imai, M. "Embedded tutorial: hardware/software codesign." In Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198). IEEE, 1999. http://dx.doi.org/10.1109/aspdac.1999.760042.

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Wolf, Wayne H. "Hardware/software codesign for multimedia." In Optical Science, Engineering and Instrumentation '97, edited by Franklin T. Luk. SPIE, 1997. http://dx.doi.org/10.1117/12.279506.

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Mattos de Assumpccao, Jecel. "Hardware/software codesign in neo smalltalk." In Companion of the 18th annual ACM SIGPLAN conference. New York, New York, USA: ACM Press, 2003. http://dx.doi.org/10.1145/949344.949357.

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Knudsen, Peter Voigt, and Jan Madsen. "Communication estimation for hardware/software codesign." In the sixth international workshop. New York, New York, USA: ACM Press, 1998. http://dx.doi.org/10.1145/278241.278297.

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Rajesh, V., and R. Moona. "Processor modeling for hardware software codesign." In Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013). IEEE, 1999. http://dx.doi.org/10.1109/icvd.1999.745137.

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Suzuki, Kei, and Alberto Sangiovanni-Vincentelli. "Efficient software performance estimation methods for hardware/software codesign." In the 33rd annual conference. New York, New York, USA: ACM Press, 1996. http://dx.doi.org/10.1145/240518.240633.

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He, Min, Ming-Che Tsai, Xiaolong Wu, Fei Wang, and Ramzi Nasr. "Hardware/Software Codesign Pedagogy for the Industry." In 2008 Fifth International Conference on Information Technology: New Generations (ITNG). IEEE, 2008. http://dx.doi.org/10.1109/itng.2008.156.

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Liu, Sining, Lin Li, and Wei Wang. "Hardware-Software Codesign for Geological Image Processing." In 2006 International Conference on Communications, Circuits and Systems. IEEE, 2006. http://dx.doi.org/10.1109/icccas.2006.285213.

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Sredojevic, Ranko, Andrew Wright, and Vladimir Stojanovic. "Hardware-Software Codesign for Embedded Numerical Acceleration." In 2013 IEEE 21st Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM). IEEE, 2013. http://dx.doi.org/10.1109/fccm.2013.27.

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"Third International Workshop on Hardware/Software Codesign." In Third International Workshop on Hardware/Software Codesign. IEEE, 1994. http://dx.doi.org/10.1109/hsc.1994.336730.

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