Dissertations / Theses on the topic 'Software and hardware test platform'
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Бугрим, І. В., О. О. Винокуров, and П. В. Галкін. "Approaches to Designing a Wireless Sensor Network Node." Thesis, NURE, MC&FPGA, 2019. https://mcfpga.nure.ua/conf/2019-mcfpga/10-35598-mcfpga-2019-007.
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The object of the research is the hardware component for building a test platform for wireless sensor networks. The aim of the work is to develop a software and hardware test platform for wireless sensor networks. As a result of the analysis, the node structures, wireless sensor network modules, CC2530 peripherals were analyzed. A module based on the CC2530 PA was chosen as the hardware. Given to optimize the structure of the node for as one of approach to designing a wireless sensor network node. Also given report about difference in approach to designing nodes and uses areas.
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Bales, Jason M. "Multi-channel hardware/software codesign on a software radio platform." Fairfax, VA : George Mason University, 2008. http://hdl.handle.net/1920/3400.
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Thesis (M.S.)--George Mason University, 2008.Vita: p. 89. Thesis director: David D. Hwang. Submitted in partial fulfillment of the requirements for the degree of Master of Science in Electrical Engineering. Title from PDF t.p. (viewed Mar. 9, 2009). Includes bibliographical references (p. 85-88). Also issued in print.
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Nagaonkar, Yajuvendra. "FPGA-based Experiment Platform for Hardware-Software Codesign and Hardware Emulation." Diss., CLICK HERE for online access, 2006. http://contentdm.lib.byu.edu/ETD/image/etd1294.pdf.
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Pratt, Jason. "A HARDWARE PLATFORM FOR COGNITIVE RADIO." International Foundation for Telemetering, 2007. http://hdl.handle.net/10150/604472.
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ITC/USA 2007 Conference Proceedings / The Forty-Third Annual International Telemetering Conference and Technical Exhibition / October 22-25, 2007 / Riviera Hotel & Convention Center, Las Vegas, NevadaCognitive radio is a reasonably new branch of research aimed at more fully utilizing the RF spectrum. This is accomplished by allowing wireless communication systems to dynamically choose a frequency band, and a modulation technique, based on the current state of the RF spectrum as perceived by the cognitive radio network. This paper will give a brief introduction of cognitive radio networks, and describe a hardware platform designed at the IFT/UMR Telemetry Learning Center. The test-bed will accommodate future research into cognitive networks, by allowing the user to dynamically change both its carrier frequency and modulation technique through software. A general description of the design of the platform is provided.
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Muffang, Louis. "SLAM Hardware & Software optimization for mobile platform integration." Thesis, KTH, Skolan för elektroteknik och datavetenskap (EECS), 2021. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-294332.
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This thesis work will focus on the optimization of a state-of-the-art monocular Visual-Inertial Odometry (VIO) algorithm for real-time application with limited resources on an embedded system. We will be using a multi-processor unit equipped with a Digital Signal Processor (DSP) to accelerate and offload tasks from the CPU. The goal is to reduce resource consumption without damaging the algorithm performance in speed and accuracy. To this end, we will first identify OpenVINS [1] as a suitable algorithm for this work and find the functions to optimize. When comparing the version of the optimized algorithm with the DSP and its original version, we achieved a similar performance accuracy with more than x1.5 power consumption saving on the CPU and more than x2 memory saving. This work finds its importance in every embedded system which requires a vision-based localization system running along with other CPU heavy tasks.Denna rapport beskriver optimeringen av en algoritm för icke-stereo Visual- Inertial Odometry (VIO), för realtidsapplikationer med begränsade resurser på inbäddade system. Vi använder en multi-processor enhet utrustad med Digital Signal Processor (DSP)) för att öka prestandan och avlasta huvudprocessorn (CPU:n), så att den kan användas för andra uppgifter parallellt. Målet är att minska resursförbrukningen utan att försämra hastighet eller noggrannhet hos algoritmen. Vi identifierar OpenVINS som en lämplig VIO-algoritm att optimera. Resultatet av studien är att vi lyckas minska minnesåtgången för CPU:n med en faktor 2, och energiförbrukningen med en faktor 1,5. Dessa resultat kan komma till användning i alla system som använder en VIO-algoritm parallellt med andra beräkningskrävande uppgifter.
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Burian, Vojtěch. "Software Testing Platform Development and Implementation." Master's thesis, Vysoká škola ekonomická v Praze, 2012. http://www.nusl.cz/ntk/nusl-150008.
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The quality is probably the most significant property of a successful software product. As experience with many software projects has already shown, leaving out testing and quality management from software development process can result in vast and critical customer issues, which usually invoke additional expenses for the software production company. In the course of time, software testing as a discipline has therefore seized an important position among other software development activities. And due to the fact that the software, thanks to rising customer demands and growing competing products portfolio, is getting more complex, the more advanced software testing procedures need to be implemented. Test strategy and iteration planning, implementation of multiple test types into the test suite, test automation, evaluation, administration and maintenance: these activities are commonly required within larger software development projects. Formalized software testing is, nevertheless, being introduced also to projects using agile management techniques which, by management decision or target user industry, are supposed to deliver products of highest quality. This initiates the high focus on the software testing discipline. The purpose of this thesis is to design and implement a new system of software testing within a real project in the CertiCon a.s. company, for which software development is the main business activity. Current issues and gaps for possible improvement, gathered both by project management and the author himself, are analyzed in the first major part of this work and transformed into testing system requirements, which should cover both process changes as well as implementation/development of needed software supporting the process. The second part of thesis is covering the design of the new software testing system, focusing mainly on the area of test management and selection of appropriate software management tool. The final part of the thesis is aimed at implementation of the designed solution within a real organization environment and evaluates its benefits against the previously set requirements.
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Johnsson, Sven. "Hardware and software development of a uClinux Voice over IP telephone platform." Thesis, Linköping University, Department of Science and Technology, 2007. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-9455.
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Voice over IP technology (VoIP) has recently gained popularity among consumers. Many popular VoIP services exist only as software for PCs. The need of taking such services out of the PC, into a stand-alone device has been discovered, and this thesis work deals with the development of such a device. The thesis work is done for Häger Scandinavia AB, a Swedish telephone manufacturer. This thesis work covers the design of a complete prototype of a table-top VoIP telephone running an embedded Linux Operating system. Design areas include product development, hardware design and software design.The result is a working prototype with hardware and corresponding Linux device drivers. The prototype can host a Linux application adapted to it. Conclusions are that the first hardware version has worked well and that using an open-source operating system is very useful. Further work consists of implementing a complete telephony software application in the system, evaluation of system requirements and adapting the prototype for a commercial design.
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Sinha, Udayan Prabir. "Memory Management Error Detection in Parallel Software using a Simulated Hardware Platform." Thesis, KTH, Skolan för informations- och kommunikationsteknik (ICT), 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-219606.
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Memory management errors in concurrent software running on multi-core architectures can be difficult and costly to detect and repair. Examples of errors are usage of uninitialized memory, memory leaks, and data corruptions due to unintended overwrites of data that are not owned by the writing entity. If memory management errors could be detected at an early stage, for example when using a simulator before the software has been delivered and integrated in a product, significant savings could be achieved. This thesis investigates and develops methods for detection of usage of uninitialized memory in software that runs on a virtual hardware platform. The virtual hardware platform has models of Ericsson Radio Base Station hardware for baseband processing and digital radio processing. It is a bit-accurate representation of the underlying hardware, with models of processors and peripheral units, and it is used at Ericsson for software development and integration. There are tools available, such as Memcheck (Valgrind), and MemorySanitizer and AddressSanitizer (Clang), for memory management error detection. The features of such tools have been investigated, and memory management error detection algorithms were developed for a given processor’s instruction set. The error detection algorithms were implemented in a virtual platform, and issues and design considerations reflecting the application-specific instruction set architecture of the processor, were taken into account. A prototype implementation of memory error presentation with error locations mapped to the source code of the running program, and presentation of stack traces, was done, using functionality from a debugger. An experiment, using a purpose-built test program, was used to evaluate the error detection capability of the algorithms in the virtual platform, and for comparison with the error detection capability of Memcheck. The virtual platform implementation detects all known errors, except one, in the program and reports them to the user in an appropriate manner. There are false positives reported, mainly due to the limited awareness about the operating system used on the simulated processorMinneshanteringsfel i parallell mjukvara som exekverar på flerkärniga arkitekturer kan vara svåra att detektera, samt kostsamma att åtgärda. Exempel på fel kan vara användning av ej initialiserat minne, minnesläckage, samt att data blir överskrivna av en process som inte är ägare till de data som skrivs över. Om minneshanteringsfel kan detekteras i ett tidigt skede, t ex genom att använda en simulator, som körs innan mjukvaran har levererats och integrerats i en produkt, skulle man kunna erhålla signifikanta kostnadsbesparingar. Detta examensarbete undersöker och utvecklar metoder för detektion av ej initialiserat minne i mjukvara som körs på en virtuell plattform. Den virtuella plattformen innehåller modeller av delar av den digitala hårdvara, för basband och radio, som finns i en Ericsson radiobasstation. Modellerna är bit-exakta representationer av motsvarande hårdvarublock, och innefattar processorer och periferienheter. Den virtuella plattformen används av Ericsson för utveckling och integration av mjukvara. Det finns verktyg, exempelvis Memcheck (Valgrind), samt MemorySanitizer och AddressSanitizer (Clang), som kan användas för att detektera minneshanteringsfel. Egenskaper hos sådana verktyg har undersökts, och algoritmer för detektion av minneshanteringsfel har utvecklats, för en specifik processor och dess instruktioner. Algoritmerna har implementerats i en virtuell plattform, och kravställningar och design-överväganden som speglar den tillämpnings-specifika instruktionsrepertoaren för den valda processorn, har behandlats. En prototyp-implementation av presentation av minneshanteringsfel, där källkodsraderna samt anropsstacken för de platser där fel har hittats pekas ut, har utvecklats, med användning av en debugger. Ett experiment, som använder sig av ett för ändamålet utvecklat program, har använts för att utvärdera feldetektions-förmågan för de algoritmer som implementerats i den virtuella plattformen, samt för att jämföra med feldetektions-förmågan hos Memcheck. De algoritmer som implementerats i den virtuella plattformen kan, för det program som används, detektera alla kända fel, förutom ett. Algoritmerna rapporterar också falska felindikeringar. Dessa rapporter är huvudsakligen ett resultat av att den aktuella implementationen har begränsad kunskap om det operativsystem som används på den simulerade processorn.
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Perez, Miguel E. M. Eng Massachusetts Institute of Technology. "A hardware platform to test analog-to-information conversion and non-uniform sampling." Thesis, Massachusetts Institute of Technology, 2012. http://hdl.handle.net/1721.1/85482.
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Thesis: M. Eng., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2013.Cataloged from PDF version of thesis.
Includes bibliographical references (pages 121-123).
The Nyquist-Shannon sampling theorem tells us that in order to fully recover a band-limited signal previously converted to discrete data points, said signal must have been sampled at a frequency greater than twice its bandwidth. This theorem puts a burden on circuits like ADCs, in the sense that the higher the bandwidth of a signal, the faster the ADC must be by a factor of at least 2. This in turn translates into higher power consumption. The problem can be mitigated to a certain extent by the use of zero-crossing based ADCs which consume much less power than conventional op-amp based ones, while maintaining the same performance levels. However, the burden still remains, and with the increase in the use of biologically implantable devices, the need for the utmost power efficiency is essential. This is where the theory of compressed sensing seems to offer an alternate solution. Instead of solving the problem with the brute force approach of increasing power consumption to meet performance, compressed sensing promises to increase the effective figure of merit (FOM) by exploiting certain characteristics in the signal's structure. Compressed sensing tells us, that a signal that meets certain criteria, does not need to be sampled at twice its bandwidth in order to be fully recoverable. This means that an ADC no longer has to operate at the Nyquist rate to guarantee that the signal will not be distorted and as a result its power consumption can be reduced considerably. This allows for more robust and energy efficient data acquisition circuits. This means more efficient and longer lasting implantable monitoring devices along with the ability to perform on-site data processing.
by Miguel E. Perez.
M. Eng.
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Chaudhuri, Matthew Alan. "Optimization of a hardware/software coprocessing platform for EEG eyeblink detection and removal /." Online version of thesis, 2008. http://hdl.handle.net/1850/8967.
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Khorev, Andrey. "Hardware/Software prototyping of a miniaturized star tracker system for a nanosatellite platform." Thesis, Montpellier, 2016. http://www.theses.fr/2016MONTT248/document.
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Depuis les tous premiers jours de l'ère spatiale, les satellites artificiels ont été considérés comme un outil pour la résolution de problèmes scientifiques et pratiques, notamment dans l'astronomie, l'observation de la Terre et les télécommunications. Traditionnellement, les gros satellites artificiels, avec une masse allant de plusieurs centaines de kilogrammes jusqu'à plusieurs tonnes, ont été utilisés pour ces besoins. Un élément clef pour permettre le succès de ces missions spatiales est un contrôle précis de l'attitude du satellite. Afin d'assurer la haute précision de pointage, un système de contrôle d'attitude et d'orbite (SCAO) repose sur les données fournies par un instrument optoélectronique appelé un senseur stellaire (ou Star Tracker, ST). L'utilisation des étoiles éloignées comme points de repère permet la détermination de l'attitude du satellite avec une précision de l'ordre de la seconde d'arc. Beaucoup de travaux sur la miniaturisation des sous-systèmes des satellites artificiels ont été entrepris au court des vingt dernières années. Cela a permis à l'industrie et aux passionnés de développer et construire des satellites de quelques kilogrammes pouvant accomplir de véritables missions spatiales. Centaines de ces satellites appelés « nano-satellites » sont lancé chaque année et certains parmi eux peut être considéré comme un replacement des gros satellites. Cependant, dû à de grosses contraintes de masse et de volume définis par les standards na no-satellites, tel que lU-3U CubeSat Design Specification, l'intégration de senseur stellaire dans ces nano-satellites n'était jusqu'à présent pas possible, limitant l'application de ces plateformes. Dans ce travail, senseur stellaire est considéré comme un système composé par un module caméra et un module de traitement d'image. les solutions possibles pour chaque module sont analysées séparément dans un contexte de miniaturisation de ST par modélisation et simulation. Elles sont ensuite évaluées ensemble comme les prototypes fonctionnels dans un installation hardware-in-the-loop (Hll). Cette recherche aborde plusieurs problèmes liés à la miniaturisation d'optique de caméra et du capteur d'image à pixel actif (active pixel sensor, APS), tels que la sensibilité réduite à la lumière des étoiles et l'incertitude de position des centroïdes à cause de la distorsions et l'aberrations chromatique d'optique miniaturisée. L'évaluation dans l'installation Hll se concentre autour des performances du module de traitement et plus particulièrement sur les performances du logiciel ST dans le mode d'opération « perdu dans l'espace» ("Iost-in-space", LIS). Une contribution originale de cette recherche est un algorithme de reconnaissance d'étoiles (StarID) nommé « RING-O » développé et breveté par l'auteur. Par rapport aux autres algorithmes existants, RING-O peut facilement être adapté et ajusté à différentes caméras et plateformes de traitement. Des implémentations logicielles d'algorithme ont été effectuées sur deux prototypes, l'un basé sur smartphone et l'autre basé sur une plateforme Xilinx Zynq, afin de réaliser une analyse des goulets et d'extraire les performances du système. Optimisé pour les plateformes multi-coeurs, RING-O garantit les délais d'acquisition initiale d'attitude comparable et souvent plus petits que les délais d'acquisition déclaré par les autres développeurs de senseur stellaires européensFrom the early days of the space age, satellites were considered as a solution for many scientific and practical tasks, notably astronomy, Earth observation and telecommunication. Traditionally and to the present day, mostly large satellites with a mass from several hundred kilograms to several tons are used for these purposes. The key success factor of such space missions is a fine control of satellite’s attitude. To ensure high pointing accuracy, satellite’s attitude determination and control subsystem (ADCS) relies on precise three-dimensional attitude data provided by an opto-electronic instrument called star tracker (ST). The use of stars as reference objects allows to determine the satellite’s attitude in real time with an arc-second precision.A significant work on miniaturization of satellite subsystems carried out in the past twenty years, allows us today to build a complete satellite with a mass of only a few kilograms. An increasing number of successful nano- and picosatellite missions demonstrates constantly improving capabilities of modern miniaturized satellite platforms. However, until recently, integration of a star tracker into a nanosatellite was not possible because of a large size of the device and relatively high power consumption, and that limited possible applications of the nanosatellites. In attempt to change the situation, in the last five years about a dozen of miniature star tracker prototypes, suitable for nanosatellite platforms, were proposed by various developers. Some were successfully tested in space, yet most prototypes, including the tiniest ones, are still at the development stage.A modern star tracker is a system, that can be represented as two modules, a digital camera module and a processing module. Use of a compact camera lens and a small-size image sensor allows to significantly reduce overall mass and size of the device, and at the same time, may cause significant image quality deterioration, due to increased distortion, uncompensated spherical and chromatic aberration, lower signal-to-noise ratio (SNR) and overall lower light sensitivity of the camera module. Thus, embedded software of the processing module, responsible for pre-processing, star identification and attitude calculation, should take into account the limitations imposed by the miniaturization of the camera module. At the same time, hardware architecture of the processing module should have the capacity to perform necessary correction of the digital image in real time, and to ensure stability and expected performance of the star identification and attitude calculation routines.The goal of hardware and software prototyping of a miniature star tracker system, carried out in this work, is to evaluate various design solutions, that could be brought into the camera or into the processing module, in order to help the miniaturization of the system. Another goal is to analyze the impact of every hardware and software component on the overall performance of a miniaturized star tracker system. Among the list of star tracker characteristics, the initial attitude estimation time and the attitude output rate became the focus of the research. Current work addresses possible performance bottlenecks, that may appear on any step of star tracker operation, from capturing starlight to calculation of components of the attitude quaternion, and proposes an original solution to speed-up the star identification routine
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Egolf, Thomas W. "Virtual prototyping of embedded digital systems : hardware/software codesign, integration, and test." Diss., Georgia Institute of Technology, 1997. http://hdl.handle.net/1853/15679.
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Cassirer, Albin, and Erik Hane. "Model-Pipe-Hardware: Method for Test Driven Agile Development in Embedded Software." Thesis, KTH, Maskinkonstruktion (Inst.), 2015. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-182670.
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In this thesis, we present development and evaluation of a new test driven design method for embedded systems software development. The problem of development speed is one of major obstacles for transferring Test Driven Development (TDD) methodologies into the domain of embedded software development. More specically, the TDD cycle is disrupted by time delays due to code uploads and transfer of data between the development "host" system and the "target" embedded platform. Furthermore, the use of "mock objects" (that abstract away hardware dependencies and enable host system testing techniques) is problematic since it creates overhead in terms of development time. The proposed model, Model-Pipe-Hardware (MPH), addresses this problem by introducinga strict set of design rules that enable testing on the "host" without the need of the "mock objects". MPH is based on a layer principle, "trigger-event-loop" and supporting "target" architecture. The layer principle provides isolation between hardware dependent/independent code. The trigger-event-loop is simply a proxy between the layers. Finally, the developed testing fixture enables testing of hardware dependent functions and is independent of the target architecture. The MPH model is presented and qualitatively evaluated through an interview study and an industry seminar at the consulting company Sigma Technology in Stockholm. Furthermore, we implement tools required for MPH and apply the model in a small scale industry development project. We construct a system capable of monitoring and visualisation of status in software development projects. The combined results (from interviews and implementation) suggest that the MPH method has a great potential to decrease development time overheads for TDD in embedded software development. We also identify and present obstacles to adaptation of MPH. In particular, MPH could be problematic to implement in software development involving real-time dependencies, legacy code and a high degree of system complexity. We present mitigations for each one of these issues and suggest directions for further investigations of the obstacles as part of future work.I denna avhandling presenteras utveckling och utvärdering av en ny utvecklingsmetod för mjukvaruutveckling i inbyggda system. Långsam utvecklingshastighet ar ett stort hinder för applicerandet av Test Driven Utveckling (eng. Test-Driven-Development,TDD) inom inbyggda system. Mer specifikt, uppstår flaskhalsar i TDD cykeln på grund av koduppladdningar och dataöverföringar mellan utvecklingsmiljö (host) och plattformen för det inbyggda systemet (target). Vidare är användningen av "mock"-objekt (abstraherar bort hårdvaruberoenden for att möjliggöra tester i hostmiljö) kostsamt då implementatering och design av "mock"-objekten förlänger utvecklingstiden. Den förslagna modellen, Model-Pipe-Hardware (MPH), adresserar detta problem genom att introducera strikta designregler vilket möjliggör tester i hostmiljö utan användning av mocks. MPH bygger på en lagerprincip, en så kallad "trigger-event-loop" och en tillhörande hårdvaruarkitektur. Lagerprincipen möjliggör isolering mellan hårdvaru- beroende/oberoendekod medan trigger-event-loopen fungerar som en proxy mellan lagren. MPH presenteras och utvärderas genom en intervjustudie och ett industriseminarium på konsultbolaget Sigma Technology i Stockholm. Vidare implementeras nödvändig infrastruktur och MPH metoden har applicerarts på ett mindre industriellt utvecklingsprojekt. De kombinerade resultaten från intervjuer, seminarium implementering antyder att MPH har stor potential att öka utvecklingshastighet for TDD i inbyggda system. Vi identierar även möjliga hinder föor applicering av MPH i utveckling av inbyggda system. Mer specifikt kan MPH vara problematisk för inbyggda system som innefattar realtidskrav, så kallad "legacy kod" och för system med hög komplexitet. Vi föreslår möjliga lösningar för dessa problem och hur de bör utredas vidare som en del av framtida arbete.
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Sheikh, Bilal Tahir. "Interdisciplinary Requirement Engineering for Hardware and Software Development - A Software Development Perspective." Thesis, Linköpings universitet, Institutionen för datavetenskap, 2018. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-147886.
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The software and hardware industries are growing day by day, which makes their development environments more complex. This situation has a huge impact on the companies which have interdisciplinary development environments. To handle this situation, a common platform is required which can be acted as a bridge between hardware and software development to ease their tasks in an organized way. The research questions of the thesis aim to get information about differences and similarities in requirements handling, and their integration in current and future prospectives. The future prospect of integration is considered as a focused area. Interviews were conducted to get feedback from four different companies having complex development environments.
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Karve, Mrudula Prabhakar. "Evaluation of GNU Radio Platform Enhanced for Hardware Accelerated Radio Design." Thesis, Virginia Tech, 2010. http://hdl.handle.net/10919/36405.
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The advent of software radio technology has enabled radio developers to design and imple-
ment radios with great ease and flexibility. Software radios are effective in experimentation
and development of radio designs. However, they have limitations when it comes to high-
speed, high-throughput designs. This limitation can be overcome by introducing a hardware
element to the software radio platform. Enhancing GNU Radio for Hardware Accelerated
Radio Design project implements such a scheme by augmenting an FPGA co-processor to
a conventional GNU Radio flow. In this thesis, this novel platform is evaluated in terms of
performance of a radio design, as well as hardware and software system requirements. A
simple and efficient Zigbee receiver design is presented. Implementation of this receiver is
used as a proof-of-concept for the effectiveness and design methodology of the modified GNU
Radio. This work also proposes a scheme to extend this idea for design of ultra-wideband
radio systems based on multiband-OFDM.Master of Science
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Igual, Pérez Román José. "Platform Hardware/Software for the energy optimization in a node of wireless sensor networks." Thesis, Lille 1, 2016. http://www.theses.fr/2016LIL10041/document.
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L'incroyable augmentation d'objets connectés dans le monde de l'Internet des Objets impliquera plusieurs problèmes. L'efficacité énergétique est un des principaux. Le présent travail étudie l'efficacité énergétique et, plus précisément, la modélisation de l'énergie consommée par le nœud.Nous avons créé une plateforme matérielle et logicielle appelée Synergie. Cette plateforme est composée d'un ensemble d'outils matériel/logiciel :- un dispositif de mesure de la consommation d'énergie;- un algorithme qui crée automatiquement un modèle de la consommation de l'énergie;- un estimateur de la durée de vie du nœud.La plateforme des mesures de l'énergie récupère les valeurs de courant directement du nœud. Ces courants sont mesurés composant par composant du circuit et fonction par fonction du logiciel embarqué. Cette analyse matérielle/logicielle offre information sur le comportement de chaque composant.Un algorithme crée automatiquement un modèle de la consommation énergétique basé sur une chaîne de Markov. Ce modèle est une représentation stochastique du comportement énergétique du nœud en fonctionnement in situ. Le nœud fonctionne dans un réseau réel et dans des conditions réelles de canal.Finalement, une estimation de la durée de vie du nœud est réalisée en utilisant des modèles de batterie. L'estimation est possible grâce au caractère stochastique du modèle de la consommation. La possibilité de simplement changer les paramètres de consommation pour améliorer la durée de vie est présentée.Ce travail représente la première étape d'un projet global qui a pour but obtenir des réseaux de capteurs sans fil autonomes en énergieThe significant increase of connected objects in Internet of Things will entail different problems. Among them, the energy efficiency. The present work deals with the energy efficiency and more precisely with the study of the modeling of the energy consumption in the node.We have designed a platform to instrument a node of wireless sensor network in its real environment. The hardware and software platform is made of:- a hardware energy measurement platform;- a software allowing the automatic generation of an energy consumption model;- a node lifetime estimation algorithm.The energy measurement platform recovers the current values directly from the node under evaluation, component per component in the electronic circuit and function per function of the embedded software. This hardware/software analysis of the energy consumption offers important information about the behavior of each electronic component in the node.An algorithm carries out a statistical analysis of the energy measurements. This algorithm creates automatically an energy consumption model based on a Markov chain. Thus, this platform allows to create a stochastic model of the energy behavior of a real node, in a real network and in real channel conditions. The model is made in contrast to the deterministic energy models found in the literature, whose energy behavior is extracted from the datasheets of the components. Finally, we estimate the node lifetime based on battery models. We also show on examples the simplicity to change some parameters of the model in order to improve the energy efficiency
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Perrett, M. R. "Wireless multi-carrier communication system design and implementation using a custom hardware and software FPGA platform." Thesis, University College London (University of London), 2012. http://discovery.ucl.ac.uk/1370580/.
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Field Programmable Gate Array (FPGA) devices and high-level hardware development languages represent a new and exciting addition to traditional research tools, where simulation models can be evaluated by the direct implementation of complex algorithms and processes. Signal processing functions that are based on well known and standardised mathematical operations, such as Fast Fourier Transforms (FFTs), are well suited for FPGA implementation. At UCL, research is on-going on the design, modelling and simulation of Frequency Division Multiplexing (FDM) techniques such as Spectrally E - cient Frequency Division Multiplexing (SEFDM) which, for a given data rate, require less bandwidth relative to equivalent Orthogonal Frequency Division Multiplexing (OFDM). SEFDM is based around standard mathematical functions and is an ideal candidate for FPGA implementation. The aim of the research and engineering work reported in this thesis is to design and implement a system that generates SEFDM signals for the purposes of testing and veri cation, in real communication environments. The aim is to use FPGA hardware and Digital to Analogue Converters (DACs) to generate such signals and allow recon gurability using standard interfaces and user friendly software. The thesis details the conceptualisation, design and build of an FPGA-based wireless signal generation platform. The characterisation applied to the system, using the FPGA to drive stimulus signals is reported and the thesis will include details of the FPGA encapsulation of the minimum protocol elements required for communication (of control signals) over Ethernet. Detailed testing of the hardware is reported, together with a newly designed in the loop testing methodology. Veri ed test results are also reported with full details of time and frequency results as well as full FPGA design assessment. Altogether, the thesis describes the engineering design, construction and testing of a new FPGA hardware and software system for use in communication test scenarios, controlled over Ethernet.
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Carra, Filippo. "Sviluppo hardware e software per la conduzione di test su attuatori a memoria di forma." Bachelor's thesis, Alma Mater Studiorum - Università di Bologna, 2012. http://amslaurea.unibo.it/4834/.
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Rafeeq, Akhil Ahmed. "A Development Platform to Evaluate UAV Runtime Verification Through Hardware-in-the-loop Simulation." Thesis, Virginia Tech, 2020. http://hdl.handle.net/10919/99041.
Full textAbstract:
The popularity and demand for safe autonomous vehicles are on the rise. Advances in semiconductor technology have led to the integration of a wide range of sensors with high-performance computers, all onboard the autonomous vehicles. The complexity of the software controlling the vehicles has also seen steady growth in recent years. Verifying the control software using traditional verification techniques is difficult and thus increases their safety concerns.
Runtime verification is an efficient technique to ensure the autonomous vehicle's actions are limited to a set of acceptable behaviors that are deemed safe. The acceptable behaviors are formally described in linear temporal logic (LTL) specifications. The sensor data is actively monitored to verify its adherence to the LTL specifications using monitors. Corrective action is taken if a violation of a specification is found.
An unmanned aerial vehicle (UAV) development platform is proposed for the validation of monitors on configurable hardware. A high-fidelity simulator is used to emulate the UAV and the virtual environment, thereby eliminating the need for a real UAV. The platform interfaces the emulated UAV with monitors implemented on configurable hardware and autopilot software running on a flight controller. The proposed platform allows the implementation of monitors in an isolated and scalable manner. Scenarios violating the LTL specifications can be generated in the simulator to validate the functioning of the monitors.Master of Science
Safety is one of the most crucial factors considered when designing an autonomous vehicle. Modern vehicles that use a machine learning-based control algorithm can have unpredictable behavior in real-world scenarios that were not anticipated while training the algorithm. Verifying the underlying software code with all possible scenarios is a difficult task. Runtime verification is an efficient solution where a relatively simple set of monitors validate the decisions made by the sophisticated control software against a set of predefined rules. If the monitors detect an erroneous behavior, they initiate a predetermined corrective action. Unmanned aerial vehicles (UAVs), like drones, are a class of autonomous vehicles that use complex software to control their flight. This thesis proposes a platform that allows the development and validation of monitors for UAVs using configurable hardware. The UAV is emulated on a high-fidelity simulator, thereby eliminating the time-consuming process of flying and validating monitors on a real UAV. The platform supports the implementation of multiple monitors that can execute in parallel. Scenarios to violate rules and cause the monitors to trigger corrective actions can easily be generated on the simulator.
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Namli, Tuncay. "Testbatn - A Scenario Based Test Platform For Conformance Andinteroperability Testing." Phd thesis, METU, 2011. http://etd.lib.metu.edu.tr/upload/12613285/index.pdf.
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Today, interoperability is the major challenge for e-Business and e-Government domains. The
fundamental solution is the standardization in different levels of business-to-business interactions.
However publishing standards alone are not enough to assure interoperability between
products of different vendors. In this respect, testing and certification activities are very important
to promote standard adoption, validate conformance and interoperability of the products
and maintain correct information exchange. In e-Business collaborations, standards need
to address different layers of interoperability stackcommunication layer, business document layer and business process layer. Although there have been conformance and interoperability testing tools and initiatives for each one of these categories, there is currently no support for testing an integration of the above within a test scenario which is similar to real life use cases. Together with the integration of different layers of testing, testing process should be automated so that test case execution can be done at low cost, and repeated if required. In this theses, a highly adaptable and flexible Test Execution Model and a complementary XML based Test Description Language consisting of high level test constructs which can handle or simulate different parts or layers of the interoperability stack is designed. The computer interpretable test description language allow dynamic set up of test cases and provides flexibility to design, modify, maintain and extend the test functionality in contrast to a priori designed and hard coded test cases. The work presented in this thesis is a part of the TestBATN system supported by TUBITAK, TEYDEB Project No: 7070191.
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Smith, Robert. "A component-based layered abstraction model for software portability across autonomous mobile robots." Queensland University of Technology, 2005. http://eprints.qut.edu.au/16406/.
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Today's autonomous robots come in a variety of shapes and sizes from all terrain vehicles clambering over rubble, to robots the size of coffee cups zipping about a laboratory. The diversity of these robots is extraordinary; but so is the diversity of the software created to control them even when the basic tasks many robots undertake are practically the same (such as obstacle detection, tracking, or path planning). It would be beneficial if some reuse of these coded sub-tasks could be achieved. However, most of the present day robot software is monolithic, very specialised and not at all modular, which hinders the reuse and sharing of code between robot platforms. One difficulty is that the hardware details of a robot are usually tightly woven into the high-level controllers. When these details are not decoupled and explicitly encapsulated, the entire code set must be revised if the robot platform changes. An even bigger challenge is that a robot is a context-aware device. Hence, the possible interpretations of the state of the robot and its environment vary along with its context. For example, as the robots differ in size and shape, the meaning of concepts such as direction, speed, and distance can change { objects that are considered far from one robot, might seem near to a much larger robot. When designing reusable robot software, these variable interpretations of the environment must be considered. Similarly, so must variations in context dependent robot instructions { for example, `move fast' has different abstractions; a `virtual robot' layer to manage the robot's platform abstractions; and high-level abstraction components that are used to describe the state of the robot and its environment. The prototype is able to support binary code portability and dynamic code extensibility across a range of different robots (demonstrated on eight diverse robot platform configurations). These outcomes significantly ease the burden on robot software developers when deploying a new robot (or even reconfiguring old robots) since high-level binary controllers can be executed unchanged on different robots. Furthermore, since the control code is completely decoupled from the platform information, these concerns can be managed separately, thereby providing a flexible means for managing different configurations of robots. These systems and techniques all improve the robot software design, development, and deployment process. Different meanings depending on the robot's size, environmental context and task being undertaken. What is needed is a unifying cross-platform software engineering approach for robots that will encourage the development of code that is portable, modular and robust. Toward this end, this research presents a complete abstraction model and implementation prototype that contain a suite of techniques to form and manage the robot hardware, platform, and environment abstractions. The system includes the interfaces and software components required for hardware device and operating system abstractions; a `virtual robot' layer to manage the robot's platform abstractions; and high-level abstraction components that are used to describe the state of the robot and its environment. The prototype is able to support binary code portability and dynamic code extensibility across a range of different robots (demonstrated on eight diverse robot platform configurations). These outcomes significantly ease the burden on robot software developers when deploying a new robot (or even reconfiguring old robots) since high-level binary controllers can be executed unchanged on different robots. Furthermore, since the control code is completely decoupled from the platform information, these concerns can be managed separately, thereby providing a flexible means for managing different configurations of robots. These systems and techniques all improve the robot software design, development, and deployment process.
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Wang, Shangning Wang. "Study of the Back-to-Back Test Method for Embedded Systems in Hardware-Software Integration Context." Thesis, KTH, Maskinkonstruktion (Avd.), 2013. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-141110.
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Användningen av inbyggda system för att realisera säkerhetskritiska funktioner, bl.a. inom bilindustrin, leder till krav på avancerade metoder för utveckling och verifiering.“Back-to-Back Testing” (B2B-testning) är en testmetod som föreslås av ISO26262, en nyligen släppt standard för funktionssäkerhet, för att verifiera timing och noggrannhet under fasen för integration av mjukvara och hårdvara (HSI-fasen). B2B-testning under HSI-fasen innebär att ett systems beteende jämförs med beteendet hos en modell av systemet, när båda utsätts för samma test-stimuli. Man kan inte förutsätta att test-svaren blir identiska, även om systemet beter sig korrekt. Avvikelser skapade av variationer i systemets miljö är ofta förekommande. Små avvikelser bör därför tolereras för att undvika för många ”falska” felindikationer. När resultaten från B2B-testning ska utvärderas, så är detta att tolerera vissa avvikelser utan att missa felaktigt beteende en av de största utmaningarna.Det här examensarbetet presenterar en litteraturstudie som undersökt State-of-the-Art i avseende på B2B-testning under HSI-fasen, med en specifik inriktning på ovan nämnda utmaning. Litteraturstudien påvisar en avsaknad av skräddarsydda utvärderingsmetoder för resultaten från B2B-testning under HSI-fasen.Motiverat av denna avsaknad av utvärderingsmetoder presenteras därefter en komparator som använder ett variabelt tröskelvärde för skillnader i test-svaren från test-objekt och modell. Om skillnaden är större än tröskelvärdet så anses testet ha fallerat. Med denna komparator, och en arbetsbänk skräddarsydd för att möjliggöra analyser av komparatorn, visas exempel på möjligheten att tolerera skillnader i beteende framkallat av variationer i systemets miljö, men samtidigt kunna detektera skillnader i beteende som härstammar från fel4i systemet. Exemplen och en studie av ett realistiskt system visar att tillvägagångssättet är lovande som en bas för B2B-testning under HSI-fasenThe use of electronics and software (embedded systems) to implement safety-critical systems, such as in the automotive domain, requires advanced methods in development and verification of these systems.Back-to-back (B2B) testing is a test method that is suggested by ISO26262, a latest functional safety standard, for verifying a system in terms of timing and accuracy at the Hardware-software integration (HSI) stage. In the B2B testing at the HSI stage, the behaviour of the system is compared against the behaviour of a model of this system, using the same test stimuli.It cannot be expected that test response from the system are identical even though the system performs correctly. Discrepancies are often due to environmental variations. It should be tolerated to a certain level to allow for detection of the system faults. In the result evaluation of B2B testing, it is a challenge to tolerate some discrepancies while faulty behaviour of the tested system should be detected.This work presents a literature study that investigates current research with regard to the usage of B2B test method at the HSI stage, in particular, with regard to the above discussed challenge. The result of literature review shows that there is a lack of discussion about custom-designed evaluation method of B2B test result in the HSI context.Motivated from the above, this work presents a comparator which uses a variable threshold on the signal level difference between the test responses from a test object and a model. If the signal level difference is larger than the threshold, the test fails and otherwise passes. With this comparator, and a workbench custom built to enable analysis of the comparator, we6demonstrate the ability to tolerate behaviour discrepancies induced by environmental variations, but reject the discrepancies induced by faults. The demonstrations and real-life study show that the approach is promising for usage as the basis for B2B test method at the HSI stage.
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Ispir, Mustafa. "Test Driven Development Of Embedded Systems." Master's thesis, METU, 2004. http://etd.lib.metu.edu.tr/upload/12605630/index.pdf.
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In this thesis, the Test Driven Development method (TDD) is studied for use in developing embedded software. The required framework is written for the development environment Rhapsody.
Integration of TDD into a classical development cycle, without necessitating a transition to agile methodologies of software development and required unit test framework to apply TDD to an object oriented embedded software development project with a specific development environment and specific project conditions are done in this thesis. A software tool for unit testing is developed specifically for this purpose, both to support the proposed approach and to illustrate its application.
The results show that RhapUnit supplies the required testing functionality for developing embedded software in Rhapsody with TDD. Also, development of RhapUnit is a successful example of the application of TDD.
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Civelek, Utku. "A Software Tool For Vehicle Calibration, Diagnosis And Test Viacontroller Area Network." Master's thesis, METU, 2012. http://etd.lib.metu.edu.tr/upload/12614836/index.pdf.
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Controller Area Networks (CAN&rsquos) in vehicles need highly sophisticated software tools to be designed and tested in development and production phases. These tools consume a lot of computer resources and usually have complex user interfaces. Therefore, they are not feasible for vehicle service stations where low-performance computers are used and the workers not very familiar with software are employed. In this thesis, we develop a measurement, calibration, test and diagnosis program -diaCAN- that is suitable for service stations. diaCAN can transmit and receive messages over 3 CAN bus channels. It can display and plot the data received from the bus, import network message and Electronic Control Unit (ECU) configurations, and record bus traffic with standard file formats. Moreover, diaCAN can calibrate ECU values, acquire fault records and test vehicle components with CAN Calibration Protocol functions. All of these capabilities are verified and evaluated on a test bed with real CAN bus and ECUs.
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Wennberg, Per, and Viktor Danielson. "Evaluation of a Testing Process to Plan and Implement an Improved Test System : A Case Study, Evaluation and Implementation in Lab-VIEW/TestStand." Thesis, Linköpings universitet, Programvara och system, 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-130770.
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In order to ensure the quality of a product, the provider of the product must performcomplete testing of the product. This fact increases the demands on the test systems usedto conduct the testing, the system needs to be reliable.When developing new software for a company, sometimes a requirements specificationcreated at the beginning of the project is not enough. Details of the desired implementationmay get lost when working with a general requirements specification.This thesis presents a case study of how a certain company work with their test systems.The aim of the case study was to find where the largest points of improvements could bemade in a new test system, which was to be implemented during this thesis work. Theimplementation of this new system was done in LabVIEW in conjunction with TestStandand this process is covered in this thesis.The performed case study revealed that the employees at the company found robustnessand usability to be the key factors in a new test system. During and after the implementationof the new system, it was evaluated regarding these two metrics, this process isalso covered in this thesis.
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Naqvi, Karim J. "Hardware and software development of an automated semi-quantitative test for coliforms using gas evolution as an indicator." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1999. http://www.collectionscanada.ca/obj/s4/f2/dsk3/ftp04/mq39149.pdf.
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Hegen, Peter [Verfasser]. "Integrated Hardware & Software Platform with Automated FIR Filter Coefficient Adaptation for Advanced Control of Modern Hand Prostheses / Peter Hegen." München : Verlag Dr. Hut, 2019. http://d-nb.info/1196415153/34.
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BHADRI, PRASHANT R. "DEVELOPMENT OF AN INTEGRATED SOFTWARE/HARDWARE PLATFORM FOR THE DETECTION OF CEREBRAL ANEURYSM BY QUANTIFYING BILIRUBIN IN CEREBRAL SPINAL FLUID." University of Cincinnati / OhioLINK, 2005. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1126815429.
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Flores, Alfonso S. "Development of a software-defined integrated circuit test system using a system engineering approach on a PXI platform." [Tampa, Fla] : University of South Florida, 2008. http://purl.fcla.edu/usf/dc/et/SFE0002629.
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Gantel, Laurent. "Hardware and software architecture facilitating the operation by the industry of dynamically adaptable heterogeneous embedded systems." Phd thesis, Université de Cergy Pontoise, 2014. http://tel.archives-ouvertes.fr/tel-01019909.
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This thesis aims to define software and hardware mechanisms helping in the management the Heterogeneous and dynamically Reconfigurable Systems-on-Chip (HRSoC). The heterogeneity is due to the presence of general processing units and reconfigurable IPs. Our objective is to provide to an application developer an abstracted view of this heterogeneity, regarding the task mapping on the available processing elements. First, we homogenize the user interface defining a hardware thread model. Then, we pursue with the homogenization of the hardware threads management. We implemented OS services permitting to save and restore a hardware thread context. Conception tools have also been developed in order to overcome the relocation issue. The last step consisted in extending the access to the distributed OS services to every thread running on the platform. This access is provided independently from the thread location and is is realized implementing the MRAPI API. With these three steps, we build a solid basis to, in future work, provide to the developer, a conception flow dedicated to HRSoC allowing to perform precise architectural space explorations. Finally, to validate these mechanisms, we realize a demonstration platform on a Virtex 5 FPGA running a dynamic tracking application.
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Belsick, Charlotte Ann. "Space Vehicle Testing." DigitalCommons@CalPoly, 2012. https://digitalcommons.calpoly.edu/theses/888.
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Requirement verification and validation is a critical component of building and delivering space vehicles with testing as the preferred method. This Master’s Project presents the space vehicle test process from planning through test design and execution. It starts with an overview of the requirements, validation, and verification. The four different verification methods are explained including examples as to what can go wrong if the verification is done incorrectly. Since the focus of this project is on test, test verification is emphasized. The philosophy behind testing, including the “why” and the methods, is presented. The different levels of testing, the test objectives, and the typical tests are discussed in detail. Descriptions of the different types of tests are provided including configurations and test challenges. While most individuals focus on hardware only, software is an integral part of any space product. As such, software testing, including mistakes and examples, is also presented. Since testing is often not performed flawlessly the first time, sections on anomalies, including determining root cause, corrective action, and retest is included. A brief discussion of defect detection in test is presented.
The project is actually presented in total in the Appendix as a Power Point document.
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Figueira, Henrique Horst. "Sistema automatizado para ensaio de inversores fotovoltaicos conectados à rede em acordo com normatização brasileira." Universidade Federal de Santa Maria, 2016. http://repositorio.ufsm.br/handle/1/8605.
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Coordenação de Aperfeiçoamento de Pessoal de Nível SuperiorThis document aims to develop an automated test platform for grid-connected photovoltaic inverters. Therefore, it was conducted a study of European, North American and Brazilian standards related in order to compare the Brazilian standard with respect to the others. A comparison between them with respect to the operating limits is presented. Further, the restrictions are evaluated for each equipment used in the testing of PV inverters certification: CA emulator source emulator PV supply, power analyzer, oscilloscope and flickermeter. Finally, it was developed a software for automation of tests, which is applied for supporting the configuration sources processes, acquisition measures and test report generation. This software is evaluated by obtaining experimental tests, whose results are compared with equivalent obtained through non-automated tests, enabling the validation of the system.
Esse trabalho tem como objetivo desenvolver uma bancada de ensaio automatizado para inversores fotovoltaicos conectados à rede elétrica. Para tanto, se realizou um estudo das normas europeias, norteamericanas e brasileiras relacionadas ao assunto com o propósito de comparar a norma brasileira com relação às demais. Uma comparação entre elas no que tange aos limites de operação é apresentado. Na sequência do trabalho são avaliadas as restrições impostas para cada equipamento utilizado no ensaio de certificação de inversores fotovoltaicos, a destacar: fonte emuladora CA, fonte emuladora FV, analisador de energia, osciloscópio e fliquerímetro. Por fim, é desenvolvido um software para automação dos ensaios que é aplicado para auxílio aos processos de configuração de fontes, aquisição de medidas e geração de relatório. Esse software é avaliado através da obtenção de ensaios experimentais, cujos resultados são comparados com equivalentes obtidos através de ensaios não-automatizados, possibilitando a validação do sistema proposto.
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Sjöquist, Joakim. "Building a suitable testing-platform to measure impact of typographic effects on web pages." Thesis, Mittuniversitetet, Institutionen för informationssystem och –teknologi, 2020. http://urn.kb.se/resolve?urn=urn:nbn:se:miun:diva-39333.
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The purpose of this study was to create a testing-platform that mea- sures the impact of typographic effects on web pages. This study chose to focus on highlighted text (text with high contrast background- color) as a typographic tool. The platform is a website, consisting of three (3) pages; (1) the first gathers test user information; (2) the sec- ond (subject-section) records time read and applies an authentication function; (3) the final page provides a multiple-choice questionnaire that records time tested, test score with same authentication method as page two. To test the platform, forty-nine participants were gathered, twenty-five participants (named Group Highlight Text) performed the test with highlight effects turned on and visible in page two (2), the remaining twenty-four (named Group Regular Text) read same page with no effects toggled or visible. Both groups were tested on page three (3) with six questions. The testing-platform fulfilled all expected requirements, with some sections requiring further development. The participation test data revealed some interesting results that could be analyzed further with assistance from social science research. In con- clusion, the test platform successfully recorded viable data that could be used in many fields, but will need additional technical work before being adopted in real-world applications. Further study could be im- plemented in collaboration with researchers from the social sciences to analyze the effects of different typographic effects. Additionally, cre- ate platforms to extract, organize and visualize gathered data would be advantageous.
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Senbayrak, Ziya. "Effects Of Spl Domain Engineering On Testing Cost And Maintainability." Master's thesis, METU, 2013. http://etd.lib.metu.edu.tr/upload/12615495/index.pdf.
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A software product line (SPL) consists of a set of software-intensive systems sharing a common, managed set of features that satisfy the specific needs of a particular market segment or mission and that are developed from a common set of core assets in a prescribed way. Together with testing of final deliverable products developed within the SPL, called Integration Testing, particularly important in this context is the way individual hardware as well as software components in an SPL are tested and certified for usage within the SPL. This study investigates specific approaches and techniques proposed in the literature for unit testing in the SPL context. Problems inherent to this issue were studied and possible solutions aiming towards systematic and effective testing of hardware as well as software units in SPLs have been proposed. The specific problems of SPL testing in ASELSAN were investigated in the light of these possible solutions and their applicability as well as their benefits were quantitatively assessed.
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Shetty, Keerthan, and Venkata Sai Nikhil Epuri. "Virtual vehicle capabilities towards verification, validation and calibration of vehicle motion control functions." Thesis, KTH, Fordonsdynamik, 2020. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-293412.
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Passenger safety and comfort are important aspects in the process of vehicle development. The world is heading towards developing the safest possible vehicle on the road. Using vehicle motion control functions is one of the ways to enhance vehicle stability. These motion control functions need to be developed in an energy optimised way. By complementing some of the development process with virtual models, both the development time and cost could be minimised. Hence, a sustainable way of control function development could be achieved. In order to verify, validate and calibrate vehicle motion control functions, an accurate model of the virtual vehicle is required. Hence, a research question on how good the virtual model needs to be for the purpose has been addressed. This report suggests a framework in order to determine the capabilities of a virtual vehicle.In this report, a comparison study has been carried out by exciting the real car and virtual model of a Volvo XC90 with a focus of covering the six degrees of freedom (Yaw, pitch, roll, longitudinal, lateral and vertical). A semi automated framework that possesses the capability of automating the testing in a virtual platform has been established. From the test results, the virtual vehicle capabilities were determined. Further, in the second part of the report, an example use case has been considered by taking two calibration sets of Electronic stability control (ESC) system in order to verify the previously established framework.The analysis includes various levels of plant and controller complexity such as Model-in-loop, Software-in-loop and Hardware-in-loop and on two different road surfaces, low friction and high friction. From the observations, the virtual models considered correlates well for the purpose of verification and validation. However, for the purpose of calibration, the models need to be fine-tuned in the virtual platform. Furthermore, the correlation on low friction road surface could be improved by simulating the tests using an advanced tyre model. Overall, this study helps in choosing the correct complexity of various subsystems in a vehicle for the purpose of verification, validation and calibration of vehicle motion control functions.Passagerarsäkerhet och komfort är viktiga aspekter i utvecklingen av ett fordon. Världen är på väg mot att utveckla säkraste möjliga fordon på vägen. Användning av fordonetse rörelsekontrollfunktioner är ett av sätten att förbättra fordonets stabilitet. Dessa rörelsekontrollfunktioner måste utvecklas på ett energioptimerat sätt. Genom att komplettera en del av utvecklingsprocessen med virtuella modeller kan både utvecklingstid och kostnad minimeras. Därför kan ett hållbart sätt att utveckla funktionerna för kontrollfunktioner uppnås. För att verifiera, validera och kalibrera fordonets rörelsekontrollfunktioner krävs en detaljerad modell av ett virtuellt fordon. Därför har en forskningsfråga om hur bra den virtuella modellen måste vara för ändamålet behandlats. Denna rapport föreslår ett ramverk för att bestämma funktionerna hos virtuella fordon.I denna rapport har en jämförelsestudie genomförts genom att excitera den verkliga bilen och den virtuella modellen av en Volvo XC90 med fokus på att täcka de sex frihetsgraderna (gir, nick, roll, längs, lateral, vertikal). Ett semi-automatiserat ramverk som har förmågan att automatisera testningen i en virtuell plattform har skapats. Från testresultaten bestämdes de virtuella fordonsfunktionerna. Vidare har i den andra delen av rapporten ett exempel på användningsfall beaktats genom att man tar två kalibreringsuppsättningar av ESC-system (Electronic Stability Control) för att verifiera det tidigare etablerade ramverket.Analysen innefattar olika nivåer av modell- och styrenhetskomplexitet såsom Model-in-loop, Software-in-loop och Hardware-in-loop och på två olika vägytor, låg friktion och hög friktion. Enligt observationerna är de virtuella modellerna väl korrelerade för verifiering och validering. För kalibreringen måste dock modellerna finjusteras på den virtuella plattformen. Dessutom kunde korrelationen på lågfriktionsvägytan förbättras genom att simulera testerna med hjälp av en avancerad däckmodell. Sammantaget hjälper den här studien att välja rätt komplexitet hos olika delsystem i ett fordon för verifiering, validering och kalibrering av fordonets rörelsekontrollfunktioner.
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Прянічніков, Артем Дмитрович. "Цифрова система керування пневматичного промислового робота." Master's thesis, Київ, 2018. https://ela.kpi.ua/handle/123456789/26201.
Full textAbstract:
Магістерську дисертацію виконано на 80 аркушах, вона містить 3 додатка та перелік посилань на використані джерела з 2 найменувань. У роботі наведено 10 рисунків та 3 таблиці.
Метою даної магістерської дисертації є створення цифрової системи керування промислового робота БРИГ-10 ЗАЗ та її модернізація.
У роботі проведено аналіз існуючих рішень указаної задачі а саме, існуюча аналогова система керування призначення для заданої моделі промислового робота. Виконано розрахунок основний керуючий механізмів робота, а саме – схвату. Було запропоновано для використання цифровий багатопозиційний дискретний привід. Для розв’язання задачі в роботі обрано існуючу апаратну платформу на базі її розроблено алгоритм роботи програмного забезпечення, принципову електричну схему та написано код програми.The master's dissertation is executed on 80 sheets, it contains 3 appendices and a list of references on the used sources from 2 names. In the work there are 10 figures and 3 tables. The purpose of this master's thesis is to create a digital control system BRIG-10 ZAZ industrial robot and its modernization. The paper analyzes the existing solutions of this problem, namely, the existing analogue destination management system for a given model of industrial robot. Calculation of the main manager of the mechanisms of work, namely - the grip. It was suggested to use a digital multipoint discrete drive. To solve the problem, an existing hardware platform has been selected. An algorithm for software work, a basic electrical circuit and a program code are written on the basis of it.
Магистерскую диссертацию выполнено на 80 листах, содержит 3 приложения и список ссылок на использованные источники из 2 наименований. В работе приведены 10 рисунков и 3 таблицы. Целью данной магистерской диссертации является создание цифровой системы управления промышленного робота БРИГ-10 ЗАЗ и его модернизация. В работе проведен анализ существующих решений указанной задачи а именно, существующая аналоговая система управления назначение для заданной модели промышленного робота. Выполнен расчет основной управляющий работа механизмов, а именно – схват. Было предложено для использования цифровой дискретный многопозиционный привод. Для решения задачи в работе выбрана существующая аппаратная платформа на базе ее разработан алгоритм работы программного обеспечения, принципиальная электрическая схема и написан код программы.
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Mekala, Priyanka. "Field Programmable Gate Array Based Target Detection and Gesture Recognition." FIU Digital Commons, 2012. http://digitalcommons.fiu.edu/etd/723.
Full textAbstract:
The move from Standard Definition (SD) to High Definition (HD) represents a six times increases in data, which needs to be processed. With expanding resolutions and evolving compression, there is a need for high performance with flexible architectures to allow for quick upgrade ability. The technology advances in image display resolutions, advanced compression techniques, and video intelligence. Software implementation of these systems can attain accuracy with tradeoffs among processing performance (to achieve specified frame rates, working on large image data sets), power and cost constraints. There is a need for new architectures to be in pace with the fast innovations in video and imaging. It contains dedicated hardware implementation of the pixel and frame rate processes on Field Programmable Gate Array (FPGA) to achieve the real-time performance.
The following outlines the contributions of the dissertation. (1) We develop a target detection system by applying a novel running average mean threshold (RAMT) approach to globalize the threshold required for background subtraction. This approach adapts the threshold automatically to different environments (indoor and outdoor) and different targets (humans and vehicles). For low power consumption and better performance, we design the complete system on FPGA. (2) We introduce a safe distance factor and develop an algorithm for occlusion occurrence detection during target tracking. A novel mean-threshold is calculated by motion-position analysis. (3) A new strategy for gesture recognition is developed using Combinational Neural Networks (CNN) based on a tree structure. Analysis of the method is done on American Sign Language (ASL) gestures. We introduce novel point of interests approach to reduce the feature vector size and gradient threshold approach for accurate classification. (4) We design a gesture recognition system using a hardware/ software co-simulation neural network for high speed and low memory storage requirements provided by the FPGA. We develop an innovative maximum distant algorithm which uses only 0.39% of the image as the feature vector to train and test the system design. Database set gestures involved in different applications may vary. Therefore, it is highly essential to keep the feature vector as low as possible while maintaining the same accuracy and performance
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Hamada, Skander. "Design and evaluation of a visual rapid prototyping environment in an existing smart home platform." Thesis, Malmö högskola, Fakulteten för teknik och samhälle (TS), 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:mau:diva-20267.
Full textAbstract:
Recent advances in the field of Internet of Things (IoT) are placing its own vision, as a platform of interconnected services and devices, at the heart of the smart home concept. This consolidation promises a new wave of innovative products designed in the open, and in which the user takes center stage starting from the very first steps. Therefore, researchers as well as product designers in these increasingly related fields are now tasked with a more complex mission when investigating user behavior. In this thesis we consider rapid prototyping as the upcoming standard process for investigating user interactions in the future smart home. Although past research contributed with several self-contained solutions (built from scratch) to allow such investigations, no accounts were found tackling the problem from our perspective, in which the focus is on how to enable rapid prototyping in an existing proprietary smart home platform by using open standards, software and hardware. To answer this question, we conducted our research with participation of academic researchers and professional designers in the context of an academic and industrial partnership, in an ongoing smart home research project. We used an approach based on the design science research process in combination with the user centered design (UCD) and agile software development methodologies. During this thesis we performed an end to end design process starting from ideation to implementation and evaluation; an architectural blueprint was proposed and a working prototype of our visual smart home rapid prototyping environment (SHRPE) was implemented and tested. The obtained results demonstrate the feasibility of enabling visual rapid prototyping capabilities in an existing smart home platform, by using the system integration process to introduce available open standards, software and hardware tools into the platform. In addition, evaluation results of user testing confirmed that using UCD to iteratively capture user needs in such complex context is a solid approach.
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Armstrong, Janell. "State of Secure Application Development for 802.15.4." BYU ScholarsArchive, 2009. https://scholarsarchive.byu.edu/etd/1776.
Full textAbstract:
A wireless sensor network consists of small, limited-resource embedded systems exchanging environment data and activating controls. These networks can be deployed in hostile environments to monitor wildlife habitats, implemented in factories to locate mobile equipment, and installed in home environments to optimize the use of utilities. Each of these scenarios requires network security to protect the network data. The IEEE 802.15.4 standard is designed for WSN communication, yet the standard states that it is not responsible for defining the initialization, distribution, updating, or management of network public keys. Individuals seeking to research security topics will find that there are many 802.15.4-compliant development hardware kits available to purchase. However, these kits are not easily compared to each other without first-hand experience. Further, not all available kits are suitable for research in WSN security. This thesis evaluates a broad spectrum of 802.15.4 development kits for security studies. Three promising kits are examined in detail: Crossbow MICAz, Freescale MC1321x, and the Sun SPOT. These kits are evaluated based on their hardware, software, development environment, additional libraries, additional tools, and cost. Recommendations are made to security researchers advising which kits to use depending on their design needs and priorities. Suggestions are made to each company on how to further improve their kits for security research.
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mehrer, Autoren Sammelband. "Dresdner Arbeitstagung Schaltungs- und Systementwurf." Universitätsbibliothek Chemnitz, 2007. http://nbn-resolving.de/urn:nbn:de:swb:ch1-200700815.
Full textAbstract:
Die jedes Frühjahr stattfindende »Dresdner Arbeitstagung Schaltungs- und
Systementwurf« wird traditionell vom Fraunhofer-Institut für Integrierte
Schaltungen, Institutsteil Entwurfsautomatisierung (EAS) und vom
Sächsischen Arbeitskreis Informationstechnik des VDE Bezirksvereins
Dresden ausgerichtet.
Die Arbeitstagung hat bereits eine über 30-jährige Tradition und wird von
Wissenschaftlern aus Forschungsinstituten und Ingenieuren aus der
Industrie für einen regen fachlichen Austausch genutzt. Gegenstand der
Tagung sind aktuelle Ergebnisse und neue Erkenntnisse aus Forschung
und Entwicklung sowie Erfahrungsberichte und Problemdiskussionen auf
dem Gebiet des Entwurfs analoger, digitaler und hybrider Systeme. Das
Tagungsprogramm bietet den Teilnehmern wieder interessante Beiträge
über neue Lösungen zum Entwurf komplexer Schaltungen und Systeme,
die auch Themen wie Rekonfigurierbarkeit, Architekturen, Performance,
Hardware-Software, Test und Optimierung behandeln.
Begleitend zur Tagung wird von der Firma Mentor Graphics ein Workshop
zum Thema »Advanced Verification Methodology« angeboten. Hier werden
an einem Beispiel die Vorteile der zukünftigen Design Verifikation mit
System Verilog und Assertions erläutert.
Der vorliegende Tagungsband enthält die Langfassungen der Beiträge, für
deren Form und Inhalt die Autoren verantwortlich sind. Als Veranstalter
bedanken wir uns bei den Autoren für die Bereitstellung dieser Beiträge, die
als Grundlage für die fachlichen Diskussionen dienen, und bei den
Teilnehmern für ihr Interesse an unserer Arbeitstagung.
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Hireche, Chabha. "Etude et implémentation sur SoC-FPGA d'une méthode probabiliste pour le contrôle de mission de véhicule autonome Embedded context aware diagnosis for a UAV SoC platform, in Microprocessors and Microsystems 51, June 2017 Context/Resource-Aware Mission Planning Based on BNs and Concurrent MDPs for Autonomous UAVs, in MDPI-Sensors Journal, December 2018." Thesis, Brest, 2019. http://www.theses.fr/2019BRES0067.
Full textAbstract:
Les systèmes autonomes embarquent différents types de capteurs, d’applications et de calculateurs puissants. Ils sont donc utilisés dans différents domaines d’application et réalisent diverses missions simples ou complexes. Ces missions se déroulent souvent dans des environnements non déterministes avec la présence d’évènements aléatoires pouvant perturber le déroulement de la mission. Il est donc nécessaire d’évaluer régulièrement l’état de santé du système et de ses composants matériels et logiciels dans le but de détecter les défaillances à l’aide de réseaux Bayésiens. Par la suite, une décision est prise par le planificateur de mission en générant un nouveau plan de mission assurant la continuité de la mission en réponse à l’événement détecté. Cette décision est prise à l’aide du modèle Markov Decision Process en fonction de contraintes telles que l’objectif de la mission, l’état de santé des capteurs et des applications embarqués, la stratégie de réalisation de la mission ‘stratégie safety’ ou ‘stratégie mission first’, etc. Comme les systèmes autonomes exécutent différentes tâches qui demandent différentes performances, il est nécessaire de penser à l’utilisation d’accélérateurs matériels sur SoC-FPGA dans le but de répondre aux contraintes de calculs hautes performances et décharger le CPU si besoinAutonomous systems embed different types of sensors, applications and powerful calculators. Thus, they are used in different fields of application and perform various simple or complex tasks. Generally, these missions are executed in nondeterministic environments with the presence of random events that can affect the mission's progress. Therefore, it is necessary to regularly assess the health of the system and its hardware and software components in order to detect failures using Bayesian Networks.Subsequently, a decision is made by the mission planner by generating a new mission plan that ensures the mission in response to the detected event. This decision is made using the Markov Decision Process model based on constraints such as the mission objective, the health status of sensors and embedded applications, the mission policy "safety policy" or "mission first policy", etc. As autonomous systems perform different tasks that require different performance, it is necessary to consider the use of hardware accelerators on SoC-FPGA in order to meet high-performance computing constraints and unload the CPU if needed
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Bard, Robin, and Simon Banasik. "En prestanda- och funktionsanalys av Hypervisors för molnbaserade datacenter." Thesis, Malmö högskola, Fakulteten för teknik och samhälle (TS), 2013. http://urn.kb.se/resolve?urn=urn:nbn:se:mau:diva-20491.
Full textAbstract:
I dagens informationssamhälle pågår en växande trend av molnbaserade tjänster. Vid implementering av molnbaserade tjänster används metoden Virtualisering. Denna metod minskar behovet av antal fysiska datorsystem i ett datacenter. Vilket har en positiv miljöpåverkan eftersom energikonsumtionen minskar när hårdvaruresurser kan utnyttjas till sin fulla kapacitet. Molnbaserade tjänster skapar samhällsnytta då nya aktörer utan teknisk bakgrundskunskap snabbt kan komma igång med verksamhetsberoende tjänster. För tillämpning av Virtualisering används en så kallad Hypervisor vars uppgift är att distribuera molnbaserade tjänster. Efter utvärdering av vetenskapliga studier har vi funnit att det finns skillnader i prestanda och funktionalitet mellan olika Hypervisors. Därför väljer vi att göra en prestanda- samt funktionsanalys av Hypervisors som kommer från de största aktörerna på marknaden. Dessa är Microsoft Hyper-V Core Server 2012, Vmware ESXi 5.1.0 och Citrix XenServer 6.1.0 Free edition. Vår uppdragsgivare är försvarsmakten som bekräftade en stor efterfrågan av vår undersökning. Rapporten innefattar en teoretisk grund som beskriver tekniker bakom virtualisering och applicerbara användningsområden. Genomförandet består av två huvudsakliga metoder, en kvalitativ- respektive kvantitativ del. Grunden till den kvantitativa delen utgörs av ett standardsystem som fastställdes utifrån varje Hypervisors begränsningar. På detta standardsystem utfördes prestandatester i form av dataöverföringar med en serie automatiserade testverktyg. Syftet med testverktygen var att simulera datalaster som avsiktligt påverkade CPU och I/O för att avgöra vilka prestandaskillnader som förekommer mellan Hypervisors. Den kvalitativa undersökningen omfattade en utredning av funktionaliteter och begränsningar som varje Hypervisor tillämpar. Med tillämpning av empirisk analys av de kvantitativa mätresultaten kunde vi fastställa orsaken bakom varje Hypervisors prestanda. Resultaten visade att det fanns en korrelation mellan hur väl en Hypervisor presterat och vilken typ av dataöverföring som den utsätts för. Den Hypervisor som uppvisade goda prestandaresultat i samtliga dataöverföringar är ESXi. Resultaten av den kvalitativa undersökningen visade att den Hypervisor som offererade mest funktionalitet och minst begränsningar är Hyper-V. Slutsatsen blev att ett mindre datacenter som inte planerar en expansion bör lämpligtvis välja ESXi. Ett större datacenter som både har behov av funktioner som gynnar molnbaserade tjänster och mer hårdvaruresurser bör välja Hyper-V vid implementation av molntjänster.A growing trend of cloud-based services can be witnessed in todays information society. To implement cloud-based services a method called virtualization is used. This method reduces the need of physical computer systems in a datacenter and facilitates a sustainable environmental and economical development. Cloud-based services create societal benefits by allowing new operators to quickly launch business-dependent services. Virtualization is applied by a so-called Hypervisor whose task is to distribute cloud-based services. After evaluation of existing scientific studies, we have found that there exists a discernible difference in performance and functionality between different varieties of Hypervisors. We have chosen to perform a functional and performance analysis of Hypervisors from the manufacturers with the largest market share. These are Microsoft Hyper-V Core Server 2012, Vmware ESXi 5.1.0 and Citrix XenServer 6.1.0 Free edition. Our client, the Swedish armed forces, have expressed a great need of the research which we have conducted. The thesis consists of a theoretical base which describes techniques behind virtualization and its applicable fields. Implementation comprises of two main methods, a qualitative and a quantitative research. The basis of the quantitative investigation consists of a standard test system which has been defined by the limitations of each Hypervisor. The system was used for a series of performance tests, where data transfers were initiated and sampled by automated testing tools. The purpose of the testing tools was to simulate workloads which deliberately affected CPU and I/O to determine the performance differences between Hypervisors. The qualitative method comprised of an assessment of functionalities and limitations for each Hypervisor. By using empirical analysis of the quantitative measurements we were able to determine the cause of each Hypervisors performance. The results revealed that there was a correlation between Hypervisor performance and the specific data transfer it was exposed to. The Hypervisor which exhibited good performance results in all data transfers was ESXi. The findings in the qualitative research revealed that the Hypervisor which offered the most functionality and least amount of constraints was Hyper-V. The conclusion of the overall results uncovered that ESXi is most suitable for smaller datacenters which do not intend to expand their operations. However a larger datacenter which is in need of cloud service oriented functionalities and requires greater hardware resources should choose Hyper-V at implementation of cloud-based services.
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Hardt, Wolfram. "Dresdner Arbeitstagung Schaltungs- und Systementwurf: 8.-9. Mai 2007." TUDpress, 2007. https://monarch.qucosa.de/id/qucosa%3A18723.
Full textAbstract:
Die jedes Frühjahr stattfindende »Dresdner Arbeitstagung Schaltungs- und Systementwurf« wird traditionell vom Fraunhofer-Institut für Integrierte Schaltungen, Institutsteil Entwurfsautomatisierung (EAS) und vom Sächsischen Arbeitskreis Informationstechnik des VDE Bezirksvereins Dresden ausgerichtet.
Die Arbeitstagung hat bereits eine über 30-jährige Tradition und wird von Wissenschaftlern aus Forschungsinstituten und Ingenieuren aus der Industrie für einen regen fachlichen Austausch genutzt. Gegenstand der Tagung sind aktuelle Ergebnisse und neue Erkenntnisse aus Forschung und Entwicklung sowie Erfahrungsberichte und Problemdiskussionen auf dem Gebiet des Entwurfs analoger, digitaler und hybrider Systeme. Das Tagungsprogramm bietet den Teilnehmern wieder interessante Beiträge über neue Lösungen zum Entwurf komplexer Schaltungen und Systeme, die auch Themen wie Rekonfigurierbarkeit, Architekturen, Performance,
Hardware-Software, Test und Optimierung behandeln.
Begleitend zur Tagung wird von der Firma Mentor Graphics ein Workshop zum Thema »Advanced Verification Methodology« angeboten. Hier werden an einem Beispiel die Vorteile der zukünftigen Design Verifikation mit System Verilog und Assertions erläutert.
Der vorliegende Tagungsband enthält die Langfassungen der Beiträge, für deren Form und Inhalt die Autoren verantwortlich sind. Als Veranstalter bedanken wir uns bei den Autoren für die Bereitstellung dieser Beiträge, die als Grundlage für die fachlichen Diskussionen dienen, und bei den Teilnehmern für ihr Interesse an unserer Arbeitstagung.
44
Gruwell, Ammon Bradley. "High-Speed Programmable FPGA Configuration Memory Access Using JTAG." BYU ScholarsArchive, 2017. https://scholarsarchive.byu.edu/etd/6321.
Full textAbstract:
Over the past couple of decades Field Programmable Gate Arrays (FPGAs) have become increasingly useful in a variety of domains. This is due to their low cost and flexibility compared to custom ASICs. This increasing interest in FPGAs has driven the need for tools that both qualify and improve the reliability of FPGAs for applications where the reconfigurability of FPGAs makes them vulnerable to radiation upsets such as in aerospace environments. Such tools ideally work with a wide variety of devices, are highly programmable but simple to use, and perform tasks at relatively high speeds. Of the various FPGA configuration interfaces available, the Joint Test Action Group (JTAG) standard for serial communication is the most universally compatible interface due to its use for verifying integrated circuits and testing printed circuit board connectivity. This universality makes it a good interface for tools seeking to access FPGA configuration memory. This thesis introduces a new tool architecture for high-speed, programmable JTAG access to FPGA configuration memory. This tool, called the JTAG Configuration Manager (JCM), is made up of a large C++ software library that runs on an embedded micro-processor coupled with a hardware JTAG controller module implemented in programmable logic. The JCM software library allows for the development of custom JTAG communication of any kind, although this thesis focuses on applications related to FPGA reliability. The JCM hardware controller module allows these software-generated JTAG sequences to be streamed out at very high speeds. Together the software and hardware provide the high-speed and programmability that is important for many JTAG applications.
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Лазаренко, С. М. "Програмно-апаратна реалізація припливно витяжної установки й управління елементами вентиляції як частина системи «розумного дому»." Thesis, Чернігів, 2021. http://ir.stu.cn.ua/123456789/22992.
Full textAbstract:
Лазаренко, С. М. Програмно-апаратна реалізація припливно витяжної установки й управління елементами вентиляції як частина системи «розумного дому» : дипломна робота : 123 - Комп’ютерна інженерія / С. М. Лазаренко ; керівник роботи Є. В. Риндич ; НУ "Чернігівська політехніка", кафедра Інформаційних та комп’ютерних систем. - Чернігів, 2021. - 98 с.Роботу присвячено розгляду і розробці системи припливно-витяжної вентиляції з рекуперацією тепла і вологи у приватному будинку як частини системи «розумного дому». Створено класифікації функціональних і структурних особливостей систем «розумного дому» й описано комплекси функцій, які здатні виконувати його різноманітні підсистеми. «Розумний дім» розглядається в роботі як високотехнологічне устаткування сучасного житлового будинку, система елементів комп’ютерного управління сукупністю відповідних підсистем, що разом реалізують низку функцій, пов’язаних із створенням безпечних і комфортних умов проживання людини. Для створення програмно-апаратної частини системи припливно витяжної вентиляції обрано мікропроцесорну плату Arduino і систему автоматизації «MajorDoMo», з дротовим способом підключення. Передбачено, що контролер працюватиме як в автоматичному, так і в ручному режимах. Файли розробленої програми, пов'язані з різними елементами обладнання, було вирішено підключати індивідуально. У межах механічної частини системи вентиляції у приватному будинку вирішено використати систему з примусовим спонуканням, до яких входить вентилятор, гексагональний і ентальпійний теплообмінники, повітроводи та вентиляційні решітки. Було створено корпус рекупераційної установки, виготовлено шумоглушники і придбано заслінки для регулювання потоку повітря сервоприводами. Апаратну частину системи було вкомплектовано контролером Arduino Mega 2560 Rev3, платою розширення W5500 Ethernet Shield, сукупністю датчиків, сервоприводів, реле, димерів, LCD екраном, енкодером / потенціометром тощо. Для її монтажу було створено схему розташування пристроїв на плані приватного будинку. Роботу системи припливно-витяжної вентиляції було представлено на основі макетної плати, для створення якої використано сервоприводи та датчики. Перевірка показала, що все обладнання працює згідно з передбаченими для нього алгоритмами, а розроблена програма може ефективно застосовуватися для експлуатації системи припливно-витяжної вентиляції у приватному будинку
The paper focuses on the review and analysis of the supply-and-exhaust ventilation with the recovery of heat and moisture in a detached house as a part of the Intelligent building system. The classification of functional and structural features of Intelligent building systems is presented, and complexes of functions which their various subsystems are able to fulfil are described. In the paper the Intelligent building is viewed as state-of-art equipment of a modern detached house, a software system controlling the work of the relevant subsystems which jointly carry out a set of functions, connected with the provision of safe and comfortable living conditions for the residents of the house. A microprocessor card Arduino and MajorDoMo automation system with wired connection were chosen to create the software and hardware parts of the supply-and-exhaust ventilation. The controller is supposed to work in both automatic and manual modes. Software files related to different hardware components are connected independently. A decision was made that an induced natural ventilation system comprising a fan, hexagonal and enthalpy heat exchangers, air ducts and air grids would be used in the mechanical part of the detached house ventilation. The frame of the recovery facility and mufflers were constructed, and shutters were purchased for servodrives to be able to regulate the air flow. The hardware part of the system is comprised of Arduino Mega 2560 Rev3 controller, W5500 Ethernet Shield expansion card, a complex of sensors, servodrives, relays, dimmers, an LCD screen, an encoder / potentiometer, etc. A scheme of the equipment layout was drafted on the detached house plan. The work of the supply-and-exhaust ventilation system was demonstrated with the help of a model board on which servodrives and sensors were installed. The check demonstrated that the equipment can work according to the predetermined algorithms, and the developed software can be effectively used for the maintenance of the supply-and-exhaust ventilation in a detached house.
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Moreno, Moreno Flavio David. "Reconocimiento de gestos corporales, utilizando procesamiento digital de imágenes para activar sistema de alarma." Bachelor's thesis, Universidad Ricardo Palma, 2015. http://cybertesis.urp.edu.pe/handle/urp/1283.
Full textAbstract:
La investigación realizada a los sistemas de seguridad electrónica de edificios, plantea como objetivo principal el reconocimiento de tres gestos de un lenguaje corporal del personal de vigilancia, y la consecuente activación de alarma en forma automática. Inicialmente se realizó una encuesta dirigida a las administraciones y personal de edificios, para saber cuales eran las ocurrencias que vulneraban la seguridad de un edificio multifamiliar, luego se observaron y analizaron las imágenes capturadas por una cámara de vigilancia ubicada en la recepción, identificando las ocurrencias más vulnerables y gestos asociados a dichos eventos; se seleccionaron tres gestos que en forma inconsciente realizaba el personal de vigilancia ante dichas situaciones. A determinados cuadros que comprenden estas imágenes se le aplicaron técnicas de procesamiento espacial, con ayuda de una iluminación artificial que era más intensa en la parte posterior del sujeto de análisis, consiguiéndose la definición de una silueta binarizada en el entorno Matlab, técnicas como selección del plano rojo, plano de bits más significativo, invertir imagen y transformaciones morfológicas tipo cerradura, definieron una silueta que ayudó a desarrollar un algoritmo matemático para generar una señal eléctrica en el puerto serial USB del ordenador, donde se conectó físicamente una plataforma de hardware Arduino que activa la alarma. La elección de esta plataforma se debió a que Matlab cuenta con un grupo de instrucciones para Arduino, con el objetivo de lograr una comunicación sincronizada entre ordenador e interface.
Las técnicas utilizadas reconocieron 62,5% de los eventos descritos en las encuestas realizadas y que no son mencionadas en temas de investigación similar. Para lograr el objetivo fue necesario analizar un cuadro por segundo.
The research poses as their main objective the three gestures recognition of a body language of surveillance personnel and the consequent activation of alarm automatically. It was initially carried out a survey of the administration and the offices of the buildings to know which were the occurrences that violate the security of a multi-family building, then were observed and analyzed images captured by a surveillance camera located in the reception, identifying the most vulnerable occurrences and gestures associated with these events; were selected three gestures that unconsciously performs surveillance personnel before such situations; to certain pictures that comprise these images were applied spatial processing techniques, with the help of an artificial lighting that was more intense in the back of the subject of analysis, getting the definition of a silhouette binarized in the Matlab environment, techniques such as plane selection red, more significant bit plane, to invest an image and convolution close type, defined a silhouette that allowed to develop a mathematical algorithm that generated an electrical signal in USB serial port of the computer, where it is physically connected a hardware platform Arduino that active the alarm.This platform choice is due to the fact that Matlab has a group of instructions for Arduino, achieving an orderly communication between computer and interface.
The techniques used recognized 62.5 % of the events described in the surveys carried out and which aren’t mentioned in similar research topics. To achieve the objective was necessary to analyze a picture per second.
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Kai-YuanYang and 楊開元. "Re-engineering of Software and Hardware Platform for Comprehensive Nonverbal Attention and Memory Test Battery." Thesis, 2019. http://ndltd.ncl.edu.tw/handle/4v9p38.
Full textAbstract:
碩士國立成功大學
工程科學系
107
This purpose of this thesis is to re-engineer Comprehensive Non-Verbal Attention Battery and Comprehensive Non-Verbal Memory Test Battery (CNAT ＆ CNMT). Software and hardware issues are solved, lost algorithms are restored and documented, along with some upgrade to the workflow. A new version named as CNAMT-Touch is built, with new technical packages. CNAT ＆ CNMT are a set of two test battery(packages) designed to measure multi-level attention and working memory of an individual. They are specified on testing multiple cognition parts while avoiding non-target abilities that interfere the result. Over two decades, CNAT ＆ CNMT have served their purpose well. However, the software and hardware are outdated. There are two major issues. First, the hardware producer had stopped producing the hardware platform. Second, the software is running on Windows XP; it is not compatible on later OS versions such as Windows 10. To solve the issues, this thesis re-engineered the algorithm, software and hardware platform for CNAT ＆ CNMT based on the original system and manual. It has software and hardware compatibility, maintainable and upgradeable, allowing further refinements to support future studies.
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Buhrym, I., P. Galkin, and O. Vynokurov. "Approaches to Designing a Wireless Sensor Network Node." Thesis, 2019. https://openarchive.nure.ua/handle/document/17532.
Full textAbstract:
The object of the research is the hardware component for building a test platform for wireless sensor networks. The aim of the work is to develop a software and hardware test platform for wireless sensor networks. As a result of the analysis, the node structures, wireless sensor network modules, CC2530 peripherals were analyzed. A module based on the CC2530 PA was chosen as the hardware. Given to optimize the structure of the node for as one of approach to designing a wireless sensor network node. Also given report about difference in approach to designing nodes and uses areas.
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Chen, Kai Liao, and 廖振凱. "ABS Test and Simulation Hardware Platform Setup." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/97576768776677543974.
Full textAbstract:
碩士中華科技大學
電子工程研究所碩士班
99
Abstract In this paper, we use Anti-lock braking system test and simulation platform for the establishment of Hall Sensor wheel speed, vehicle speed sensors, and Strain Gauge to measure braking force. We return the measured data through the signal acquisition card (DAQ) to LabVIEW for interpretation and timely send signals to start the control valve generating the maximum braking coefficient between the wheel and the brake to analyze whether the slip ratio is over 0.2. If the slip ratio is larger than 0.2, the operation of the solenoid valve turns on immediately, and then it produces the shortest stopping distance and sets the slip ratio at around 0.2 in the vicinity of the function to prevent slipping. When the deadlock situation occurs on the locomotive, ABS braking system will intervene the original braking system releasing the pressure of the brake. Then make the deadlocked locomotive brake to be released, so that the wheels restore rolling and we regain the ability to control the locomotive. Later on, brake pressure will resume so that the vehicle continue to slow down. First, we design a stepping motor which is suitable for motorcycles in the indoor test of hydraulic anti-lock brake module to enable the ABS module-body aircraft ABS miniaturization and simplification of the system testing and simulation platform design direction. In this paper, we focus on motorcycle ABS system performance testing and simulation platform, and then build an experiment for testing on real time hardware and software simulation. Key Words: ABS，LabVIEW，Hall Sensor，Strain Gauge，Automated testing，ABS Test platform.
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Mrabet, Nizar. "Mixed-Signal Multimode Radio Software/Hardware Development Platform." Thesis, 2012. http://hdl.handle.net/10012/7156.
Full textAbstract:
Radio frequency power amplifiers (PAs) are the most challenging part of the design of radio systems since they dictate the overall system's performance in terms of power efficiency and distortion generation. The performance is further challenged by modern modulation schemes which are characterized by highly varying signal envelopes. In order to meet the spectrum mask requirements, PAs are usually operated at high power back-off to ensure linearity, at the cost of efficiency. To tackle this issue, many efficiency enhancement techniques have been presented in the literature. In fact, these techniques do increase the PA power efficiency at back-off, however, efficiency enhancement techniques do not ensure the linearity of the PA. Furthermore, these techniques may lead to additional distortion. On the other hand, several linearization techniques have been developed to mitigate the PA nonlinearity problem and allow the PA to operate at less back-off. Digital Pre-Distortion (DPD) technique is gaining more attention, as compared to other linearization techniques, thanks to its simple concept and advancements in digital signal processors (DSP) and signal converters. DPD technique consists of introducing a nonlinear function before the PA so that the overall cascaded system behaves linearly. It was clear from the literature that this technique showed good performance. Yet, it has primarily been validated using commercial test equipment, which has good capabilities, and far from the real world environment in which this technique would be implemented. Indeed, DPDs would need to be implemented in signal processors characterised by limited resources and computational accuracy. This thesis presents an implementation of several DPD models, namely look-up table (LUT), memoryless polynomial and memory polynomial (MP), on a field programmable gate array (FPGA). A novel model reformulation made this implementation possible in fixed-point arithmetic. Measurements were collected to validate the DPD models' implementation and an improvement of the signal quality was recorded in terms of error vector magnitude (EVM) and adjacent channel leakage ratio (ACLR).
As many wireless access technologies must continue to coexist, multi-standard radio systems are required to reduce the cost while maintaining the interoperability. This thesis presents a development platform for multimode radio which comprises mixed-signal modules. The platform provides the capacity for hardware and software development. In fact, the FPGA under investigation allowed for the implementation of a baseband transceiver and DPD schemes. In addition, a software tool was developed as a dashboard to control and monitor the system. The radio system in the platform was optimized through the equalization of the feedback receiver frequency response performed through a simultaneous measurement of the amplitude ripple of the transmitter and receiver. Furthermore, a phase-coherent frequency synthesizer was designed to bring more flexibility by allowing the transmitter's carrier frequency to be different from the receiver's frequency.