Dissertations / Theses on the topic 'Software and hardware protection methods'
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Рой, Юлія Володимирівна. "Дослідження особливостей створення захищеної персональної інформаційної мережі житлового будинку." Master's thesis, КПІ ім. Ігоря Сікорського, 2020. https://ela.kpi.ua/handle/123456789/38563.
Full textRelevance of research. In the modern world, network and information technologies are actively developing. At present, it is impossible to find a building within the city where connections to the data network based on Internet technologies have not been deployed. This network simplifies and optimizes many tasks, such as information exchange, working on documents, using programs, exchanging resources and information, and more. As such a building, it is advisable to consider a residential building for a certain number of apartments. Information is a very valuable resource, so attackers often try to access both corporate and home networks. The main reason for implementing network security is to protect the network and system resources connected to the network. Information in any form is considered a valuable property of the network, and its loss or access to it can cost money or, in the worst case, cause a catastrophe. Hacking a network can lead to various consequences: data interception, malware infection and destruction of all information. Therefore, it is important to pay attention to network protection, search for vulnerabilities and identify potential threats that could harm the current system and resources. The purpose of the study is to find opportunities to protect the personal information network of a residential building software and hardware. Objectives to achieve the goal: to analyze the features of designing a secure personal information network, to review network security (possible vulnerabilities, threats and attacks), to evaluate methods of threat analysis and, accordingly, to explore the possibility of solving potential threats to the network. Object of study: protected personal information network of a residential building. Subject of study: software and hardware methods of personal information network protection. Research methods algorithms and methods that are defined in the basis of the functioning of systems and technologies within a secure local area network, technologies and algorithms of local area network protection methods. Scientific novelty of the obtained results: 1) proposed options for creating a secure personal information network; 2) a sequential algorithm for configuring software methods for personal network protection is proposed. The practical implications of the findings: the results of the work can be used in the design of home networks and "home" networks of apartment buildings.
Mendoza, Jose Antonio Kougianos Elias. "Hardware & software codesign of a JPEG200 watermarking encoder." [Denton, Tex.] : University of North Texas, 2008. http://digital.library.unt.edu/permalink/meta-dc-9752.
Full textVolynkin, Alexander S. "Advanced methods for detection of malicious software." Diss., Online access via UMI:, 2007.
Find full textAravalli, SaiKrishna. "Some Novice methods for Software Protection with Obfuscation." ScholarWorks@UNO, 2006. http://scholarworks.uno.edu/td/479.
Full textPatel, Krutartha Computer Science & Engineering Faculty of Engineering UNSW. "Hardware-software design methods for security and reliability of MPSoCs." Awarded by:University of New South Wales. Computer Science & Engineering, 2009. http://handle.unsw.edu.au/1959.4/44854.
Full textMendoza, Jose Antonio. "Hardware and Software Codesign of a JPEG2000 Watermarking Encoder." Thesis, University of North Texas, 2008. https://digital.library.unt.edu/ark:/67531/metadc9752/.
Full textLei, Li. "Hardware/Software Interface Assurance with Conformance Checking." PDXScholar, 2015. https://pdxscholar.library.pdx.edu/open_access_etds/2323.
Full textZhang, Zhao. "Software and hardware methods for memory access latency reduction on ILP processors." W&M ScholarWorks, 2002. https://scholarworks.wm.edu/etd/1539623407.
Full textJafri, Nisrine. "Formal fault injection vulnerability detection in binaries : a software process and hardware validation." Thesis, Rennes 1, 2019. http://www.theses.fr/2019REN1S014/document.
Full textFault injection is a well known method to test the robustness and security vulnerabilities of systems. Detecting fault injection vulnerabilities has been approached with a variety of different but limited methods. Software-based and hardware-based approaches have both been used to detect fault injection vulnerabilities. Software-based approaches can provide broad and rapid coverage, but may not correlate with genuine hardware vulnerabilities. Hardware-based approaches are indisputable in their results, but rely upon expensive expert knowledge, manual testing, and can not confirm what fault model represent the created effect. First, this thesis focuses on the software-based approach and proposes a general process that uses model checking to detect fault injection vulnerabilities in binaries. The efficacy and scalability of this process is demonstrated by detecting vulnerabilities in different cryptographic real-world implementations. Then, this thesis bridges software-based and hardware-based fault injection vulnerability detection by contrasting results of the two approaches. This demonstrates that: not all software-based vulnerabilities can be reproduced in hardware; prior conjectures on the fault model for electromagnetic pulse attacks may not be accurate; and that there is a relationship between software-based and hardware-based approaches. Further, combining both software-based and hardware-based approaches can yield a vastly more accurate and efficient approach to detect genuine fault injection vulnerabilities
Varma, Krishnaraj M. "Fast Split Arithmetic Encoder Architectures and Perceptual Coding Methods for Enhanced JPEG2000 Performance." Diss., Virginia Tech, 2006. http://hdl.handle.net/10919/26519.
Full textPh. D.
Letan, Thomas. "Specifying and Verifying Hardware-based Security Enforcement Mechanisms." Thesis, CentraleSupélec, 2018. http://www.theses.fr/2018CSUP0002.
Full textIn this thesis, we consider a class of security enforcement mechanisms we called Hardware-based Security Enforcement (HSE). In such mechanisms, some trusted software components rely on the underlying hardware architecture to constrain the execution of untrusted software components with respect to targeted security policies. For instance, an operating system which configures page tables to isolate userland applications implements a HSE mechanism. For a HSE mechanism to correctly enforce a targeted security policy, it requires both hardware and trusted software components to play their parts. During the past decades, several vulnerability disclosures have defeated HSE mechanisms. We focus on the vulnerabilities that are the result of errors at the specification level, rather than implementation errors. In some critical vulnerabilities, the attacker makes a legitimate use of one hardware component to circumvent the HSE mechanism provided by another one. For instance, cache poisoning attacks leverage inconsistencies between cache and DRAM’s access control mechanisms. We call this class of attacks, where an attacker leverages inconsistencies in hardware specifications, compositional attacks. Our goal is to explore approaches to specify and verify HSE mechanisms using formal methods that would benefit both hardware designers and software developers. Firstly, a formal specification of HSE mechanisms can be leveraged as a foundation for a systematic approach to verify hardware specifications, in the hope of uncovering potential compositional attacks ahead of time. Secondly, it provides unambiguous specifications to software developers, in the form of a list of requirements
Cemin, Paulo Roberto. "Plataforma de medição de consumo para comparação entre software e hardware em projetos energeticamente eficientes." Universidade Tecnológica Federal do Paraná, 2015. http://repositorio.utfpr.edu.br/jspui/handle/1/1310.
Full textThe large number of mobile devices increased the interest in low-power designs. Tools that allow the evaluation of alternative implementations give the designer actionable information to create energy-efficient designs. This paper presents a new power measurement platform able to compare the energy consumption of different algorithms implemented in software and in hardware. The proposed platform is able to measure the energy consumption of a specific process running in a general-purpose CPU with a standard operating system, and to compare the results with equivalent algorithms running in an FPGA. This allows the designer to choose the most energy-efficient software vs. hardware partitioning for a given application. Compared with the current state-of-the-art, the presented platform has four distinguishing features: (i) support for both software and hardware power measurements, (ii) measurement of individual code sections in the CPU, (iii) support for dynamic clock frequencies, and (iv) improvement of measurement precision. We also demonstrate how the developed platform has been used to analyze the energy consumption of network intrusion detection algorithms aimed at detecting probing attacks.
Judge, Lyndon Virginia. "Design Methods for Cryptanalysis." Thesis, Virginia Tech, 2012. http://hdl.handle.net/10919/35980.
Full textMaster of Science
Sensaoui, Abderrahmane. "Etude et implémentation de mécanismes de protection d'exécution d'applications embarquées." Thesis, Université Grenoble Alpes, 2020. http://www.theses.fr/2020GRALM002.
Full textLooking at the speed by which embedded systems technologies are advancing, there is no surprise the attacks' number is rising. Many applications are written quickly in a low-level language to keep up with industry pace, and they contain a variety of bugs. Bugs can be used to break into a device and to run malicious code. Reviewing code becomes more and more complex and costly due to its size. Another factor complicating code review is the use of on-the-shelf libraries. Even a detailed code review does not guarantee a bug-free application.This thesis presents an architecture to run securely untrusted applications on the same platform. We assume that the applications contain exploitable bugs, even the operating system can be exploited. We also assume that attackers can take control of In/Out hardware components (e.g., Direct Memory Access (DMA)). The device is trusted when the architecture guarantees that attackers cannot compromise the whole device and access sensitive code and data. Even when an application is compromised, our architecture guarantees a strong separation of multiple components: hardware and software. It ensures the authenticity and integrity of embedded applications and can verify their state before any sensitive operation. The architecture guarantees, for local and remote parties, that the device is running properly, and protect against software attacks.First, we study multiple attack vector and isolation and attestation architectures. We present multiple software attack vectors, and we define the security features and properties that these architectures need to ensure. We provide a detailed description of fifteen existing architectures in both academia and industry, and we compare their features. Then, we provide an in-depth study of five lightweight architectures where we give a comparison of performance, size, and how they behave against software-based attacks. From these studies, we draw our security objectives for lightweight devices: multi-layer isolation, attestation, upgradability, confidentiality, small size with a negligible run-time overhead and ease-of-use.Then, we design hybrid isolation and attestation architecture for lightweight devices. The so-called Toubkal offers multi-layered isolation; the system is composed of three layers of isolation. The first one is at the hardware level to separate In/Out components from each other. The second one is at the security monitor level; our study shows that there is a strong need to create a real separation between the security monitor and all the rest. Finally, the third layer is at the application level.However, isolation itself is not sufficient. Devices still need to ensure that the running application behaves as it was intended. For this reason, Toubkal provides attestation to be able to check the state of a device at any-time. It guarantees that a software component or data were not compromised.Finally, we prove the correctness of the security properties that Toubkal provides. We modeled Toubkal as a finite state machine and used computer-aided formal verification to prove the security properties. Then, we evaluated Toubkal's overhead. The results show that Toubkal overhead is small and fit for lightweight devices
Oselame, Gleidson Brandão. "Desenvolvimento de software e hardware para diagnóstico e acompanhamento de lesões dermatológicas suspeitas para câncer de pele." Universidade Tecnológica Federal do Paraná, 2014. http://repositorio.utfpr.edu.br/jspui/handle/1/973.
Full textCancer is responsible for about 7 million deaths annually worldwide. It is estimated that 25% of all cancers are skin, and in Brazil the most frequent in all geographic regions type. Among them, the melanoma type, accounting for 4% of skin cancers, whose incidence has doubled worldwide in the past decade. Among the diagnostic methods employed, it is cited ABCD rule which considers asymmetry (A), edges (B), color (C) and diameter (D) stains or nevi. The digital image processing has shown good potential to aid in early diagnosis of melanoma. In this sense, the objective of this study was to develop software in MATLAB® platform, associated with hardware to standardize image acquisition aiming at performing the diagnosis and monitoring of suspected malignancy (melanoma) skin lesions. Was used as the ABCD rule for guiding the development of methods of computational analysis. We used MATLAB as a programming environment for the development of software for digital image processing. The images used were acquired two banks pictures free access. Images of melanomas (n = 15) and pictures nevi (not cancer) (n = 15) were included. We used the image in RGB color channel, which were converted to grayscale, application of 8x8 median filter and approximation technique for 3x3 neighborhood. After we preceded binarization and reversing black and white for subsequent feature extraction contours of the lesion. For the standardized image acquisition was developed a prototype hardware, which was not used in this study (that used with enclosed diagnostic images of image banks), but has been validated for evaluation of lesion diameter (D). We used descriptive statistics where the groups were subjected to non-parametric test for two independent samples Mann-Whitney U test yet, to evaluate the sensitivity (SE) and specificity (SP) of each variable, we used the ROC curve. The classifier used was an artificial neural network with radial basis function, obtaining diagnostic accuracy for melanoma images and 100% for images not cancer of 90.9%. Thus, the overall diagnostic accuracy for prediction was 95.5%. Regarding the SE and SP of the proposed method, obtained an area under the ROC curve of 0.967, which suggests an excellent diagnostic ability to predict, especially with low costs, since the software can be run in most systems operational use today.
Schwerter, Michael Verfasser], N. Jon [Akademischer Betreuer] [Shah, and Achim [Akademischer Betreuer] Stahl. "Advanced software and hardware control methods for improved static and dynamic $B_0}$ shimming in magnetic resonance imaging / Michael Schwerter ; Nadim Joni Shah, Achim Stahl." Aachen : Universitätsbibliothek der RWTH Aachen, 2019. http://d-nb.info/1216175756/34.
Full textЗамятин, Д. С., and Я. В. Пишта. "Методы защиты java программ." Thesis, Издательство СумГУ, 2011. http://essuir.sumdu.edu.ua/handle/123456789/25297.
Full textStamenkovich, Joseph Allan. "Enhancing Trust in Autonomous Systems without Verifying Software." Thesis, Virginia Tech, 2019. http://hdl.handle.net/10919/89950.
Full textMaster of Science
Autonomous systems are surprisingly vulnerable, not just from malicious hackers, but from design errors and oversights. The lines of code required can quickly climb into the millions, and the artificial decision algorithms can be inscrutable and fully dependent upon the information they are trained on. These factors cause the verification of the core software running our autonomous cars, drones, and everything else to be prohibitively difficult by traditional means. Independent safety monitors are implemented to provide internal oversight for these autonomous systems. A semi-automatic design process efficiently creates error-free monitors from safety rules drones need to follow. These monitors remain separate and isolated from the software typically controlling the system, but use the same sensor information. They are embedded in the circuitry and act as their own small, task-specific processors watching to make sure a particular rule is not violated; otherwise, they take control of the system and force corrective behavior. The monitors are added to a consumer off-the-shelf (COTS) drone to demonstrate their effectiveness. For every rule monitored, an override is triggered when they are violated. Their effectiveness depends on reliable sensor information as with any electronic component, and the completeness of the rules detailing these monitors.
França, André Luiz Pereira de. "Estudo, desenvolvimento e implementação de algoritmos de aprendizagem de máquina, em software e hardware, para detecção de intrusão de rede: uma análise de eficiência energética." Universidade Tecnológica Federal do Paraná, 2015. http://repositorio.utfpr.edu.br/jspui/handle/1/1166.
Full textO constante aumento na velocidade da rede, o número de ataques e a necessidade de eficiência energética estão fazendo com que a segurança de rede baseada em software chegue ao seu limite. Um tipo comum de ameaça são os ataques do tipo probing, nos quais um atacante procura vulnerabilidades a partir do envio de pacotes de sondagem a uma máquina-alvo. Este trabalho apresenta o estudo, o desenvolvimento e a implementação de um algoritmo de extração de características dos pacotes da rede em hardware e de três classificadores de aprendizagem de máquina (Árvore de Decisão, Naive Bayes e k-vizinhos mais próximos), em software e hardware, para a detecção de ataques do tipo probing. O trabalho apresenta, ainda resultados detalhados de acurácia de classificação, taxa de transferência e consumo de energia para cada implementação.
The increasing network speeds, number of attacks, and need for energy efficiency are pushing software-based network security to its limits. A common kind of threat is probing attacks, in which an attacker tries to find vulnerabilities by sending a series of probe packets to a target machine. This work presents the study, development, and implementation of a network packets feature extraction algorithm in hardware and three machine learning classifiers (Decision Tree, Naive Bayes, and k-nearest neighbors), in software and hardware, for the detection of probing attacks. The work also presents detailed results of classification accuracy, throughput, and energy consumption for each implementation.
Seotsanyana, Motlatsi. "Formal specification and verification of safety interlock systems : a comparative case study /." Thesis, Link to the online version, 2007. http://hdl.handle.net/10019/710.
Full textMajchrák, František. "Návrh a realizace zařízení pro zjednodušení a urychlení testování systému AWS/TPWS." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2019. http://www.nusl.cz/ntk/nusl-400607.
Full textAntignac, Thibaud. "Méthodes formelles pour le respect de la vie privée par construction." Thesis, Lyon, INSA, 2015. http://www.theses.fr/2015ISAL0016/document.
Full textPrivacy by Design (PbD) is increasingly praised as a key approach to improving privacy protection. New information and communication technologies give rise to new business models and services. These services often rely on the exploitation of personal data for the purpose of customization. While privacy is more and more at risk, the growing view is that technologies themselves should be used to propose more privacy-friendly solutions. Privacy Enhancing Technologies (PETs) have been extensively studied, and many techniques have been proposed such as anonymizers or encryption mechanisms. However, PbD goes beyond the use of PETs. Indeed, the privacy requirements of a system should be taken into account from the early stages of the design because they can have a large impact on the overall architecture of the solution. The PbD approach can be summed up as ``prevent rather than cure''. A number of principles related to the protection of personal data and privacy have been enshrined in law and soft regulations. They involve notions such as data minimization, control of personal data by the subject, transparency of the data processing, or accountability. However, it is not clear how to translate these principles into technical features, and no method exists so far to support the design and verification of privacy compliant systems. This thesis proposes a systematic process to specify, design, and verify system architectures. This process helps designers to explore the design space in a systematic way. It is complemented by a formal framework in which confidentiality and integrity requirements can be expressed. Finally, a computer-aided engineering tool enables non-expert designers to perform formal verifications of the architectures. A case study illustrates the whole approach showing how these contributions complement each other and can be used in practice
Hiscock, Thomas. "Microcontrôleur à flux chiffré d'instructions et de données." Thesis, Université Paris-Saclay (ComUE), 2017. http://www.theses.fr/2017SACLV074/document.
Full textEmbedded processors are today ubiquitous, dozen of them compose and orchestrate every technology surrounding us, from tablets to smartphones and a large amount of invisible ones. At the core of these systems, processors gather data, process them and interact with the outside world. As such, they are excepted to meet very strict safety and security requirements. From a security perspective, the task is even more difficult considering the user has a physical access to the device, allowing a wide range of specifically tailored attacks.Confidentiality, in terms of both software code and data is one of the fundamental properties expected for such systems. The first contribution of this work is a software encryption method based on the control flow graph of the program. This enables the use of stream ciphers to provide lightweight and efficient encryption, suitable for constrained processors. The second contribution is a data encryption mechanism based on homomorphic encryption. With this scheme, sensible data remain encrypted not only in memory, but also during computations. Then, the integration and evaluation of these solutions on Field Programmable Gate Array (FPGA) with some example programs will be discussed
Harrath, Nesrine. "A stepwise compositional approach to model and analyze system C designs at the transactional level and the delta cycle level." Thesis, Paris, CNAM, 2014. http://www.theses.fr/2014CNAM0957/document.
Full textEmbedded systems are increasingly integrated into existing real-time applications. They are usually composed of deeply integrated but heterogeneous hardware and software components. These components are developed under strict constraints. Accordingly, the work of design engineers became more tricky and challenging. To meet the high quality standards in nowadays embedded systems and to satisfy the rising industrial demands, the automatization of the developing process of those systems is gaining more and more importance. A major challenge is to develop an automated approach that can be used for the integrated verification and validation of complex and heterogeneous HW/SW systems.In this thesis, we propose a new compositional approach to model and verify hardware and software written in SystemC language. This approach is based on the SystemC Waiting State Automata (WSA). The SystemC Waiting State Automata are used to model the abstract behavior of hardware or software systems described in SystemC. They preserve the semantics of the SystemC scheduler at the temporal and the delta-cycle level. This model allows to reduce the complexity of the modeling process of complex systems due to the problem of state explosion during modeling while remaining faithful to the original system. The SystemC waiting state automaton is also compositional and supports refinement. In addition, this model is extended with parameters such as time and counters in order to take into account further aspects like temporality and other extra-functional properties such as QoS.In this thesis, we propose a stepwise approach on how to automatically extract the SystemC WSAs from SystemC descriptions. This construction is based on symbolic execution together with predicate abstraction. We propose a set of algorithms to symbolically compose and reduce the SystemC WSAs in order to study, analyze and verify concurrent behavior of systems as well as the data exchange between various components. We then propose to use the SystemC WSA to model and simulate hardware and software systems, and to compute the worst cas execution time (WCET) using the Timed SystemC WSA. Finally, we define how to apply model checking techniques to prove the correctness of the abstract analysis
Bengtsson, Johnny. "Forensisk hårddiskkloning och undersökning av hårddiskskrivskydd." Thesis, Linköping University, Department of Science and Technology, 2004. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-2378.
Full textDetta examensarbete reder ut arbetsprinciperna för olika typer av hårddiskskrivskydd; hårdvaruskrivskydd, mjukvaruskrivskydd, hybridskrivskydd och bygelskrivskydd. Slutsatsen av utredningen är att endast hårdvaruskrivskydd Detta examensarbete reder ut arbetsprinciperna för olika typer av hårddiskskrivskydd; hårdvaruskrivskydd, mjukvaruskrivskydd, hybridskrivskydd och bygelskrivskydd. Slutsatsen av utredningen är att endast hårdvaruskrivskydd bedöms ha tillräckligt pålitliga skyddsprinciper, vilket motiveras av dess oberoende från både hårdvara och operativsystem.
Vidare undersöks hårdvaruskrivskyddet Image MASSter(TM) Drive Lock från Intelligent Computer Solutions (ICS). Några egentliga slutsatser gick inte dra av kretskonstruktionen, bortsett från att den är uppbyggd kring en FPGA (Xilinx Spartan-II, XC2S15) med tillhörande PROM (XC17S15APC).
En egenutvecklad idé till autenticieringsmetod för hårddiskkloner föreslås som ett tillägg till arbetet. Principen bygger på att komplettera hårddiskklonen med unik information om hårddisk såväl kloningsomständigheter, vilka sammanflätas genom XOR-operation av komponenternas hashsummor.Autenticieringsmetoden kan vid sjösättning möjligen öka rättsäkerheten för både utredarna och den som står misstänkt vid en brottsutredning.
Arbetet är till stora delar utfört vid och på uppdrag av Statens kriminaltekniska laboratorium (SKL) i Linköping.
Pathirana, Vajira. "A power system protection scheme combining impedance measurement and travelling waves : software and hardware implementation." 2005. http://hdl.handle.net/1993/18043.
Full textStreichert, Thilo [Verfasser]. "Self-adaptive hardware, software reconfigurable networks : concepts, methods, and implementation / vorgelegt von Thilo Streichert." 2008. http://d-nb.info/988589451/34.
Full textChu, Jer-I., and 朱哲毅. "Noise Reduction in a Remote Measurement System by using DSP Software and Hardware Methods." Thesis, 2002. http://ndltd.ncl.edu.tw/handle/85042488297782376762.
Full text輔仁大學
電子工程學系
90
In the operation of a remote measurement system, the response waveforms of the testing circuits connected with the interface circuit include the unwanted noise. Hence, in this paper, we propose the use of the digital signal processing method instead of our previously proposed method of using repeatedly measured response waveforms and software average methods. We pass the measured waveforms with their excessive noise through digital FIR filters to reduce the influence of noise at either the local or remote computers. Here, we use three types of the digital FIR filters: a FIR filter designed with a Hamming window, with a Kaiser window and an equiripple linear-phase FIR filter based on a Parks-McClellan algorithm. In addition, we compare their filtering performance that depends on the Minimum Mean Square Error (M.M.S.E.) with respect to the different filter order N. Our experiment results show that the higher filter order N is not positively in proportion to the better of M.M.S.E. However, all of the three filters can provide a range of improvement of from about 30 percent to 50 percent in M.M.S.E.. Finally, we compare the computation cost. The experimental results show that the computation cost is in proportion to the filter order N, but the computation cost is different from the varied digital filters. Finally, we use hardware structure to implement a function of the digital filter to verify the results of the software simulations.
Bobaru, Mihaela. "Approximation and Refinement Techniques for Hard Model-checking Problems." Thesis, 2009. http://hdl.handle.net/1807/17453.
Full textChin-YuHung and 洪勁宇. "FPGA Implementation of 128-bits AES Hardware Engine with Software Gold-Key Hidden Technique and Applications to Data Protection of Flash Memory Card." Thesis, 2010. http://ndltd.ncl.edu.tw/handle/85213163180010378351.
Full text國立成功大學
工程科學系碩博士班
98
In recent years, digital information has been widely used in people’s daily life. Information security has become an important issue in digital life. In this thesis, we propose a new application, which combines hardware data encryption with software data hiding, and applies on a flash memory card through a card reader, aiming to achieve data protection. The 128-bit Advanced Encryption Standard (AES-128) is adopted in data encryption, and implemented on FPGA. To achieve a high-performance encryption, the hardware architecture fully utilizes Block RAMs in FPGA as data buffers, reducing the requirement for capacity of the external SRAM memory. In addition, the gold-key hidden technique is mainly implemented based on PC. For the reason that the progressive reconstruction property in JPEG 2000 image transmission, we embed the gold-key (or the identification of card reader) in the unimportant position, minimizing the loss of the quality caused by the hidden data, and accomplish the method in various applications. In this theory, we design the AES-128 by VerilogHDL, and implement it on Xilinx Spartan-3 XC3S400 FPGA. We also use JasPer as the basis of JPEG 2000 codec, and develop the GUI by Visual Studio 2008.
BAGHDADI, Amer. "Exploration et conception systématique d'architectures multiprocesseurs monopuces dédiées à des applications spécifiques = methods and tools for multiprocessor systems on chip, hardware/software co-designExploration and Systematic Design of Application-Specific Heterogeneous Multiprocessor SoC." Phd thesis, 2002. http://tel.archives-ouvertes.fr/tel-00002932.
Full textLe sujet de cette thèse porte sur la mise en œuvre d'une nouvelle approche de conception systématique d'architectures multiprocesseurs monopuces dédiées à des application spécifiques.
Ainsi, un modèle architectural multiprocesseur générique est proposé. Ce modèle est modulaire, flexible et extensible, permettant de couvrir un large domaine d'applications. Les composants de traitement sont dissociés du réseau de communication via des interfaces génériques de communication jouant le rôle de coprocesseurs.
Un flot de conception complet est constitué de deux étapes principales. La première étape est l'étape d'exploration d'architecture. Concernant cette étape, une méthode d'estimation de performance au niveau système est proposée. Cette méthode permet une exploration rapide de l'espace de solutions architecturales pour trouver l'architecture système optimale pour l'application à concevoir. Le but de cette étape est de fixer les paramètres architecturaux (optimaux) dédiés à l'application. Ces paramètres sont utilisés dans la seconde étape –qui est l'étape d'implémentation– pour produire l'architecture RTL. Cette étape comporte trois types d'actions : la conception des composants logiciels, la conception des composants matériels et la conception du réseau de communication permettant d'intégrer les composants de base. Cette étape est réalisée de façon systématique basée sur l'instanciation et la configuration de composants dans une bibliothèque.
L'approche proposée permet de réduire significativement le temps de mise sur le marché de systèmes multiprocesseurs monopuces complexes. Plusieurs applications industrielles ont été réalisées pour valider et évaluer les performances de cette approche.
Метелешко, Микола Іванович, and Mykola Ivanovych Meteleshko. "Методи і засоби організації захисту даних у віртуалізованому середовищі підприємства." Bachelor's thesis, 2021. http://elartu.tntu.edu.ua/handle/lib/35367.
Full textThe qualification thesis is devoted to to design and develop a security system on the example of the Gigabyte+online store. The developed system have increased the level of security of personal data that is stored and processed in the enterprise's information system. The aim of the diploma project was to develop and implement an information security policy in the network of the «Gigabyte+» online IT services store. To achieve this goal the following tasks have been solved: - a brief description of the company is provided; - an analysis of information security risks was carried out; – a set of tasks that are subject to further solution is given; - analysis and justification of the choice of security system was carried out; -the implemented information security software and hardware tools are described, as well as a control example of using the selected information security tools.
ПЕРЕЛІК УМОВНИХ ПОЗНАЧЕНЬ, СИМВОЛІВ, ОДИНИЦЬ, СКОРОЧЕНЬ І ТЕРМІНІВ .... 7 ВСТУП ... 8 1 ТЕОРЕТИЧНА ЧАСТИНА .... 10 1.1 Техніко-економічна характеристика предметної області та підприємства . 10 1.2 Аналіз ризиків інформаційної безпеки ... 14 1.3. Оцінка існуючих і планованих засобів захисту ... 20 1.4 Оцінка ризиків інформаційної безпеки .... 28 1.5 Висновки до розділу 1 ... 29 2 ДОСЛІДЖЕННЯ СИСТЕМИ ЗАБЕЗПЕЧЕННЯ ІНФОРМАЦІЙНОЇ БЕЗПЕКИ І ЗАХИСТУ ІНФОРМАЦІЇ НА ПІДПРИЄМСТВІ ...31 2.1 Характеристика комплексу задач, завдання та обґрунтування необхідності вдосконалення системи забезпечення інформаційної безпеки і захисту інформації на підприємстві .... 31 2.1.1. Вибір комплексу задач забезпечення інформаційної безпеки.... 31 2.1.2. Визначення місця проектованого комплексу завдань в комплексі завдань підприємства, деталізація завдань інформаційної безпеки і захисту інформації .... 35 2.2. Вибір захисних заходів... 38 2.2.1. Вибір організаційних заходів .... 38 2.2.2. Вибір інженерно-технічних заходів ...41 2.3 Висновки до розділу 2 ...43 3 ПРАКТИЧНА ЧАСТИНА. ПРОЕКТУВАННЯ ПРОГРАМНО-АПАРАТНОГО КОМПЛЕКСУ ІНФОРМАЦІЙНОЇ БЕЗПЕКИ І ЗАХИСТУ ІНФОРМАЦІЇ ПІДПРИЄМСТВА ... 44 3.1 Комплекс проектованих програмно-апаратних засобів забезпечення інформаційної безпеки і захисту інформації підприємства ...44 3.2 Контрольний приклад реалізації проекту і його опис ..67 3.3 Висновки до розділу 3 ... 72 4 Безпека життєдіяльності, основи хорони праці ..73 4.1 Вимоги до профілактичних медичних оглядів для працівників ПК. ... 73 4.2 Психофізіологічне розвантаження для працівників... 78 ВИСНОВКИ ... 80 СПИСОК ЛІТЕРАТУРНИХ ДЖЕРЕЛ ... 81
Harrath, Nesrine. "Une approche compositionnelle pour la modélisation et l'analyse des composants systemC au niveau TLM et au niveau des Delta Cycles." Thesis, 2014. http://www.theses.fr/2015CNAM0957/document.
Full textEmbedded systems are increasingly integrated into existing real-time applications. They are usually composed of deeply integrated but heterogeneous hardware and software components. These components are developed under strict constraints. Accordingly, the work of design engineers became more tricky and challenging. To meet the high quality standards in nowadays embedded systems and to satisfy the rising industrial demands, the automatization of the developing process of those systems is gaining more and more importance. A major challenge is to develop an automated approach that can be used for the integrated verification and validation of complex and heterogeneous HW/SW systems.In this thesis, we propose a new compositional approach to model and verify hardware and software written in SystemC language. This approach is based on the SystemC Waiting State Automata (WSA). The SystemC Waiting State Automata are used to model the abstract behavior of hardware or software systems described in SystemC. They preserve the semantics of the SystemC scheduler at the temporal and the delta-cycle level. This model allows to reduce the complexity of the modeling process of complex systems due to the problem of state explosion during modeling while remaining faithful to the original system. The SystemC waiting state automaton is also compositional and supports refinement. In addition, this model is extended with parameters such as time and counters in order to take into account further aspects like temporality and other extra-functional properties such as QoS.In this thesis, we propose a stepwise approach on how to automatically extract the SystemC WSAs from SystemC descriptions. This construction is based on symbolic execution together with predicate abstraction. We propose a set of algorithms to symbolically compose and reduce the SystemC WSAs in order to study, analyze and verify concurrent behavior of systems as well as the data exchange between various components. We then propose to use the SystemC WSA to model and simulate hardware and software systems, and to compute the worst cas execution time (WCET) using the Timed SystemC WSA. Finally, we define how to apply model checking techniques to prove the correctness of the abstract analysis