Academic literature on the topic 'Silicon Thin Film Technology'

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Journal articles on the topic "Silicon Thin Film Technology"

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Zeman, Miroslav. "Thin-Film Silicon PV Technology." Journal of Electrical Engineering 61, no. 5 (September 1, 2010): 271–76. http://dx.doi.org/10.2478/v10187-010-0039-y.

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Thin-Film Silicon PV TechnologyThin-film silicon solar cell technology is one of the promising photovoltaic technologies for delivering low-cost solar electricity. Today the thin-film silicon PV market (402MWpproduced in 2008) is dominated by amorphous silicon based modules; however it is expected that the tandem amorphous/microcrystalline silicon modules will take over in near future. Solar cell structures based on thin-film silicon for obtaining high efficiency are presented. In order to increase the absorption in thin absorber layers novel approaches for photon management are developed. Module production and application areas are described.
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Johnson, R. W., T. L. Phillips, R. C. Jaeger, S. F. Hahn, and D. C. Burdeaux. "Multichip thin-film technology on silicon." IEEE Transactions on Components, Hybrids, and Manufacturing Technology 12, no. 2 (June 1989): 185–94. http://dx.doi.org/10.1109/33.31423.

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Shah, A. V., H. Schade, M. Vanecek, J. Meier, E. Vallat-Sauvain, N. Wyrsch, U. Kroll, C. Droz, and J. Bailat. "Thin-film silicon solar cell technology." Progress in Photovoltaics: Research and Applications 12, no. 23 (March 2004): 113–42. http://dx.doi.org/10.1002/pip.533.

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Beaucarne, Guy. "Silicon Thin-Film Solar Cells." Advances in OptoElectronics 2007 (December 17, 2007): 1–12. http://dx.doi.org/10.1155/2007/36970.

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We review the field of thin-film silicon solar cells with an active layer thickness of a few micrometers. These technologies can potentially lead to low cost through lower material costs than conventional modules, but do not suffer from some critical drawbacks of other thin-film technologies, such as limited supply of basic materials or toxicity of the components. Amorphous Si technology is the oldest and best established thin-film silicon technology. Amorphous silicon is deposited at low temperature with plasma-enhanced chemical vapor deposition (PECVD). In spite of the fundamental limitation of this material due to its disorder and metastability, the technology is now gaining industrial momentum thanks to the entry of equipment manufacturers with experience with large-area PECVD. Microcrystalline Si (also called nanocrystalline Si) is a material with crystallites in the nanometer range in an amorphous matrix, and which contains less defects than amorphous silicon. Its lower bandgap makes it particularly appropriate as active material for the bottom cell in tandem and triple junction devices. The combination of an amorphous silicon top cell and a microcrystalline bottom cell has yielded promising results, but much work is needed to implement it on large-area and to limit light-induced degradation. Finally thin-film polysilicon solar cells, with grain size in the micrometer range, has recently emerged as an alternative photovoltaic technology. The layers have a grain size ranging from 1 μm to several tens of microns, and are formed at a temperature ranging from 600 to more than 1000∘C. Solid Phase Crystallization has yielded the best results so far but there has recently been fast progress with seed layer approaches, particularly those using the aluminum-induced crystallization technique.
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Cheng, Yu, Huayi Hu, Zhihong Gao, Ke Zhou, Xiaona Wang, Shihong Xiang, and Xiaohui Chen. "Thin film silicon solar module encapsulation technology research." MRS Proceedings 1771 (2015): 87–95. http://dx.doi.org/10.1557/opl.2015.489.

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ABSTRACTThe encapsulation failure is a serious problem which leads to power degradation and life time reduction of silicon based thin film solar module. Therefore, the encapsulation material and related technology research and development become more and more important. This article describes some different junction box and middle foil encapsulation technology of the silicon based thin film solar module, different encapsulation materials and processes are compared and their impact on the manufacturing cost and module performance are discussed. The aim of this study is to find an appropriate solution of module encapsulation failure.
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Schropp, Ruud E. I., Reinhard Carius, and Guy Beaucarne. "Amorphous Silicon, Microcrystalline Silicon, and Thin-Film Polycrystalline Silicon Solar Cells." MRS Bulletin 32, no. 3 (March 2007): 219–24. http://dx.doi.org/10.1557/mrs2007.25.

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AbstractThin-film solar cell technologies based on Si with a thickness of less than a few micrometers combine the low-cost potential of thin-film technologies with the advantages of Si as an abundantly available element in the earth's crust and a readily manufacturable material for photovoltaics (PVs). In recent years, several technologies have been developed that promise to take the performance of thin-film silicon PVs well beyond that of the currently established amorphous Si PV technology. Thin-film silicon, like no other thin-film material, is very effective in tandem and triple-junction solar cells. The research and development on thin crystalline silicon on foreign substrates can be divided into two different routes: a low-temperature route compatible with standard float glass or even plastic substrates, and a high-temperature route (>600°C). This article reviews the material properties and technological challenges of the different thin-film silicon PV materials.
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Lang, W., P. Steiner, U. Schaber, and A. Richter. "A thin film bolometer using porous silicon technology." Sensors and Actuators A: Physical 43, no. 1-3 (May 1994): 185–87. http://dx.doi.org/10.1016/0924-4247(93)00691-v.

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Schröder, Bernd. "Thin film technology based on hydrogenated amorphous silicon." Materials Science and Engineering: A 139 (July 1991): 319–33. http://dx.doi.org/10.1016/0921-5093(91)90636-2.

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Sassaki, C. A., A. T. Arasaki, M. P. Carreño, A. Komazawa, and I. Pereyra. "Integral thin film technology amorphous silicon image sensor." Journal of Non-Crystalline Solids 115, no. 1-3 (December 1989): 90–92. http://dx.doi.org/10.1016/0022-3093(89)90370-0.

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Guo, Hang, Jun Ying Jiang, Jia Xing Liu, Zhi Hua Nie, Fang Ye, and Chong Fang Ma. "Fabrication and Calibration of Cu-Ni Thin Film Thermocouples." Advanced Materials Research 512-515 (May 2012): 2068–71. http://dx.doi.org/10.4028/www.scientific.net/amr.512-515.2068.

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Thin film thermocouples (TFTCs) have vast vistas owing to their advantages, such as thin junction, small volume, fast response rate, high sensitivity and so on. In this investigation, a transient temperature sensor of TFTCs was fabricated to measure the surface transient temperature by vacuum coating technology. Silicon dioxide was selected as insulating substrate, the overall dimension of which was 8 mm long, 8 mm wide, and 0.1 mm thick. Two different metal layers were sandwiched between silicon dioxide 2 insulating substrate and silicon dioxide protective layer: cuprum and nickel films, which were 0.08 μm thick. TFTCs consist of 13 Cu-Ni junctions, which are connected in series. The whole TFTCs area is 4.6mm × 4.6 mm. The aggregate thickness of the transient temperature sensor is 0.17 μm. To protect Cu and Ni films, a silicon dioxide layer thickness of 0.01 μm was evaporated on metal layers excluding terminal points. This research carried out static and dynamic calibration to TFTCs. The Seebeck coefficient of the thin film thermocouple is 0.83843 μV/°C. The dynamic performance of TFTCs exhibited dynamic behavior corresponding to the heat flux change on the surface of thin film thermocouple.
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Dissertations / Theses on the topic "Silicon Thin Film Technology"

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Garbayo, Senosiain Iñigo. "Integration of thin film based micro solid oxide fuel cells in silicon technology." Doctoral thesis, Universitat de Barcelona, 2013. http://hdl.handle.net/10803/131944.

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In the last decades, there has been a huge proliferation of portable devices. Among them, consumer electronics such as mobile phones, music players, e-books, etc. are greatly extended. In order to provide these devices with the required autonomy, a power supply system has to be integrated within the device packaging. This impels the search of integrated power sources that could satisfy the requirements of high power density, long operation lifetime and low cost. Up to now, batteries have been commonly used as power supply for these devices. However, as functionalities increase, the need high off-grid power supply and storage exponentially increases. Just entering on the 4th generation (4G) era on consumer electronics devices, some studies suggest that the already optimized batteries are probably reaching their energy density limit and no longer can be considered for reliably powering high-performance devices. Therefore, in the last years, many research groups around the world have focused their attention on the development of efficient alternatives to batteries, as power supply for the new high-performance portable devices working on the low power regime (1−20W). Due to their long lifetime, high power density and integrability, probably the most promising alternative is the development of micro fuel cells. Among them, micro solid oxide fuel cells (micro SOFC) present the highest values of specific energy densities (by unit mass and/or volume), mainly due to their higher operating temperature and subsequent capability of operate directly on hydrocarbon fuels. The most extended design for micro SOFC devices is based on the fabrication of accessible freeKstanding membranes of the functional layers, i.e. a thin electrolyte covered by an anode and a cathode one at each side (electrodes), supported on silicon-based microfabricated platforms. The use of silicon as supporting material has been found to be very convenient as it is the principal material used in microfabrication technology and therefore there exist a wide and well-known series of techniques already developed for its micromachining. This allows the fabrication of functional membranes, while ensuring robustness on the system. This thesis encompasses the design, fabrication and characterization of thin film-based micro solid oxide fuel cells integrated in silicon. The development of micro SOFC was carried out in three different ways; (i.) presenting new designing strategies for the optimization of the free-standing membranes, (ii.) fabricating thermo-mechanically stable thin film electrolytes and (iii.) suggesting and implementing new more reliable thin film electrode materials. On one side, two different membrane designs are micro fabricated using silicon micro machining technology. First, the fabrication of a basic square design was firstly addressed, where the main concerns were placed on the adaptation of the fabrication flow to the Clean Room capabilities at IMB-CNM (CSIC). Then, an innovative large-area membrane was designed and fabricated. This second design was based on the use of doped silicon slab grids as robust support for the larger freeKstanding areas, allowing the fabrication of x30 larger membranes than previous basic designs. Yttria-stabilized zirconia (YSZ), the state-of-the-art electrolyte material in bulk SOFC, was used for the fabrication of thin film free-standing electrolytic membranes. Dense, fully crystalline and homogeneous films were obtained, as required for the fabrication of effective electrolytes, thus avoiding shortcuts between electrodes and/or gas leakages. An exhaustive study on the thermoKmechanical stability of the electrolytic membranes was performed, paying special attention to the evolution of the stress with fabrication conditions. Finally, target values of resistance associated to the electrolyte (Area Specific Resistance, ASR= 0.15 Ωcm(2)) were obtained at temperatures as low as 400℃ for 250 nm-thick YSZ membranes, thus presenting them as suitable electrolyte for micro SOFC operating in the intermediate range of temperatures (IT range, 400 − 800℃). Several materials were tested as thin film electrodes for their use in micro SOFC. First, although widely used by other authors in previous reports of micro SOFC systems, thin film metallic electrodes (porous Pt) were found to be thermally instable under micro SOFC operating temperatures. This impelled the search for alternative materials as either cathode or anode. For the cathode side, porous La(0.6)Sr(0.4)CoO(3-δ) (LSC) thin films were fabricated and implemented in real micro SOFC configurations, i.e. free-standing membranes. Sufficient conductivity for their use as cathode films was measured, and no degradation was observed in the whole operating range. The thermo-mechanical stability of LSC/YSZ/LSC membranes was ensured up to 700℃. Target values of ASR required for SOFC cathode/electrolyte bi-layers (0.30Ω cm(2)) were achieved in the IT range (700℃). For the anode side, porous Pt-Ce(0.8)Gd(0.2)O(1.9-δ) (Pt-CGO) thin film cermets were fabricated. Porous CGO films below 1m thick had to be fabricated due to delamination problems. Percolation of Pt into the porous ceramic network was ensured by thermal treatment and observed by SEM. Anode electrochemical performance was tested on Pt-CGO/YSZ/CGO-Pt symmetrical membranes. Target values for the anode/electrolyte biKlayer were reached again at temperatures of ca. 700℃. In addition, the fabrication of thermally stable metal-based current collectors was also addressed. A non-conventional lithographic step, i.e. nanosphere lithography was used in order to define a patterned grid on both sides of the functional membranes. Dense Pt grids were fabricated thermo-mechanically stable, and their durability was ensured during real micro SOFC operating conditions. Finally, a fully ceramic-based micro SOFC was presented here for the first time. The three functional components of the fuel cell, i.e. cathode, electrolyte and anode, were fabricated by using the previously developed thin films. Thus, LSC/YSZ/CGO-Pt free-standing membranes were fabricated, and finally Pt current collectors were implemented on both sides. Thermo-mechanical stability of the micro SOFC membrane was proved till 750℃, extending the up-to-now reported operating temperatures of micro SOFC and therefore allowing the use of ceramic electrodes. A maximum power density of 100 mW/cm(2) was measured at 750℃ under pure H2 as fuel and synthetic air as oxidant. These results represented the first report on a second generation of more reliable micro SOFC systems, based on ceramics instead of thermally instable metal-based electrodes.
En las últimas décadas, ha habido una gran proliferación de aparatos portátiles. Entre ellos, cabe destacar los aparatos destinados a electrónica de consumo, como por ejemplo teléfonos móviles, reproductores de música, libros electrónicos, etc., los cuales están actualmente muy extendidos. De cara a proporcionar a estos aparatos con suficiente autonomía, se ha de integrar una fuente de alimentación en el mismo dispositivo. Esto urge a buscar posibles fuentes de alimentación con capacidad de integración, y que a su vez satisfagan los requerimientos básicos de alta densidad de potencia, gran tiempo de vida y bajo coste. Hasta ahora, la principal fuente de alimentación utilizada en este tipo de dispositivos ha sido las baterías. Sin embargo, conforme aumentan las funcionalidades, la necesidad de mayor capacidad de suministro (o almacenamiento) energético aumenta. Es más, justo ahora entrando en la cuarta generación (4G) de la electrónica de consumo, diversos estudios sugieren que las baterías, ya optimizadas, probablemente están alcanzando su límite en densidad energética, con lo que no podrían ya considerarse más para alimentar de manera viable los dispositivos más avanzados. En este sentido, en los últimos años muchos grupos de investigación han puesto su atención en el desarrollo de alternativas viables que puedan mejorar las prestaciones de las baterías como fuente de alimentación de dispositivos de altas prestaciones que trabajen en el régimen de baja potencia (1 − 20W). Debido a su alto tiempo de vida, alta densidad energética y capacidad de integración, probablemente la alternativa más prometedora es el desarrollo de micro pilas de combustible. En particular, entre los diferentes tipos, las micro pilas de combustible de óxido sólido (micro SOFC, de sus siglas en inglés), presentan los mayores valores de densidad energética específica (por unidad de masa y/o volumen), mayormente debido a su alta temperatura de operación y la consecuente capacidad de operar directamente con combustibles hidrocarburos. El diseño de micro SOFC más extendido está basado en la fabricación de membranas auto soportadas, las cuales integran ya todas las partes funcionales de la pila, es decir, un electrolito fino cubierto por un ánodo y un cátodo (uno a cada lado). Estas membranas, de grosor muy fino (menos de 1m), normalmente se encuentran soportadas en plataformas de silicio micro mecanizadas, de manera que se facilita un fácil acceso al combustible directamente a ambos lados de la membrana, a la vez que se proporciona robustez al sistema. El uso de silicio como material de soporte es muy conveniente, ya que es el material más utilizado en micro fabricación, por lo que existe una amplia y altamente desarrollada serie de técnicas para su micro mecanizado. Esta tesis engloba el diseño, la fabricación y la caracterización de micro pilas de combustible de óxido sólido basadas en capas delgadas, e integradas en tecnología de silicio. El desarrollo de las micro SOFC se ha llevado a cabo de tres formas diferentes: (i.) presentando nuevos diseños para la optimización de las membranas auto soportadas, (ii.) fabricando electrolitos en capa delgada estables termo-mecánicamente y (iii.) sugiriendo e implementando en el dispositivo final nuevos materiales de electrodo en capa delgada más efectivos y viables que los actuales. En primer lugar, se fabricaron dos diseños de membrana diferentes, usando tecnología de micro fabricación de silicio. En el primero de los diseños, se fabricaron membranas cuadradas básicas. En este caso, el trabajo más importante fue el de la adaptación del proceso de fabricación al flujo de fabricación de la Sala Blanca del IMB-CNM (CSIC). Más adelante, se desarrolló un nuevo diseño de membrana de gran superficie, basado en el uso de mallas de nervios de silicio dopado como soporte robusto. Así, se consiguieron fabricar membranas auto soportadas con un área total de hasta 30 veces mayor que las conseguidas en el diseño básico anterior. Para el electrolito, se usó zirconia estabilizada con ytria (YSZ, de sus siglas en inglés), el material estado del arte en SOFC de gran volumen. Se fabricaron membranas auto soportadas de YSZ con gran reproducibilidad, obteniendo capas delgadas densas, cristalinas y de grosor homogéneo. Estas características son básicas para un buen funcionamiento del electrolito, ya que así se evitan posibles cortocircuitos entre los dos electrodos y/o fugas de gas. Además, se realizó un estudio exhaustivo de la estabilidad termo-mecánica de las membranas de YSZ, ya que las temperaturas de operación de la pila son de varios centenares de ℃. En particular, se prestó atención especial a la evolución de los estreses en función de las condiciones de fabricación de la capa de YSZ, para as. evitar posibles fallos en los continuos ciclados térmicos. Finalmente, se realizó un estudio de las propiedades electroquímicas de las membranas de YSZ fabricadas. Normalmente, se establece un valor de resistencia específica por área de 0.15 Ω cm2 para cada una de las capas funcionales de las pilas. En este caso, este valor objetivo se obtuvo a temperaturas de 400℃ en membranas de YSZ de 250 nm de grosor. De esta forma, se comprobó que estas capas pueden funcionar perfectamente como electrolito en todo el rango de operación de las micro SOFC, que normalmente se establece en 400 − 800℃. A continuación, se probaron diversos materiales como electrodos en capa delgada, para su implementación en micro SOFC. En primer lugar, aunque éstos han sido usados frecuentemente por otros autores en estudios previos de micro SOFC, se comprobó que los electrodos metálicos en capa delgada (capas de Pt poroso) son inestables a las temperaturas de operación de las micro SOFC. Por lo tanto, esto hizo que se probaran materiales alternativos, bien para el ánodo o para el cátodo. En particular, para el cátodo se fabricaron capas delgadas porosas de La(0.6)Sr(0.4)CoO(3-δ) (LSC) y se integraron en membranas auto soportadas de YSZ (electrolito). La conductividad eléctrica que se midió en estas capas es adecuada, y no se observó degradación en todo el rango de temperaturas de operación. Así mismo, se comprobó la estabilidad termo mecánica del sistema fabricando membranas simétricas de LSC/YSZ/LSC y realizándoles ciclados térmicos hasta los 700℃. Por último, se midieron las propiedades electroquímicas de las bi-capas cátodo/electrolito, obteniendo los valores objetivo de resistencia específica por área (0.30 Ωcm2) a temperaturas de 700℃. Para el ánodo, se fabricaron capas delgadas porosas de un cermet de Pt y Ce0(.8)Gd(0.2)O(1.9-δ) (PtKCGO). Las capas de CGO se tuvieron que fabricar de grosores por debajo de 1 m, debido a problemas de delaminación del sustrato. Se aseguró una buena inter-conexión entre el Pt y el CGO mediante tratamientos térmicos. Las propiedades electroquímicas se midieron nuevamente fabricando membranas simétricas, esta vez Pt-CGO/YSZ/CGO-Pt. Así mismo, el objetivo de 0.30 Ωcm2 se obtuvo de nuevo a temperaturas alrededor de 700℃. Además, en esta tesis se llevó a cabo la fabricación de colectores de corriente térmicamente estables y a su vez compatibles con la configuración básica de una micro SOFC (membranas auto soportadas). Para ello, se usó un proceso de litografía no convencional, llamado "nanosphere lithography". De esta forma se fabricaron mallas de Pt denso perfectamente ordenadas en ambos lados de las membranas. La estabilidad térmica y la durabilidad en el tiempo de estas mallas fue igualmente probada mediante medidas en condiciones de trabajo reales de micro SOFC. Por último, en este trabajo se presentó una micro SOFC completamente basada en cerámicas por primera vez. Las tres capas funcionales de la pila, es decir, tanto el cátodo, como el electrolito y el ánodo, se fabricaron basándose en los estudios previos de cada material. Así, se fabricaron membranas auto soportadas siguiendo la configuración LSC/YSZ/CGO-Pt. Además, se implementaron mallas de Pt en ambos lados para asegurar una buena colección de corriente. La estabilidad termo mecánica de la membrana se midió hasta 750℃, extendiendo así el rango de temperaturas de operación reportado anteriormente en dispositivos finales de micro SOFC y en consecuencia permitiendo el uso de electrodos cerámicos. Se midieron valores de densidad de potencia de 100 mW/cm2 a 750℃, usando H2 como combustible y aire sintético como oxidante. Estos resultados representan los primeros valores de potencia presentados en micro SOFC basadas en cerámicas, abriendo as. la posibilidad de desarrollar una segunda generación de micro SOFC más viables térmicamente.
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McNeil, Vincent Maurice. "A thin-film silicon microaccelerometer fabricated using electrochemical etch-stop and wafer bonding technology." Thesis, Massachusetts Institute of Technology, 1994. http://hdl.handle.net/1721.1/12013.

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Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1994.
Includes bibliographical references (p. 343-360).
by Vincent Maurice McNeil.
Ph.D.
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Zhang, Peng. "Development and fabrication of vertical thin film transistors based on low temperature polycrystalline silicon technology." Rennes 1, 2012. https://ecm.univ-rennes1.fr/nuxeo/site/esupversions/9b61a7a5-6013-4028-af42-2d95a9366ca6.

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This work deals with the development of vertical thin film transistors (VTFTs) via the fabrication processes and the analysis of the electrical characteristics. The low-temperature (T ≤ 600°C) polycrystalline silicon technology is adopted in the fabrication processes. The first step of the work consists in the fabrication and characterization of VTFTs obtained by rotating the lateral thin film transistors (LTFTs) 90°. The feasibility of VTFTs fabrication is validated with an ION/IOFF ratio of about 10³, and it is analyzed that the large overlapping area between source and drain leads to a large off-current IOFF. The second step of the work lies in the partial suppression of the large overlapping area, and therefore, an ION/IOFF ratio of almost 10⁵ is obtained. The third step of the work deals with the proposal of a new VTFT structure that absolutely eliminates the overlapping area. Different improvements have been made on this new VTFT structure, especially by optimization of the following parameters: the active layer thickness, type and thickness of the barrier layer, and the geometric dimension. The optimized transistor highlights an ION/IOFF ratio of higher than 10⁵ with a reduced off-current IOFF, high stability and good reproducibility. P and N-type VTFTs have also been fabricated and showed symmetrical electrical characteristics; they are thus suitable for CMOS-like VTFT applications
Ce travail porte sur le développement de transistors en couches minces verticaux (VTFTs), du procédé de fabrication à l'analyse des caractéristiques électriques. Les transistors sont réalisés à partir de silicium polycristallin déposé et cristallisé en utilisant une technologie basse température (T ≤ 600°C). La première étape de ce travail consiste à la fabrication et la caractérisation de VTFTs obtenus par rotation de 90° des transistors à couches minces latéraux (LTFTs). La faisabilité technologique de VTFTs est alors validée, et un rapport ION/IOFF d'environ 10³ est obtenu. L'analyse des résultats de caractérisation électrique a mis en évidence que ce fort courant à l'état bloquant IOFF est principalement dû à la grande zone de recouvrement entre source et drain. La deuxième étape du travail réside dans la suppression partielle de cette zone de recouvrement qui aboutit à un rapport ION/IOFF proche de 10⁵. Dans la troisième partie de ce travail, une nouvelle architecture de transistors verticaux est proposée, qui élimine totalement la zone de recouvrement. Les effets de différents paramètres sont étudiés, notamment l'influence de l'épaisseur de la couche active, de la couche d'isolation, et de la dimension géométrique. Les transistors optimisés mettent en évidence un rapport ION/IOFF supérieur à 10⁵ avec une réduction du courant à l'état bloquant, une grande stabilité et une bonne reproductibilité du procédé technologique. Des transistors verticaux de type P et N ont également été réalisés. Ils ont montré des caractéristiques électriques symétriques, qui les rendent utilisables dans des applications similaires à la technologie CMOS
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Meng, Zhiguo. "Metal-induced unilaterally crystallized polycrystalline silicon thin-film transistor technology and application to flat-panel displays /." View Abstract or Full-Text, 2002. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202002%20MENG.

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Cheng, Chun Fai. "Modeling of polysilicon thin-film transistors formed by grain enhancement technology-metal-induced lateral crystallization /." View abstract or full-text, 2004. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202004%20CHENG.

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Manley, Robert G. "Development and modeling of a low temperature thin-film CMOS on glass /." Online version of thesis, 2009. http://hdl.handle.net/1850/11202.

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Singh, Siddhartha. "Phosphorus implants for off-state improvement of SOI CMOS fabricated at low temperature /." Online version of thesis, 2009. http://hdl.handle.net/1850/11427.

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Tengdelius, Lina. "Growth and Characterization of ZrB2 Thin Films." Licentiate thesis, Linköpings universitet, Tunnfilmsfysik, 2013. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-98308.

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In this thesis, growth of ZrB2 thin films by direct current magnetron sputtering is investigatedusing a high vacuum industrial scale deposition system and an ultra-high vacuum laboratory scalesystem. The films were grown from ZrB2 compound targets at temperatures ranging from ambient (without external heating) to 900 °C and with substrate biases from -20 to -120 V. Short deposition times of typically 100 or 300 s and high growth rates of 80-180 nm/min were emphasized to yield films with thicknesses of 300-400 nm. The films were characterized by thinfilm X-ray diffraction with the techniques θ/2θ and ω scans, pole figure measurements andreciprocal space mapping, scanning and transmission electron microscopy, elastic recoil detection analysis and four point probe measurements. The substrates applied were Si(100), Si(111),4H-SiC(0001) and GaN(0001) epilayers grown on 4H-SiC. The Si(111), 4H-SiC(0001) substrates and GaN(0001) epilayers were chosen given their small lattice mismatches to ZrB2 making them suitable for epitaxial growth.The films deposited in the industrial system were found to be close to stoichiometric with a low degree of contaminants, with O being the most abundant at a level of < 1 at.%. Furthermore, the structure of the films is temperature dependent as films deposited in this system without external heating are fiber textured with a 0001-orientation while the films deposited at 550 °C exhibitrandom orientation. In contrast, epitaxial growth was demonstrated in the laboratory scale system on etched 4H-SiC(0001) and Si(111) deposited at 900 °C following outgassing of the substrates at 300 °C and in-situ heat treatment at the applied growth temperature to remove the native oxides. However, films grown on GaN(0001) were found to be 0001 textured at the applied deposition conditions, which make further studies necessary to enable epitaxial growth on this substrate material. Four point probe measurements on the films deposited in the industrial system show typical resistivity values ranging from ˜95 to 200 μΩcm with a trend to lower values for the films deposited at higher temperatures and at higher substrate bias voltages.
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Meyer, Raphaël. "The advanced developments of the Smart Cut™ technology : fabrication of silicon thin wafers & silicon-on-something hetero-structures." Thesis, Lyon, 2016. http://www.theses.fr/2016LYSEI033/document.

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La thèse porte sur l’étude de la cinétique de Smart Cut™ dans du silicium après implantation hydrogène, pour des températures de recuit comprises entre 500°C et 1300°C. Ainsi, la cinétique de séparation de couches (splitting) est caractérisée en considérant des recuits dans un four à moufle ainsi que des recuits laser. Sur la base de cette caractérisation, un modèle physique, basé sur le comportement de l’hydrogène implanté durant le recuit, est proposé. Le modèle s’appuie sur des caractérisations SIMS de l’évolution de la concentration d’hydrogène durant le recuit, ainsi que sur des simulations numériques. Le modèle propose une explication aux propriétés des films obtenus en fonction des conditions de recuit et mesurées par microscopie optique, AFM ainsi que par des mesures des énergies d’interfaces. Sur la base du modèle de splitting obtenu, deux procédés de fabrication de films de silicium sont proposés pour l’élaboration de matériaux de silicium sur saphir et verre par recuit laser ainsi que pour l’élaboration de feuilles de silicium monocristallin par épitaxie en phase liquide sur substrat silicium implanté. L’étude de premier procédé prouve pour la première fois la possibilité d’appliquer le procédé Smart Cut™ sur des substrats de silicium implanté. Les films ainsi obtenus présentent des grandes surfaces de transfert (wafer de 200 mm), ce qui présente un grand intérêt industriel. L’étude propose différentes caractérisations des films obtenus (AFM, profilométrie optique, mesure 4 pointe). Le deuxième procédé est démontré en utilisant des bancs d’épitaxie en phase liquide de silicium (température supérieure à 1410°C) afin d’effectuer des dépôts sur des substrats de silicium implantés. Les films obtenus montrent un grand degré de croissance épitaxiale (jusqu’à 90% du film déposé mesuré par EBSD) et présentent une épaisseur aussi faible que 100 µm. D’autre part, le détachement par Smart Cut™ des films ainsi déposés est démontré
At first, the thesis studies the kinetics of Smart Cut™ in silicon implanted with hydrogen ions for annealing temperature in the range 500°C-1300°C. The kinetics is characterized by using a specially-dedicated furnace and by considering laser annealing. Based on the related characterization and observations, a physical model is established based on the behavior of implanted hydrogen during annealing. The model is strengthened by SIMS characterization focused on the evolution of hydrogen during annealing and on numerical calculations. Additionally, the model proposes an explanation for the properties of the obtained films as a function of the annealing conditions, based on optical microscope and AFM observations and bonding energy characterization. Based on this splitting model, two innovative processes for fabrication of silicon films are proposed. The first process allows to produce films of silicon on sapphire and films of silicon on glass by considering a laser annealing. The second produces foils of monocrystalline silicon by liquid phase epitaxial growth on implanted silicon substrate. The study of the first process proves for the first time the possibility to apply the Smart Cut™ for substrates of implanted silicon. The resulting films present large surface of transferred films (up to 200 mm wafers), which is very interesting in an industrial perspective. The study proposes different characterization of the films obtained by this process (AFM, optical profilometry and 4 probe measurement). The second process is demonstrated by using a chamber of liquid phase epitaxial growth of silicon (deposition temperature superior to 1410°C) in order to deposit liquid silicon on implanted silicon substrates. The obtained films show a high degree of epitaxial growth (up to 90% of the film as characterized by EBSD) and show a thickness as low as 100µm. Additionally the detachment by Smart Cut of the deposited films is demonstrated
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Ahmed, Fatema. "Structural properties and optical modelling of SiC thin films." University of the Western Cape, 2020. http://hdl.handle.net/11394/7284.

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>Magister Scientiae - MSc
Amorphous silicon carbide (a-SiC) is a versatile material due to its interesting mechanical, chemical and optical properties that make it a candidate for application in solar cell technology. As a-SiC stoichiometry can be tuned over a large range, consequently is its bandgap. In this thesis, amorphous silicon carbide thin films for solar cells application have been deposited by means of the electron-beam physical vapour deposition (e-beam PVD) technique and have been isochronally annealed at varying temperatures. The structural and optical properties of the films have been investigated by Fourier transform Infrared and Raman spectroscopies, X-ray diffraction, Scanning Electron Microscopy, Energy Dispersive X-ray Spectroscopy and UV-VIS-NIR spectroscopy. The effect of annealing is a gradual crystallization of the amorphous network of as-deposited silicon carbide films and consequently the microstructural and optical properties are altered. We showed that the microstructural changes of the as-deposited films depend on the annealing temperature. High temperature enhances the growth of Si and SiC nanocrystals in amorphous SiC matrix. Improved stoichiometry of SiC comes with high band gap of the material up to 2.53 eV which makes the films transparent to the visible radiation and thus they can be applied as window layer in solar cells.
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Books on the topic "Silicon Thin Film Technology"

1

(Society), SPIE, ed. Thin film solar technology III. Bellingham: SPIE, 2011.

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T, Voutsas Apostolos, IS & T--the Society for Imaging Science and Technology., and Society of Photo-optical Instrumentation Engineers., eds. Poly-silicon thin film transistor technology and applications in displays and other novel technology areas: 21-22 January, 2003, Santa Clara, California, USA. Bellingham, Wash: SPIE, 2003.

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Delahoy, Alan Edward. Thin film solar technology: 2-4 August 2009, San Diego, California, United States. Bellingham, Wash: SPIE, 2009.

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Delahoy, Alan Edward. Thin film solar technology: 2-4 August 2009, San Diego, California, United States. Edited by SPIE (Society). Bellingham, Wash: SPIE, 2009.

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Delahoy, Alan Edward. Thin film solar technology: 2-4 August 2009, San Diego, California, United States. Edited by SPIE (Society). Bellingham, Wash: SPIE, 2009.

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IEEE SOS/SOI Technology Conference. (1990 Key West, Fla.). 1990 IEEE SOS/SOI Technology Conference, October 2-4, 1990, Marriott's Casa, Marina Resort, Key West, Florida : proceedings. [New York: IEEE], 1990.

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name, No. Poly-silicon thin film transistor technology and applications in display and other novel technology areas: 21-22 January, 2003, Santa Clara, California, USA. Bellingham, WA: SPIE, 2003.

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(Society), SPIE, ed. Thin film solar technology II: 1-4 August 2010, San Diego, California, United States. Bellingham, Wash: SPIE, 2010.

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(Society), SPIE, ed. Thin film solar technology V: 25-26 August 2013, San Diego, California, United States. Bellingham, Washington: SPIE, 2013.

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Yukimi, Ichikawa, ed. Amorphous silicon p-i-n diodes: Their fabrication & application to thin film devices. Singapore: World Scientific, 1996.

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Book chapters on the topic "Silicon Thin Film Technology"

1

Wronski, Christopher R., and Nicolas Wyrsch. "Silicon Solar Cells silicon solar cell , Thin-film silicon solar cell thin-film." In Encyclopedia of Sustainability Science and Technology, 9240–92. New York, NY: Springer New York, 2012. http://dx.doi.org/10.1007/978-1-4419-0851-3_462.

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Brotherton, S. D. "Hydrogenated Amorphous Silicon TFT Technology and Architecture." In Introduction to Thin Film Transistors, 109–40. Heidelberg: Springer International Publishing, 2013. http://dx.doi.org/10.1007/978-3-319-00002-2_5.

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Brotherton, Stan D. "Polycrystalline Silicon Thin Film Transistors (Poly-Si TFTs)." In Handbook of Visual Display Technology, 911–42. Cham: Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-14346-0_48.

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Brotherton, Stan D. "Polycrystalline Silicon Thin Film Transistors (Poly-Si TFTs)." In Handbook of Visual Display Technology, 1–32. Berlin, Heidelberg: Springer Berlin Heidelberg, 2015. http://dx.doi.org/10.1007/978-3-642-35947-7_48-2.

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Brotherton, S. D. "Polycrystalline Silicon Thin Film Transistors (Poly-Si TFTs)." In Handbook of Visual Display Technology, 647–73. Berlin, Heidelberg: Springer Berlin Heidelberg, 2012. http://dx.doi.org/10.1007/978-3-540-79567-4_48.

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Tate, J., P. Berberich, W. Dietsche, and H. Kinder. "Superconducting Films of YBCO on Bare Silicon." In Science and Technology of Thin Film Superconductors, 347–52. Boston, MA: Springer US, 1989. http://dx.doi.org/10.1007/978-1-4684-5658-5_41.

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Flewitt, A. J. "Hydrogenated Amorphous Silicon Thin-Film Transistors (a-Si:H TFTs)." In Handbook of Visual Display Technology, 887–909. Cham: Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-14346-0_47.

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Flewitt, A. J. "Hydrogenated Amorphous Silicon Thin-Film Transistors (a-Si:H TFTs)." In Handbook of Visual Display Technology, 1–18. Berlin, Heidelberg: Springer Berlin Heidelberg, 2014. http://dx.doi.org/10.1007/978-3-642-35947-7_47-2.

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Flewitt, A. J. "Hydrogenated Amorphous Silicon Thin Film Transistors (a Si:H TFTs)." In Handbook of Visual Display Technology, 627–46. Berlin, Heidelberg: Springer Berlin Heidelberg, 2012. http://dx.doi.org/10.1007/978-3-540-79567-4_47.

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Martins, Rodrigo, and Elvira Fortunato. "Thin Film Position Sensitive Detectors: From 1D to 3D Applications." In Technology and Applications of Amorphous Silicon, 342–403. Berlin, Heidelberg: Springer Berlin Heidelberg, 2000. http://dx.doi.org/10.1007/978-3-662-04141-3_8.

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Conference papers on the topic "Silicon Thin Film Technology"

1

Ray, Swati. "Nanocrystalline silicon based thin film solar cells." In INDIAN VACUUM SOCIETY SYMPOSIUM ON THIN FILMS: SCIENCE AND TECHNOLOGY. AIP, 2012. http://dx.doi.org/10.1063/1.4732361.

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Supadech, J., E. Ratanaudomphisut, C. Hruanun, and A. Poyai. "Characteristics of silicon thin film thermistors." In 2008 5th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology (ECTI-CON). IEEE, 2008. http://dx.doi.org/10.1109/ecticon.2008.4600564.

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Despeisse, M., C. Ballif, A. Feltrin, F. Meillaud, S. Fay, F. J. Haug, D. Dominé, et al. "Research and developments in thin-film silicon photovoltaics." In SPIE Solar Energy + Technology, edited by Alan E. Delahoy and Louay A. Eldada. SPIE, 2009. http://dx.doi.org/10.1117/12.826232.

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van Swaaij, Rene A. C. M. M., Arno H. M. Smets, and Miro Zeman. "Thin-film silicon technology for highly-efficient solar cells." In 2012 IEEE Bipolar/BiCMOS Circuits and Technology Meeting - BCTM. IEEE, 2012. http://dx.doi.org/10.1109/bctm.2012.6352634.

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Mitsuhiko Ogihara, Tomohiko Sagimori, Masataka Mutoh, Takahito Suzuki, Tomoki Igari, Hironori Furuta, Yuusuke Nakai, et al. "1200dpi thin film LED array by silicon photonics technology." In 2008 58th Electronic Components and Technology Conference (ECTC 2008). IEEE, 2008. http://dx.doi.org/10.1109/ectc.2008.4550060.

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Slaoui, Abdelilah, Amartya Chowdhury, Pathi Prathap, Zabardjade Said-Bacar, Armel Bahouka, and Frederic Mermet. "Laser processing for thin film crystalline silicon solar cells." In SPIE Solar Energy + Technology, edited by Edward W. Reutzel. SPIE, 2012. http://dx.doi.org/10.1117/12.929208.

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Botula, A., A. Joseph, J. Slinkman, R. Wolf, Z. X. He, D. Ioannou, L. Wagner, et al. "A Thin-Film SOI 180nm CMOS RF Switch Technology." In 2009 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF). IEEE, 2009. http://dx.doi.org/10.1109/smic.2009.4770522.

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Srikanth, G., B. S. Kariyappa, and B. V. Uma. "Parametric analysis of amorphous silicon thin film transistors." In 2016 IEEE International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT). IEEE, 2016. http://dx.doi.org/10.1109/rteict.2016.7808111.

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Khaleque, Tanzina, and Robert Magnusson. "Experiments with resonant thin-film hydrogenated amorphous silicon solar cells." In SPIE Solar Energy + Technology, edited by Louay A. Eldada. SPIE, 2012. http://dx.doi.org/10.1117/12.929798.

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Zhao, Hui, E. A. Schiff, L. Sivec, J. Yang, and S. Guha. "Light trapping in thin film silicon solar cells: an assessment." In SPIE Solar Energy + Technology, edited by Louay A. Eldada. SPIE, 2011. http://dx.doi.org/10.1117/12.893619.

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Reports on the topic "Silicon Thin Film Technology"

1

McCarthy, A. M. Application of a novel silicon thin-film transfer technology to a liquid crystal display. Office of Scientific and Technical Information (OSTI), February 1997. http://dx.doi.org/10.2172/469634.

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Sopori, B. Development of Commercial Technology for Thin Film Silicon Solar Cells on Glass: Cooperative Research and Development Final Report, CRADA Number CRD-07-209. Office of Scientific and Technical Information (OSTI), March 2013. http://dx.doi.org/10.2172/1073526.

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Martin U. Pralle and James E. Carey. Black Silicon Enhanced Thin Film Silicon Photovoltaic Devices. Office of Scientific and Technical Information (OSTI), July 2010. http://dx.doi.org/10.2172/984305.

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Irene, Eugene A. Silicon Oxidation Studies on Thin Film Silicon Oxidation Formation. Fort Belvoir, VA: Defense Technical Information Center, March 1989. http://dx.doi.org/10.21236/ada206835.

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Benziger, Jay B. Surface Intermediates in Thin Film Deposition on Silicon. Fort Belvoir, VA: Defense Technical Information Center, August 1989. http://dx.doi.org/10.21236/ada216662.

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Keyes, Brian. National solar technology roadmap: Film-silicon PV. Office of Scientific and Technical Information (OSTI), June 2007. http://dx.doi.org/10.2172/1217298.

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Ekerdt, John G. Silicon and Germanium Thin Film Chemical Vapor Deposition, Modeling and Control. Fort Belvoir, VA: Defense Technical Information Center, April 2002. http://dx.doi.org/10.21236/ada417307.

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8

Tarrant, D. E., and R. R. Gay. Thin-film photovoltaic partnership -- CIS-based thin film PV technology: Final technical report, September 1995--December 1998. Office of Scientific and Technical Information (OSTI), October 1999. http://dx.doi.org/10.2172/752655.

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Sachs, Emanuel, and Tonio Buonassisi. Thin, High Lifetime Silicon Wafers with No Sawing; Re-crystallization in a Thin Film Capsule. Office of Scientific and Technical Information (OSTI), January 2013. http://dx.doi.org/10.2172/1060193.

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Badzian, Andrzej, and Gennady Gildenblat. Development of Thin Film Diamond Based Integrated Circuit Technology. Fort Belvoir, VA: Defense Technical Information Center, December 1994. http://dx.doi.org/10.21236/ada294519.

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