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Langelaar, Johannes, Mattsson Adam Strömme, and Filip Natvig. "Development of real time audio equalizer application using MATLAB App Designer." Thesis, Uppsala universitet, Signaler och System, 2019. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-388577.
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This paper outlines the design of a high-precision graphic audio equalizer with digital filters in parallel, along with its implementation in MATLAB App Designer. The equalizer is comprised of 31 bands separated with a one-third octave frequency ratio, and its frequency response is controlled by 63 filters. Furthermore, the application can process audio signals, in real time, recorded by microphone and from audio files. While processing, it displays an FFT plot of the output sound, also in real time, equipped with a knob by which the refreshing pace can be adjusted. The actual frequency response proved to match the desired one accurately, but the matching is computationally demanding for the computer. An even higher accuracy would entail a computational complexity beyond the power of ordinary computers, and was thus concluded to be inappropriate. As a result, the final application manages to provide most laptops with both high precision and proper functionality.
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Singh, Simranjit, and Iliass Temsamani. "Analys av åtgärder mot kvalitetsbrister inom signalprojektering." Thesis, KTH, Hållbar produktionsutveckling (ML), 2021. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-297913.
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Signalprojekteringen konstruerar och skapar de förutsättningar som krävs för att en signalbygghandling ska färdigställas. Vid förändringar som exempelvis upprustningar, projekteras de signalställverk som finns placerade längs Sveriges järnvägar för att sedan byggas av entreprenader. Projekteringen är en grund för att skapa rätt förutsättningar för att genomföra ett kvalitativt bygge. Trafikverket har märkt av kvalitetsbrister inom signalprojekteringen, som har flertal orsaker men mycket pekar mot en brist på kompetens. Trafikverket har sedan 2019 infört nya kompetenskrav för sina upphandlingar med konsulter, som ska säkerställa att arbetet genomförs med rätt teknisk kompetens. Uppgiften är att undersöka om Trafikverkets nya kompetenskrav används, följs upp och om de åstadkommit en effekt samt om kravskrivningen bör justeras och åtgärder för främja kompetens, framföras. Examensarbetet genomförande bygger främst på datainsamling genom intervjuer och enkäter. Resultatet av detta projekt fastställde att kompetenskraven inte gett någon tydlig effekt i kvalitetsnivån. Mycket beror på att det är för tidigt för en utvärdering, då järnvägsprojekt har långa ledtider men också på andra faktorer. Kompetenskraven uppskattas men kravskrivning bör justeras för att bli tydligare. De åtgärder som ansågs mest lämpliga var återkoppling till projektör, eget forum för projektörer, anläggningsspecifika kurser och mentormöjligheter till oerfarna projektörer. En åtgärd som kan motverka mycket med kvalitetsbrister som nämns i projektet är mervärdesupphandlingar. Mervärdesupphandling medför möjligheter som att kravställa mjuka kriterier som exempelvis erfarenhet och utbildningar och motverkar de negativa effekter men den nuvarande upphandlingsformen på lägst pris.<br>Signal designing means construction and modelling of railway signal facilities. Changes within the railway leads to modelling being made where the adequate prerequisites for a functioning facility are drawn by using CAD or BIM. Trafikverket have noticed various of quality deficiencies within the modelling phase of their facilities. It is mainly due to a lack of technical competence for the signal designers. Since 2019, Trafikverket have implemented new requirements for competence during their negotiations with consulting firms that conduct the designs, as a countermeasure for these quality deficiencies within competence. However, the effect of these countermeasures is still unknown. The objective for this project is to examine if the new requirements are used in the projects, if they are followed-up and if there are any effects from them. Moreover, to conclude if the requirements should be adjusted and if there are valid measures to increase the development of competence for signal designers. The methodology of the project is mostly based on interviews with specialists and analyses of the results. The result concluded that there is no definite effect of the competence requirements, mostly due to the length (time) of railway related projects. Furthermore, the competence requirements are appreciated by Trafikverkets employees however, it should be adjusted to be more definite. The best countermeasures are feedback to signal designers and followed by other countermeasure such as an own forum, more specific facility courses (education) and mentors for signal designers. A new form of negotiation which is called the “More value negotiation” is also a method of countering quality deficiencies.
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Khomentrakarn, Chusak. "Testability analysis of asynchronous circuits designed from signal transition graphs." Thesis, McGill University, 1995. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=22657.
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This work investigates testability of asynchronous circuits and its relation with signal transition graphs (STGs), using a state based approach on non-scan asynchronous circuits. In addition to the testability characteristics studied, this work suggests some test generation techniques for asynchronous circuits designed from STGS.<br>An event fault, interpreted as either a stimulating fault or an inhibiting fault of a transition, is used to cover the stuck-at-fault (SAF) behavior of an asynchronous circuit. An advantage of such analysis is that test vectors for an inhibiting fault can be obtained from operations on a signal transition graph (STG) or a state graph (SG) rather than simulation at the circuit level. A test vector for a test state is represented in an STG by a test marking for each event fault.<br>The lock relation of signals is a property proposed for hazard-free asynchronous circuit's synthesis. However, it is found that there is a special case of the lock relation that can prohibit the testing of some faults, the introduction of which cannot be avoided by the circuit level mapping. Some independent undetectable faults due to uncontrollable test states however can be detected if the reset state is the test state.<br>Using a minimized two-level sum-of-products representation, each literal in a cube of the sum-of-products form is found to have its own function corresponding to the STG. Consequently, four types of literals are defined and their relations with the SAF behavior over the stimulating/inhibiting fault are analyzed. Although factorization of a logic equation binded to a C-element or a set-reset (SR) flip-flop is not always possible, a correct implementation on a set-dominant SR flip-flop is guaranteed. (Abstract shortened by UMI.)
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Tarnoff, David. "Episode 1.3 – Anatomy of a Binary Signal." Digital Commons @ East Tennessee State University, 2020. https://dc.etsu.edu/computer-organization-design-oer/5.
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In this episode, we define the components of a single binary signal as its value changes over time. This will provide us with a starting point for the terminology we will be using throughout the rest of the series.
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Rajroop, Peter J. "Fast pulse interactions on a transmission system : a novel EMP measuring technique using new designed loop probes." Thesis, City University London, 1995. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.307875.
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Awad, E. T. A. "Identification of competencies for sign designers in Jordan." Thesis, Coventry University, 2012. http://curve.coventry.ac.uk/open/items/b27d73c7-71a7-4c87-9e65-ae3a074ddd63/1.
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The aim of this research is to propose ways in which graphic designers can improve the design of commercial signage in Amman, Jordan. A survey of the effectiveness of recent signage regulation in the type and placement of commercial signage has led to the conclusion that regulations alone will not lead to improved quality in the production and siting of commercial signage without multi-stakeholder involvement and the dedicated training of those working in this field. There is a need for practitioners to develop specialised skills and knowledge in sign design, as opposed to applying only generalised graphic design techniques to sign production. Such skills include problem-solving, visual communication methods and competency in the application of the latest multi-media technology. It is proposed that by developing and incorporating sign-design competencies within the graphic design curriculum, practitioners will be better able to work effectively in this field. Following the investigation of the situation in Amman with respect to commercial signage, four related investigations were undertaken in order to formulate a list of recommendations which could be incorporated into an improved curriculum for teaching sign design. The first study investigated the problems caused by poorly designed and situated commercial signage in Amman. The second and third studies investigated urban signage solutions adopted by companies in other parts of the world, namely the global marketing of the McDonald’s brand and the corporate signage of Coventry University UK. The final study was a comparative investigation of graphic design education (with respect to sign design) in Jordan and the UK. Following these investigations, the Delphi technique was employed to elicit a set of 25 competencies for sign design learners, recommended by an expert panel of sign industry professionals and design academics. It is anticipated that the incorporation of such competencies will contribute to the improvements within the sign industry, as designers become better equipped for the task of sign design. Therefore it is anticipated that this research will contribute to the furthering of design practice by identifying the additional knowledge and competencies that graphic designers need to create appropriate commercial signs.
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Shariat, Yazdi Ramin. "Mixed signal design flow, a mixed signal PLL case study." Thesis, University of Waterloo, 2001. http://hdl.handle.net/10012/916.
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Mixed-signal designs are becoming more and more complex every day. In order to adapt to the new market requirements, a formal process for design and verification of mixed signal systems i. e. top-down design and bottom-up verification methodology is required. This methodology has already been established for digital design. The goal of this research is to propose a new design methodology for mixed signal systems. In the first two chapters of this thesis, the need for a mixed signal design flow based on top-down design methodology will be discussed. The proposed design flow is based on behavioral modeling of the mixed signal system using one of the mixed signal behavioral modeling languages. These models can be used for design and verification through different steps of the design from system level modeling to final physical design. The other advantage of the proposed flow is analog and digital co-design. In the remaining chapters of this thesis, the proposed design flow was verified by designing an 800 MHz mixed signal PLL. The PLL uses a charge pump phase frequency detector, a single capacitor loop filter, and a feed forward error correction architecture using an active damping control circuit instead of passive resistor in loop filter. The design was done in 0. 18- <i>µ</i> m CMOS process technology.
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Tarnoff, David. "Episode 2.7 – The Effect of Sampling Rates on Digital Signals." Digital Commons @ East Tennessee State University, 2020. https://dc.etsu.edu/computer-organization-design-oer/13.
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Converting an analog signal to digital involves more than just digitizing some measurements. Consequences result from sampling an analog signal and care has to be taken to capture all the desired frequencies and avoid creating new ones.
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Spalding, Scott A. Jr. "Adaptive OFDM Radar Signal Design." Miami University / OhioLINK, 2012. http://rave.ohiolink.edu/etdc/view?acc_num=miami1335728143.
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Srivastava, Y. "Large signal modelling of coupled-cavity travelling wave tubes." Thesis, Lancaster University, 1987. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.379740.
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Raghavan, Arvind. "Bipolar large-signal modeling and power amplifier design." Diss., Georgia Institute of Technology, 2003. http://hdl.handle.net/1853/13294.
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Fairweather, Andrew James. "State-of-Health (SoH) and State-of-Charge (SoC) determination in electrochemical batteries and cells using designed perturbation signals." Thesis, University of Sheffield, 2015. http://etheses.whiterose.ac.uk/9156/.
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Ng, Chiu-wa, and 吳潮華. "Bit-stream signal processing on FPGA." Thesis, The University of Hong Kong (Pokfulam, Hong Kong), 2009. http://hub.hku.hk/bib/B41633842.
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SAMPATH, HEMANTH KUMAR. "A MODULE GENERATION ENVIRONMENT FOR MIXED-SIGNAL CIRCUITS." University of Cincinnati / OhioLINK, 2003. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1052321882.
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Li, Weishuang. "Optimum Signal Design in UWB Communications." Thesis, Linnéuniversitetet, Institutionen för fysik och elektroteknik (IFE), 2018. http://urn.kb.se/resolve?urn=urn:nbn:se:lnu:diva-78946.
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Lindsay, Iain Andrew Blair. "A signal constellation and carrier recovery technique for voice-band modems." Thesis, University of Edinburgh, 1986. http://hdl.handle.net/1842/15216.
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Ortega, Espluga Lorenzo. "Signal optimization for Galileo evolution." Thesis, Toulouse, INPT, 2019. http://www.theses.fr/2019INPT0118.
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Les systèmes mondiaux de navigation par satellite (GNSS) sont de plus en plus présents dansnotre vie quotidienne. Des nouveaux utilisateurs émergent avec des besoins opérationnelssupplémentaires, ce qui implique une évolution constante des systèmes de navigation actuels.Dans le cadre de Galileo (système GNSS européen) et en particulier dans Galileo E1 OpenService (OS), l’addition d’un nouveau signal d’acquisition pourrait contribuer à améliorer larésilience dans la phase d’acquisition et à réduire le temps pour géo-localiser notre récepteur(TTFF). La conception d'un nouveau signal GNSS est toujours un compromis entre plusieursfigures de mérite. Les plus pertinents sont la précision de la position, la sensibilité de récepteur etle TTFF. Cependant, si l’on considère que la phase d’acquisition du signal le principal objectif, lasensibilité et le TTFF ont une pertinence plus grande. Compte tenu de ce qui précède, dans cettethèse, il est présenté la conception conjointe d'un signal GNSS avec la structure de message afinde proposer un nouveau signal Galileo de deuxième génération, qui offre bonne sensibilité derécepteur ainsi que une réduction dans le TTFF. Plusieurs aspects ont été abordés afin deconcevoir la nouvelle composante de signal. Premièrement, la définition de la modulation doitprendre en compte la compatibilité des fréquences radioélectriques afin de provoquer un niveaude brouillage acceptable dans la bande. De plus, la modulation devrait fournir de bonnespropriétés de corrélation et une bonne résistance contre les multi trajets afin d'améliorer lasensibilité du récepteur. Deuxièmement, le choix du nouveau code PRN est également crucialpour faciliter la phase d’acquisition. Un critère de modélisation basé sur une fonction de coûtpondéré est utilisé pour évaluer la performance des codes PRN. Cette fonction de coût considèredifférent facteurs telles que l'autocorrélation, la corrélation croisée et la densité spectrale depuissance. Troisièmement, une conception conjointe entre la structure de message et le schémade codage de canal peut fournir à la fois une réduction du TTFF et une amélioration de larésilience des données décodées. Alors, une nouvelle méthode de conception de la structure demessage et du schéma de codage de canal pour le nouveau signal est proposée. Cette méthodefournit les instructions pour concevoir une structure de message dont le schéma de codage decanal est caractérisé pour les propriétés full diversity, maximum distance separable et ratecompatibility. Le codage de canal est essentiel pour améliorer les performances de démodulationde données, en particulier dans les environnements très obstrué ou avec d’interférences.Cependant, ce processus peut être très sensible au calcul correct de l'entrée du décodeur. Desaméliorations significatives ont été obtenues en considérant «soft » décodeurs, via le calcul deslog-likelihood ratio (LLR). Malheureusement, la connaissance complète des informations d'état ducanal (CSI) était généralement prise en compte, ce qui est rarement le cas dans des scénariosréels. Dans cette thèse, nous fournissons de nouvelles méthodes pour calculer desapproximations linéaires du LLR, sous les canaux de fading et interférence, en considérantcertaine information statistique sur le CSI. Finalement, transmettre un nouveau signal dans lamême fréquence porteuse et en utilisant le même amplificateur de puissance (HPA) génère descontraintes dans les méthodes de multiplexage, car une enveloppe constante ou quasi constanteest nécessaire pour réduire les distorsions non linéaires. Également, la conception dumultiplexage devrait offrir une efficacité énergétique élevée afin de ne pas gaspiller l'énergietransmis du satellite. Considérant le précédent, dans cette thèse, nous évaluons différentesméthodes de multiplexage, qui cherchent l’intégration de un nouveau signal binaire dans la bandeGalileo E1<br>Global Navigation Satellite System (GNSS) are present in our daily lives. Moreover, new users areemerging with further operation needs involving a constant evolution of the current navigationsystems. In the current framework of Galileo (GNSS European system) and especially within theGalileo E1 Open Service (OS), adding a new acquisition aiding signal could contribute to providehigher resilience at the acquisition phase, as well as to reduce the time to first fix (TTFF).Designing a new GNSS signal is always a trade-off between several performance figures of merit.The most relevant are the position accuracy, the sensitivity and the TTFF. However, if oneconsiders that the signal acquisition phase is the goal to design, the sensitivity and the TTFF havea higher relevance. Considering that, in this thesis it is presented the joint design of a GNSS signaland the message structure to propose a new Galileo 2nd generation signal, which provides ahigher sensitivity in the receiver and reduce the TTFF. Several aspects have been addressed inorder to design a new signal component. Firstly, the spreading modulation definition must considerthe radio frequency compatibility in order to cause acceptable level of interference inside the band.Moreover, the spreading modulation should provide good correlation properties and goodresistance against the multipath in order to enhance the receiver sensitivity and to reduce theTTFF. Secondly, the choice of the new PRN code is also crucial in order to ease the acquisitionphase. A simple model criterion based on a weighted cost function is used to evaluate the PRNcodes performance. This weighted cost function takes into account different figures of merit suchas the autocorrelation, the cross-correlation and the power spectral density. Thirdly, the design ofthe channel coding scheme is always connected with the structure of the message. A joint designbetween the message structure and the channel coding scheme can provide both, reducing theTTFF and an enhancement of the resilience of the decoded data. In this this, a new method to codesign the message structure and the channel coding scheme for the new G2G signal isproposed. This method provides the guideline to design a message structure whose the channelcoding scheme is characterized by the full diversity, the Maximum Distance Separable (MDS) andthe rate compatible properties. The channel coding is essential in order to enhance the datademodulation performance, especially in harsh environments. However, this process can be verysensitive to the correct computation of the decoder input. Significant improvements were obtainedby considering soft inputs channel decoders, through the Log Likelihood Ratio LLRs computation.However, the complete knowledge of the channel state information (CSI) was usually considered,which it is infrequently in real scenarios. In this thesis, we provide new methods to compute LLRlinear approximations, under the jamming and the block fading channels, considering somestatistical CSI. Finally, to transmit a new signal in the same carrier frequency and using the sameHigh Power Amplifier (HPA) generates constraints in the multiplexing design, since a constant orquasi constant envelope is needed in order to decrease the non-linear distortions. Moreover, themultiplexing design should provide high power efficiency to not waste the transmitted satellitepower. Considering the precedent, in this thesis, we evaluate different multiplexing methods,which search to integrate a new binary signal in the Galileo E1 band while enhancing thetransmitted power efficiency. Besides that, even if the work is focused on the Galileo E1, many ofthe concepts and methodologies can be easily extended to any GNSS signal
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Wu, Pan. "The Design of High-Frequency Continuous-Time Integrated Analog Signal Processing Circuits." PDXScholar, 1993. https://pdxscholar.library.pdx.edu/open_access_etds/1162.
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High-performance, high-frequency operational transconductance amplifiers (OTAs) are very important elements in the design of high-frequency continuous-time integrated analog signal processing circuits, because resistors, inductors, integrators, mutators, buffers, multipliers, and filters can be built by OTAs and capacitors. The critical considerations for OTA design are linearity, tuning, frequency response, output impedance, power supply rejection (PSR) and common-mode rejection (CMR). For linearity considerations, two different methods are proposed. One uses cross-coupled pairs (CMOS or NMOS), producing OTAs with very high linearity but either the input range is relatively small or the CMR to asymmetrical inputs is poor. Another employs multiple differential pairs (current addition or subtraction), producing OTAs with high linearity over a very large input range. So, there are tradeoffs among the critical considerations. For different applications, different OTAs should be selected. For consideration of frequency response, the first reported GaAs OTA was designed for achieving very-high-frequency performance, instead of using AC compensation techniques. GaAs is one of the fastest available technologies, but it was new and less mature than silicon when we started the design in 1989. So, there were several issues, such as low output impedance, no P-channel devices, and Schottky clamp. To overcome these problems, new techniques are proposed, and the designed OTA has comparable performance to a CMOS OTA. For PSR and CMR considerations, a fully balanced circuit structure is employed with a common-mode feedback (CMF) circuit used to stabilize the DC output voltages. To reduce the interaction of the operation of CMF and tuning of OTAs, three improved versions of the CMF circuits used in operational amplifiers are proposed. With the designed OTAs, a I GHz GaAs inductor with small parasitics is designed using the proposed procedure to reduce high-frequency effects. Two CMOS high-order, high-frequency filters are designed: one in cascade structure and one in LC ladder form. Also, a 200 MHz third-order elliptic GaAs filter is designed with special consideration of very-high-frequency parasitics. All circuits were fabricated and measured. The experimental results were used to verify the designs.
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Binder, Bernd. "Design principles and control mechanisms of signal transduction networks." Doctoral thesis, [S.l. : s.n.], 2005. http://deposit.ddb.de/cgi-bin/dokserv?idn=975655868.
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Proper, Ethan R. (Ethan Richard). "Automated classification of power signals." Thesis, Massachusetts Institute of Technology, 2008. http://hdl.handle.net/1721.1/44842.
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Thesis (Nav. E.)--Massachusetts Institute of Technology, Dept. of Mechanical Engineering; and, (S.M.)--Massachusetts Institute of Technology, System Design and Management Program, 2008.<br>Includes bibliographical references (p. 106-107).<br>The Non-Intrusive Load Monitor (NILM) is a device that utilizes voltage and current measurements to monitor an entire system from a single reference point. The NILM and associated software convert the V/I signal to spectral power envelopes that can be searched to determine when a transient occurs. The identification of this signal can then be determined by an expert classifier and a series of these classifications can be used to diagnose system failures or improper operation. Current NILM research conducted at Massachusetts Institute of Technology's Laboratory for Electromagnetic and Electronic Systems (LEES) is exploring the application and expansion of NILM technology for the use of monitoring shipboard systems. This thesis presents the ginzu application that implements a detect-classify-verify loop that locates the indexes of transients, identifies them using a decision-tree based expert classifier, and then generates a summary event file containing relevant information. The ginzu application provides a command-line interface between streaming preprocessed power data (PREP) and an included graphical user interface. This software was developed using thousands of hours of archived data from the Coast Guard Cutters ESCANABA (WMEC-907) and SENECA (WMEC-906). A validation of software effectiveness was conducted as the software was installed onboard ESCANABA.<br>by Ethan R. Proper.<br>S.M.<br>Nav.E.
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Bordelon, John H. "A large-signal model for the RF power MOSFET." Diss., Georgia Institute of Technology, 1999. http://hdl.handle.net/1853/15048.
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Crook, Alex, and Gregory Kissinger. "Using COTS Graphics Processing Units in Signal Analysis Workstations." International Foundation for Telemetering, 2011. http://hdl.handle.net/10150/595798.
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ITC/USA 2011 Conference Proceedings / The Forty-Seventh Annual International Telemetering Conference and Technical Exhibition / October 24-27, 2011 / Bally's Las Vegas, Las Vegas, Nevada<br>Commercial off-the-shelf (COTS) graphics processing units (GPU) perform the signal processing operations needed for video games and similar consumer applications. The high volume and competitive nature of that industry have produced inexpensive GPUs with impressive amounts of signal processing power. These devices use parallel processing architectures to execute DSP algorithms far faster than single, or even multi-core central processing units typically found in workstations. This paper describes a project which improves the performance of a radar telemetry application using the NVidia™ brand GPU and CUDA™ software, although the results could be extended to other devices.
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Persson, Per. "Annealing Based Optimization Methods for Signal Processing Applications." Doctoral thesis, Ronneby : Department of Telecommunications and Signal Processing, Blekinge Institute of Technology, 2003. http://www.bth.se/fou/forskinfo.nsf/01f1d3898cbbd490c12568160037fb62/da44274e9f86a54ec1256d260044e0dd!OpenDocument.
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You, Qihua. "Development of fluorescent chemosensors based on different signal transduction mechanisms." HKBU Institutional Repository, 2014. https://repository.hkbu.edu.hk/etd_oa/95.
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A series of fluorescent probes based on different signal transduction mechanisms for the detection of Fe3+, Zn2+, histidine and pH was designed and synthesized. Their photophysical properties, binding abilities and the further application in cell imaging were fully evaluated. Building on the groundwork of our previous study, molecular scaffold 19 has been appended to spirobenzopyran fluorophore to furnish a highly selective and sensitive Zn2+ sensor. To broaden the application scope of this trifunctional receptive molecule, 19 was incorporated onto rhodamine, antipyrine and coumarin moieties to give 20, 21 and 23, respectively. Probe 20 operative on a chelation-enhanced fluorescence mechanism exhibited highly selective response to Fe3+ with 2:1 stoichiometry of 20-Fe3+ complex. However, a possible tendency of probe 20 to hydrolyze induced by Fe3+ and the unsuccessful attempt of cell imaging would limit its application scope. Probe 21 with O-N-N-N-N-ligand showed a highly selective and sensitive detection of Zn2+. The probe displayed suppressed response to Cd2+ which is the most common interference ion in zinc metal detection. The binding of Zn2+ to probe 21 inhibited the photoinduced electron transfer process originating from the lone pair of the nitrogen atom in the antipyrine moiety to quinoline fluorophore. Therefore, a turn-on fluorescent probe was developed. A moderate binding constant with 1:1 stoichiometry of 21-Zn2+ complex was established by fluorescence titration. The binding mechanism was fully explained by 1H NMR titration. To our delight, probe 21 was successfully applied for recognizing Zn2+ in living cells. The preparation of probe 23 was achieved by appendage of 19 to coumarin derived fluorophore and the probe exhibited a good selectivity and fluorescent turn-off property to Cu2+. The 1:1 stoichiometry of 23-Cu2+ ensemble can serve as an efficient probe for the detection of histidine and biothiols. In the presence of NEM, the influence of biothiols could be eliminated. Furthermore, this sensing ensemble was also used in the detection of histidine in hard-to-transfect U87MG cells with very low cytotoxicity. Based on our group’s previous work on the spiropyran platform, a novel ratiometric near-infrared pH probe 27 operating on an excited-state intramolecular electron transfer mechanism was developed. The pKa was calculated to be 5.9 and the ring-opening/ring-closing mechanism triggered by protons was reasonably explained by 1H NMR titration. However, this spiropyran-based probe was found to be unsuitable for cell imaging. To continue the innovation of pH sensing and extend its application in bioimaging, a series of ratiometric pH probes 32 and 38 characterized by their high quantum yield working in the NIR range was developed. The appendage of N,O-disubstituted hemiaminal ether moiety onto coumarin fluorophore with C=C double bond conferred the sensory material with the ability to display a pH-dependent ratiometric output operating on the ring-opening/ring-closing mechanism. The pKa of 32 and 38 were 6.9 and 5.8 – 6.0, respectively, which rendered them suitable for pH measurement in near-neutral and acidic media. A preliminary work of intracellular pH measurement was also conducted and promising results were obtained
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Björk, Marcus. "Contributions to Signal Processing for MRI." Doctoral thesis, Uppsala universitet, Avdelningen för systemteknik, 2015. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-246537.
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Magnetic Resonance Imaging (MRI) is an important diagnostic tool for imaging soft tissue without the use of ionizing radiation. Moreover, through advanced signal processing, MRI can provide more than just anatomical information, such as estimates of tissue-specific physical properties. Signal processing lies at the very core of the MRI process, which involves input design, information encoding, image reconstruction, and advanced filtering. Based on signal modeling and estimation, it is possible to further improve the images, reduce artifacts, mitigate noise, and obtain quantitative tissue information. In quantitative MRI, different physical quantities are estimated from a set of collected images. The optimization problems solved are typically nonlinear, and require intelligent and application-specific algorithms to avoid suboptimal local minima. This thesis presents several methods for efficiently solving different parameter estimation problems in MRI, such as multi-component T2 relaxometry, temporal phase correction of complex-valued data, and minimizing banding artifacts due to field inhomogeneity. The performance of the proposed algorithms is evaluated using both simulation and in-vivo data. The results show improvements over previous approaches, while maintaining a relatively low computational complexity. Using new and improved estimation methods enables better tissue characterization and diagnosis. Furthermore, a sequence design problem is treated, where the radio-frequency excitation is optimized to minimize image artifacts when using amplifiers of limited quality. In turn, obtaining higher fidelity images enables improved diagnosis, and can increase the estimation accuracy in quantitative MRI.
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Fisher, John Sheridan. "Application of model driven architecture design methodologies to mixed-signal system design projects." Columbus, Ohio : Ohio State University, 2006. http://rave.ohiolink.edu/etdc/view?acc%5Fnum=osu1143218375.
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Browne, Jefferson Andrew. "A 2.5-D large-signal gain coupled-cavity travelling-wave tube model." Thesis, Lancaster University, 1997. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.322520.
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Chiang, Tony. "Design and Evaluation of a Discrete Wavelet Transform Based Multi-Signal Receiver." Wright State University / OhioLINK, 2006. http://rave.ohiolink.edu/etdc/view?acc_num=wright1152297283.
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Fayed, Ayman Adel. "Adaptive techniques for analog and mixed signal integrated circuits." Connect to this title online, 2004. http://rave.ohiolink.edu/etdc/view?acc%5Fnum=osu1097519730.
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Thesis (Ph. D.)--Ohio State University, 2004.<br>Title from first page of PDF file. Document formatted into pages; contains xix, 232 p.; also includes graphics (some col.). Includes bibliographical references (p. 222-230).
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Thakur, Ravi Bhushan. "Low power design implementation of a signal acquisition module." Thesis, Kansas State University, 2010. http://hdl.handle.net/2097/4617.
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Master of Science<br>Department of Electrical and Computer Engineering<br>Don M. Gruenbacher<br>As semiconductor technologies advance, the smallest feature sizes that can be fabricated get smaller. This has led to the development of high density FPGAs capable of supporting high clock speeds, which allows for the implementation of larger more complex designs on a single chip. Over the past decade the technology market has shifted toward mobile devices with low power consumption at or near the top of design considerations. By reducing power consumption in FPGAs we can achieve greater reliability, lower cooling cost, simpler power supply and delivery, and longer battery life.
In this thesis, FPGA technology is discussed for the design and commercial implementation of low power systems as compared to ASICs or microprocessors, and a few techniques are suggested for lowering power consumption in FPGA designs. The objective of this research is to implement some of these approaches and attempt to design a low power signal acquisition module.
Designing for low power consumption without compromising performance requires a power-efficient FPGA architecture and good design practices to leverage the architectural features. With various power conservation techniques suggested for every stage of the FPGA design flow, the following approach was used in the design process implementation: the switching activity is addressed in the design entry, and synthesis level and software tools are utilized to get an initial estimate of and optimize the design’s power consumption. Finally, the device choice is made based on its features that will enhance the optimization achieved in the previous stages; it is configured and real time board level power measurements are made to verify the implementation’s efficacy
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Rucker, Paul D. "A reliability comparison of recessed-gate and self-aligned gate small signal GaAs MESFETS utilizing an accelerated life test set designed for large scale automated testing." Thesis, Virginia Polytechnic Institute and State University, 1987. http://hdl.handle.net/10919/71231.
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A large scale automated test set was designed and built to address the varied accelerated life test requirements of the GaAs industry. GaAs low-noise/small-signal MESFETs with 1 x 300 micron gate peripheries and 3 different gate structures were subjected to a 1000 hour high temperature storage test:
1) to compare the reliability performance and manufacturability of
a) recessed-gate MESFETs with TiPdAu gates
b) realigned self-aligned gate (RSAG) MESFETs with TiWN<sub>x</sub> Schottky and TiPdAu overlay
c) planarized self-aligned gate (PSAG) MESFETs with TiWN<sub>x</sub> Schottky and TiPdAu overlay.
2) to study the changes in I<sub>dss</sub>, R<sub>g</sub>, R<sub>o</sub>, g<sub>m</sub>, and V<sub>p</sub> over time and their effects upon MAG (Maximum Available Gain).
3) to study failure criteria and their applicability toward accurate life predictions.
The recessed-gate devices suffered from Au/GaAs channel interdiffusion resulting in substantial dc parameter degradation above 225°C with an activation energy of 1.7 eV. Although the most widely used device structure in the GaAs industry, its process is not conducive to parameter uniformity.
The realigned self-aligned gate (RSAG) devices are an initial attempt at the fabrication of a self-aligned gate analog MESFET. They were found to exhibit excellent electrical characteristics, but their reliability performance was unpredictable due to the critical nature of the .5 micron TiPdAu gate overlay realignment to a 1 micron TiWN<sub>x</sub> Schottky.
Planarized self-aligned gate (PSAG) devices were found to be readily manufacturable and to exhibit excellent reliability.
The use of a decrease in MAG was found to be a more meaningful failure criterion than a 20% change in I<sub>dss</sub>, which is employed extensively in the literature.<br>Master of Science
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Miodrag, Brkić. "Elektronski sistem za obradu signala sa senzora promenljive izlazne impedanse." Phd thesis, Univerzitet u Novom Sadu, Fakultet tehničkih nauka u Novom Sadu, 2016. https://www.cris.uns.ac.rs/record.jsf?recordId=100331&source=NDLTD&language=en.
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U doktorskoj disertaciji su prikazani elektronski sistemi razvijeni zaobradu signala sa senzora promenjive izlazne impedanse, koji se mogukoristiti za različite vrste senzora. Razvijen je prototip mernog sistemapomoću diskretnih komponenti. Merenja izvedena na ovom prototipu dokazalasu da se sa izabranom mernom metodom mogu dobiti zadovoljavajući rezultatimerenja. Projektovanjem analognog dela elektronskog sistema u CMOStehnologiji smanjene su dimenzije i potrošnja elektronskog sistema za obradusignala, a poboljšane su merne karakteristike u odnosu na izvedu udiskretnoj tehnologiji.<br>In this thesis, an electronic system for signal processing of sensors with variableimpedance has been developed. It can be used with different types of sensors. Aprototype of electronic system has been developed using discrete components.Measurements made with this prototype have proved that applied measurementmethod can be used to obtain satisfying measurement results. By designing analogparts of electronic system in CMOS technology, dimensions and power consumptionof the electronic system for signal processing and measurement characteristics havebeen improved, comparing to the prototype developed using discrete components.
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Asokan, Anu. "Signal Integrity - Aware Pattern Generation for Delay Testing." Thesis, Montpellier, 2015. http://www.theses.fr/2015MONTS206/document.
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La miniaturisation des circuits intégrés permet d'avoir une intégration plus élevée dans une même puce. Cela, conduit a des problèmes de qualité dans les signaux de communication et d’alimentation comme le phénomène de bruit de diaphonie entre les interconnections (Crosstalk) et de bruit dans le lignes d'alimentation (PSN, GB). Aussi problèmes de fiabilité peuvent éventuellement arriver a cause des variations dans les paramètres technologiques pendant le processus de fabrication. De ce fait, tout ces phénomènes ont un effet négatif sur le délai dans les circuits embarques (IC) et donnent lieu aux défauts sur le retard. Des échecs relie au délai dans les dispositifs semi conducteurs causes une augmentation de taux d'évasion de défaut, une perte de rendement et une diminution dans le taux de fiabilité. Techniques de Design-For-Test ont était développée a fin d'avoir une meilleur contrôlabilité et observabilité dans les nœuds internes du circuit pour détecter et localiser facilement l’emplacement des défauts. Cependant, ils ne sont pas toujours détectés par les modèles de défauts traditionnels.Cette thèse s’intéresse a l’analyse de ces phénomènes a fin de proposer de nouvelle méthodes de test du délai en considérant les phénomènes physiques pour faire face aux défauts provenant du processus de fabrication ou de problèmes physiques. Ces méthodes comprennent l'analyse de la variation du retard d'un chemin en présence du bruit de diaphonie, du bruit d'alimentation, et les variations de processus. Additionnellement, nous développons méthodes d'essai de retard sur un chemin pour identifier les motifs de test qui peuvent causer le pire des cas de retard sur un chemin cible. Les méthodes proposées peuvent être utilisées pour caractériser la vitesse de chemin et il contribue à résoudre le problème de «speed binning». En outre, ils peuvent être utilisés dans l'amélioration de l'approche classique ATPG de génération de «patterns» et elles sont indépendantes de la technologie. L'application de ces contributions peut apporter des améliorations considérables à la qualité de test IC en assurant une meilleure couverture des défauts et en aidant à augmenter le rendement de fabrication au cours de la vitesse du «binning» dans les puces IC. L’évolution en continue de la technologie en échelle nanométrique<br>Advancing nanometer technology scaling enables higher integration on a single chip with minimal feature size. As a consequence, the effects of signal and power integrity issues such as crosstalk noise between interconnects, power supply noise and ground bounce in the supply networks significantly increases. Also, reliability issues are eventually introduced by variations in the manufacturing process. These issues will negatively impact the timing characteristics in an integrated circuit (IC), as they give rise to delay defects. Delay-related parametric failures increase the defect escape rate, yield loss and diminish reliability rate. Hence, design-for-test techniques are employed to have a better controllability and observability on the internal nodes to easily detect and locate the faults. However, they are not always detected by the traditional fault models. In our work, we target these challenges and propose novel physical design-aware path delay test methods to deal with delay faults coming from manufacturing defects or physical design issues. They include the investigation of path delay variations in the presence of crosstalk noise, power supply noise, ground bounce and process variations. Based on this, we develop technology independent test methods for identifying the test patterns that may cause a worst-case delay on a target path. Then, we develop a dedicated test pattern generation method for path delay testing in the presence of crosstalk noise, power supply noise and ground noise. The proposed methods can be used to characterize the path speed and it helps to address the speed binning problem. Also, they can be employed in improving the classical ATPG approach of pattern generation. The application of these contributions can bring tremendous improvements to the IC test quality by ensuring better defect coverage and for an increased manufacturing yield during speed binning of IC chips
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Schlottmann, Craig Richard. "A coordinated approach to reconfigurable analog signal processing." Diss., Georgia Institute of Technology, 2012. http://hdl.handle.net/1853/49021.
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The purpose of this research is to create a solid framework for embedded system design with field-programmable analog arrays (FPAAs). To achieve this goal, we've created a unified approach to the three phases of FPAA system design: (1) the hardware architecture; (2) the circuit design and modeling; and (3) the high-level software tools. First, we describe innovations to the reconfigurable analog hardware that enable advanced signal processing and integration into embedded systems. We introduce the multiple-input translinear element (MITE) FPAA and the dynamically-reconfigurable RASP 2.9v FPAA, which was designed explicitly for interfacing with external digital systems. This compatibility creates a streamlined workflow for dropping the FPAA hardware into mixed-signal embedded systems. The second phase, algorithm analysis and modeling, is important to create a useful and reliable library of components for the system designer. We discuss the concept and procedure of analog abstraction that empowers non-circuit design engineers to take full advantage of analog techniques. We use the analog vector-matrix multiplier as an example for a detailed discussion on computational analog analysis and system mapping to the FPAA. Lastly, we describe high-level software tools, which are an absolute necessity for the design of large systems due to the size and complexity of modern FPAAs. We describe the Sim2Spice tool, which allows system designers to develop signal processing systems in the Simulink environment. The tool then compiles the system to the FPAA hardware. By coordinating the development of these three phases, we've created a solid unified framework that empowers engineers to utilize FPAAs.
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AIKAT, RAJSEKHAR. "DESIGN OF AN OPTICAL INTENSITY COMPARISON PIXEL WITH PROGRAMMABLE INTENSITY OFFSET LEVELS." University of Cincinnati / OhioLINK, 2002. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1029256740.
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Baran, Ondřej. "Studium vlivů frekvenčních nestabilit oscilátorů v družicových komunikačních systémech." Doctoral thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2011. http://www.nusl.cz/ntk/nusl-233547.
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The dissertation thesis deals with a study of an influence of a simultaneous incidence of an additive thermal noise and a multiplicative phase noise on the useful signal transmission in narrowband satellite communication systems. While the additive thermal noise affects the useful signal only on the receiver side of the communication system, the multiplicative phase noise is produced in all system oscillators. One investigates how the receiver filter bandwidth reduction takes effect on the influence of individual noise types. The thesis is divided into four units. The first one (chapters 4 and 5) solves the ways of modeling of both noise types. In the second part (chapter 6), on the simple example, the primary analysis of the phase noise influence is made. Basic modulation schemes used in the satellite communication are also discussed (chapter 7). Third part (chapter 8) is devoted to the modeling of a general digital system with a M PSK modulation made directly on the main carrier wave. The last part (chapter 9) describes the modeling of a digital system with a BPSK modulation on the auxiliary subcarrier wave followed by an SSB modulation on the main carrier wave. General conclusions are deduced from obtained simulation results.
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Tan, Tiow Heng. "A small-signal modeling of GaAs FET and broad band amplifier design." Ohio : Ohio University, 1991. http://www.ohiolink.edu/etd/view.cgi?ohiou1183990144.
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Bartholomew, David Ray. "Design of a High Speed Mixed Signal CMOS Mutliplying Circuit." Diss., CLICK HERE for online access, 2004. http://contentdm.lib.byu.edu/ETD/image/etd362.pdf.
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Duthoit-Saint, Georges Chaumet Valérie. "Contribution de l’analyse sensorielle à l’optimisation d’un signal vibratoire dans le véhicule autonome." Thesis, Université Paris-Saclay (ComUE), 2017. http://www.theses.fr/2017SACLA014.
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Les premiers véhicules autonomes ne seront capables de gérer la conduite que sur certaines portions de trajet. Le conducteur, qui pourra être engagé dans une tâche non relative à la conduite, doit être prévenu de reprendre la main avant la fin de disponibilité du mode autonome. L’objectif de cette thèse est de proposer et d’optimiser un signal vibratoire de rappel à la conduite qui soit détectable par tous, et jugé satisfaisant par les conducteurs, ou au moins acceptable étant donné sa signification et le contexte. Le contexte de roulage, la concentration du sujet sur une tâche non relative à la conduite et la diversité interindividuelle doivent être pris en compte. Un prototype de siège à retours vibratoires et un protocole de test en conditions de conduite autonome ont été mis au point, grâce à des expériences préliminaires. Les paramètres de construction d’un signal ont été formalisés et sélectionnés pour permettre la construction d’un plan d’expérience. Une évaluation quantitative de la détection et de la satisfaction pour les 16 signaux issus du plan d’expérience a été réalisée sur 80 sujets en conditions de conduite autonome. L’analyse par modélisation a permis d’identifier les paramètres du signal les plus influents sur les deux critères d’intérêt, et les valeurs de paramètres garantissant la meilleure satisfaction et une haute détection. Enfin, une étude en simulateur a permis de montrer l’intérêt de la modalité sensorielle tactile en complément de l’auditif lors du rappel à la conduite<br>In the early steps of developments, autonomous vehicles carry out the driving only on determined road section. The driver, who may be focused in a non-related to driving task, must be warned before the end of the autonomous mode to take over the driving. This PhD work aims at offer and optimize a vibrotactile take-over notification (TON). This TON must be detected by any drivers and evaluated as satisfying, or at least acceptable considering its meaning and the context. The driving environment, the concentration of the subject in a non-related to driving task, as well as the diversity of the drivers have to be considered. A seat prototype and a protocol of evaluation in autonomous driving conditions were developed. The design parameters of a signal were established and selected to build a Design of Experiments (DoE). A quantitative evaluation of the detection and the satisfaction of the 16 signals from the DoE was performed based on 80 subjects in autonomous driving conditions. The influents parameters of the signals on the two evaluated criteria, and the settings optimizing the satisfaction and insuring a high detection level were identified by modelling. Finally, a simulator study showed the interest of tactile modality in addition to auditory modality during take-over request
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Cheung, Wing-tai. "Geometric programming and signal flow graph assisted design of interconnect and analog circuits." Click to view the E-thesis via HKUTO, 2007. http://sunzi.lib.hku.hk/HKUTO/record/B39558526.
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Yu, Jie. "Design and analysis of fixed and adaptive sigma-delta modulators." Thesis, King's College London (University of London), 1992. https://kclpure.kcl.ac.uk/portal/en/theses/design-and-analysis-of-fixed-and-adaptive-sigmadelta-modulators(6013d6b6-09fe-46bf-bd4b-5499cc30f4dc).html.
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Ferrere, Thomas. "Assertions and measurements for mixed-signal simulation." Thesis, Université Grenoble Alpes (ComUE), 2016. http://www.theses.fr/2016GREAM050.
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Cette thèse porte sur le monitorage des simulations de circuits en signaux mixtes. Dans le domaine de la vérification de matériel, l'utilisation de formalismes déclaratifs pour la specification, dans le cadre de la validation par simulation, s'est installée dans la pratique courante. Cependant, le manque de fonctionnalités visant à spécifier les comportements asynchrones, ou l'intégration insuffisante des résultats de la vérification, rend les language d'assertions et de mesures inopérants pour la vérification de comportements en signaux mixtes. Nous proposons des outils théoriques et pratiques pour la description et le monitorage de ces comportements, qui comportent des aspects à la fois discrets et continus. Pour cela, nous nous appuyons sur des travaux antérieurs portant sur les extensions temps-réel de la logique temporelle et des expressions régulières. Nous décrivons de nouveaux algorithmes pour calculer la distance entre une trace de simulation et une propriété en logique temporelle données. Une nouvelle procédure de diagnostic est conçue pour déboguer efficacement de telles traces. Le monitorage des comportements continus est ensuite étendu à d'autres formes d'assertions basées sur des expressions régulières. Ces expressions constituent la base de notre language de description de mesures, qui permet de définir conjointement la mesure et les intervals temporels sur lesquels cette mesure doit être prise. Nous montrons comment d'autres mesures, déjà mises en œuvre dans les simulateurs analogiques peuvent être importées dans les descriptions digitales. Ceci permet d'étendre vers le domaine en signaux mixtes les approches hiérarchiques utilisées en vérification de circuits digitaux<br>This thesis is concerned with the monitoring of mixed-signal circuit simulations. In the field of hardware verification, the use of declarative property languages in combination with simulation is now standard practice. However the lack of features to specify asynchronous behaviors, or the insufficient integration of verification results, makes existing assertion and measurement languages unable to enforce mixed-signal requirements. We propose several theoretical and practical tools for the description and automatic monitoring of such behaviors, that feature both discrete and continuous aspects. For this we build on previous work on real-time extensions of temporal logic and regular expressions. We describe new algorithms to compute the distance from some simulation trace to temporal logic specifications, whose complexity is not higher than traditional monitoring. A novel diagnostic procedure is provided in order to efficiently debug such traces. The monitoring of continuous behaviors is then extended to other forms of assertions based on regular expressions. These expressions form the basis of our measurement language, that describes conjointly a measure and the patterns over which that measure should be taken. We show how other measurements implemented in analog circuits simulators can be ported to digital descriptions, this way extending structured verification approaches used for digital designs toward mixed-signal
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El-Menhawy, A. El-H. "Computer Aided Design of VLSI algorithms for digital signal processing based on the Residue Number System." Thesis, University of Kent, 1987. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.376344.
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Renaud, Guillaume. "Auto test de convertisseurs de signal de type pipeline." Thesis, Université Grenoble Alpes (ComUE), 2016. http://www.theses.fr/2016GREAT064/document.
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Cette thèse vise l’étude de nouvelles architectures d’auto test pour les convertisseurs de type pipeline. En production, les convertisseurs sont testés en fonctionnement statique et dynamique. Les techniques de test statique de linéarité sont les techniques les plus coûteuses durant la phase de production. La mesure des performances statiques utilise un stimulus à haute linéarité et très basse fréquence et la méthode de l’histogramme, nécessitant la collecte d’un grand nombre d’échantillons en sortie afin de moyenner le bruit. Ainsi, la quantité de données nécessaire augmente exponentiellement avec la résolution du CAN sous test. Pour cette raison, la réduction du temps de test des CANs est un domaine de recherche qui attire de plus en plus d’attention. Récemment, des nouvelles solutions ont été mises au point pour réduire de façon importante le temps de test, mais aucune solution d’auto test considérant un générateur de signal de haute résolution en combinaison avec une technique d'analyse intégrée, réduisant considérablement la quantité de données, n’a encore été développée. Dans le cadre de cette thèse, on envisage l’étude de techniques d’auto test statique pour ce type de convertisseurs. En particulier, cette thèse présente un générateur de stimulus de test intégré à haute linéarité et une technique modifiée de servo-loop qui, en combinaison avec un algorithme de test de linéarité avec réduction de codes, conduit à la définition d'une stratégie efficace et précise de test intégré pour les CANs de type pipeline. La thèse inclut la validation expérimentale des techniques proposées, en coopération avec ST Microelectronics, Grenoble<br>This PhD thesis is aimed at exploring new Built-In-Self-Test (BIST) techniques for static linearity characterization of pipeline ADCs. During the production phase, the static and dynamic performances of the ADCs are tested. Static linearity test techniques are one of the more expensive test procedures that are performed at production line. The measurement of the static linearity performance requires the application of a low frequency high linearity stimulus and the collection of a high volume of output samples for noise averaging, usually using a histogram-based test setup. Thus, as the resolution of state-of-the-art ADCs increases, test time for static linearity characterization increases exponentially. For this reason, the reduction of the ADC test time is a hot topic that has gained an increasing interest over the past years. New techniques have recently been proposed to effectively reduce test time, but no BIST technique has yet been developed that considers a high resolution signal generator in combination with an on-chip analysis technique that dramatically reduces the amount of data. In this thesis, static linearity BIST techniques will be investigated for pipeline ADCs. In particular, this thesis presents a novel high-linearity on-chip test stimulus generator and a modified servo-loop technique that, in combination with reduced-code linearity test algorithms, lead to the definition of an efficient and accurate BIST strategy for pipeline ADCs. The work includes the experimental validation of the proposed techniques in collaboration with STMicroelectronics, Grenoble
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Hiorns, R. E. "D.S.P. of circuit design for P.W.M. D/A conversion." Thesis, King's College London (University of London), 1994. https://kclpure.kcl.ac.uk/portal/en/theses/dsp-of-circuit-design-for-pwm-da-conversion(5da641f8-747f-42ff-be70-c0e0bed22676).html.
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Groves, James O. "Small signal analysis of nonlinear systems with periodic operating trajectories." Diss., This resource online, 1995. http://scholar.lib.vt.edu/theses/available/etd-06062008-162614/.
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Mostafa, Khaled Hussien. "Detection of radar signals under noise and jamming conditions." Thesis, University of Kent, 2000. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.324712.
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KANKIPATI, SUNDER RAJAN. "MACRO MODEL GENERATION FOR SYNTHESIS OF ANALOG AND MIXED SIGNAL CIRCUITS." University of Cincinnati / OhioLINK, 2004. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1077297705.
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Hákonardóttir, Stefanía. "Prosthetic Control using Implanted Electrode Signals." Thesis, KTH, Skolan för teknik och hälsa (STH), 2014. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-147699.
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This report presents the design and manufacturing process of a bionic signal messagebroker (BSMB), intended to allow communication between implanted electrodes andprosthetic legs designed by Ossur. The BSMB processes and analyses the data intorelevant information to control the bionic device. The intention is to carry out eventdetection in the BSMB, where events in the muscle signal are matched to the events ofthe gait cycle (toe-o, stance, swing).The whole system is designed to detect muscle contraction via sensors implantedin residual muscles and transmit the signals wireless to a control unit that activatesassociated functions of a prosthetic leg. Two users, one transtibial and one transfemoral,underwent surgery in order to get electrodes implantable into their residual leg muscles.They are among the rst users in the world to get this kind of implanted sensors.A prototype of the BSMB was manufactured. The process took more time thanexpected, mainly due to the fact that it was decided to use a ball grid array (BGA)microprocessor in order to save space. That meant more complicated routing and higherstandards for the manufacturing of the board. The results of the event detection indicatethat the data from the implanted electrodes can be used in order to get sucient controlover prosthetic legs. These are positive ndings for users of prosthetic legs and shouldincrease their security and quality of life.It is important to keep in mind when the results of this report are evaluated that allthe testing carried out were only done on one user each.
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Mokrzycki, Brian Thomas. "WvFEv3: An FPGA-based general purpose digital signal processor for space applications." Thesis, University of Iowa, 2011. https://ir.uiowa.edu/etd/3355.
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The Waves instruments aboard the Juno and Radiation Belt Storm Probe (RBSP) spacecraft represents the next generation of space radio and plasma wave instrumentation developed by the University of Iowa's Radio and Plasma Wave group. The previous generation of such instruments on the Cassini spacecraft utilized several analog signal-conditioning techniques to compress and condense scientific data. Compression techniques are necessary because the plasma wave instruments can often generate significantly more science data than can be transmitted using the narrow telemetry channel of the hosting spacecraft. The next generation of plasma wave instrumentation represents a major shift of analog signal conditioning functionality to the digital domain, drastically reducing the amount of power and mass required by the instrument while simultaneously further condensing scientific data, increasing the precision of plasma emission measurements, and adding flexibility. The solution presented in this thesis is to utilize a low-cost radiation tolerant field programmable gate array (FPGA) that serves as a space qualified implementation platform for a custom designed general-purpose digital signal processor, called the WvFEv3.