Relevant bibliographies by topics / SiC SBD / Journal articles
To see the other types of publications on this topic, follow the link: SiC SBD.

Journal articles on the topic 'SiC SBD'

Author: Grafiati
Published: 6 September 2023

Create a spot-on reference in APA, MLA, Chicago, Harvard, and other styles

Select a source type:

Consult the top 50 journal articles for your research on the topic 'SiC SBD.'

Next to every source in the list of references, there is an 'Add to bibliography' button. Press on it, and we will generate automatically the bibliographic reference to the chosen work in the citation style you need: APA, MLA, Harvard, Chicago, Vancouver, etc.

You can also download the full text of the academic publication as pdf and read online its abstract whenever available in the metadata.

Browse journal articles on a wide variety of disciplines and organise your bibliography correctly.

1

Nakanishi, Yosuke, Takaaki Tominaga, Hiroaki Okabe, Yoshiyuki Suehiro, Kazuyuki Sugahara, Takeharu Kuroiwa, Yoshihiko Toyoda, et al. "Properties of a SiC Schottky Barrier Diode Fabricated with a Thin Substrate." Materials Science Forum 778-780 (February 2014): 820–23. http://dx.doi.org/10.4028/www.scientific.net/msf.778-780.820.

Full text
Abstract:
One of the attractive methods to reduce the differential resistance of SiC devices is to make the thickness of a SiC substrate thinner [1]. Therefore, we fabricated SiC Schottky barrier diode (SBD) chips with a thickness below 150 μm and the properties of the SiC-SBD chips were measured. It was confirmed that the junction temperature of the thin SiC-SBD chips was decreased by the combination of the reduction in a thickness of the chip and the back side bonding of the chip using a material with high thermal conductivity. Moreover, it was confirmed that the potential of the thin SiC-SBD chip for the surge current capacity could be enhanced to combine the thin SiC-SBD chip with the back side bonding which has high thermal conductivity.
APA, Harvard, Vancouver, ISO, and other styles
2

Shilpa, A., S. Singh, and N. V. L. Narasimha Murty. "Spectroscopic performance of Ni/4H-SiC and Ti/4H-SiC Schottky barrier diode alpha particle detectors." Journal of Instrumentation 17, no. 11 (November 1, 2022): P11014. http://dx.doi.org/10.1088/1748-0221/17/11/p11014.

Full text
Abstract:
Abstract Advancement in the growth of 4H-SiC with low micropipe densities (∼ 0.11 cm-2) in achieving high pure epitaxial layers, enabled the development of high-resolution 4H-SiC alpha particle Schottky radiation detectors for harsh environments. In particular, the study considers two types of 4H-SiC radiation detectors having Ni and Ti as Schottky contacts. They are fabricated by depositing Ni and Ti on 25 μm thick n-type 4H-SiC by epitaxially growing on 350 μm thick conducting SiC substrates. Electrical characterization and alpha spectral measurements performed on Ni/4H-SiC and Ti/4H-SiC SBDs are reported in this work. The spectral measurements were carried out using 241Am alpha emitting radioactive source. Ni/ 4H-SiC Schottky detector showed a better spectral response with 22.87 keV FWHM (∼ 0.416%) at a reverse bias of 150 V for 5.48 MeV alpha particles while Ti/4H-SiC Schottky detector achieved a resolution of 38.25 keV FWHM (∼ 0.697%) at 170 V reverse bias. This work presented spectral broadening analysis to understand the various factors affecting the energy resolution of the detectors. The extracted charge collection efficiencies (CCEs) are approximately 99% in both the detectors. In addition, polarization effects are not noticed in any of the fabricated detectors. The diffusion length of minority carriers (Lp ) is computed based on the drift-diffusion model by fitting the CCE curve as a function of applied bias, and the values are close to 9 μm and 7 μm for Ni/4H-SiC SBD and Ti/4H-SiC SBD detectors, respectively. Annealing at 400°C for 5 minutes in N2 ambient resulted in resolution of 23.98 keV FWHM (∼ 0.436%) for Ni/4H-SiC SBD detector at -170 V and 36.21 keV FWHM (∼ 0.661%) for Ti/4H-SiC SBD detector at -150 V. Overall Ni/4H-SiC SBD detectors showed superior spectral characteristics and superior resolution when compared to Ti/4H-SiC SBD detectors. However, the Ti/4H-SiC SBD detector fabricated in this work performed better than the previously reported work on a similar device structure. Hence, future work aimed at improving resolution of radiation detectors could also consider Ti/4H-SiC SBDs along with Ni/4H-SiC SBDs.
APA, Harvard, Vancouver, ISO, and other styles
3

Tominaga, Takaaki, Shiro Hino, Yohei Mitsui, Junichi Nakashima, Koutarou Kawahara, Shingo Tomohisa, and Naruhisa Miura. "Investigation on the Effect of Total Loss Reduction of HV Power Module by Using SiC-MOSFET Embedding SBD." Materials Science Forum 1004 (July 2020): 801–7. http://dx.doi.org/10.4028/www.scientific.net/msf.1004.801.

Full text
Abstract:
A total loss reduction of 3.3 kV power module by using SiC-MOSFET embedding SBD has been demonstrated through the investigation of DC characteristics and switching characteristics. Despite 1.1 times larger on-resistance than that of conventional SiC-MOSFET due to larger cell pitch, superior switching characteristics of SiC-MOSFET embedding SBD, which are due to smaller total chip area than that of SiC-MOSFET coupled with external SBD and due to elimination of recovery charge by minority carrier injection compared with SiC-MOSFET utilizing its body diode, enable the total loss reduction especially for high frequency operation.
APA, Harvard, Vancouver, ISO, and other styles
4

Kinoshita, Akimasa, Takasumi Ohyanagi, Tsutomu Yatsuo, Kenji Fukuda, Hajime Okumura, and Kazuo Arai. "Fabrication of 1.2kV, 100A, 4H-SiC(0001) and (000-1) Junction Barrier Schottky Diodes with Almost Same Schottky Barrier Height." Materials Science Forum 645-648 (April 2010): 893–96. http://dx.doi.org/10.4028/www.scientific.net/msf.645-648.893.

Full text
Abstract:
It is known that a Schottky barrier height (b) of metal/C-face 4H-SiC Schottky barrier diode (SBD) differ from b of metal/Si-face 4H-SiC SBD. Furthermore, b of metal/4H-SiC SBD varies with annealing temperature. We fabricate 0.231mm2 SBD with Ti/SiC interface using Si-face and C-face 4H-SiC. These SBDs are annealed at several temperatures after a formation of the Ti/SiC interface. As a result, b of Ti/C-face 4H-SiC interface annealed at 400 oC is nearly equal to b of Ti/Si-face 4H-SiC interface annealed at 500 oC and the n-values of these SBDs are nearly equal to the ideal value (unity). Using that annealing condition, we fabricated 25mm2 junction barrier Schottky (JBS) diodes with Ti/SiC interface on Si-face and C-face 4H-SiC epitaxial substrate. b of Si-face and C-face JBS diodes are 1.26eV and 1.24eV, respectively. The leakage currents for both Si-face and C-face JBS diodes are less than 1mA/cm2. The current of 100A is obtained at the forward bias voltage of 1.95V and 2.16V for the Si-face JBS and the C-face JBS.
APA, Harvard, Vancouver, ISO, and other styles
5

Kong, Moufu, Zewei Hu, Ronghe Yan, Bo Yi, Bingke Zhang, and Hongqiang Yang. "A novel SiC high-k superjunction power MOSFET integrated Schottky barrier diode with improved forward and reverse performance." Journal of Semiconductors 44, no. 5 (May 1, 2023): 052801. http://dx.doi.org/10.1088/1674-4926/44/5/052801.

Full text
Abstract:
Abstract A new SiC superjunction power MOSFET device using high-k insulator and p-type pillar with an integrated Schottky barrier diode (Hk-SJ-SBD MOSFET) is proposed, and has been compared with the SiC high-k MOSFET (Hk MOSFET), SiC superjuction MOSFET (SJ MOSFET) and the conventional SiC MOSFET in this article. In the proposed SiC Hk-SJ-SBD MOSFET, under the combined action of the p-type region and the Hk dielectric layer in the drift region, the concentration of the N-drift region and the current spreading layer can be increased to achieve an ultra-low specific on-resistance (R on,sp). The integrated Schottky barrier diode (SBD) also greatly improves the reverse recovery performance of the device. TCAD simulation results indicate that the R on,sp of the proposed SiC Hk-SJ-SBD MOSFET is 0.67 mΩ·cm2 with a 2240 V breakdown voltage (BV), which is more than 72.4%, 23%, 5.6% lower than that of the conventional SiC MOSFET, Hk SiC MOSFET and SJ SiC MOSFET with the 1950, 2220, and 2220 V BV, respectively. The reverse recovery time and reverse recovery charge of the proposed MOSFET is 16 ns and18 nC, which are greatly reduced by more than 74% and 94% in comparison with those of all the conventional SiC MOSFET, Hk SiC MOSFET and SJ SiC MOSFET, due to the integrated SBD in the proposed MOSFET. And the trade-off relationship between the R on,sp and the BV is also significantly improved compared with that of the conventional MOSFET, Hk MOSFET and SJ MOSFET as well as the MOSFETs in other previous literature, respectively. In addition, compared with conventional SJ SiC MOSFET, the proposed SiC MOSFET has better immunity to charge imbalance, which may bring great application prospects.
APA, Harvard, Vancouver, ISO, and other styles
6

Tezuka, Kazuo, Tatsurou Tsuyuki, Saburou Shimizu, Shinichi Nakamata, Takashi Tsuji, Noriyuki Iwamuro, Shinsuke Harada, Kenji Fukuda, and Hiroshi Kimura. "High Temperature Ion Implantation and Activation Annealing Technologies for Mass Production of SiC Power Devices." Materials Science Forum 717-720 (May 2012): 821–24. http://dx.doi.org/10.4028/www.scientific.net/msf.717-720.821.

Full text
Abstract:
In this paper, we demonstrate the fabrication of SBD utilizing SiC process line specially designed for mass production of SiC power device. In SiC power device process, ion implantation and activation annealing are key technologies. Details of ion implantation system and activation annealing system designed for SiC power device production are shown. Further, device characteristics of SBD fabricated using this production line is also shown briefly.
APA, Harvard, Vancouver, ISO, and other styles
7

Kinoshita, Akimasa, Takashi Nishi, Tsutomu Yatsuo, and Kenji Fukuda. "Improvement of SBD Electronic Characteristics Using Sacrificial Oxidation Removing the Degraded Layer from SiC Surface after High Temperature Annealing." Materials Science Forum 556-557 (September 2007): 877–80. http://dx.doi.org/10.4028/www.scientific.net/msf.556-557.877.

Full text
Abstract:
Ion implantation and a subsequent annealing at high temperature are required for fabricating a high voltage Schottky Barrier Diode (SBD) with a field limiting ring (FLR) or a junction termination extension (JTE), but high temperature annealing degrades surface condition of a SiC substrate and induces a degradation of electronic characteristics of a fabricated SBD. To avoid a degradation of SBD electronic characteristics after high temperature annealing, the method of removing a degraded layer from a SiC surface by sacrificial oxidation after high temperature annealing is studied. In this study, we studied the relationship between the improvement of SBD electronic characteristics and the thickness of sacrificial oxide grown after high temperature annealing. 9~12 SBD without edge termination were fabricated on a SiC substrate of 4mm×4mm. The ratio of good chips to all chips (9~12 SBD) increases with increasing total thickness of sacrificial oxide grown after high temperature annealing at 1800oC for 30 s, where an SBD with a leakage current less than 1μA/cm2 at reverse voltage of –100V was defined as a good chip. We applied this process growing sacrificial oxide of 150nm after high temperature annealing to fabricate the SBD with an FLR structure designed with 600V blocking voltage on a Si-face SiC substrate. The SBD with an FLR structure through this process of 150 nm sacrificial oxide is low leakage current of less than 1μA/cm2 at reverse voltage of –100V and achieves 600V blocking voltage, however, the SBD with an FLR structure without the process of sacrificial oxide after high temperature annealing is high leakage current at reverse voltage of –100V. It is shown that this process growing sacrificial oxide after high temperature annealing is useful to fabricate an SBD with an FLR structure.
APA, Harvard, Vancouver, ISO, and other styles
8

Hatakeyama, Tetsuo, Johji Nishio, and Takashi Shinohe. "Process and Device Simulation of a SiC Floating Junction Schottky Barrier Diode (Super-SBD)." Materials Science Forum 483-485 (May 2005): 921–24. http://dx.doi.org/10.4028/www.scientific.net/msf.483-485.921.

Full text
Abstract:
This paper describes process and device simulation results of SiC floating junction Schottky barrier diodes (Super-SBDs). Two-dimensional process simulation of a SiC device is implemented using the customized ISE’s process simulator “DIOS”. The simulation results reproduce the experimentally observed buried floating junction structure of a SiC Super-SBD. The device simulation method using the anisotropic impact ionization coefficients is formulated. The effect of anisotropic avalanche breakdown field on termination structures of SiC SBDs is examined. Finally, by the device simulation we have shown that the trade-off between the on-state resistance and the breakdown voltage of the super-SBD that contains two drift layers exceeds that of the conventional SBD.
APA, Harvard, Vancouver, ISO, and other styles
9

Yuan, Hao, Xiao Yan Tang, Yi Men Zhang, Yu Ming Zhang, Hong Liang Lv, Yue Hu Wang, Yu Fei Zhou, and Qing Wen Song. "The Fabrication of 4H-SiC Floating Junction SBDs (FJ_SBDs)." Materials Science Forum 778-780 (February 2014): 812–15. http://dx.doi.org/10.4028/www.scientific.net/msf.778-780.812.

Full text
Abstract:
Based on the theoretical analysis and the simulation results of the ion implantation process and the floating Junction structure, a 4H-SiC SBD with floating junction (FJ_SBD) is fabricated. Compared with the on-resistance 5.13 mΩ·cm2 of conventional SBD fabricated at the same time, the on-resistance of FJ_SBD with 3μm P+ buried box is only 6.29 mΩ·cm2. The breakdown voltage of the FJ_SBD reaches 950V which is much higher than the 430V of conventional SBD. According to the presented results, The BFOM of the FJ_SBD is 3 times higher than the value of the conventional SBD. It is proved that FJ-SBD has greater prospects for development.
APA, Harvard, Vancouver, ISO, and other styles
10

Ziko, Mehadi Hasan, Ants Koel, Toomas Rang, and Muhammad Haroon Rashid. "Investigation of Barrier Inhomogeneities and Electronic Transport on Al-Foil/p-Type-4H-SiC Schottky Barrier Diodes Using Diffusion Welding." Crystals 10, no. 8 (July 23, 2020): 636. http://dx.doi.org/10.3390/cryst10080636.

Full text
Abstract:
The diffusion welding (DW) is a comprehensive mechanism that can be extensively used to develop silicon carbide (SiC) Schottky rectifiers as a cheaper alternative to existing mainstream contact forming technologies. In this work, the Schottky barrier diode (SBD) fabricated by depositing Al-Foil on the p-type 4H-SiC substrate with a novel technology; DW. The electrical properties of physically fabricated Al-Foil/4H-SiC SBD have been investigated. The current-voltage (I-V) and capacitance-voltage (C-V) characteristics based on the thermionic emission model in the temperature range (300 K–450 K) are investigated. It has been found that the ideality factor and barrier heights of identically manufactured Al-Foil/p-type-4H-SiC SBDs showing distinct deviation in their electrical characteristics. An improvement in the ideality factor of Al-Foil/p-type-4H-SiC SBD has been noticed with an increase in temperature. An increase in barrier height in fabricated SBD is also observed with an increase in temperature. We also found that these increases in barrier height, improve ideality factors and abnormalities in their electrical characteristics are due to structural defects initiation, discrete energy level formation, interfacial native oxide layer formation, inhomogenous doping profile distribution and tunneling current formation at the SiC sufaces.
APA, Harvard, Vancouver, ISO, and other styles
11

Harada, Shinsuke, Yasuyuki Hoshi, Yuichi Harada, Takashi Tsuji, Akimasa Kinoshita, Mitsuo Okamoto, Youichi Makifuchi, et al. "High Performance SiC IEMOSFET/SBD Module." Materials Science Forum 717-720 (May 2012): 1053–58. http://dx.doi.org/10.4028/www.scientific.net/msf.717-720.1053.

Full text
Abstract:
SiC power module with low loss and high reliability was developed by utilizing IEMOSFET and SBD. The IEMOSFET is the SiC MOSFET with high channel mobility in which the channel region is the p-type carbon-face epitaxial layer with low acceptor concentration. Elemental technologies for the high channel mobility and the high reliability of the gate oxide have been developed to realize the excellent characteristics by the IEMOSFET. The SBD was designed so as to minimize the forward voltage drops and the reverse leakage current. For the fabrication of these SiC power devices, the mass production technology such as gate oxidation, ion implantation and following activation annealing have been also developed.
APA, Harvard, Vancouver, ISO, and other styles
12

Cheng, Hongyu, Wenmao Li, Peiran Wang, Jianguo Chen, Qing Wang, and Hongyu Yu. "A Fast Recovery SiC TED MOS MOSFET with Schottky Barrier Diode (SBD)." Crystals 13, no. 4 (April 10, 2023): 650. http://dx.doi.org/10.3390/cryst13040650.

Full text
Abstract:
Achieving low conduction loss and good channel mobility is crucial for SiC MOSFETs. However, basic planar SiC MOSFETs provide challenges due to their high density of interface traps and significant gate-to-drain capacitance. In order to enhance the reverse recovery property of the device, a Schottky barrier diode (SBD) was added to the source contact area, the top of the current spreading region, of a trench-etched double-diffused SiC MOS (TED MOS). Two types of SBD structures were optimized to improve the electrical properties using 3D simulation software, “TCAD Silvaco”. During reverse recovery simulation, the carriers of the device were withdrawn from the SBD, indicating that the new design was effective. It also showed that the recovery properties of the new design depended on temperature, carrier lifetime, and the work functions of metals. All the new designs were evaluated in various circumstances to determine the trend. Ultimately, in high-speed switching circuits, the SiC TED MOS with SBD structure efficiently boosted switching speed, while reducing switching loss.
APA, Harvard, Vancouver, ISO, and other styles
13

Kawahara, Koutarou, Shiro Hino, Koji Sadamatsu, Yukiyasu Nakao, Toshiaki Iwamatsu, Shuhei Nakata, Shingo Tomohisa, and Satoshi Yamakawa. "Impact of Embedding Schottky Barrier Diodes into 3.3 kV and 6.5 kV SiC MOSFETs." Materials Science Forum 924 (June 2018): 663–66. http://dx.doi.org/10.4028/www.scientific.net/msf.924.663.

Full text
Abstract:
External Schottky barrier diodes (SBDs) used as free-wheel diodes should be larger in higher voltage devices to avoid bipolar degradation consequent on current conduction of body diodes in SiC MOSFETs. By embedding an external SBD into an SiC MOSFET, we achieved compact 3.3 kV and 6.5 kV SiC MOSFETs that are free from bipolar degradation. The active area of the 3.3 kV/6.5 kV samples is only about a half/quarter of the total active area of a conventional MOSFET and a coupled external SBD.
APA, Harvard, Vancouver, ISO, and other styles
14

Tomita, Masaaki, Yusuke Maeyama, M. Sato, Y. Fukuda, F. Honma, J. Ono, Masaaki Shimizu, and Hiroaki Iwakuro. "Device Simulation Model for Transient Analysis of SiC-SBD." Materials Science Forum 600-603 (September 2008): 975–78. http://dx.doi.org/10.4028/www.scientific.net/msf.600-603.975.

Full text
Abstract:
We report that it seems to be necessary to select Bologna University mobility model for accurate transient phenomenon analysis of SiC-SBD under the condition of forward surge current because the maximum of the temperature inside SiC-SBD arises up to above 425 K. Other mobility models seem to be mostly inadequate because they are corresponding to the experimental condition under the temperature below 425 K.
APA, Harvard, Vancouver, ISO, and other styles
15

Kim, S. J., Y. S. Choi, S. J. Yu, Sang Cheol Kim, Wook Bahng, and K. H. Lee. "Breakdown Voltage Characteristics of FLR-Assisted SiC-SBD Formed by Aluminum Metal Junction Edge Termination." Materials Science Forum 556-557 (September 2007): 861–64. http://dx.doi.org/10.4028/www.scientific.net/msf.556-557.861.

Full text
Abstract:
This paper demonstrates the breakdown voltage characteristics of different edge termination structures including aluminum (Al)-deposited guard ring and Al-deposited guard ringassisted field limiting ring (FLR) for a 4H silicon carbide (SiC) Schottky barrier diode (SBD). In order to investigate the application feasibility of the Al-deposited junction termination to a high breakdown voltage SiC-SBD, two types of SiC-SBDs are fabricated using conventional photolithography, electron beam evaporation, and thermal treatment techniques without ion implantation and thermal oxidation procedures. The breakdown voltage characteristics of the SiCSBDs are significantly dependent on the Al-deposited edge termination. The SiC-SBD without the Al-deposited edge termination shows less than 250 V breakdown voltage, while the Al-deposited guard ring and Al-deposited guard ring-assisted FLR structures show roughly 700 V and 1200 V breakdown voltages, respectively. The prominent improvement in the breakdown voltage characteristics is attributed to the electric field lowering at the Schottky contact edge by the Al deposition edge termination.
APA, Harvard, Vancouver, ISO, and other styles
16

Hino, Shiro, Hideyuki Hatta, Koji Sadamatsu, Yuichi Nagahisa, Shigehisa Yamamoto, Toshiaki Iwamatsu, Yasuki Yamamoto, Masayuki Imaizumi, Shuhei Nakata, and Satoshi Yamakawa. "Demonstration of SiC-MOSFET Embedding Schottky Barrier Diode for Inactivation of Parasitic Body Diode." Materials Science Forum 897 (May 2017): 477–82. http://dx.doi.org/10.4028/www.scientific.net/msf.897.477.

Full text
Abstract:
External Schottky barrier diodes (SBD) are generally used to suppress the conduction of the body diode of MOSFET. A large external SBD is required for a high voltage module because of its high specific resistance, while the forward voltage of SBD should be kept smaller than the built-in potential of the body diode. Embedding SBD into MOSFET with short cycle length increases maximum source-drain voltage where body diode remains inactive, resulting in high current density of SBD current. We propose a MOSFET structure where an SBD is embedded into each unit cell and an additional doping is applied, which allows high current density in reverse operation without any activation of body diode. The proposed MOSFET was successfully fabricated and much higher reverse current density was demonstrated compared to the external SBD. We can expect to reduce total chip size of high voltage modules using the proposed MOSFET embedding SBD.
APA, Harvard, Vancouver, ISO, and other styles
17

Kinoshita, Akimasa, Takashi Nishi, Takasumi Ohyanagi, Tsutomu Yatsuo, Kenji Fukuda, Hajime Okumura, and Kazuo Arai. "Influence of Surface Roughness on Breakdown Voltage of 4H-SiC SBD with FLR Structure." Materials Science Forum 615-617 (March 2009): 643–46. http://dx.doi.org/10.4028/www.scientific.net/msf.615-617.643.

Full text
Abstract:
The Ti/4H-SiC Schottky barrier diodes with a field limiting ring (FLR) structure are fabricated. Two types of SBDs are prepared; one (SBD-A) is covered and another (SBD-B) isn’t covered with a carbon cap during high temperature annealing after ion implantation. The breakdown voltage at room temperature for SBD-A and SBD-B are 1400 V and 1000 V, respectively. The breakdown for both SBDs occurs due to an avalanche breakdown. The light emission images are obtained at the breakdown voltage by photo emission microscope (PEM). The light emission is observed along an FLR of the SBD-A as designed. On the other hand, the spot of light emission is observed on a FLR structure of the SBD-B. This light emission spot indicates that leakage current is concentrated because an electrical field concentration is generated at this one for the SBD-B. The root-mean-square roughness of the Al-implanted region on the FLR structure calculated from the atomic force microscopy (AFM) images for the SBD-A and the SBD-B are 0.697 nm and 5.58 nm, respectively. Therefore it is considered that large surface roughness on the FLR decreases breakdown voltage of SBD because an electrical field concentration is generated at a spot.
APA, Harvard, Vancouver, ISO, and other styles
18

Imaizumi, Masayuki, Yoichiro Tarui, Shin Ichi Kinouchi, Hiroshi Nakatake, Yukiyasu Nakao, Tomokatsu Watanabe, Keiko Fujihira, Naruhisa Miura, Tetsuya Takami, and Tatsuo Ozeki. "Switching Characteristics of SiC-MOSFET and SBD Power Modules." Materials Science Forum 527-529 (October 2006): 1289–92. http://dx.doi.org/10.4028/www.scientific.net/msf.527-529.1289.

Full text
Abstract:
Prototype SiC power modules are fabricated using our class 10 A, 1.2 kV SiC-MOSFETs and SiC-SBDs, and their switching characteristics are evaluated using a double pulse method. Switching waveforms show that both overshoot and tail current, which induce power losses, are suppressed markedly compared with conventional Si-IGBT modules with similar ratings. The total switching loss (MOSFET turn-ON loss, turn-OFF loss and SBD recovery loss) of SiC power modules is measured to be about 30% of that of Si-IGBT modules under the generally-used switching condition (di/dt ~250A/μs). The three losses of SiC modules decrease monotonically with a decrease in gate resistance, namely switching speed. The result shows the potential of unipolar device SiC power modules.
APA, Harvard, Vancouver, ISO, and other styles
19

Cha, Kyuhyun, and Kwangsoo Kim. "Asymmetric Split-Gate 4H-SiC MOSFET with Embedded Schottky Barrier Diode for High-Frequency Applications." Energies 14, no. 21 (November 4, 2021): 7305. http://dx.doi.org/10.3390/en14217305.

Full text
Abstract:
4H-SiC Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs) with embedded Schottky barrier diodes are widely known to improve switching energy loss by reducing reverse recovery characteristics. However, it weakens the static characteristics such as specific on-resistance and breakdown voltage. To solve this problem, in this paper, an Asymmetric 4H-SiC Split Gate MOSFET with embedded Schottky barrier diode (ASG-MOSFET) is proposed and analyzed by conducting a numerical TCAD simulation. Due to the asymmetric structure of ASG-MOSFET, it has a relatively narrow junction field-effect transistor width. Therefore, despite using the split gate structure, it effectively protects the gate oxide by dispersing the high drain voltage. The Schottky barrier diode (SBD) is also embedded next to the gate and above the Junction Field Effect transistor (JFET) region. Accordingly, since the SBD and the MOSFET share a current path, the embedded SBD does not increase in RON,SP of MOSFET. Therefore, ASG-MOSFET improves both static and switching characteristics at the same time. As a result, compared to the conventional 4H-SiC MOSFET with embedded SBD, Baliga′s Figure of Merit is improved by 17%, and the total energy loss is reduced by 30.5%, respectively.
APA, Harvard, Vancouver, ISO, and other styles
20

Kyoung, Sin Su, Eun Sik Jung, Tai Young Kang, Chang Heon Yang, and Man Young Sung. "A Study of Post Annealing Effects in the Repair of High Resistance Failures with Unstable Schottky Barrier Height in 4H-SiC Schottky Barrier Diode." Materials Science Forum 821-823 (June 2015): 588–91. http://dx.doi.org/10.4028/www.scientific.net/msf.821-823.588.

Full text
Abstract:
To improve the high resistance and low Breakdown Voltage (BV) of 4H-SiC SBD, the metal annealing process is usually used to to stabilize SBH. We confirmed that post metal annealing after the chip process also stabilizes SBH by the post annealing experiment of applying failure chips (4H-SiC Ti/Al SBD) that have a forward current (IF) under 1 [A] with high resistance, because of the metal annealing process error. The result of experiments showed that the IFincrement and BV decrement are proportional to the applied temperatures over 450 °C, and the second additional post annealing shows a decrease of IFand BV. Aluminum and Titanium transformation with post metal annealing made a decrease of SBH, so that the on-resistance is decreased and BV is decreased (in severe cases, the intense post annealing generates Aluminum spiking). From a result of this work, using a suitable post metal annealing, we can improve the IFof SiC SBD with a high resistance failure from the metal process event.
APA, Harvard, Vancouver, ISO, and other styles
21

Nishikawa, Koichi, Yusuke Maeyama, Yusuke Fukuda, Masaaki Shimizu, Masashi Sato, and Hiroaki Iwakuro. "Reverse Biased Electrochemical Etching of SiC-SBD." Materials Science Forum 556-557 (September 2007): 419–22. http://dx.doi.org/10.4028/www.scientific.net/msf.556-557.419.

Full text
Abstract:
With development of very-low-micropipe-density substrate, reduction of other device killer defects becomes important for large size power devices. We employed reverse biased electrochemical etching (RECE) method in order to elucidate where the current leaks out in Schottky barrier diode. Low concentration 4H-SiC epi-layer with Al implanted guard rings was electrochemically etched under reverse bias voltage up to 400V in HF-based electrolyte. The surface of the substrate was observed with Nomarski microscopy before and after RECE. In guard ring area, holes appeared which are aligned toward off-direction of the substrate. The length of the aligned holes is about 25μm. The guard ring surrounding the holes were etched uniformly but limited as though there exists a boundary parallel to the steps. In Schottky contact area, not all but some of carrot defects showed an etched feature after RECE. Such etching features are also observed at different position without carrot. We consider that threading screw dislocation is one cause of leakage current in SBD. An etching feature like tangled strings also appeared. Its outer dimension is more than 1mm with thickness of about 50μm. The origin of tangled-string-like feature is not clear yet.
APA, Harvard, Vancouver, ISO, and other styles
22

Hayashi, Tetsuya, Hideaki Tanaka, Yoshio Shimoida, Satoshi Tanimoto, and Masakatsu Hoshi. "New High-Voltage Unipolar Mode p+ Si/n– 4H-SiC Heterojunction Diode." Materials Science Forum 483-485 (May 2005): 953–56. http://dx.doi.org/10.4028/www.scientific.net/msf.483-485.953.

Full text
Abstract:
We demonstrate a new high-voltage p+ Si/n- 4H-SiC heterojunction diode (HJD) by numerical simulation and experimental results. This HJD is expected to display good reverse recovery because of unipolar action similar to that of a SiC Schottky barrier diode (SBD) when forward biased. The blocking voltage of the HJD is almost equal to the ideal level in the drift region of n- 4H-SiC. In addition, the HJD has the potential for a lower reverse leakage current compared with the SBD. A HJD was fabricated with p+-type polycrystalline silicon on an n--type epitaxial layer of 4H-SiC. Measured reverse blocking voltage was 1600 V with low leakage current. Switching characteristics of the fabricated HJD showed nearly zero reverse recovery with an inductive load circuit.
APA, Harvard, Vancouver, ISO, and other styles
23

Sato, Shinji, Fumiki Kato, Hiroshi Hozoji, Hiroshi Sato, Hiroshi Yamaguchi, and Shinsuke Harada. "High-Temperature Operating Characteristics of Inverter Using SBD-Integrated MOSFET." Materials Science Forum 1004 (July 2020): 1115–22. http://dx.doi.org/10.4028/www.scientific.net/msf.1004.1115.

Full text
Abstract:
In the conventional SiC-MOSFET, a PN junction diode is included between the source and drain. This P-N junction diode not only causes device degradation, but also generates a large reverse recovery surge voltage during high temperature operation. This surge voltage increases the electrical stress of the power converter, causing dielectric breakdown and control malfunction. We have developed a SBD integrated SiC-MOSFET. This MOSFET reduces the occurrence of reverse recovery surge voltage during high-temperature operation caused by inactivating the included PN junction diode. In this paper, we discuss the characteristics of the inverter composed of the developed SiC-MOSFET in high-temperature operation. As a result, the inverter using a SBD integrated SiC-MOSFET with the PN junction diode deactivated was able to reduce surge voltage at high temperature operation.
APA, Harvard, Vancouver, ISO, and other styles
24

Kim, S. J., S. Kim, Sang Cheol Kim, In Ho Kang, K. H. Lee, and T. Matsuoka. "FLR Geometry Dependence of Breakdown Voltage Characteristics for JBS-Assisted FLR SiC-SBD." Materials Science Forum 556-557 (September 2007): 869–72. http://dx.doi.org/10.4028/www.scientific.net/msf.556-557.869.

Full text
Abstract:
We have investigated the field limiting ring (FLR) geometry dependence of breakdown voltage characteristics for a junction barrier Schottky (JBS)-assisted FLR SiC-SBD. The SiC-SBDs having a guard ring-assisted FLR surrounding a Schottky contact edge and an internal ring inside Schottky contact were fabricated. The breakdown voltage characteristics of the JBS-assisted FLR SiC-SBD are significantly dependent on the width, spacing, and number of FLR. The breakdown voltage characteristic is improved as either the FLR width and FLR number increase or the FLR spacing decreases. Approximately 1650 V maximal breakdown voltage, corresponding to 82% ideal breakdown voltage, is observed with seven FLRs having 5 2m width and 1 2m spacing.
APA, Harvard, Vancouver, ISO, and other styles
25

Draghici, Florin, Gheorghe Brezeanu, Ion Rusu, Florin Bernea, and Phillippe Godignon. "High Temperature SiC Sensor with an Isolated Package." Materials Science Forum 740-742 (January 2013): 1002–5. http://dx.doi.org/10.4028/www.scientific.net/msf.740-742.1002.

Full text
Abstract:
This paper presents an improved version and new results on a temperature sensor based on SiC Schottky Barrier Diode (SBD). SiC SBD structures of different areas were packaged in a metallic-glass case. The encapsulated sensor was electrically measured at several temperatures. A good linearity of the forward voltage measured at a constant current versus temperature dependence was obtained in the temperature range of 150-400°C where the sensor is meant to operate. Optical investigation, correlated with electrical measurements, prove the reliability of the sensor structure and of the package solutions at temperatures up to 400°C.
APA, Harvard, Vancouver, ISO, and other styles
26

Hafez, Alaa El-Din Sayed, and Mohamed Abd El-Latif. "Optimum Barrier Height for SiC Schottky Barrier Diode." ISRN Electronics 2013 (July 31, 2013): 1–5. http://dx.doi.org/10.1155/2013/528094.

Full text
Abstract:
The study of barrier height control and optimization for Schottky barrier diode (SBD) from its physical parameters have been introduced using particle swarm optimization (PSO) algorithm. SBD is the rectifying barrier for electrical conduction across the metal semiconductor (MS) junction and, therefore, is of vital importance to the successful operation of any semiconductor device. 4H-SiC is used as a semiconductor material for its good electrical characteristics with high-power semiconductor devices applications. Six physical parameters are considered during the optimization process, that is, device metal, mobile charge density, fixed oxide charge density, interface trapped charge density, oxide thickness, and voltage drop across the metal-semiconductor contact. The optimization process was performed using a MATLAB program. The results show that the SBD barrier height has been optimized to achieve a maximum or minimum barrier height across the contact, in addition to the ability of controlling the physical parameters to adjust the device barrier height.
APA, Harvard, Vancouver, ISO, and other styles
27

Makino, Takahiro, Manato Deki, Shinobu Onoda, Norihiro Hoshino, Hidekazu Tsuchida, and Takeshi Ohshima. "Ion-Induced Anomalous Charge Collection Mechanisms in SiC Schottky Barrier Diodes." Materials Science Forum 821-823 (June 2015): 575–78. http://dx.doi.org/10.4028/www.scientific.net/msf.821-823.575.

Full text
Abstract:
The charge induced in SiC-SBDs with different epi-layer thicknesses by ion incidence was measured to understand the mechanism of heavy-ion-induced anomalous charge collection in SiC-SBDs. SiC SBD of which epitaxial-layer thicknesses is close to ion range show larger anomalous charge collection than SBD with thicker epi-layer although the former one has lower electric field than the later one. The gains of collected charge from the SBDs suggest that the impact ionization under 0.16 - 0.18 MV/cm of the static electric field in depletion layer is not dominant mechanisms for the anomalous charge collection. It is suggested that the epitaxial-layer thickness and ion-induced transient high electric field are key to understand the anomalous charge collection mechanisms in SBDs.
APA, Harvard, Vancouver, ISO, and other styles
28

Hatakeyama, Tetsuo, Chiharu Ota, Johji Nishio, and Takashi Shinohe. "Optimization of a SiC Super-SBD Based on Scaling Properties of Power Devices." Materials Science Forum 527-529 (October 2006): 1179–82. http://dx.doi.org/10.4028/www.scientific.net/msf.527-529.1179.

Full text
Abstract:
Scaling theory is applied in the design of power devices. The scaling law for power devices is presented. A new figure of merit (HFOM) is derived as an invariant of scale transformation, which is a function of avalanche breakdown field and regarded as a measure of the performance of a power device. The optimization of a SiC Schottky barrier diode with the floating junction structure (Super-SBD) has been performed using the HFOM as a measure of the performance. The performance of the optimized Super-SBD surpasses the performance limit of 4H-SiC devices with the conventional structure.
APA, Harvard, Vancouver, ISO, and other styles
29

Kinoshita, Akimasa, Takashi Nishi, Takasumi Ohyanagi, Tsutomu Yatsuo, Kenji Fukuda, Hajime Okumura, and Kazuo Arai. "Electrical Characteristics of Ti/4H-SiC Slicidation Schottky Barrier Diode." Materials Science Forum 600-603 (September 2008): 643–46. http://dx.doi.org/10.4028/www.scientific.net/msf.600-603.643.

Full text
Abstract:
The reaction and phase formation of the Ti/SiC Schottky contact as a function of the annealing temperature (400~700oC) were investigated. The Schottky barrier height (fb) and the crystal structure of the samples annealed at the different temperature were measured by the forward current-voltage (IV) characteristics and the x-ray diffraction (XRD), respectively. XRD measurements were performed in the w-2q scan and the pole figure measurement for Ti (101) diffraction peak. The fb was changed as a function of temperature. It was concluded that the fb variation and non-uniformity of the samples annealed at 400oC, 500oC, 600 oC and 700oC was caused by changing the condition at the interface between SiC substrate and Ti. We fabricated the 600V Ti/SiC silicidation SBD annealed at 500oC for 5min. As a result, a low forward voltage drop, low reverse leakage current and stability at high temperature (200 oC) for the Ti/SiC silicidation SBD were shown.
APA, Harvard, Vancouver, ISO, and other styles
30

Shimbori, Atsushi, and Alex Q. Huang. "Design methodologies and fabrication of 4H-SiC lateral Schottky barrier diode on thin RESURF layer." Applied Physics Letters 120, no. 12 (March 21, 2022): 122103. http://dx.doi.org/10.1063/5.0081106.

Full text
Abstract:
This paper discusses the design methodologies and fabrication of a 4H-SiC lateral reduced surface electric field (RESURF) Schottky barrier diode (SBD), using a very thin (0.7 μm) RESURF layer. The proposed optimization of the anode and cathode edge structure with recessed etch into mesa termination minimizes the electric field induced impact ionization at the edge of the active area. Three-dimensional simulations were conducted to optimize electric field distribution and enable close to ideal RESURF breakdown voltage within the device, while enabling junction isolation structure between neighboring devices through mesa etch. The design methodologies and the fabricated lateral SBD offer guidance for future efforts toward realizing a monolithic SiC high voltage integrated circuit.
APA, Harvard, Vancouver, ISO, and other styles
31

Okino, Hiroyuki, Norifumi Kameshiro, Kumiko Konishi, Naomi Inada, Kazuhiro Mochizuki, Akio Shima, Natsuki Yokoyama, and Renichi Yamada. "Electrical Characteristics of Large Chip-Size 3.3 kV SiC-JBS Diodes." Materials Science Forum 740-742 (January 2013): 881–86. http://dx.doi.org/10.4028/www.scientific.net/msf.740-742.881.

Full text
Abstract:
The reduction of reverse leakage currents was attempted to fabricate 4H-SiC diodes with large current capacity for high voltage applications. Firstly diodes with Schottky metal of titanium (Ti) with active areas of 2.6 mm2 were fabricated to investigate the mechanisms of reverse leakage currents. The reverse current of a Ti Schottky barrier diode (SBD) is well explained by the tunneling current through the Schottky barrier. Then, the effects of Schottky barrier height and electric field on the reverse currents were investigated. The high Schottky barrier metal of nickel (Ni) effectively reduced the reverse leakage current to 2 x 10-3 times that of the Ti SBD. The suppression of the electric field at the Schottky junction by applying a junction barrier Schottky (JBS) structure reduced the reverse leakage current to 10-2 times that of the Ni SBD. JBS structure with high Schottky barrier metal of Ni was applied to fabricate large chip-size SiC diodes and we achieved 30 A- and 75 A-diodes with low leakage current and high breakdown voltage of 4 kV.
APA, Harvard, Vancouver, ISO, and other styles
32

Tominaga, Takaaki, Naoyuki Kawabata, Akihiro Koyama, Takanori Tanaka, Hiroshi Watanabe, Nobuyuki Tomita, Naruhisa Miura, Takeharu Kuroiwa, and Satoshi Yamakawa. "Low Resistivity SiC Devices with a Drift Layer Optimized by Variational Approach." Materials Science Forum 858 (May 2016): 765–68. http://dx.doi.org/10.4028/www.scientific.net/msf.858.765.

Full text
Abstract:
A reduction of drift resistivity by an optimized epitaxial layer has been theoretically calculated using variational approach. An epitaxial growth was carried out based on the calculated design of the drift layer for a 1.7 kV SBD, with a conventional epitaxial growth for comparison, to experimentally prove a reduction of drift resistivity. An improvement of trade-off relationships for the SBD with an optimized epitaxial layer has been revealed through the investigation of their electrical characteristics.
APA, Harvard, Vancouver, ISO, and other styles
33

WATANABE, Yukihiko, Takashi KATSUNO, Tsuyoshi ISHIKAWA, Hirokazu FUJIWARA, and Toshimasa YAMAMOTO. "Relationship between Characteristics of SiC-SBD and Surface Defect." Hyomen Kagaku 35, no. 2 (2014): 84–89. http://dx.doi.org/10.1380/jsssj.35.84.

Full text
APA, Harvard, Vancouver, ISO, and other styles
34

Furno, M., F. Bonani, G. Ghione, Sergio Ferrero, Samuele Porro, P. Mandracci, Luciano Scaltrito, G. Richieri, Denis Perrone, and Luigi Merlin. "Design, Fabrication and Characterization of 1.5 mΩcm2, 800 V 4H-SiC n-Type Schottky Barrier Diodes." Materials Science Forum 483-485 (May 2005): 941–44. http://dx.doi.org/10.4028/www.scientific.net/msf.483-485.941.

Full text
Abstract:
We present a theoretical and experimental study on the design, fabrication and characterization of Schottky Barrier Diodes (SBD) on commercial 4H-SiC epitaxial layers. Numerical simulations were performed with a commercial tool on different edge termination structures, with the aim of optimizing the device behavior. For each termination design, SBD were fabricated and characterized by means of electrical measurements vs. temperature. Simulations provided also useful data for the assessment of the device process technology.
APA, Harvard, Vancouver, ISO, and other styles
35

Song, Ho Keun, Jong Ho Lee, Myeong Sook Oh, Jeong Hyun Moon, Han Seok Seo, Jeong Hyuk Yim, Sun Young Kwon, and Hyeong Joon Kim. "Schottky Barrier Diode Fabricated by MOCVD-Grown Epilayer Using Bis-Trimethylsilylmethane Precursor." Materials Science Forum 600-603 (September 2008): 971–74. http://dx.doi.org/10.4028/www.scientific.net/msf.600-603.971.

Full text
Abstract:
Schottky barrier diode (SBD) was fabricated by MOCVD using bistrimethylsilylmethane (BTMSM, C7H20Si2) precursor. The 4H-SiC substrates which had different crystallographic characteristics were used for the comparison of the crystallinity effect on the electrical properties of the SBDs. From the measurement of the reverse I-V characteristics of the SBDs with micropipes, it is shown that the origin of the main leakage path and early breakdown (or ohmic behavior in reverse bias) in 4H-SiC SBDs is the grain boundaries caused by the inclusions or other defects. The best performance of SBD were shown in the epilayer grown at 1440 oC using high quality substrate, and the breakdown voltage and reverse leakage current were about 450 V and 10-9 A/cm2, respectively.
APA, Harvard, Vancouver, ISO, and other styles
36

Wang, Xi, Yiwen Zhong, Hongbin Pu, Jichao Hu, Xianfeng Feng, and Guowen Yang. "Investigation of lateral spreading current in the 4H-SiC Schottky barrier diode chip." Journal of Semiconductors 42, no. 11 (November 1, 2021): 112802. http://dx.doi.org/10.1088/1674-4926/42/11/112802.

Full text
Abstract:
Abstract Lateral current spreading in the 4H-SiC Schottky barrier diode (SBD) chip is investigated. The 4H-SiC SBD chips with the same vertical parameters are simulated and fabricated. The results indicate that there is a fixed spreading resistance at on-state in current spreading region for a specific chip. The linear specific spreading resistance at the on-state is calculated to be 8.6 Ω/cm in the fabricated chips. The proportion of the lateral spreading current in total forward current (P sp) is related to anode voltage and the chip area. P sp is increased with the increase in the anode voltage during initial on-state and then tends to a stable value. The stable values of P sp of the two fabricated chips are 32% and 54%. Combined with theoretical analysis, the proportion of the terminal region and scribing trench in a whole chip (K sp) is also calculated and compared with P sp. The K sp values of the two fabricated chips are calculated to be 31.94% and 57.75%. The values of K sp and P sp are close with each other in a specific chip. The calculated K sp can be used to predict that when the chip area of SiC SBD becomes larger than 0.5 cm2, the value of P sp would be lower than 10%.
APA, Harvard, Vancouver, ISO, and other styles
37

Zhang Lin, Han Chao, Ma Yong-Ji, Zhang Yi-Men, and Zhang Yu-Ming. "Gamma-ray radiation effect on Ni/4H-SiC SBD." Acta Physica Sinica 58, no. 4 (2009): 2737. http://dx.doi.org/10.7498/aps.58.2737.

Full text
APA, Harvard, Vancouver, ISO, and other styles
38

Yang Yin-Tang, Geng Zhen-Hai, Duan Bao-Xing, Jia Hu-Jun, Yu Cen, and Ren Li-Li. "Characteristics of a SiC SBD with semi-superjunction structure." Acta Physica Sinica 59, no. 1 (2010): 566. http://dx.doi.org/10.7498/aps.59.566.

Full text
APA, Harvard, Vancouver, ISO, and other styles
39

Kato, Fumiki, Fengqun Lang, Simanjorang Rejeki, Hiroshi Nakagawa, Hiroshi Yamaguchi, and Hiroshi Sato. "Precise Chip Joint Method with Sub-micron Au Particle for High-density SiC Power Module Operating at High Temperature." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2013, HITEN (January 1, 2013): 000254–59. http://dx.doi.org/10.4071/hiten-wa17.

Full text
Abstract:
In this work, a novel precise chip joint method using sub-micron Au particle for high-density silicon carbide (SiC) power module operating at high temperature is proposed. A module structure of SiC power devices are sandwiched between two silicon nitride-active metal brazed copper (SiN-AMC) circuit boards. To make a precise position and height control of the chip bonding, the top side (gate/source or anode pad side) of SiC power devices are flip-chip bonded to circuit electrodes using sub-micron Au particle with low temperature (250°C) and pressure-less sintering. The accuracy of the bonding position of chips was less than 10 μm and the accuracy of the height after bonding chips was less than 15 μm. Mechanical shear fatigue tests for flip-chip bonded SiC Schottky barrier diode (SBD) were carried out. As a result, initial shear strength of the joint was 36 MPa. The shear strength of 43 MPa is obtained after storage life test (500 hours at 250°C), and also 35 MPa is obtained even after thermal cycle stress test (1000 cycles between −40°C and 250°C). The flip-chip bonding of SiC-JFET is successfully realizedon the substrate without short or open failure electrically. Finally we joint the backside of the SiC-JFET (drain side) and the SiC-SBD (cathode side) to each circuit electrodes at once by means of reflow process with Au-12%Ge solder. The structured sandwich SiC power module was also successfully formed.
APA, Harvard, Vancouver, ISO, and other styles
40

Ota, Chiharu, Johji Nishio, Tetsuo Hatakeyama, Takashi Shinohe, Kazutoshi Kojima, Shin Ichi Nishizawa, and Hiromichi Ohashi. "Simulation, Fabrication and Characterization of 4H-SiC Floating Junction Schottky Barrier Diodes (Super-SBDs)." Materials Science Forum 556-557 (September 2007): 881–84. http://dx.doi.org/10.4028/www.scientific.net/msf.556-557.881.

Full text
Abstract:
The calculation for 4H-SiC floating junction Schottky barrier diodes (Super-SBDs) was carried out by device simulation and the optimized device structure was fabricated. The best characteristics of the Super-SBDs were breakdown voltage of 2700V and the specific on-resistance of 2.57m*cm2. The world record of Bariga’s Figure of Merit (BFOM) for SiC-SBD expressed by 4Vbd 2/Ron was improved to 11,354MW/cm2.
APA, Harvard, Vancouver, ISO, and other styles
41

Liu, Ao, Yong Hong Tao, Song Bai, Gang Chen, Ling Wang, Run Hua Huang, Yun Li, and Zhi Fei Zhao. "Fabrication and High Temperature Characterization of 1200V-15A 4H-SIC JBS Diode." Applied Mechanics and Materials 713-715 (January 2015): 1034–37. http://dx.doi.org/10.4028/www.scientific.net/amm.713-715.1034.

Full text
Abstract:
1200V-15A 4H-SiC junction barrier schottky (JBS) diodes were designed and fabricated based on SiC epitaxy and device technology. By adopting the proper SBD metal,optimized structures and fabrication process, we succeeded in achieving good balance between blocking voltage and on-resistance, especially at high temperature to 200°C. Furthermore, the fabricated diode have a fast recovery time of 30ns, and its dynamic characteristics are constant at high temperature.
APA, Harvard, Vancouver, ISO, and other styles
42

Nagao, Shijo, Takuo Sugioka, Satoshi Ogawa, Teruhisa Fujibayashi, Zhang Hao, and Katsuaki Suganuma. "High Thermal Stability of SiC Packaging with Sintered Ag Paste Die-attach combined with Imide-based Molding." International Symposium on Microelectronics 2015, no. 1 (October 1, 2015): 000349–52. http://dx.doi.org/10.4071/isom-2015-wp15.

Full text
Abstract:
We report that ultra-high thermal reliability can be achieved by combining Ag paste sintering die-attach and injection transfer molding with imide-based mold composite. Test specimens of SiC SBD in TO247 discrete-package are prepared; SiC dies bonded on Cu lead frame, Al ribbon wiring from electrode of SiC Schottky barrier diode (SBD) chip to the Cu leads, and injection transfer molding process. The hybrid nano+micro flake Ag paste realizes a low temperature bond process of 250°C in air, die-shear stress recorded 23 MPa without intensive pressure. The thermo-mechanical parameters like glass transition temperature, Young's modulus and CTE of the thermosetting composite are carefully tuned for both the manufacturing process targeting the device operating temperature of 250°C. The test pieces are tested by harsh thermal cycling between −50°C to 250°C, and compared with the other specimens made with usual Pb-5Sn soldering die-attach with the same molding composite. Interface failures are investigated by scanning acoustic tomography (SAT), and the electric properties of SBD are checked by I-V measurements. The sintered Ag die-attach survived over 500 cycles without any failures around the interfaces of SiC die, Cu lead-frame, and mold materials, and no obvious change is found in electronic properties. However, Pb-Sn die-attach joints are gradually damaged with increasing thermal cycles causing degraded I-V property. The SEM images indicate the microstucture of sintered Ag layer is unchanged after the thermal cycles, because of the impregnated imid-matrix into the porous Ag. Our results demonstrate that the combination of Ag sinter paste die-attach and imide-based thermosetting composite can be a massproduction-ready packaging technology to realize the high operation temperature of post-silicon power devices.
APA, Harvard, Vancouver, ISO, and other styles
43

Kato, Tomohisa, Akimasa Kinoshita, Keisuke Wada, Takashi Nishi, Eiji Hozomi, Hiroyoshi Taniguchi, Kenji Fukuda, and Hajime Okumura. "Morphology Improvement of Step Bunching on 4H-SiC Wafers by Polishing Technique." Materials Science Forum 645-648 (April 2010): 763–65. http://dx.doi.org/10.4028/www.scientific.net/msf.645-648.763.

Full text
Abstract:
In this paper, we report a new polishing technique regarding the elimination of step bunching on the silicon carbide (SiC) surface. The step bunching generation is often observed as frequent phenomenon on the surface of SiC epilayers grown on low off-angle (0001) SiC wafers and on SiC devices after annealing to activate the dopants. We polished the step bunching surface using a chemical mechanical polishing (CMP) technique reported in a previous study, and we succeeded to improve the morphology with a flat and smooth surface which showed a small Rms value of around 0.1nm. We especially found an excellent polishing effect for the control of leakage current in reverse I-V characteristics of SiC Schottky barrier diodes (SBD).
APA, Harvard, Vancouver, ISO, and other styles
44

Gao, Rongyu, Hongyu Cheng, Wenmao Li, Chenkai Deng, Jianguo Chen, Qing Wang, and Hongyu Yu. "A Fast Recovery Vertical Superjunction MOSFET with n-Si and p-3C-SiC Pillars." Crystals 12, no. 7 (June 28, 2022): 916. http://dx.doi.org/10.3390/cryst12070916.

Full text
Abstract:
In the traditional SJ MOSFET structure, n/p pillars with the same doping concentrations in the drift region are introduced to decrease the on-resistance. However, SJ MOSFET will turn on the parasitic diodes due to fast reverse recovery, further inducing severe oscillation in the reverse recovery of the device and the corresponding adverse effect on the circuit. In this study, a fast recovery vertical superjunction (SJ) MOSFET with n-Si and p-3C-SiC pillars was studied. Unlike other structures, such as the 4H-SiC superjunction UMOSFET with a heterojunction diode or the ultra-low recovery charge cell-distributed Schottky contacts SJ-MOSFET with integrated isolated NMOS, we introduce a Schottky barrier diode (SBD) on the source contact at the top of the n-Si pillar in the SJ-MOSFET to improve the device reverse recovery. The simulation software TCAD Silvaco was utilized to simulate the device properties. Compared with the conventional Si SJ, the proposed Si/SiC SJ with the Schottky barrier diode (SBD) connected demonstrated a lower reverse recovery charge, which was reduced by 90.5%, respectively. The waveform of the reverse recovery current demonstrates that the electrons in the device are withdrawn from SBD during reverse recovery, preventing the opening of the parasitic diode in the SJ MOSFET. Finally, another structure is illustrated to decrease the gate capacitance by introducing a thin p-base layer between the gate metal and N-Si pillar so that it can improve the switching characteristics of devices. The open-loss and off-loss of the improved device were reduced by 33% and 42.3%, respectively.
APA, Harvard, Vancouver, ISO, and other styles
45

Bernat, Robert, Ivana Capan, Luka Bakrač, Tomislav Brodar, Takahiro Makino, Takeshi Ohshima, Željko Pastuović, and Adam Sarbutt. "Response of 4H-SiC Detectors to Ionizing Particles." Crystals 11, no. 1 (December 24, 2020): 10. http://dx.doi.org/10.3390/cryst11010010.

Full text
Abstract:
We report the response of newly designed 4H-SiC Schottky barrier diode (SBD) detector prototype to alpha and gamma radiation. We studied detectors of three different active area sizes (1 × 1, 2 × 2 and 3 × 3 mm2), while all detectors had the same 4H-SiC epi-layer thickness of approximately µm, sufficient to stop alpha particles up to 6.8 MeV, which have been used in this study. The detector response to the various alpha emitters in the 3.27 MeV to 8.79 MeV energy range clearly demonstrates the excellent linear response to alpha emissions of the detectors with the increasing active area. The detector response in gamma radiation field of Co-60 and Cs-137 sources showed a linear response to air kerma and to different air kerma rates as well, up to 4.49 Gy/h. The detector response is not in saturation for the dose rates lower than 15.3 mGy/min and that its measuring range for gamma radiation with energies of 662 keV, 1.17 MeV and 1.33 MeV is from 0.5 mGy/h–917 mGy/h. No changes to electrical properties of pristine and tested 4H-SiC SBD detectors, supported by a negligible change in carbon vacancy defect density and no creation of other deep levels, demonstrates the radiation hardness of these 4H-SiC detectors.
APA, Harvard, Vancouver, ISO, and other styles
46

Ivanov, Pavel A., and Igor V. Grekhov. "Breakdown Behavior of 900-V 4H-SiC Schottky Barrier Diodes Terminated with Boron-Implanted pn-Junction." Materials Science Forum 600-603 (September 2008): 955–58. http://dx.doi.org/10.4028/www.scientific.net/msf.600-603.955.

Full text
Abstract:
High-voltage (900 V) 4H-SiC Schottky-barrier diodes (SBD) terminated with guard pnjunction were fabricated and investigated. The guard pn-junction was formed by room temperature boron implantation followed by high temperature annealing. Owing to the transient enhanced boron diffusion during anneal, the depth of guard pn-junction is about 1.7 μm, that is approximately 1 μm deeper than the expected average range of 11B ions in 4H-SiC. The maximum reverse voltage of 4H-SiC SBD produced has been found to be limited by the avalanche breakdown in cylindrical portion of planar pn-junction. The value of the breakdown voltage of 910 V is close to theoretical one calculated for the dopant density = 2.5×1015 cm-3, n-base thickness d = 12.5 μm and junction curvature rj = 1.7 μm. Dynamic (pulse) reverse current-voltage characteristics were measured in the breakdown regime. It was found that dynamic breakdown voltage increases with shortening the pulse duration. Due to homogeneous avalanche breakdown at the edge of the quard pn-junction and high differential resistance in the breakdown regime, the diodes under test are able to withstand, with no degradation, pulse reverse voltage at least 1600 V.
APA, Harvard, Vancouver, ISO, and other styles
47

Kitabatake, Makoto, M. Tagome, S. Kazama, K. Yamashita, K. Hashimoto, Kunimasa Takahashi, O. Kusumoto, et al. "Normally-Off 1400V/30A 4H-SiC DACFET and its Application to DC-DC Converter." Materials Science Forum 600-603 (September 2008): 913–18. http://dx.doi.org/10.4028/www.scientific.net/msf.600-603.913.

Full text
Abstract:
Large (3.6 x 3.6 mm2) chips of the SiC DACFET were fabricated and mounted in TO220 packages. The drain-source avalanche breakdown voltage without any gate bias (Vgs=0V) is measured to be >1400V. The SiC DACFET keeps the normally-off characteristics even at 150°C. Ron and specific Ron of the SiC DACFET is measured to be 62mΩ and 6.7 mΩcm2 at RT while those at 150°C change to 107 mΩ and 11.6 mΩcm2. The 400V / 3 kW DC-DC switched-mode power-conversion circuit with 100kHz switching was fabricated using the SiC DACFET and the SiC SBD. The turn-off switching loss reduces dramatically using the SiC-DACFET down to 77μJ/pulse which is less than 1/10 of that using the Si-IGBT.
APA, Harvard, Vancouver, ISO, and other styles
48

Fujimoto, Keiya, Hiroaki Hanafusa, Takuma Sato, and Seiichiro Higashi. "Direct observation of three-dimensional transient temperature distribution in SiC Schottky barrier diode under operation by optical-interference contactless thermometry imaging." Applied Physics Express 15, no. 2 (January 25, 2022): 026502. http://dx.doi.org/10.35848/1882-0786/ac4a10.

Full text
Abstract:
Abstract We have developed optical-interference contactless thermometry imaging technique to visualize three-dimensional transient temperature distribution in 4H-SiC Schottky barrier diode (SBD) under operation. When a 1 ms forward pulse bias was applied, clear variation of optical interference fringes induced by self-heating and cooling were observed. Thermal diffusion and optical analysis revealed three-dimensional temperature distribution with high spatial (≤10 μm) and temporal (≤100 μs) resolutions. A hot spot that signals breakdown of the SBD was successfully captured as an anomalous interference, which indicated a local heating to a temperature as high as 805 K at the time of failure.
APA, Harvard, Vancouver, ISO, and other styles
49

Nomura, Yuki, Tsuyoshi Funaki, Toshio Hanada, and Takashi Nakamura. "Voltage Distribution in Ultra High Voltage SBD Modules with Directly Stacked SiC SBD Bare Chips in Series." IEEJ Transactions on Industry Applications 141, no. 8 (August 1, 2021): 646–53. http://dx.doi.org/10.1541/ieejias.141.646.

Full text
APA, Harvard, Vancouver, ISO, and other styles
50

Berthou, Maxime, Besar Asllani, Pierre Brosselard, and Philippe Godignon. "Cryogenic to High Temperature Exploration of 4H-SiC W-SBD." Materials Science Forum 821-823 (June 2015): 583–87. http://dx.doi.org/10.4028/www.scientific.net/msf.821-823.583.

Full text
Abstract:
W-SBD show exceptional reliability from 200 to 500K, however, its barrier analysis has never been performed thoroughly down 81K. This paper shows our study of Schottky barrier and Richardson coefficient was extracted for different temperature ranges. We observed fluctuation in function of the temperature. We analyse this phenomenon and compare it to literature for other barriers. Measurements of reverse characteristics up 1200V have been performed from 81 to 450K. It confirms that partial ionization influence on the drift doping impacts on the barrier height.
APA, Harvard, Vancouver, ISO, and other styles
You might also be interested in the bibliographies on the topic 'SiC SBD' for other source types:
Dissertations / Theses Books
We offer discounts on all premium plans for authors whose works are included in thematic literature selections. Contact us to get a unique promo code!

To the bibliography