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1

Vasyukevich, Vadim. Asynchronous Operators of Sequential Logic: Venjunction & Sequention: Digital Circuit Analysis and Design. Berlin, Heidelberg: Springer Berlin Heidelberg, 2011.

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2

Digital logic and state machine design. 3rd ed. Ft. Worth: Saunders College Pub., 1995.

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3

Digital logic and state machine design. 2nd ed. Philadelphia: Saunders College Pub., 1990.

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4

Comer, David J. Digital logic and state machine design. 3rd ed. New York: Oxford University Press, 1995.

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5

Comer, David J. Digital logic and state machine design. 2nd ed. Philadelphia, Pa: Saunders College Pub, 1990.

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6

Bronstein, Alexandre. String-functional semantics for formal verification of synchronous circuits. Stanford, Calif: Dept. of Computer Science, Stanford University, 1988.

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7

Steven, Nowick, ed. Sequential optimization of asynchronous and synchronous finite-state machines: Algorithms and tools. Boston: Kluwer Academic Publishers, 2001.

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8

Fuhrer, Robert M. Sequential optimization of asynchronous and synchronous finite-state machines: Algorithms and tools. Boston: Kluwer Academic Publishers, 2001.

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9

Lee, Sunggu. Advanced digital logic design: Using Verilog, state machines, and synthesis for FPGAs. Toronto, Ont: Thomson, 2006.

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10

Ndjountche, Tertulien. Digital Electronics 2: Sequential and Arithmetic Logic Circuits. Wiley & Sons, Incorporated, John, 2016.

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11

Ndjountche, Tertulien. Digital Electronics 2: Sequential and Arithmetic Logic Circuits. Wiley & Sons, Incorporated, John, 2016.

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12

Vasyukevich, Vadim. Asynchronous Operators of Sequential Logic : Venjunction & Sequention: Digital Circuit Analysis and Design. Springer, 2011.

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13

Digital logic and state machine design. 3rd ed. Saunders College Publishing, 1995.

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14

Fuhrer, Robert M., and Steven M. Nowick. Sequential Optimization of Asynchronous and Synchronous Finite-State Machines: Algorithms and Tools. Springer, 2001.

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15

Liebig, Hans. Logischer Entwurf digitaler Systeme. 4th ed. Springer, 2005.

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