Relevant bibliographies by topics / Semiconductor layer deposits

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  1. Journal articles
  2. Dissertations / Theses
  3. Book chapters
  4. Conference papers

Academic literature on the topic 'Semiconductor layer deposits'

Author: Grafiati
Published: 4 June 2021
Last updated: 6 February 2022

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Journal articles on the topic "Semiconductor layer deposits"

1

Zuo, Jialin, Sean Tavakoli, Deepakkrishna Mathavakrishnan, Taichong Ma, Matthew Lim, Brandon Rotondo, Peter Pauzauskie, Felippe Pavinatto, and Devin MacKenzie. "Additive Manufacturing of a Flexible Carbon Monoxide Sensor Based on a SnO2-Graphene Nanoink." Chemosensors 8, no. 2 (May 28, 2020): 36. http://dx.doi.org/10.3390/chemosensors8020036.

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Carbon monoxide (CO) gas is an odorless toxic combustion product that rapidly accumulates inside ordinary places, causing serious risks to human health. Hence, the quick detection of CO generation is of great interest. To meet this need, high-performance sensing units have been developed and are commercially available, with the vast majority making use of semiconductor transduction media. In this paper, we demonstrate for the first time a fabrication protocol for arrays of printed flexible CO sensors based on a printable semiconductor catalyst-decorated reduced graphene oxide sensor media. These sensors operate at room temperature with a fast response and are deposited using high-throughput printing and coating methods on thin flexible substrates. With the use of a modified solvothermal aerogel process, reduced graphene oxide (rGO) sheets were decorated with tin dioxide (SnO2) nanoscale deposits. X-ray diffraction data were used to show the composition of the material, and high-resolution X-ray photoelectron spectroscopy (XPS) characterization showed the bonding status of the sensing material. Moreover, a very uniform distribution of particles was observed in scanning (SEM) and transmission electron microscopy (TEM) images. For the fabrication of the sensors, silver (Ag) interdigitated electrodes were inkjet-printed from nanoparticle inks on plastic substrates with 100 µm linewidths and then coated with the SnO2-rGO nanocomposite by inkjet or slot-die coating, followed by a thermal treatment to further reduce the rGO. The detection of 50 ppm of CO in nitrogen was demonstrated for the devices with a slot-die coated active layer. A response of 15%, response time of 4.5 s, and recovery time of 12 s were recorded for these printed sensors, which is superior to other previously reported sensors operating at room temperature.
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Moon, Yeon-Keon, Dae-Yong Moon, Sang-Ho Lee, Chang-Oh Jeong, and Jong-Wan Park. "High Performance Thin Film Transistor with ZnO Channel Layer Deposited by DC Magnetron Sputtering." Journal of Nanoscience and Nanotechnology 8, no. 9 (September 1, 2008): 4557–60. http://dx.doi.org/10.1166/jnn.2008.ic24.

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Research in large area electronics,1 especially for low-temperature plastic substrates, focuses commonly on limitations of the semiconductor in thin film transistors (TFTs), in particular its low mobility. ZnO is an emerging example of a semiconductor material for TFTs that can have high mobility, while a-Si and organic semiconductors have low mobility (<1 cm2/Vs).2–5 ZnO-based TFTs have achieved high mobility, along with low-voltage operation low off-state current, and low gate leakage current. In general, ZnO thin films for the channel layer of TFTs are deposited with RF magnetron sputtering methods. On the other hand, we studied ZnO thin films deposited with DC magnetron sputtering for the channel layer of TFTs. After analyzing the basic physical and chemical properties of ZnO thin films, we fabricated a TFT-unit cell using ZnO thin films for the channel layer. The field effect mobility (μsat) of 1.8 cm2/Vs and threshold voltage (Vth) of −0.7 V were obtained.
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Geiler, Hans D. "Laser Annealing of Implanted Semiconductor Layers – One Bridge to Nano-Processing." Materials Science Forum 573-574 (March 2008): 237–56. http://dx.doi.org/10.4028/www.scientific.net/msf.573-574.237.

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About 25years after inventing the laser annealing effects of ion implanted semiconductors a summary of the related physical phenomena is given. The field of application for short and selectively deposited energy pulses in controlled thermally activated processing is critically reviewed with the emphasis on electrical activation of implanted layers. Starting form the energy deposition and continuing to the excited transport phenomena a set of regimes can be described, which allows the classification of the variety of laser annealing methods and their different application. Within the scope of controlled thermally activated processes in nanometer dimensions old phenomena like phase transitions in strong non-equilibrium to create metastable states or producing dissipative structures by nonlinear coupling effects with self-organization are taken into account for device generations beyond 45nm. The challenges and disadvantages of laser annealing methods for planar semiconductor technology will be elaborated with respect to the current progress in laser development.
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Kutanov, Askar, Nurbek Sydyk uluu, and Zamirgul Kazakbaeva. "RELIEF RECORDING SILVER AT DIRECT LASER EXPOSURE ON THE LAYER OF AMORPHOUS SILICON." Interexpo GEO-Siberia 8 (2019): 52–56. http://dx.doi.org/10.33764/2618-981x-2019-8-52-56.

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Results of direct laser recording on a two-component medium consisting of deposited layers of amorphous silicon and silver on a glass substrate by magnetron sputtering are presented. A single-mode semiconductor laser with λ = 405 nm for amorphous silicon film on glass substrate with a power of 120 mW is used for direct laser recording on amorphous silicon. Formation of the relief on the silver film with direct recording pulses of a semiconductor laser with λ = 405 nm at the a-Si layer is taken on the electron microscope TESCAN VEGA 3 LMH.
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Wang, Shuhao, Junfeng Shen, Baisong Du, Kexin Xu, Zhengshuai Zhang, and Chengyu Liu. "The Relationship between Natural Pyrite and Impurity Element Semiconductor Properties: A Case Study of Vein Pyrite from the Zaozigou Gold Deposit in China." Minerals 11, no. 6 (June 1, 2021): 596. http://dx.doi.org/10.3390/min11060596.

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Pyrite is a common sulfide mineral in gold deposits, and its unique thermoelectricity has received extensive attention in the field of gold exploration. However, there is still a lack of detailed research and direct evidence about how impurity elements affect mineral semiconductor properties. In this paper, combined with first-principles calculations, laser ablation inductively coupled plasma mass spectrometry (LA-ICP-MS) mapping technology and in situ Seebeck coefficient scanning probe technology were used to study the law of changing semiconductor properties in pyrite containing impurity elements such as As, Co, Ni, and Cu. The results showed that pyrite containing arsenic is a P-type semiconductor, and pyrites containing Ni, Co, Cu, and other elements are N-type semiconductors. When P-type pyrites containing As were supplemented with Ni, Cu, and other elements, the semiconductor type changed to N-type. However, Co addition did not change the semiconductor type of arsenic-rich pyrite. Pyrite formed under different temperature conditions tended to be enriched with different combinations of impurity elements, leading to the relative accumulation of P-type or N-type pyrites.
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Zhang, Chun Min, Xiao Yong Liu, Lin Qing Zhang, Hong Liang Lu, Peng Fei Wang, and David Wei Zhang. "Ru Thin Film Formation Using Oxygen Plasma Enhanced ALD and Rapid Thermal Processing." Materials Science Forum 815 (March 2015): 8–13. http://dx.doi.org/10.4028/www.scientific.net/msf.815.8.

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A novel Ru thin film formation method was proposed to deposit metallic Ru thin films on TiN substrate for future backend of line process in semiconductor technologies. RuO2 thin films were first grown on TiN substrate by oxygen plasma-enhanced atomic layer deposition technique. The deposited RuO2 thin films were then reduced into metallic Ru thin films by H2/N2-assisted annealing.
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Kim, Jae Yoo. "The Stability Effect of Atomic Layer Deposition (ALD) of Al2O3 on CH3NH3PbI3 Perovskite Solar Cell Fabricated by Vapor Deposition." Key Engineering Materials 753 (August 2017): 156–62. http://dx.doi.org/10.4028/www.scientific.net/kem.753.156.

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The perovskite solar cells (PSCs) with Al2O3 passivation layer were fabricated and characterized. The PSC have some advantages of easier and cheaper fabrication process than that of conventional Si solar cells, III-V compound semiconductor solar cells, and organic solar cells. The perovskite light harvester, CH3NH3PbI3, was deposited by vapor deposition on [compact TiO2 / F-doped tin oxide (FTO) / glass]. The advantage of vapor deposition over solution process is expected to be able to offer the thin film with smoother surface over larger area. Then, Al2O3 passivation layer was deposited by atomic layer deposition (ALD) on the CH3NH3PbI3 light harvester. Al2O3 passivation layer was expected to prevent the CH3NH3PbI3 light harvester from oxidation and improve the solar cell efficiency, and ALD has been one of the most effective methods to deposit Al2O3 thin film for last 25 years. The atomic layer deposited Al2O3 layer thickness was optimized from the solar cell characterization. The optimized power conversion efficiency (PCE) and Al2O3 thickness were ~8.0 % and ~10.0 nm, respectively.
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ARIFIN, Zainal, Syamsul HADI, Suyitno SUYITNO, Aditya Rio PRABOWO, and Singgih Dwi PRASETYO. "CHARACTERIZATION OF ZnO NANOFIBER ON DOUBLE-LAYER DYE-SENSITIZED SOLAR CELLS USING DIRECT DEPOSITION METHOD." Periódico Tchê Química 17, no. 36 (December 20, 2020): 263–77. http://dx.doi.org/10.52571/ptq.v17.n36.2020.278_periodico36_pgs_263_277.pdf.

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Solar cells are capable of harvesting energy by converting solar heat into electrical energy through the photovoltaic process. A type of solar cell, namely dye-sensitized solar cells (DSSCs) which based on doublelayer photoanode is attracting researchers and engineers considering its characteristics, e.g., high efficiency, low cost, and available mass-production. The TiO2-ZnO double-layer semiconductor can be obtained from a nanofiber ZnO semiconductor which is deposited with a TiO2 nanoparticle semiconductor. In this study, the direct deposition method was applied using an electrospinning machine. The intention is to directly capture the liquid of electro-jet spun from PVA/Zn(Ac)2 solution onto fluorine-doped tin oxide (FTO) glass. The glass itself is coated with a TiO2 nanoparticle semiconductor. The investigation was addressed to obtain the best tip distance to the collector and the best flow rate in the electrospinning process. The subject environment was designated on the manufacturing process of nanofiber ZnO semiconductors used as double-layer DSSC photoanodes. Variations in flow rates of 3, 4, 5, 6, 7, and 8 μL/minute were applied in the observation. Furthermore, collaboration with the tip to collector distances using a variation of 3, 4, 5, 6, 7, and 8 cm was also considered in this study. Based on these parameters, the effects of the electrospinning process on the morphology of the directly deposited ZnO nanofiber semiconductor were obtained. The results showed that a flow rate of 4 μL/minute and a tip distance to the collector of 8 cm produced a small diameter and uniform morphology. This morphology allowed ZnO nanofibers to have better color absorption and electron excitation. Thus, it was directly proportional to the high efficiency of double-layer DSSCs. The performance value for the 4 μL/min discharge was 2.39%, and the performance value for the 8 cm needle tip distance to the collector was 1.61%.
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Maeda, Akihiro, Aki Nakauchi, Yusuke Shimizu, Kengo Terai, Shuhei Sugii, Hironobu Hayashi, Naoki Aratani, Mitsuharu Suzuki, and Hiroko Yamada. "A Windmill-Shaped Molecule with Anthryl Blades to Form Smooth Hole-Transport Layers via a Photoprecursor Approach." Materials 13, no. 10 (May 18, 2020): 2316. http://dx.doi.org/10.3390/ma13102316.

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Preparation of high-performance organic semiconductor devices requires precise control over the active-layer structure. To this end, we are working on the controlled deposition of small-molecule semiconductors through a photoprecursor approach wherein a soluble precursor compound is processed into a thin-film form and then converted to a target semiconductor by light irradiation. This approach can be applied to layer-by-layer solution deposition, enabling the preparation of p–i–n-type photovoltaic active layers by wet processing. However, molecular design principles are yet to be established toward obtaining desirable thin-film morphology via this unconventional method. Herein, we evaluate a new windmill-shaped molecule with anthryl blades, 1,3,5-tris(5-(anthracen-2-yl)thiophen-2-yl)benzene, which is designed to deposit via the photoprecursor approach for use as the p-sublayer in p–i–n-type organic photovoltaic devices (OPVs). The new compound is superior to the corresponding precedent p-sublayer materials in terms of forming smooth and homogeneous films, thereby leading to improved performance of p–i–n OPVs. Overall, this work demonstrates the effectiveness of the windmill-type architecture in preparing high-quality semiconducting thin films through the photoprecursor approach.
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Fragoudakis, Roselita, Michael A. Zimmerman, and Anil Saigal. "Application of a Ag Ductile Layer in Minimizing Si Die Stresses in LDMOS Packages." Key Engineering Materials 605 (April 2014): 372–75. http://dx.doi.org/10.4028/www.scientific.net/kem.605.372.

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Lateral Diffused Metal Oxide Semiconductors (LDMOS) normally have a Cu-W flange, whose CTE is matched to Si. Low cost Cu substrate material provides 2X high thermal conductivity, and along with a AuSi eutectic solder is recommended for optimal thermal performance. However, the CTE mismatch between Cu and Si can lead to failure of the semiconductor as a result of die fracture, due to thermal stresses developed during the soldering step of the manufacturing process. Introducing a Ag ductile layer is very important in minimizing such thermal stresses and preventing catastrophic failure of the semiconductor. Ag is a ductile material electroplated on the Cu substrate to absorb stresses developed during manufacturing due to the CTE mismatch between Si and Cu. The Ag layer thickness affects the magnitude of the resulting thermal stresses. This study attempts to measure the yield strength of the Ag layer, and examines the optimal layer thickness to minimize die stresses and prevent failure. The yield stress of the ductile layer deposited on a Cu flange was measured by nanoindentation. The Oliver and Pharr method was applied to obtain modulus of elasticity and yield depth of Ag. A finite element analysis of the package was performed in order to map die stress distribution for various ductile layer thicknesses. The analysis showed that increasing the ductile layer thickness up to 0.01 - 0.02 mm, decreases the Si die stresses.
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Dissertations / Theses on the topic "Semiconductor layer deposits"

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Hetherington, C. "Transmission electron microscopy of GaAs/AlGaAs multilayers." Thesis, University of Oxford, 1987. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.379967.

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Egede, Eforma Justin. "P-type Doping of Pulsed Laser Deposited WS2 with Nb." Thesis, University of North Texas, 2017. https://digital.library.unt.edu/ark:/67531/metadc1062806/.

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Layered transition metal dichalcogenides (TMDs) are potentially ideal semiconducting materials due to their in-plane carrier transport and tunable bandgaps, which are favorable properties for electrical and optoelectronic applications. However, the ability to make p-n junctions is the foundation of semiconductor devices, and therefore the ability to achieve reproducible p- and n-type doping in TMD semiconducting materials is critical. In this work, p-type substitutional doping of pulsed laser deposited WS2 films with niobium is reported. The synthesis technique of the PLD target with dopant incorporation which also ensures host material stoichiometry is presented. Hall electrical measurements confirmed stable p-type conductivity of the grown films. Structural characterization revealed that there was no segregation phase of niobium in the fabricated films and x-ray phtoelectron spectroscopy (xps) characterization suggest that the p-type doping is due to Nb4+ which results in p-type behavior. Stable hole concentrations as high as 10E21(cm-3) were achieved. The target fabrication and thin film deposition technique reported here can be used for substitutional doping of other 2D materials to obtain stable doping for device applications.
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Mandre, Shyam K. "Controlling the emission properties of high power semiconductor lasers stabilization by optical feedback and coherence control." Berlin Logos-Verl, 2006. http://deposit.d-nb.de/cgi-bin/dokserv?id=2833481&prov=M&dok_var=1&dok_ext=htm.

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Shahrjerdi, Davood 1980. "III-V channel MOS devices with atomic-layer-deposited high-k gate dielectrics : interface and carrier transport studies." 2008. http://hdl.handle.net/2152/18264.

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The performance scaling of metal-oxide-semiconductor field-effect-transistors (MOSFETs) has been historically achieved through shrinking the gate length of transistors for over four decades. Addressing the current challenges with CMOS scaling, the 2005 edition of International Technology Roadmap for Semiconductors has predicted the need for so-called technology boosters involving new materials for the gate dielectric and the channel as well as innovative structures. Theoretical studies suggest that the incorporation of high-mobility channel materials such as germanium and III-Vs could outperform bulk Si technology in terms of switching characteristics. Hence, this has recently led to tremendous research activity to explore the prospects of III-V materials for CMOS applications. Nevertheless, technological challenges such as formation of highquality interface between gate dielectric and III-V channel have hindered the demonstration of enhancement-mode III-V MOSFETs. Hence, tremendous effort has been devoted to study the exact origin of Fermi level pinning at the oxide/III-V interface. On the other hand, the advent of high-k materials has opened up the possibility of exploring new channel materials, for which it is challenging to achieve high-quality interface analogous to that of SiO2 on Si. Lately, III-Vs have been extensively explored in order to find compatible gate dielectrics which can unpin the Fermi level at the interface. Amongst various schemes, atomic layer deposition of high-k dielectrics offers some unique advantages such as reduction of GaAs interfacial oxides upon high-k deposition through an appropriate choice of precursor chemistry. The chief focus of this dissertation is to develop a simple wet clean process prior to high-k deposition, suitable for III-V substrates. The impact of various chemical treatments of GaAs substrates on the properties of high-k/GaAs interface was studied through extensive material and electrical characterization methods. The suitability of the ALD-grown high-k gate dielectrics on GaAs for MOSFET fabrication was explored. Charge trapping was found to result in significant errors in mobility extraction in high-k GaAs interface, where the role of high-k is not well understood. Hence, pulsed I-V and QV measurements and galvanomagnetic effects were utilized in order to directly measure the inversion charge in the channel without being affected by the charge traps as much as possible. It was also found that the material studies on GaAs substrates can be readily extended to other III-V channels, such as InGaAs.
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Kuo, Chien-hung, and 郭建宏. "Fabrication of chemical vapor deposited SiC film and its metal-insulation layer-semiconductor device." Thesis, 2013. http://ndltd.ncl.edu.tw/handle/59759455389588160125.

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碩士
國立高雄大學
電機工程學系碩士班
101
In the thesis, the SiC films deposited on Si substrate prepared by chemical vapor deposition method were studied. The SiCl4 and CH4 sources were used as the precursors in the deposition process. Film deposition rate and morphology were studied. Under certain conditions, the deposition rate around 2.8 nm/s can be achieved. With film thickness increasing, smoother surface can be observed with surface roughness less than 10 - 20 nm。 With following device process, the Au-SiC-Si device was fabricated. The electrical properties were investigated. With the deposited film thickness increasing, the decreased capacitance and S-shaped conductance behaviors can be observed. A proposed model based on the electrical behavior was used to explain the S-shape conductance behavior.
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Chang, Chu-Jen, and 張居仁. "Photo-Response of Metal-Oxide-Semiconductor Capacitance with Atomic Layer Deposited High-K Dielectric as Gate Insulator." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/04069515428761367866.

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碩士
國立暨南國際大學
電機工程學系
99
In this thesis, metal-oxide-semiconductor capacitors (MOSC) with high-k dielectric HfO2 deposited by atomic layer deposition (ALD) were fabricated, and indium tin oxide (ITO) prepared by sputtering was used as the gate metal material. By taking advantage of the transparent and conductive characteristics of the indium tin oxide, the MOSC was shined with visible light and its capacitance-voltage (C-V) characteristic was measured before and after illumination. Photo-response of the MOSC subjected to high-energy -ray irradiation was also carried out in this work such that the charge trapping mechanism of the HfO2 high-k dielectric under visible light illumination can be realized. During the C-V measurements swept from inversion to accumulation, we found large flat-band voltage shift to the left in the C-V curves due to holes injection into the oxide as long as the sweep voltage reaches the accumulation region. This indicates that hole-trapping near the HfO2/Si interface in accumulation is the dominant effect before the MOSC being subjected to irradiation. Large amount of electron trapping is observed when the MOSC is subjected to visible light illumination. Compared with the pre-illuminated C-V characteristics, there is a small difference in the flat-band voltage shift in the C-V curves obtained after the light is turned off due to some electron-trapping occurred in the oxide during previous light illumination. This electron-trapping was caused by electrons injection near the HfO2/Si interface when the sweep voltage was in inversion region during light illumination. For the post-illuminated C-V measurements swept from accumulation to inversion, only negligible flat-band voltage shift was found when comparing with the pre-illuminated C-V curves. In this case, it is believed that holes were already trapped by the trapping center in the oxide when the sweep voltage starting at the accumulation region. For the MOSC subjected to -ray irradiation, the increase of electron-trapping inside the HfO2 layer caused by irradiation cancels the hole-trapping due to the sweep voltage at accumulation, which makes the post-illuminated C-V curves shift only slightly to the left or even no shift at all when compared with the pre-illuminated C-V curves.
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Lin, Li-Chien, and 林立騫. "Investigations of Aluminum oxide/Germanium Metal-Oxide-Semiconductor Devices Deposited by Atomic Layer Deposition at Different Temperatures." Thesis, 2015. http://ndltd.ncl.edu.tw/handle/3ye53j.

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碩士
國立交通大學
照明與能源光電研究所
104
In this thesis, the 7 nm of Aluminum oxide Al2O3 was deposited on n-type Germanium wafer at 150℃, 200℃, and 250℃. Then 80 nm of Ni was deposited on Al2O3 as top electrode and 150 nm of Au-Sb is deposited on backside of Germanium wafer by thermal evaporator. Form a Metal-Oxide-Semiconductor device with structure of Ni/Al2O3/n-Germanium/AuSb. The as-deposited samples at different temperatures are noted as Td150, Td200, and Td250.The samples with post-deposition annealing treatment are noted as PDA-Td150, PDA-Td200, and PDA-Td250. In electronic analysis, the high frequency C-V and I-V curves is used to extract capacitance equivalent thickness (CET or EOT), effective k-value (keff), density of interface trap (Dit), density of leakage current (Jg). In material analysis, X-ray diffraction (XRD) is used to verify the crystalline of Al¬¬-2O3 thin film, Fourier transform infra-red spectrometry (FTIR) is used to investigate the chemical bond profile of samples, X-ray Photoemission Spectrometry Results (XPS) is used to investigate the chemical state of Ge 3d, Al 2p, and O 1s in Al2O3 ¬thin film with respect of depth. KEYWARDS: Atomic Layer Deposition (ALD), Aluminum oxide (Al2O3), Germanium, MOS devise
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Shun-KaiYang and 楊舜凱. "AlGaN/GaN Metal-Oxide-Semiconductor High Electron Mobility Transistors with Atomic Layer Deposited HfAlO Gate Dielectric and Nitrogen Plasma Treatment." Thesis, 2019. http://ndltd.ncl.edu.tw/handle/m3be56.

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碩士
國立成功大學
奈米積體電路工程碩士學位學程
107
AlGaN/GaN high-electron-mobility transistors (HEMTs) are considered to be a dominant candidate for post-Si next generation power applications due to their impressive performance, such as high saturation electron velocity, high breakdown electric field and high carrier density. In this work, gate field plate is used to increase the device’s breakdown voltage. In order to reduce gate leakage current, ALD deposited HfAlO is used as gate dielectric. In addition, nitrogen plasma is used to improve the surface quality of the sample. In this work, the AlGaN/GaN HEMTs with ALD HfAlO gate dielectric and nitrogen plasma treatment achieve a maximum drain current of 855 mA/mm at VG = 5 V. The transfer characteristics show a maximum transconductance of 118 mS/mm, a subthreshold swing of 90 mV/dec and an on/off ratio of 1.8 × 109. The gate leakage current is 1.25 × 10-7 mA/mm at VG = -12 V and the three-terminal breakdown voltage is 195 V.
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Tsou, Ping-Han, and 鄒秉翰. "Study on Electrical and Chemical Characteristics of Indium Gallium Arsenide Metal-Oxide-Semiconductor Capacitors with Atomic-Layer-Deposited Al2O3 Gate Dielectric." Thesis, 2013. http://ndltd.ncl.edu.tw/handle/83430312867733492767.

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碩士
國立交通大學
電子工程學系 電子研究所
101
In the beginning of the thesis, we have mainly studied the interface between (100)-oriented In0.53Ga0.47As channel layer and Al2O3 (atomic layer deposition, ALD). Poor interface and oxide qualities may cause high frequency dispersion, Fermi level pinning, and high gate leakage current. In order to improve interface and gate oxide qualities, different thermal treatments are applied to the capacitors, such as post-metallization annealing (PMA), forming gas annealing (FGA), and post deposition annealing (PDA). Firstly, we study the difference between the capacitors treated with PMA and those treated with FAG. Compared to PMA, frequency dispersion in accumulation can be efficiently reduced by FGA. In addition, we utilize the conductance method to extract the interface state density (Dit). The midgap traps can be slightly reduced: for instance, Dit (Et= 0.428 eV) decreases about 22.28% after FGA. Subsequently, the effects of MOSCAPs under different PDA temperature with FGA have also been discussed. It is noted that MOSCAPs under PDA 500 oC for 120 s with FGA show the worst electrical characteristics. Furthermore, higher PDA temperature is, the higher Dit exists close to midgap. The reason for the degradation of electrical characteristics may be lower ratio of As2O3 to As2O5 and the precipitation of arsenide, which is shown in our XPS analysis. Next, in our experiment, the electrical characteristics of In0.53Ga0.47As (100) is better than In0.53Ga0.47As (111)A, such as lower frequency dispersion and lower Dit. This consequence is possibly due to higher amounts of As2O3/As2O5 at the Al2O¬3/In0.53Ga0.47As (100) interface, compared to Al2O¬3/In0.53Ga0.47As (111)A interface. Eventually, the failure of self-aligned Ni-InGaAs S/D In0.53Ga0.47As n-MOSFETs is attributed to the non-formation of Ni-InGaAs according to the TEM image and EDX analysis. The possible reason that inhibits the formation of Ni-InGaAs may the existence of native oxides between Ni and In0.53Ga¬0.47As channel layer.
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Chen, Min-Hao, and 陳旻浩. "High-performance self-aligned inversion-channel In0.53Ga0.47As metal-oxide-semiconductor field-effect-transistors by in-situ atomic-layer-deposited oxide and metal gate stacks." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/v44mrk.

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碩士
國立臺灣大學
電子工程學研究所
105
GaAs-based III-V compound semiconductors are one of the most promising channel material to extend Moore’s law beyond the limits of Si because of their high electron mobility. Owing to higher electron mobility and higher saturation velocity than Si, lots of efforts have been driven in perfecting the structure of High-κ/Metal-Gate on III-V material to achieve high performance and low power dissipation metal-oxide-semiconductor field-effect-transistors (MOSFETs). Therefore, the interface between III-V semiconductor and high-κ dielectric is the key issue to be solved. A perfected oxide/semiconductor interface with low interfacial trap density (Dit) and high-temperature stability is essential for a III-V MOSFET with high speed of operation and heterogeneous integration of high-κ /InGaAs onto the current integrated circuit using the Si platform. In this work, high performance of gate-first self-aligned inversion-channel In0.53Ga0.47As MOSFETs using Al2O3/Y2O3 as a gate dielectric and TaN/TiN as gate metal have been fabricated. The growth of III-V epi-layer and high-κ dielectrics were carried out in an ultra-high vacuum (UHV) multi-chamber system consisting of molecular beam epitaxy (MBE) chambers and atomic-layer deposition (ALD) reactors. Dual gate dielectrics of Y2O3 and Al2O3 were directly and in sequence deposited onto freshly MBE grown InGaAs by using in-situ ALD. The Al2O3/Y2O3/In0.53Ga0.47As MOS capacitors also exhibit well-behaved capacitance-voltage (CV) characteristics with a true inversion behavior, low Dit of 4~5 x 10^12 eV-1cm-2 as well as low leakage current densities of 10^-8 A/cm2 at ±1 MV/cm. Moreover, 1μm-gate-length TaN/TiN/Al2O3/Y2O3/In0.53Ga0.47As MOSFETs have demonstrated high extrinsic maximum drain current (Id,max) of 1.1 mA/μm, a peak transconductance (Gm) of 0.55 mS/μm, Ion/Ioff of 10000, and a sub-threshold swing of 200 mV/decade. This work shows that InGaAs is one of the potential candidates to replace Si, which is promising for application of logic circuit in next generation.
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Book chapters on the topic "Semiconductor layer deposits"

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Apanasevich, S. P., F. V. Karpushko, and G. V. Sinitsyn. "Optical Bistability in Vacuum-Deposited Semiconductor Fabry-Perot Interferometers." In Laser Optics of Condensed Matter, 475–80. Boston, MA: Springer US, 1988. http://dx.doi.org/10.1007/978-1-4615-7341-8_59.

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Calabretta, Michele, Alessandro Sitta, Salvatore Massimo Oliveri, and Gaetano Sequenzia. "Analysis of Warpage Induced by Thick Copper Metal on Semiconductor Device." In Lecture Notes in Mechanical Engineering, 55–60. Cham: Springer International Publishing, 2021. http://dx.doi.org/10.1007/978-3-030-70566-4_10.

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AbstractElectrochemical deposited (ECD) thick film copper on silicon substrate is one of the most challenging technological brick for semiconductor industry representing a relevant improvement from the state of art because of its excellent electrical and thermal conductivity compared with traditional compound such as aluminum. The main technological factor that makes challenging the industrial implementation of thick copper layer is the severe wafer warpage induced by Cu annealing process, which negatively impacts the wafer manufacturability. The aim of presented work is the understanding of warpage variation during annealing process of ECD thick (~20 µm) copper layer. Warpage has been experimental characterized at different temperature by means of Phase-Shift Moiré principle, according to different annealing profiles. A linear Finite Element Model (FEM) has been developed to predict the geometrically stress-curvature relation, comparing results with analytical models.
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Ye, Peide D., Yi Xuan, Yanqing Wu, and Min Xu. "Atomic-Layer Deposited High-k/III-V Metal-Oxide-Semiconductor Devices and Correlated Empirical Model." In Fundamentals of III-V Semiconductor MOSFETs, 173–94. Boston, MA: Springer US, 2010. http://dx.doi.org/10.1007/978-1-4419-1547-4_7.

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Venkatesan, T., S. Bhattacharya, C. Doughty, A. Findikoglu, C. Kwon, Qi Li, S. N. Mao, A. Walkenhorst, and X. X. Xi. "Pulsed Laser Deposited Metal-Oxide Based Superconductor, Semiconductor and Dielectric Heterostructures and Superlattices." In Multicomponent and Multilayered Thin Films for Advanced Microtechnologies: Techniques, Fundamentals and Devices, 209–38. Dordrecht: Springer Netherlands, 1993. http://dx.doi.org/10.1007/978-94-011-1727-2_13.

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Robinson Azariah John Chelliah, Cyril, and Rajesh Swaminathan. "Binary Metal Oxides Thin Films Prepared from Pulsed Laser Deposition." In Practical Applications of Laser Ablation. IntechOpen, 2021. http://dx.doi.org/10.5772/intechopen.96161.

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The semiconductor industry flourished from a simple Si-based metal oxide semiconductor field effect transistor to an era of MOSFET-based smart materials. In recent decades, researchers have been replacing all the materials required for the MOSFET device. They replaced the substrate with durable materials, lightweight materials, translucent materials and so on. They have came up with the possibility of replacing dielectric silicon dioxide material with high-grade dielectric materials. Even then the channel shift in the MOSFET was the new trend in MOSFET science. From the bulk to the atomic level, transistors have been curiously researched across the globe for the use of electronic devices. This research was also inspired by the different semiconductor materials relevant to the replacement of the dielectric channel/gate. Study focuses on diverse materials such as zinc oxides (ZnO), electrochromic oxides such as molybdenum oxides (including MoO3 and MoO2) and other binary oxides using ZnO and MoO3. The primary objective of this research is to study pulsed laser deposited thin films such as ZnO, MoO3, binary oxides such as binary ZnO /MoO3, ZnO /TiO2 and ZnO/V2O5 and to analyse their IV properties for FET applications. To achieve the goal, the following working elements have been set: investigation of pulsed laser deposited thin film of metal oxides and thin film of binary metal oxide nanostructures with effects of laser repetition and deposition temperatures.
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"Photoluminescence study of ZnO thin films deposited by pulsed laser ablation." In Compound Semiconductors 2004, 421–24. CRC Press, 2005. http://dx.doi.org/10.1201/9781482269222-95.

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"Effect of annealing on the optical parameters in pulsed laser deposited vanadium pentoxide thin films." In Compound Semiconductors 2001, 661–66. CRC Press, 2002. http://dx.doi.org/10.1201/9781482268980-87.

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Linnik, Oksana, Nataliia Chorna, Nataliia Smirnova, Anna Eremenko, Oleksandr Korduban, Nicolaie Stefan, Carmen Ristoscu, Gabriel Socol, Marimona Miroiu, and Ion N. Mihailescu. "Pulsed Laser-Deposited TiO2-based Films: Synthesis, Electronic Structure and Photocatalytic Activity." In Semiconductor Photocatalysis - Materials, Mechanisms and Applications. InTech, 2016. http://dx.doi.org/10.5772/62637.

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Wasserman, A., R. Beserman, and K. Dettmer. "Thickness measurements of Si1−xGex thin layers deposited on Si mesa structures." In Selected Topics in Group IV and II–VI Semiconductors, 96–99. Elsevier, 1996. http://dx.doi.org/10.1016/b978-0-444-82411-0.50027-9.

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Draissia, Mohamed, and Mohamed Y. Debili. "Mechanical properties of metastable r.f magnetron sputter-deposited Al1-xCux thin films." In Passivation of Metals and Semiconductors, and Properties of Thin Oxide Layers, 469–73. Elsevier, 2006. http://dx.doi.org/10.1016/b978-044452224-5/50073-1.

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Conference papers on the topic "Semiconductor layer deposits"

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Smith, S. W., K. G. McAuliffe, and J. F. Conley. "Atomic layer deposited Al2O3/Ta2O5 nanolaminate capacitors." In 2009 International Semiconductor Device Research Symposium (ISDRS 2009). IEEE, 2009. http://dx.doi.org/10.1109/isdrs.2009.5378151.

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Garduno, S. I., M. Estrada, I. Hernandez, A. Cerdeira, J. I. Mejia, M. E. Rivas, and M. A. Quevedo. "Bias stress study of Metal-Insulator-Semiconductor structures with pulsed laser deposited InGaZnO on atomic layer deposited HfO2." In 2015 IEEE International Autumn Meeting on Power, Electronics and Computing (ROPEC). IEEE, 2015. http://dx.doi.org/10.1109/ropec.2015.7395135.

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Yoshitugu, Koji, Masahiro Horita, Mustunori Uenuma, Yasuaki Ishikawa, and Yukiharu Uraoka. "High pressures water vapor annealing for atomic-layer-deposited Al2O3 on GaN." In 2016 Compound Semiconductor Week (CSW) [Includes 28th International Conference on Indium Phosphide & Related Materials (IPRM) & 43rd International Symposium on Compound Semiconductors (ISCS)]. IEEE, 2016. http://dx.doi.org/10.1109/iciprm.2016.7528842.

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Ertley, C. D., O. H. W. Siegmund, T. Cremer, C. A. Craven, M. J. Minot, J. Elam, and A. Mane. "Developments in atomic layer deposited microchannel plates." In 2016 IEEE Nuclear Science Symposium, Medical Imaging Conference and Room-Temperature Semiconductor Detector Workshop (NSS/MIC/RTSD). IEEE, 2016. http://dx.doi.org/10.1109/nssmic.2016.8069880.

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Minkov, I. P., S. Simeonov, A. Szekeres, Zs Fogarassy, G. Socol, C. Ristoscu, and I. Mihailescu. "Characterisation of the charge transport mechanism in pulsed laser deposited AlN:Si films." In 2014 International Semiconductor Conference (CAS). IEEE, 2014. http://dx.doi.org/10.1109/smicnd.2014.6966404.

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Simeonov, S., I. Minkov, A. Szekeres, S. Grigorescu, G. Socol, C. Ristoscu, and I. N. Mihailescu. "Trap space charge limited current in pulsed laser deposited AlN:Cr films." In 2009 International Semiconductor Conference (CAS 2009). IEEE, 2009. http://dx.doi.org/10.1109/smicnd.2009.5336703.

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Simeonov, S., S. Bakalova, E. Kafedjiiska, A. Szekeres, S. Grigorescu, A. Popescu, C. Cojanu, F. Sima, G. Socol, and I. Mihailescu. "Characterization of Pulsed-Laser-Deposited Aln Films as a Gate Dielectric in Aln-Si Mis Structures." In 2006 International Semiconductor Conference. IEEE, 2006. http://dx.doi.org/10.1109/smicnd.2006.283992.

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Yanqing Wu, Shurui Wang, Yi Xuan, Tian Shen, Peide D. Ye, and James A. Cooper. "Interface study of atomic-layer-deposited HfO2/NO-nitrided SiO2 gate dielectric stack on 4H SiC." In 2007 International Semiconductor Device Research Symposium. IEEE, 2007. http://dx.doi.org/10.1109/isdrs.2007.4422377.

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Kalkofen, Bodo, Mindaugas Silinskas, Marco Lisker, Y. S. Kim, and Edmund P. Burte. "Atomic layer deposited solid sources for doping of high aspect ratio semiconductor structures." In 2018 18th International Workshop on Junction Technology (IWJT). IEEE, 2018. http://dx.doi.org/10.1109/iwjt.2018.8330296.

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Das, Anindita, Sanatan Chattopadhyay, Goutam K. Dalapati, Dongzhi Chi, and M. K. Kumar. "Optical and electrical characterization of atomic layer deposited (ALD) HfO2/p-GaAs MOS capacitors." In 16th International Workshop on Physics of Semiconductor Devices, edited by Monica Katiyar, B. Mazhari, and Y. N. Mohapatra. SPIE, 2012. http://dx.doi.org/10.1117/12.924341.

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