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1
Shea, Patrick. "DESIGN AND MODELING OF RADIATION HARDENED LDMOSFET FOR SPACE CRAFT POWER SYSTEMS." Master's thesis, University of Central Florida, 2007. http://digital.library.ucf.edu/cdm/ref/collection/ETD/id/2822.
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NASA missions require innovative power electronics system and component solutions with long life capability, high radiation tolerance, low mass and volume, and high reliability in space environments. Presently vertical double-diffused MOSFETs (VDMOS) are the most widely used power switching device for space power systems. It is proposed that a new lateral double-diffused MOSFET (LDMOS) designed at UCF can offer improvements in total dose and single event radiation hardness, switching performance, development and manufacturing costs, and total mass of power electronics systems. Availability of a hardened fast-switching power MOSFET will allow space-borne power electronics to approach the current level of terrestrial technology, thereby facilitating the use of more modern digital electronic systems in space. It is believed that the use of a p+/p-epi starting material for the LDMOS will offer better hardness against single-event burnout (SEB) and single-event gate rupture (SEGR) when compared to vertical devices fabricated on an n+/n-epi material. By placing a source contact on the bottom-side of the p+ substrate, much of the hole current generated by a heavy ion strike will flow away from the dielectric gate, thereby reducing electrical stress on the gate and decreasing the likelihood of SEGR. Similarly, the device is hardened against SEB by the redirection of hole current away from the base of the device's parasitic bipolar transistor. Total dose hardness is achieved by the use of a standard complementary metal-oxide semiconductor (CMOS) process that has shown proven hardness against total dose radiation effects.M.S.E.E.
School of Electrical Engineering and Computer Science
Engineering and Computer Science
Electrical Engineering MSEE
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Bürgler, Josef Franz. "Discretization and grid adaptation in semiconductor device modeling /." [S.l.] : [s.n.], 1990. http://e-collection.ethbib.ethz.ch/show?type=diss&nr=9146.
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Zhang, Minya. "Optoelectronic device modeling using field simulation techniques." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1998. http://www.collectionscanada.ca/obj/s4/f2/dsk1/tape11/PQDD_0005/NQ42892.pdf.
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Chang, Ruey-dar. "Physics and modeling of dopant diffusion for advanced device applications /." Digital version accessible at:, 1998. http://wwwlib.umi.com/cr/utexas/main.
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Lee, Brian 1975. "Exploring semiconductor device parameter space using rapid analytical modeling." Thesis, Massachusetts Institute of Technology, 1998. http://hdl.handle.net/1721.1/47431.
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Litsios, James. "A modeling language for mixed circuit and semiconductor device simulation /." [S.l.] : [s.n.], 1996. http://e-collection.ethbib.ethz.ch/show?type=diss&nr=11412.
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Benhsaien, Abdessamad. "Self-assembled quantum dot semiconductor nanostructures modeling: Photonic device applications." Thesis, University of Ottawa (Canada), 2006. http://hdl.handle.net/10393/27225.
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A microscopic analysis of a vertical stack of self-assembled InAs/GaAs lens-shaped quantum dot nanostructures is presented. The analysis revolves around a rigorous Hamiltonian formulation of an eight-band k.p. perturbation to account for the lattice-mismatch strain endured by the islands. The numerical implementation yields the effective bandgap energy and electronic structure of an InAs/GaAs quantum dot. Within the framework of a resonant two-level energy system, material gain and absorption spectra are calculated up to a third-order susceptibility to include nonlinearity. The material gain polarization dependence is expressed in the dipole transition strength. Polarization-dependent anisotropy factors corresponding to different interband transitions are derived and shown to satisfy a momentum conservation rule.
Modal analysis of a rectangular core waveguide realized by imbedding the active quantum dot layer(s) into a cladding medium with lower refractive index is presented. Polarization-independent modal gain is achieved by optimizing the width of the rectangular core waveguide. In illustration of a quantum dot device, a realistic semiconductor optical amplifier model accounting for both stimulated and spontaneous emission is considered. The calculated carrier density longitudinal profile yields other parameters characterizing the amplifier performance.
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Weber, Michael Thomas. "Analysis of Zincblende-Phase GaN, Cubic-Phase SiC, and GaAs MESFETs Including a Full-Band Monte Carlo Simulator." Diss., Georgia Institute of Technology, 2005. http://hdl.handle.net/1853/7500.
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The objective of this research has been the study of device properties for emerging wide-bandgap cubic-phase semiconductors. Though the wide-bandgap semiconductors have great potential as high-power microwave devices, many gaps remain in the knowledge about their properties. The simulations in this work are designed to give insight into the performance of microwave high-power devices constructed from the materials in question. The simulation are performed using a Monte Carlo simulator which was designed from the ground up to include accurate, numerical band structures derived from an empirical pseudo-potential model. Improvements that have been made to the simulator include the generalized device structure simulation, the fully numerical final state selector, and the inclusion of the overlap integrals in the final-state selection. The first comparison that is made among the materials is direct-current breakdown. The DC voltage at which breakdown occurs is a good indication of how much power a transistor can provide. It is found that GaAs has the smallest DC breakdown, with 3C-SiC and ZB-GaN being over 3 times higher. This follows what is expected and is discussed in detail in the work. The second comparison made is the radio-frequency breakdown of the transistors. When devices are used in high-frequency applications it is possible to operate them beyond DC breakdown levels. This phenomenon is caused by the reaction time of the carriers in the device. It is important to understand this effect if these materials are used in a high-frequency application, since this effect can cause a change in the ability of a material to produce high-power devices. MESFETs made from these materials are compared and the results are discussed in detail.
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Fu, Yue. "Modeling,Design,and Characterization of Monolithic Bi-directional Power Semiconductor Switch." Doctoral diss., University of Central Florida, 2007. http://digital.library.ucf.edu/cdm/ref/collection/ETD/id/3778.
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Bidirectional power switching devices are needed in many power management applications, particularly in lithium-ion battery protection circuitry. A monolithic bidirectional power switch fabricated with a simplified CMOS technology is introduced in this dissertation. Throughout the design process, ISE TCAD tool plays an important role. Design variables are carefully analyzed to improve the device performance or yield the best trade off. Optimization is done with the help of TCAD simulation and theoretical calculations. The device has been successfully fabricated using simplified 0.5 micron CMOS process. The experimental result shows a breakdown voltage of 25V. Due to the interdigitated source to source design, the inter-terminal current flowing path is effectively reduced to a few microns. The experimental result shows an ultra low specific on resistance. In comparison with other bi-directional power semiconductor switches by some major semiconductor manufacturers, the proposed BDS device has less than one half of the specific on resistance, thus substantially lower on state power loss of the switch. The proposed BDS device has a unique NPNPN structure, in comparison with NPNP structure, which is the analytical structure for CMOS latch-up, the proposed device inherently exhibits a better latch up immunity than CMOS inverter, thanks to the negative feed back mechanism of the extra NPN parasitic BJT transistor. In order to implement the device into simulators like PSPICE or Cadence IC Design, a compact model named variable resistance model has been built. This simple analytical model fits quite well with experimental data, and can be easily implemented by Verilog-A or other hardware description languages. Also, macro modeling is possible provided that the model parameters can be extracted from experimental curves. Several advanced types of BDS devices have been proposed, they exceed the basic BDS design in terms of breakdown voltage and /or on resistance. These advanced structures may be prominent for further improvement of the basic BDS device to a higher extend. Some cell phone providers such as Nokia is already asking for higher breakdown voltage of BDS device, due to the possibility of incidentally insert the battery pack into the cell phone with wrong pin polarity. Hopefully, the basic BDS design or one of these advanced types may eventually be implemented into the leading brand cell phone battery packs.Ph.D.
School of Electrical Engineering and Computer Science
Engineering and Computer Science
Electrical Engineering PhD
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Fan, Qian. "GaN heterojunction FET device Fabrication, Characterization and Modeling." VCU Scholars Compass, 2009. http://scholarscompass.vcu.edu/etd/35.
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This dissertation is focused on the research efforts to develop the growth, processing, and modeling technologies for GaN-based Heterojunction Field Effect Transistors (HFETs). The interest in investigating GaN HFETs is motivated by the advantageous material properties of nitride semiconductor such as large band gap, large breakdown voltage, and high saturation velocity, which make it very promising for the high power and microwave applications. Although enormous progress has been made on GaN transistors in the past decades, the technologies for nitride transistors are still not mature, especially concerning the reliability and stability of the device. In order to improve the device performance, we first optimized the growth and fabrication procedures for the conventional AlGaN barrier HFET, on which high carrier mobility and sheet density were achieved. Second, the AlInN barrier HFET was successfully processed, with which we obtained improved I-V characteristics compared with conventional structure. The lattice-matched AlInN barrier is beneficial in the removal of strain, which leads to better carrier transport characteristics. Furthermore, new device structures have been examined, including recess-gate HFET with n+ GaN cap layer and gate-on-insulator HFET, among which the insertion of gate dielectrics helps to leverage both DC and microwave performances. In order to depict the microwave behavior of the HFET, small signal modeling approaches were used to extract the extrinsic and intrinsic parameters of the device. An 18-element equivalent circuit model for GaN HFET has been proposed, from which various extraction methods have been tested. Combining the advantages from the cold-FET measurements and hot-FET optimizations, a hybrid extraction method has been developed, in which the parasitic capacitances were attained from the cold pinch-off measurements while the rest of the parameters from the optimization routine. Small simulation error can be achieved by this method over various bias conditions, demonstrating its capability for the circuit level design applications for GaN HFET. Device physics modeling, on the other hand, can help us to reveal the underlying physics for the device to operate. With the development of quantum drift-diffusion modeling, the self-consistent solution to the Schrödinger-Poisson equations and carrier transport equations were fulfilled. Lots of useful information such as band diagram, potential profile, and carrier distribution can be retrieved. The calculated results were validated with experiments, especially on the AlInN layer structures after considering the influence from the parasitic Ga-rich layer on top of the spacer. Two dimensional cross-section simulation shows that the peak of electrical field locates at the gate edge towards the drain, and of different kinds of structures the device with gate field-plate was found to efficiently reduce the possibility of breakdown failure.
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Moen, Kurt Andrew. "Predictive modeling of device and circuit reliability in highly scaled CMOS and SiGe BiCMOS technology." Diss., Georgia Institute of Technology, 2012. http://hdl.handle.net/1853/44700.
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The advent of high-frequency silicon-based technologies has enabled the design of mixed-signal circuits that incorporate analog, RF, and digital circuit components to build cost-effective system-on-a-chip solutions. Emerging applications provide great incentive for continued scaling of transistor performance, requiring careful attention to mismatch, noise, and reliability concerns. If these mixed-signal technologies are to be employed within space-based electronic systems, they must also demonstrate reliability in radiation-rich environments. SiGe BiCMOS technology in particular is positioned as an excellent candidate to satisfy all of these requirements. The objective of this research is to develop predictive modeling tools that can be used to design new mixed-signal technologies and assess their reliability on Earth and in extreme environments. Ultimately, the goal is to illuminate the interaction of device- and circuit-level reliability mechanisms and establish best practices for modeling these effects in modern circuits. To support this objective, several specific areas have been targeted first, including a TCAD-based approach to identify performance-limiting regions in SiGe HBTs, measurement and modeling of carrier transport parameters that are essential for predictive TCAD, and measurement of device-level single-event transients to better understand the physical origins and implications for device design. These tasks provide the foundation for the bulk of this research, which addresses circuit-level reliability challenges through the application of novel mixed-mode TCAD techniques. All of the individual tasks are tied together by a guiding theme: to develop a holistic understanding of the challenges faced by emerging broadband technologies by coordinating results from material, device, and circuit studies.
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Wang, Dongxue Michael. "Optoelectronic device simulation optical modeling for semiconductor optical amplifiers and solid state lighting /." Diss., Available online, Georgia Institute of Technology, 2006, 2006. http://etd.gatech.edu/theses/available/etd-03292006-132611/.
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Thesis (Ph. D.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2006.Buck, John, Committee Co-Chair ; Ferguson, Ian, Committee Chair ; Krishnamurthy,Vikram, Committee Member ; Chang, Gee-Kung, Committee Member ; Callen, W. Russell Jr., Committee Member ; Summers, Christopher, Committee Member.
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Hontz, Michael Robert. "Next Generation Integrated Behavioral and Physics-based Modeling of Wide Bandgap Semiconductor Devices for Power Electronics." University of Toledo / OhioLINK, 2019. http://rave.ohiolink.edu/etdc/view?acc_num=toledo1556718365514067.
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Ni, Ze. "Wide Band-Gap Semiconductor Based Power Converter Reliability and Topology Investigation." Diss., North Dakota State University, 2020. https://hdl.handle.net/10365/31935.
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Wide band-gap semiconductor materials such as silicon carbide (SiC) and gallium nitride (GaN) have been widely investigated these years for their preferred operation at higher switching frequency, higher blocking voltage, higher temperature, with a compacter volume, in comparison with the traditional silicon (Si) devices. SiC MOSFETs have been utilized in photovoltaic systems, wind turbine converters, electric vehicles, solid-state transformers, more electric ships, and airplanes. GaN based transistors have also been adopted in the DC-to-DC converters in data centers, personal computers, AC-to-DC power factor correction converters for the consumer electronic adaptors, and DC-to-AC photovoltaic micro-inverters.
The first part of this dissertation is regarding the lifetime modeling and condition monitoring for the SiC MOSFETs. Since SiC-based devices have different failure modes and mechanisms compared with Si counterparts, a comprehensive review will be conducted to develop accurate lifetime prediction, condition monitoring, and lifetime extension strategies. First, a novel comprehensive online updated system-level lifetime modeling approach will be presented. Second, to monitor the SiC MOSFET ageing, the typical degradation indicators of SiC MOSFET gate oxide will be investigated. Third, to measure the junction temperature, the dynamic temperature-sensitive electrical parameters for the medium-voltage SiC devices will be studied.
The other part is the topology investigation of these emerging wide band-gap devices. A generalized topology that would leverage the advantages of the wide band-gap devices will be introduced and analyzed in detail. Following it is a new evaluation index for comparing different topologies with the consideration of the semiconductor die information. The topology and its derivatives will be utilized in the subsequent chapters for three applications. First, a 100 kW switched tank converter (STC) will be designed using SiC MOSFETs for transportation power electronic systems. Second, an updated STC topology integrating with the partial-power voltage regulation will be introduced for electric vehicle applications. Third, two novel single-phase resonant multilevel modular boost inverters will be designed based on the voltage-regulated STC. These topologies will be validated through designed prototypes. As a result, the high power density and high efficiency will be realized by combining the well-suited topologies and the advantages of the WBG devices.
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VADALA', Valeria. "CHARACTERIZATION AND MODELING OF LOW FREQUENCY DISPERSIVE EFFECTS IN III-V ELECTRON DEVICES." Doctoral thesis, Università degli studi di Ferrara, 2010. http://hdl.handle.net/11392/2389167.
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In this thesis, three years are enclosed of research activity in the topic of non linear
characterization and modelling of microwave devices. I investigated various issues
related to those topics which are closely related. In fact, to obtain good predictions,
empirical models require accurate measurements. This aspect is particularly
important when we want to predict the behavior of devices in nonlinear regime. More
and more applications take advantage of devices operation in non-linear regime. For
such a reason, non linear characterization is an hot topic and research activities have
focused particular attention on the need of characterize the nonlinear behaviour of
electron devices to obtain more accurate model prediction under actual operating
conditions.
The importance of this theme can be clearly understood by considering how, in
recent years, microwave technologies have become attractive for communication
applications and a number of commercial devices which are largely used in everyday
life (e.g., cell phone, GPS, wireless communication and so on).
In the first chapter the most important properties of devices and technologies used in
microwave electronics circuits will be dealt with. Particular attention is devoted to the
comparison between two III-V semiconductors for the fabrication of these devices:
GaAs, proven technology and used for years, and GaN, a youngest technology still
being tested. After this some of the most interesting issues related to III-V electron
devices, are discussed, such as low frequency dispersion. Finally a brief look will be
given at the non linear models for these devices.
In the second Chapter the most important microwave measurement systems
exploited to characterize the non linear dynamic behaviour of electron devices will be
discussed: pulsed setups, load / source-pull measurement systems, and Large
Signal time domain characterization systems. In particular, for each measurement
technique, it has been described the principle of operation and the application they
are used for.
In chapter III an alternative, technology-independent large-signal measurement setup,
developed during the PhD studies, is proposed for the experimental investigation
on the low frequency dispersion of current/voltage characteristics in micro- and
millimetre-wave electron devices and for their modeling. The proposed measurement
technique will be presented describing its hardware and software implementations
and showing different experimental examples.
In Chapter IV a new modeling approach will be presented accounting for the
nonlinear description of low-frequency dispersive effects (due to thermal phenomena
and traps) affecting electron devices. The model will be identified by exploiting
measurements carried out with the measurement system described in chapter III.
In the last Chapter a new, low-cost technique will be described for drawing “load-pull
contours” which are a powerful tool for power amplifier design. By exploiting the lowfrequency
measurement system described in chapter III and conventional
descriptions of device parasitic elements and nonlinear reactive effects, the proposed
approach allows to obtain the same information gathered by expensive highfrequency
load pull measurement systems.
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Li, Xinhao S. M. Massachusetts Institute of Technology. "Modeling the effects of surface plasmon resonance on hot electron collection in a metallic-semiconductor photonic crystal device." Thesis, Massachusetts Institute of Technology, 2017. http://hdl.handle.net/1721.1/111726.
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Thesis: S.M., Massachusetts Institute of Technology, Department of Mechanical Engineering, 2017.Cataloged from PDF version of thesis.
Includes bibliographical references (pages 68-72).
Metallic-semiconductor Schottky hot carrier devices have been found as a promising solution to harvest photon with energy below the bandgap of semiconductor, which is of crucial importance for realizing efficient solar energy conversion. In recent years, extensive efforts have been devoted to utilizing surface plasmon resonance to improve light absorption by creating strong light-metal interaction, which generates hot electrons through nonradiative decay. However, how surface plasmon enhances the efficiency of hot electron collection is still debatable. This thesis studies the effects of surface plasmon resonance on hot electron collection in a metallic-semiconductor photonic crystal (MSPhC) designed by our group for efficient photoelectron-chemical energy conversion. In contrast to a broadband light absorption at the range from 400 nm to 800 nm, the sub-bandgap photoresponse shows a single peak centered at 590 nm, which is identified as the surface plasmon resonant wavelength of this device. We develop a theoretical model of hot electron generation, transport and injection in this device incorporating the effects of anisotropic hot electron momentum distribution caused by surface plasmon resonance. Near resonant wavelength, surface plasmon dominates the electric field in the thin Au layer, which generates hot electrons with high enough momentum preferentially normal to the Schottky interface. Through analyzing the energy, momentum and spatial distribution of generated hot electrons, we develop a model to estimate the internal quantum efficiency (IQE) of this device. The anisotropic hot electron momentum distribution largely enhances IQE and photoresponse near the resonant wavelength. Compared with the widely used Fowler's theory of Schottky internal photoemission, our model can better predict IQE of surface plasmon assisted hot electron collection. Combined with large scale photonic design tools, this quantum-level model could be applied for tuning and enhancing photoresponse of Schottky hot carrier devices.
by Xinhao Li.
S.M.
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Mogg, Sebastian. "Long-Wavelength Vertical-Cavity Lasers : Materials and Device Analysis." Doctoral thesis, KTH, Microelectronics and Information Technology, IMIT, 2003. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-3585.
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Vertical-cavity lasers (VCLs) are of great interest as lightsources for fiber-optic communication systems. Such deviceshave a number of advantages over traditional in-plane laserdiodes, including low power consumption, efficient fibercoupling, on-chip testability, as well as potential low-costfabrication and packaging. To date, GaAs-based VCLs operatingat 850 nm are the technology of choice for short-distance,high-speed data transmission over multimode fiber. Forlong-distance communication networks, long-wavelength (LW) VCLsoperating in the 1.3 and 1.55-μm transmission windowsof standard singlemode fibers are desired. However, despiteconsiderable worldwide development efforts, the commercialbreakthrough of such devices has still to be achieved. This ismainly due to shortcomings of the intrinsic material propertiesof InP-based material systems, traditionally employed in LWlaser diodes. While LW quantum well (QW) active regions basedon InP are well established, efficient distributed Braggreflectors (DBRs) are better built up in the AlGaAs/GaAsmaterial system. Therefore, earlier work on LW VCLs has focusedon hybrid techniques such as bonding between InP-based QWs andAlGaAs/GaAs DBRs using waferfusion. More recently, however, themain interest in this field has shifted towards all-epitaxialGaAs-based devices employing novel 1.3-μm activematerials with strained GaInNAs QWs as one of the mostpromising candidates.
The main focus of this thesis is on the characterization andanalysis of LW VCLs and building blocks thereof, based on bothInP and GaAs substrates. This includes a theoretical study on1.3-μm InGaAsP/InP multiple QW active regions, as wellas an experimental investigation of novel, highly strained1.2-μm InGaAs/GaAs single QWs. Two high-accuracyabsolute reflectance measurement setups were built for thecharacterization of various DBRs. Reflectance measurementsrevealed that n-type doping is much more detrimental to theperformance of AlGaAs/GaAs DBRs than previously anticipated.Near-room temperature operation of a single-fused1.55-μm VCL with an InP/InGaAsP bottom DBR wasobtained. A thermal analysis of this device structure clearlyindicated its limited capabilities in terms of high-temperatureoperation. As a result, further efforts were directed towardsall-epitaxial GaAs-based VCLs. Record-long emission wavelengthsto above 1260 nm were obtained from InGaAs VCLs based on anextensive gaincavity detuning. These devices showed verypromising performance characteristics in terms of thresholdcurrent and light output power, indicating good potential forbeing a viable alternative to GaInNAs-based VCLs.
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Walker, Alexandre W. "Bandgap Engineering of Multi-Junction Solar Cells for Enhanced Performance Under Concentration." Thèse, Université d'Ottawa / University of Ottawa, 2013. http://hdl.handle.net/10393/26240.
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This doctorate thesis focuses on investigating the parameter space involved in numerically modeling the bandgap engineering of a GaInP/InGaAs/Ge lattice matched multi-junction solar cell (MJSC) using InAs/InGaAs quantum dots (QDs) in the middle sub-cell. The simulation environment – TCAD Sentaurus – solves the semiconductor equations using finite element and finite difference methods throughout well-defined meshes in the device to simulate the optoelectronic behavior first for single junction solar cells and subsequently for MJSCs with and without quantum dots under concentrated illumination of up to 1000 suns’ equivalent intensity. The MJSC device models include appropriate quantum tunneling effects arising in the tunnel junctions which serve as transparent sub-cell interconnects. These tunneling models are calibrated to measurements of AlGaAs/GaAs and AlGaAs/AlGaAs tunnel junctions reaching tunneling peak current densities above 1000 A/cm^2.
Self-assembled InAs/GaAs quantum dots (QDs) are treated as an effective medium through a description of appropriate generation and recombination processes. The former includes analytical expressions for the absorption coefficient that amalgamates the contributions from the quantum dot, the InAs wetting layer (WL) and the bulk states. The latter includes radiative and non-radiative lifetimes with carrier capture and escape considerations from the confinement potentials of the QDs. The simulated external quantum efficiency was calibrated to a commercial device from Cyrium Technologies Inc., and required 130 layers of the QD effective medium to match the contribution from the QD ground state. The current – voltage simulations under standard testing conditions (1 kW/cm^2, T=298 K) demonstrated an efficiency of 29.1%, an absolute drop of 1.5% over a control structure. Although a 5% relative increase in photocurrent was observed, a 5% relative drop in open circuit voltage and an absolute drop of 3.4% in fill factor resulted from integrating lower bandgap nanostructures with shorter minority carrier lifetimes. However, these results are considered a worst case scenario since maximum capture and minimum escape rates are assumed for the effective medium model. Decreasing the band offsets demonstrated an absolute boost in efficiency of 0.5% over a control structure, thus outlining the potential benefits of using nanostructures in bandgap engineering MJSCs.
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Ma, Cliff Liewei. "Modeling of bipolar power semiconductor devices /." Thesis, Connect to this title online; UW restricted, 1994. http://hdl.handle.net/1773/6046.
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Sahoo, Amit Kumar. "Electro-thermal Characterizations, Compact Modeling and TCAD based Device Simulations of advanced SiGe : C BiCMOS HBTs and of nanometric CMOS FET." Thesis, Bordeaux 1, 2012. http://www.theses.fr/2012BOR14557/document.
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Ce travail de thèse présente une évaluation approfondie des différentes techniques de mesure transitoire et dynamique pour l’évaluation du comportement électro-thermique des transistors bipolaires à hétérojonctions HBT SiGe:C de la technologie BiCMOS et des transistors Métal-Oxyde-Semiconducteur à effet de champ (MOSFET) de la technologie CMOS 45nm. En particulier, je propose une nouvelle approche pour caractériser avec précision le régime transitoire d'auto-échauffement, basée sur des mesures impulsionelles. La méthodologie a été vérifiée par des mesures statiques à différentes températures ambiantes, des mesures de paramètres S à basses fréquences et des simulations thermiques transitoires. Des simulations thermiques par éléments finis (TCAD) en trois dimensions ont été réalisées sur les transistors HBTs de la technologie submicroniques SiGe: C BiCMOS. Cette technologie est caractérisée par une fréquence de transition fT de 230 GHz et une fréquence maximum d’oscillation fMAX de 290 GHz. Par ailleurs, cette étude a été réalisée sur les différentes géométries de transistor. Une évaluation complète des mécanismes d'auto-échauffement dans les domaines temporels et fréquentiels a été réalisée. Une expression généralisée de l'impédance thermique dans le domaine fréquentiel a été formulée et a été utilisé pour extraire cette impédance en deçà de la fréquence de coupure thermique. Les paramètres thermiques ont été extraits par des simulations compactes grâce au modèle compact de transistors auquel un modèle électro-thermique a été ajouté via le nœud de température. Les travaux théoriques développés à ce jour pour la modélisation d'impédance thermique ont été vérifiés avec nos résultats expérimentaux. Il a été montré que, le réseau thermique classique utilisant un pôle unique n'est pas suffisant pour modéliser avec précision le comportement thermique transitoire et donc qu’un réseau plus complexe doit être utilisé. Ainsi, nous validons expérimentalement pour la première fois, le modèle distribué électrothermique de l'impédance thermique utilisant un réseau nodal récursif. Le réseau récursif a été vérifié par des simulations TCAD, ainsi que par des mesures et celles ci se sont révélées en excellent accord. Par conséquent, un modèle électro-thermique multi-géométries basé sur le réseau récursif a été développé. Le modèle a été vérifié par des simulations numériques ainsi que par des mesures de paramètre S à basse fréquence et finalement la conformité est excellente quelque soit la géométrie des dispositifsAn extensive evaluation of different techniques for transient and dynamic electro-thermal behavior of microwave SiGe:C BiCMOS hetero-junction bipolar transistors (HBT) and nano-scale metal-oxide-semiconductor field-effect transistors (MOSFETs) have been presented. In particular, new and simple approach to accurately characterize the transient self-heating effect, based on pulse measurements, is demonstrated. The methodology is verified by static measurements at different ambient temperatures, s-parameter measurements at low frequency region and transient thermal simulations. Three dimensional thermal TCAD simulations are performed on different geometries of the submicron SiGe:C BiCMOS HBTs with fT and fmax of 230 GHz and 290 GHz, respectively. A comprehensive evaluation of device self-heating in time and frequency domain has been investigated. A generalized expression for the frequency-domain thermal impedance has been formulated and that is used to extract device thermal impedance below thermal cut-off frequency. The thermal parameters are extracted through transistor compact model simulations connecting electro-thermal network at temperature node. Theoretical works for thermal impedance modeling using different networks, developed until date, have been verified with our experimental results. We report for the first time the experimental verification of the distributed electrothermal model for thermal impedance using a nodal and recursive network. It has been shown that, the conventional single pole thermal network is not sufficient to accurately model the transient thermal spreading behavior and therefore a recursive network needs to be used. Recursive network is verified with device simulations as well as measurements and found to be in excellent agreement. Therefore, finally a scalable electro-thermal model using this recursive network is developed. The scalability has been verified through numerical simulations as well as by low frequency measurements and excellent conformity has been found in for various device geometries
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D'Esposito, Rosario. "Electro-thermal characterization, TCAD simulations and compact modeling of advanced SiGe HBTs at device and circuit level." Thesis, Bordeaux, 2016. http://www.theses.fr/2016BORD0147/document.
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Ce travail de thèse présente une étude concernant la caractérisation des effets électrothermiques dans les transistors bipolaires à hétérojonction (HBT) en SiGe. Lors de ces travaux, deux procédés technologiques BiCMOS à l’état de l’art ont été analysés: le B11HFC de Infineon Technologies (130nm) et le B55 de STMicroelectronics (55nm).Des structures de test dédiées ont étés conçues, pour évaluer l’impact électrothermique du back end of line (BEOL) de composants ayant une architecture à un ou plusieurs doigts d’émetteur. Une caractérisation complète a été effectuée en régime continu et en mode alternatif en petit et en grand signal. De plus, une extraction des paramètres thermiques statiques et dynamiques a été réalisée et présentée pour les structures de test proposées. Il est démontré que les figures de mérite DC et RF s’améliorent sensiblement en positionnant des couches de métal sur le transistor, dessinées de manière innovante et ayant pour fonction de guider le flux thermique vers l’extérieur. L’impact thermique du BEOL a été modélisé et vérifié expérimentalement dans le domaine temporel et fréquentiel et aussi grâce à des simulations 3D par éléments finis. Il est à noter que l’effet du profil de dopage sur la conductivité thermique est analysé et pris en compte.Des topologies de transistor innovantes ont étés conçues, permettant une amélioration des spécifications de l’aire de sécurité de fonctionnement, grâce à un dessin innovant de la surface d’émetteur et du deep trench (DTI).Un modèle compact est proposé pour simuler les effets de couplage thermique en dynamique entre les émetteurs des HBT multi-doigts; ensuite le modèle est validé avec de mesures dédiées et des simulations TCAD.Des circuits de test ont étés conçus et mesurés, pour vérifier la précision des modèles compacts utilisés dans les simulateurs de circuits; de plus, l’impact du couplage thermique entre les transistors sur les performances des circuits a été évalué et modélisé. Finalement, l’impact du dissipateur thermique positionné sur le transistor a été étudié au niveau circuit, montrant un réel intérêt de cette approcheThis work is focused on the characterization of electro-thermal effects in advanced SiGe hetero-junction bipolar transistors (HBTs); two state of the art BiCMOS processes have been analyzed: the B11HFC from Infineon Technologies (130nm) and the B55 from STMicroelectronics (55nm).Special test structures have been designed, in order to evaluate the overall electro-thermal impact of the back end of line (BEOL) in single finger and multi-finger components. A complete DC and RF electrical characterization at small and large signal, as well as the extraction of the device static and dynamic thermal parameters are performed on the proposed test structures, showing a sensible improvement of the DC and RF figures of merit when metal dummies are added upon the transistor. The thermal impact of the BEOL has been modeled and experimentally verified in the time and frequency domain and by means of 3D TCAD simulations, in which the effect of the doping profile on the thermal conductivity is analyzed and taken into account.Innovative multi-finger transistor topologies are designed, which allow an improvement of the SOA specifications, thanks to a careful design of the drawn emitter area and of the deep trench isolation (DTI) enclosed area.A compact thermal model is proposed for taking into account the mutual thermal coupling between the emitter stripes of multi-finger HBTs in dynamic operation and is validated upon dedicated pulsed measurements and TCAD simulations.Specially designed circuit blocks have been realized and measured, in order to verify the accuracy of device compact models in electrical circuit simulators; moreover the impact on the circuit performances of mutual thermal coupling among neighboring transistors and the presence of BEOL metal dummies is evaluated and modeled
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ZAGNI, NICOLO'. "Metodi di Simulazione e Modellizazione per Predirre le Performance e l'Affidabilità dell'Elettronica del XXI Secolo." Doctoral thesis, Università degli studi di Modena e Reggio Emilia, 2021. http://hdl.handle.net/11380/1239990.
Full textAbstract:
Negli ultimi anni si è assitito emergere una pleteora di dispositivi a semiconduttore innovativi come degni eredi dei transistor basati su Silicio, dando via alla cosidetta era 'post-Moore'. Infatti, nonostante l'elettronica tradizionale sia basata su dispositivi in Silicio, --- dai circuiti logici alle memorie, dalle applicazioni ad alta frequenza/potenza alla sensoristica --- questo paradigma sta lentamente ma progressivamente mutando grazie agli sviluppi provenienti da diversi campi, dalla fisica e dai materiali a semiconduttore sino alle tecniche di fabbricazione e le architetture dei calcolatori. In questo nuovo, frenetico scenario, i potenziali fattori limite delle performance e dell'affidabilità di nuovi dispositivi devono essere ben compresi in una fase relativamente preliminare dello sviluppo affinché essi possano essere effettivamente presi in considerazione come sostituti della tecnologia preesistente. In questo senso, la simulazione e la modellizzazione fisica rappresentano degli strumenti fondamentali per la comprensione e dunque la progettazione di nuove tecnologie per soddisfare i requisiti dell'elettronica del XXI secolo.
In questo lavoro vengono utilizzati metodi di simulazione numerica e di modellizzazione compatta allo stato dell'arte per analizzare i limiti delle performance e dell'affidabilità di differenti tecnologie emergenti. Nello specifico, questa tesi affronta quattro differenti scenari applicativi e le tecnologie corrispondenti candidate come possibili sostituti delle controparti in Silicio. Queste sono: \emph{i)} III-V MOSFETs per circuiti logici/digitali; \emph{ii)} resitive-RAMs e ferroelectric-FETs per memorie non-volatili e elaborazione in-memory; \emph{iii)} transistor ad alta velocità basati su GaN per applicazioni di potenza; e \emph{iv)} transistor a capacità negativa per biosensori.In recent years, a plethora of novel semiconductor devices have started emerging as worthy heirs of Silicon-based transistors giving rise to the 'post-Moore' era. In fact, while traditional electronics was mostly based on Si devices, --- from logic to memory, to high frequency/power and sensing applications --- this paradigm is slowly but progressively changing thanks to the developments in different fields ranging from physics and semiconductor materials, to processing techniques and computing architectures. In this hectic new scenario, the potential limiting factors to the performance and reliability of new device concepts need to be well-understood at a very early stage of development before even considering a new technology as a replacement of the existing ones. In this sense, simulations and physics-based modeling represent critical tools to understand and thus engineer new technologies to the requirements of the 21\textsuperscript{st} electronics. In this work, state-of-the-art simulation and compact modeling tools are exploited to analyze the performance and reliability limits of emerging technologies. Specifically, this work addresses four application scenarios and and the candidate technologies to provide enhanced performance compared to Si-based counterparts. These are: \emph{i)} III-V MOSFETs for logic/digital circuits; \emph{ii)} resistive-RAMs and ferroelectric-FETs for non-volatile memory and in-memory computing; \emph{iii)} GaN-based high-speed transistors for power applications; and \emph{iv)} negative capacitance transistors for biosensing.
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Höhr, Timm. "Quantum-mechanical modeling of transport parameters for MOS devices /." Konstanz : Hartnung-Gorre, 2006. http://www.loc.gov/catdir/toc/fy0707/2007358987.html.
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Originally presented as the author's thesis (Swiss Federal Institute of Technology), Diss. ETH No. 16228.Summary in German and English, text in English. Includes bibliographical references (p. 123-132).
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Wu, Xu Sheng. "Three dimensional multi-gates devices and circuits fabrication, characterization, and modeling /." View abstract or full-text, 2005. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202005%20WUX.
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James, William Thomas. "Electro-thermal-mechanical modeling of GaN HFETs and MOSHFETs." Thesis, Georgia Institute of Technology, 2011. http://hdl.handle.net/1853/41212.
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High power Gallium Nitride (GaN) based field effect transistors are used in many high power applications from RADARs to communications. These devices dissipate a large amount of power and sustain high electric fields during operation. High power dissipation occurs in the form of heat generation through Joule heating which also results in localized hot spot formation that induces thermal stresses. In addition, because GaN is strongly piezoelectric, high electric fields result in large inverse piezoelectric stresses. Combined with residual stresses due to growth conditions, these effects are believed to lead to device degradation and reliability issues.
This work focuses on studying these effects in detail through modeling of Heterostructure Field Effect Transistors (HFETs) and metal oxide semiconductor hetero-structure field effect transistor (MOSHFETs) under various operational conditions. The goal is to develop a thorough understanding of device operation in order to better predict device failure and eventually aid in device design through modeling.
The first portion of this work covers the development of a continuum scale model which couples temperature and thermal stress to find peak temperatures and stresses in the device. The second portion of this work focuses on development of a micro-scale model which captures phonon-interactions at the device scale and can resolve local perturbations in phonon population due to electron-phonon interactions combined with ballistic transport. This portion also includes development of phonon relaxation times for GaN. The model provides a framework to understand the ballistic diffusive phonon transport near the hotspot in GaN transistors which leads to thermally related degradation in these devices.
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Weisz, Mario. "Electrothermal device-to-circuit interactions for half THz SiGe∶C HBT technologies." Thesis, Bordeaux 1, 2013. http://www.theses.fr/2013BOR14909/document.
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Ce travail concerne les transistors bipolaires à hétérogène TBH SiGe. En particulier, l'auto-échauffement des transistors unitaires et le couplage thermique avec leurs plus proches voisins périphériques sont caractérisés et modélisés. La rétroaction électrothermique intra- et inter-transistor est largement étudiée. En outre, l’impact des effets thermiques sur la performance de deux circuits analogiques est évalué. L'effet d'autoéchauffement est évalué par des mesures à basse fréquence et des mesures impulsionnelles DC et AC. L'auto-échauffement est diminué de manière significative en utilisant des petites largeurs d'impulsion. Ainsi la dépendance fréquentielle de l’autoéchauffementa été étudiée en utilisant les paramètres H et Y. De nouvelles structures de test ont été fabriqués pour mesurer l'effet de couplage. Les facteurs de couplage thermique ont été extraits à partir de mesures ainsi que par simulations thermiques 3D. Les résultats montrent que le couplage des dispositifs intra est très prononcé. Un nouvel élément du modèle de résistance thermique récursive ainsi que le modèle de couplage thermique a été inclus dans un simulateur de circuit commercial. Une simulation transitoire entièrement couplée d'un oscillateur en anneau de 218 transistors a été effectuée. Ainsi, un retard de porte record de 1.65ps est démontré. À la connaissance des auteurs, c'est le résultat le plus rapide pour une technologie bipolaire. Le rendement thermique d'un amplificateur de puissance à 60GHz réalisé avec un réseau multi-transistor ou avec un transistor à plusieurs doigts est évalué. La performance électrique du transistor multidoigt est dégradée en raison de l'effet de couplage thermique important entre les doigts de l'émetteur. Un bon accord est constaté entre les mesures et les simulations des circuits en utilisant des modèles de transistors avec le réseau de couplage thermique. Enfin, les perspectives sur l'utilisation des résultats sont donnéesThe power generate by modern silicon germanium (SiGe) heterojunction bipolar transistors (HBTs) can produce large thermal gradients across the silicon substrate. The device opering temperature modifies model parameters and can significantly affect circuit operation. This work characterizes and models self-heating and thermal coupling in SiGe HBTs. The self-heating effect is evaluated with low frequency and pulsed measurements. A novel pulse measurement system is presented that allows isothermal DC and RF measurements with 100ns pulses. Electrothermal intra- and inter-device feedback is extensively studied and the impact on the performance of two analog circuits is evaluated. Novel test structures are designed and fabricated to measure thermal coupling between single transistors (inter-device) as well as between the emitter stripes of a multi-finger transistor (intra-device). Thermal coupling factors are extracted from measurements and from 3D thermal simulations. Thermally coupled simulations of a ring oscillator (RO) with 218 transistors and of a 60GHz power amplifier (PA) are carried out. Current mode logic (CML) ROs are designed and measured. Layout optimizations lead to record gate delay of 1.65ps. The thermal performance of a 60GHz power amplifier is compared when realized with a multi-transistor array (MTA) and with a multi-finger trasistor (MFT). Finally, perspectives of this work within a CAD based circuit design environment are discussed
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Adams, Stephen E. "Semiconductor device modelling using the multigrid method." Thesis, University of British Columbia, 1988. http://hdl.handle.net/2429/27787.
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This thesis examines the application of the multigrid method to the semiconductor equations. An overview of semiconductor device modelling in presented, and the multi-grid method is described. Several modifications to the basic multigrid algorithm are evaluated based on their performance for a one dimensional model problem. It was found that using a symmetric Gauss-Seidel relaxation scheme, a special prolongation based on the discrete equations, and local relaxation sweeps near the pn-junctions produced
a robust, and efficient code. This modified algorithm is also successful for a wide variety of cases, and its performance compares favourably with other multigrid algorithms that have been applied to the semiconductor equations.Science, Faculty of
Mathematics, Department of
Graduate
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Ying-jian, Wu. "Fully coupled electrothermal modelling of semiconductor device." Thesis, University of Cambridge, 1992. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.308189.
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Coomer, Rob. "Parallel iterative methods in semiconductor device modelling." Thesis, University of Bath, 1994. https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.359852.
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Stein, Félix. "SPICE Modeling of TeraHertz Heterojunction bipolar transistors." Thesis, Bordeaux, 2014. http://www.theses.fr/2014BORD0281/document.
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Les études qui seront présentées dans le cadre de cette thèse portent sur le développement et l’optimisation des techniques pour la modélisation compacte des transistors bipolaires à hétérojonction (TBH). Ce type de modélisation est à la base du développement des bibliothèques de composants qu’utilisent les concepteurs lors de la phase de simulation des circuits intégrés. Le but d’une technologie BiCMOS est de pouvoir combiner deux procédés technologiques différents sur une seule et même puce. En plus de limiter le nombre de composants externes, cela permet également une meilleure gestion de la consommation dans les différents blocs digitaux, analogiques et RF. Les applications dites rapides peuvent ainsi profiter du meilleur des composants bipolaires et des transistors CMOS. Le défi est d’autant plus critique dans le cas des applications analogiques/RF puisqu’il est nécessaire de diminuer la puissance consommée tout en maintenant des fréquences de fonctionnement des transistors très élevées. Disposer de modèles compacts précis des transistors utilisés est donc primordial lors de la conception des circuits utilisés pour les applications analogiques et mixtes. Cette précision implique une étude sur un large domaine de tensions d’utilisation et de températures de fonctionnement. De plus, en allant vers des nœuds technologiques de plus en plus avancés, des nouveaux effets physiques se manifestent et doivent être pris en compte dans les équations du modèle. Les règles d’échelle des technologies plus matures doivent ainsi être réexaminées en se basant sur la physique du dispositif. Cette thèse a pour but d’évaluer la faisabilité d’une offre de modèle compact dédiée à la technologie avancée SiGe TBH de chez ST Microelectronics. Le modèle du transistor bipolaire SiGe TBH est présenté en se basant sur le modèle compact récent HICUMversion L2.3x. Grâce aux lois d’échelle introduites et basées sur le dessin même des dimensions du transistor, une simulation précise du comportement électrique et thermique a pu être démontrée.Ceci a été rendu possible grâce à l’utilisation et à l’amélioration des routines et méthodes d’extraction des paramètres du modèle. C’est particulièrement le cas pour la détermination des éléments parasites extrinsèques (résistances et capacités) ainsi que celle du transistor intrinsèque. Finalement, les différentes étapes d’extraction et les méthodes sont présentées, et ont été vérifiées par l’extraction de bibliothèques SPICE sur le TBH NPN Haute-Vitesse de la technologie BiCMOS avancée du noeud 55nm, avec des fréquences de fonctionnement atteignant 320/370GHz de fT = fmaxThe aim of BiCMOS technology is to combine two different process technologies intoa single chip, reducing the number of external components and optimizing power consumptionfor RF, analog and digital parts in one single package. Given the respectivestrengths of HBT and CMOS devices, especially high speed applications benefit fromadvanced BiCMOS processes, that integrate two different technologies.For analog mixed-signal RF and microwave circuitry, the push towards lower powerand higher speed imposes requirements and presents challenges not faced by digitalcircuit designs. Accurate compact device models, predicting device behaviour undera variety of bias as well as ambient temperatures, are crucial for the development oflarge scale circuits and create advanced designs with first-pass success.As technology advances, these models have to cover an increasing number of physicaleffects and model equations have to be continuously re-evaluated and adapted. Likewiseprocess scaling has to be verified and reflected by scaling laws, which are closelyrelated to device physics.This thesis examines the suitability of the model formulation for applicability to production-ready SiGe HBT processes. A derivation of the most recent model formulationimplemented in HICUM version L2.3x, is followed by simulation studies, whichconfirm their agreement with electrical characteristics of high-speed devices. Thefundamental geometry scaling laws, as implemented in the custom-developed modellibrary, are described in detail with a strong link to the specific device architecture.In order to correctly determine the respective model parameters, newly developed andexisting extraction routines have been exercised with recent HBT technology generationsand benchmarked by means of numerical device simulation, where applicable.Especially the extraction of extrinsic elements such as series resistances and parasiticcapacitances were improved along with the substrate network.The extraction steps and methods required to obtain a fully scalable model library wereexercised and presented using measured data from a recent industry-leading 55nmSiGe BiCMOS process, reaching switching speeds in excess of 300GHz. Finally theextracted model card was verified for the respective technology
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Dyck, Lindsay N. (Lindsay Nelson). "Modeling and fabrication of metal-insulator-semiconductor devices." Thesis, McGill University, 1995. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=23257.
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If the insulating layer in a metal-insulator-semiconductor (MIS) device is thin ($<$50A for Al-SiO$ sb2$-Si devices), measurable current will flow. For thinner insulators ($<$30A), currents become large enough to disturb the device from equilibrium conditions. Such devices are dominated by minority carrier flow between the metal and the semiconductor and exhibit properties very similar to p-n junctions, including exponential current-voltage characteristics approaching the ideal diode law of the p-n junction.Owing to simplicity of fabrication and consequent minimization of degradation of bulk semiconductor properties during processing, these devices are particularly suited to applications as direct energy conversion units.
This paper studies a model predicting MIS device operation. The model predicts device operation under both dark and illuminated conditions while varying parameters including: metal work function, semiconductor doping, insulator thickness, fixed diode charge, density of surface states and wafer thickness. Devices fabricated in the laboratory were then tested which support the modeled results.
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Tallarico, Andrea Natale <1988>. "Characterization and Modeling of Semiconductor Power Devices Reliability." Doctoral thesis, Alma Mater Studiorum - Università di Bologna, 2017. http://amsdottorato.unibo.it/7990/1/Tallarico_PhD_Thesis.pdf.
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This thesis aims at studying, characterizing and modeling the trapping and de-trapping mechanisms occurring during the ON-state operation mode and leading to the degradation of semiconductor power devices. In this operating condition, the combined effect of moderate electric fields, high currents and temperatures due to self-heating effects can seriously affect the long-term reliability leading to device failure. Detailed analyses are performed on both silicon and gallium nitride based technologies by means of accelerated life test methods and electro-thermal simulations, aimed at understanding the physical origins of the degradation.
In particular, this thesis provides the following contributions: i) the role of the interface and oxide trapped charge induced by negative bias temperature instability (NBTI) stress in p-channel Si-based U-MOSFETs is investigated. The impact of relevant electrical and physical parameters, such as stress voltage, recovery voltage and temperature, is accounted for and proper models are also proposed.
In the field of innovative semiconductor power devices, this work focuses on the study of GaN-based devices. In particular, three different subtopics are considered: ii) a thermal model, accounting for the temperature dependence of the thermal boundary resistance (TBR), is implemented in TCAD simulator in order to realistically model self-heating effects in GaN-based power devices; iii) the degradation mechanisms induced by ON-state stress in GaN-based Schottky barrier diodes (SBDs) are proposed by analyzing their dependence on the device geometry; iv) the trapping mechanisms underlying the time-dependent gate breakdown and their effects on the performance of GaN-based power HEMTs with p-type gate are investigated, and an original empirical model representing the relationship between gate leakage current and time to failure is proposed.
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Lee, Shih-Chung. "Physically-based modelling of polycrystalline semiconductor devices." Thesis, Imperial College London, 2000. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.394408.
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Bailey, Edwin J. "Mathematical modelling of semiconductor devices and processes." Thesis, Aston University, 1988. http://publications.aston.ac.uk/10648/.
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Bellotti, E. (Enrico). "Advanced modeling of wide band gap semiconductor materials and devices." Diss., Georgia Institute of Technology, 1999. http://hdl.handle.net/1853/15354.
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Nicolai, Massimo <1986>. "Modeling and Characterization of Semiconductor Devices for Energy Efficiency." Doctoral thesis, Alma Mater Studiorum - Università di Bologna, 2018. http://amsdottorato.unibo.it/8374/1/Nicolai_Massimo_PhDThesis.pdf.
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Photovoltaics is among the most important technologies aimed at producing electrical energy from renewable and sustainable energy sources, and its market demands more and more efficient and cost-effective technologies. Numerical device simulation allows understanding the link between new cell's architecture and physical structure, and the underlying physical mechanisms. Moreover, an advanced modeling may be suitable for identifying and analyzing promising solutions focused on the fulfillment of the photovoltaic market requirements.
This thesis aims at improving existing solar-cell simulation approaches and developing new ones. Furthermore, one of the challenges tackled by the presented work is to explain several behaviors revealed by the experimental characterization of different solar cell architectures (or concepts) and to provide useful findings to the industrial and experimental reasearch partners through an advanced numerical modeling.
This work provides the following contributions: i) the analysis of a new solar cell design conceived for low-medium concentrator photovoltaic applications, the EWT-DGB solar cell. Three-dimensional numerical simulations, calibrated starting from experimental data, are carried out to investigate the performance under concentrated light and the potentials considering possible realistic improvements with respect to the fabricated devices; ii) the role of top/rear poly-Si/SiOx selective contact applied on front emitter silicon solar cells is investigated by means of simulation studies performed by using physical models calibrated on the basis of experimental data. A rear junction design which desensitizes the Fill Factor (FF) to top electrode resistivity is also proposed. In addition, in the field of the modeling of advanced concepts applied on well-known high efficiency solar cells, the impact of a rear point contact (RPC) scheme in metal wrap through (MWT) solar cells with passivated base, the study of the well-known Light-Induced Degradation (LID) effect and electro-optical simulations of multi-wire (MW) and busbars (BBs) based solar cells aimed at evaluating a MW approach, are presented.
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Méjasson, Patrick Gérard. "The mathematical modelling of electrical and thermal acceleration factors in VLSI conductors." Thesis, University of South Wales, 1996. https://pure.southwales.ac.uk/en/studentthesis/the-mathematical-modelling-of-electrical-and-thermal-acceleration-factors-in-vlsi-conductors(8937dbb9-05b8-4c2b-9010-ea63dfce690a).html.
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All semiconductor devices need electrical accessibility and thus some form of metal contact is required. This contact may be rectifying or ohmic, but the metals used in the chip construction are often unsuitable for making connections to the outside world. Invariably, layered metallizations are used to make the top metallic layer suitable for wire or tape ultrasonic-thermocompression bonding, usually involving aluminium or gold, or soldering using lead-tin alloys. When a semiconductor device is fabricated, it goes through a number of processes at the end of which it is metallized, passivated, encapsulated, and packaged, or any combination of these. The device engineer knows the structure of the device which will include a number of semiconductor-metal, insulator-metal, and metal-metal interfaces. In order to ascertain the operational reliability of the device, accelerated life-tests and predelivery burn-in or screening (or both) based on life tests are often carried out. This stressing involves operating the device either at high temperatures or at high current densities in normal atmospheric, corrosive or highly irradiated environments, or in environments consisting of combinations of these. The different interfaces in the device may change their characteristics through materials transferred by various means at the different stages mentioned above. The interfacial changes and any resultant alterations in the bulk of the constituting materials invariably alters the electrical or mechanical performances (or both) of the device which is said to have degraded. More importantly, operation of the device at high power levels or at high stressing causes thermal runaway and device failure. The work carried out and described in this thesis focuses on failures which occur in the connective paths, known as lines between individual device internal transistors. Firstly, the operation of the VLSI device in adverse elevated thermal and elevated current density conditions will be described. Whilst the process failure mechanisms under these conditions are well documented and mathematically defined, a new technique involving mechanical stress modelling has been developed to predict failures locations in the Al-Si 1% lines. Secondly, a new procedure has been developed to artificially 'age' VLSI devices in order to observe any degradation which may occur in the connecting paths. Several factors have been identified which can contribute to line degradation. These are high current density, high temperature and high mechanical stress. These factors together give rise to electromigration, resulting in the physical movement of line material, which eventually results in catastrophic line failure. It has been previously thought that only temperature and current density were the controlling factors, but this investigation has shown that mechanical stress has a major influence. A new model to predict electromigration phenomena locations in conductive paths has thus been developed based on mechanical stress, in addition to current density and surrounding temperature.
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Hoagland, Richard W. "Time domain device modeling of High Frequency Power MOSFETs." Thesis, This resource online, 1993. http://scholar.lib.vt.edu/theses/available/etd-01102009-063443/.
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Philbrick, Robert H. "Modeling of light absorption in solid state imagers /." Online version of thesis, 1990. http://hdl.handle.net/1850/10557.
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Walker, Philip. "Electrical and thermal modelling of power semiconductor devices using numerical methods." Thesis, University of Liverpool, 1988. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.237525.
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MALAGUTI, Stefania. "Study, Modeling and Design of Semiconductor Photonic Crystal Based Devices." Doctoral thesis, Università degli studi di Ferrara, 2011. http://hdl.handle.net/11392/2388821.
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This thesis is focused on the study of nonlinear e�ects in semiconductor
materials. The aim is the design of e�cient optical devices able to supply
ultra-fast high-performances all-optical signal processing. The goal is pur-
sued by implementing di�erent tools, either theoretical models as well as
numerical methods. The main achievement is the design of new topologies
for photonic crystal based devices that implement various optical functional-
ities such as optical conversion and switching. This work has provided some
con�gurations for the manufacturing of a new generation of optical devices.
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Salem, Ali F. "Advanced numerical simulation modeling for semiconductor devices and it application to metal-semiconductor-metal photodetectors." Diss., Georgia Institute of Technology, 1995. http://hdl.handle.net/1853/13834.
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SABNEKAR, SHIVESH. "DYNAMIC MODELS FOR COMPLEX SEMICONDUCTOR DEVICES USING VHDL-AMS." University of Cincinnati / OhioLINK, 2001. http://rave.ohiolink.edu/etdc/view?acc_num=ucin981557858.
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McGhee, Joseph. "Models, measures and signals : collected works in modelling, measurement science and technology and signal engineering." Thesis, University of Strathclyde, 2002. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.248818.
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Lades, Martin. "Modeling and simulation of wide bandgap semiconductor devices 4H/6H-SiC /." [S.l. : s.n.], 2000. http://deposit.ddb.de/cgi-bin/dokserv?idn=962057827.
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Girgis, Alexi M. "Finite Element Method Modeling of Optoconductance in Metal-Semiconductor Hybrid Devices." Digital WPI, 2010. https://digitalcommons.wpi.edu/etd-dissertations/401.
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"A numerical description of the extraordinary optoconductance (EOC) effect is presented using two separate models. Extraordinary optoconductance is part of a general class of EXX geometric effects involving the external perturbation of the properties of a 2D electron gas in a macroscopic semiconductor or metal-semiconductor hybrid structure. The addition of metallic inclusions, has been shown to increase the sensitivity of devices relying on EXX effects. Following the discovery of the first EXX effect, extraordinary magneto-resistance (EMR), an optical equivalent was suggested. Unlike EMR, where the external perturbation is an applied magnetic field, EOC results from the modification of the local charge density in the semiconductor by a focused laser. The first model assumes Gaussian charge densities for the photo-generated electron-hole pairs while the second model directly solves the semiconductor drift-diffusion equations using the finite element method (FEM). Results from both models are shown to agree with experimental EOC data, both as a function of the laser spot position and temperature. The FEM model has the ability to describe EOC in more complex geometries making it useful in designing EOC devices geared for particular applications. "
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Do, Van-Nam. "Modeling and simulation of quantum electronic transport in semiconductor nanometer devices." Paris 11, 2007. http://www.theses.fr/2007PA112293.
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Nous étudions la modélisation et la simulation du transport quantique de charges dans deux nano-dispositifs semiconducteurs typiques, la diode à effet tunnel résonant (RTD) et le transistor MOSFET à double-grille. L'approche des fonctions de Green hors-équilibre a été mise en œuvre pour développer des calculs analytiques et numériques. L'étude couvre les différents aspects des caractéristiques courant-tension de ces dispositifs, en prenant rigoureusement en compte les effets quantiques tels que le confinement et l'effet tunnel. Les processus d'interaction électron-phonon sont également considérés. Les effets de la géométrie de dispositifs, de la température et du champ magnétique ont été étudiés systématiquement pour mettre en évidence le rôle des différents phénomènes quantiques. Une comparaison avec d'autres approches de transport, basées sur les fonctions de Boltzmann ou de Wigner, est menée pour apprécier l'efficacité de chacune des méthodes et pour évaluer les limites de l'équation semi-classique de Boltzmann. Puis, nous nous intéressons particulièrement au problème des fluctuations de courant dans les structures de type RTD, en nous concentrant notamment sur deux aspects typiques du bruit de grenaille, la diminution et l'augmentation du bruit liées aux corrélations des charges transitant par effet tunnel. Nous étudions non seulement l'effet sur le bruit des interactions électron-phonon dans le cadre de l'approche microscopique basé sur la résolution numérique des fonctions de Green hors-équilibre, mais nous étendons également l'approche standard des matrices de diffusion pour y inclure de façon appropriée les effets d'interaction sur le courant et le bruitWe study the modeling and simulation of the quantum transport of charges in two typical nanoscaled devices, the resonant tunneling diodes, and the double-gate metal-oxide-semiconductor field effect transistors. The nonequilibrium Green's function approach is used to carry out analytical and numerical calculations. The study covers all current-voltage characteristics in these structures, taking rigorously into account important quantum effects such as the quantum confinement, the tunnelling. The electron-phonon interaction is considered too. Effects of device geometry, temperature, and magnetic field have been systematically investigated to highlight the role of those quantum mechanisms. A comparison with approaches based on the Boltzman or the Wigner functions is carried out to appraise the efficiency of each method and also to validate the limits of the semiclassical approach. Apart from studies of current-voltage characteristics, problems of current fluctuations in resonant tunneling structures are also appropriately interested. The study mainly concentrates on two typical aspects of shot noise, the suppression and enhancement due to the correlation of tunneling charges. In addition to the microscopic treatment of the electron-phonon interaction process and the investigation of its effect on the shot noise characteristics, a new extension for the standard scattering matrix approach is proposed to capture properly effects of scattering on both the current and noise
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Wan, Bo. "MCAST : automatic device modeling in model compiler for efficient and accurate circuit simulation /." Thesis, Connect to this title online; UW restricted, 2004. http://hdl.handle.net/1773/5959.
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Myers, Robert Joseph. "Modelling and Fabrication of Organic Semiconductor Devices for RFID Tags." Thesis, University of Liverpool, 2008. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.507708.
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As organic semiconductor materials advance in both performance and stability, opportunities to integrate them into commercial applications increase considerably. The main benefits of organic semiconductor-related technology are the realisations of large area, flexible, cheap electronics. Already, organic light emitting diodes (OLEDs) are being integrated into small screens for mobiles phones, MP3 players, digital cameras, and high-resolution micro-displays. Such portable devices favour the high light output of OLEDs for easier readability in sunlight as well as their low power drain. However, at this time, the issue of low field effect mobilities still haunt these materials, limiting their application into low speed circuits. More recently, the introduction of the next generation of small molecule-based organic materials has increased the possibility of attaining high field effect mobilities. The majority of the focus is on pentacene as this has been shown to demonstrate effective mobilities of up to 1.5 cm2y-1s-l. Unfortunately, this type of pentacene was evaporated which does not seem feasible for large scale manufacturing. More recently, modified pentacene materials have surfaced allowing them to be dissolved in common solvents, one such example being triisopropylsilyl-pentacene (TIPSpentacene). Thin film transistors (TFTs) made with this material have been reported to have mobilities as high as 1.2 cm2y-ls-1 and onloffratios of 108. Materials such as TIPS-pentacene are now preferred as they can be integrated into low-cost manufacturing techniques such as inkjet printing and roll-to-roll processing. One of the major prospective applications for these organic materials is the integration into radio frequency identification tags (RFID); these operate at 13.56 MHz. This is a great challenge as the rectification stage will require devices with high mobilities to enable carriers to follow the signal, thus gaining the maximum amount of energy from an inductively coupled magnetic field. It is not clear as to whether Schottky diodes or gated-transistors will be required here. The advantage of gated-transistors is the simple incorporation into the fabrication process. Schottky diodes with these materials require thicker films which are incompatible with spin coated thin film transistors. This thesis focuses on three of the main components for a potential organic RFID tag: the tag antenna, the schottky diode and the organic thin film transistor. These are all vital components in the successful operation of an RFIO tag. The antenna is imperative for the power supply as it absorbs energy due to inductive coupling with the RFID reader antenna. The Schottky diode is important for the frontend/rectification stage, converting AC power to a DC supply voltage for an organic chip. The thin film transistor is hugely important as it is the backbone for logic and memory. The fundamental background into inductive coupling based RFID systems is explored and discussed. Major components such as the reader, tag and control system are introduced, while their role and importance are also looked into. Operational principles such as near field inductive coupling for systems functioning at 13.56 MHz are featured, involving the issues of data transfer and power supply. From here, the concept of mutual inductance is explored in detail, as well as highlighting the fact that most RFID systems of this nature comprise lower coupling, as low as I %. The core theory behind predicting the chip voltage on the tag is also explained, to illustrate just how many design parameters are involved and how they affect the performance of an RFID system. The challenges presented to organicbased RFID tags are also summarised and discussed. The numerous charge transport models proposed so far to represent conduction in organic semiconductors are assessed. These models include variable range Miller Abraham hopping and Poole-Frenkel mechanisms. Currently, an outright universal understanding of carrier transport is yet to be widely agreed. An analytical model is developed to demonstrate the carrier density dependence of mobility that is generally observed in organic semiconductors. An empirical relationship between mobility and carrier density, known as the Universal Mobility Law (UML) is recognised. The polycrystalline-based theory which consists of deriving expressions for quasi-drift and quasi-diffusion regions of operation is explained. TIPS-pentacene is utilised here for the first time to test the model. The fabrication procedure for creating bottom-gate bottom-contact organic thin film transistors is covered, with aluminium as the gate material, a high-K alumina gate dielectric and gold for the source and drain contacts. The transistors were fabricated and characterised in a clean non-vacuum environment. The effect of solvent choice is also investigated. comparing tetralin and toluene solvents. The field effect mobility of the charge carriers calculated were approximately 0.02 cm2Ns with threshold voltages ranging from -1V to +1V depending on the chosen solvent. The on/off current ratio estimated from the transfer characteristics were found to be six order of magnitude. Schottky diodes made with TIPS-pentacene show onloff current ratios three to four order magnitude higher than the P3HT devices, suggesting they are much more suitable for rectification circuits. The introduction of mixing the TIPSpentacene material with binders such as poly( a-methyl styrene ) (PAMS) and polystyrene (PS) produced some intriguing results. Both types of binders produced much smoother drop cast films than TIPS films without any binder applied, indicating that the binders were definitely improving the film morphology. Different surface treatments were also employed to help further increase the performance of the devices. It appeared that applying oxygen plasma to the bottom contact definitely helped adhesion. However, chemical treatments such as pentafluorobenzenethiol (PFBT) and I-hexadecanethiol (HDT) either did not affect performance or severely inhibited it.
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Ewert, Tony. "Advanced TCAD Simulations and Characterization of Semiconductor Devices." Doctoral thesis, Uppsala : Acta Universitatis Upsaliensis : Univ.-bibl. [distributör], 2006. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-6883.
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