Relevant bibliographies by topics / Semiconductor device modeling

Contents

  1. Journal articles
  2. Dissertations / Theses
  3. Books
  4. Book chapters
  5. Conference papers
  6. Reports

Academic literature on the topic 'Semiconductor device modeling'

Author: Grafiati
Published: 4 June 2021
Last updated: 6 September 2023

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Journal articles on the topic "Semiconductor device modeling"

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Vasileska, D., D. Mamaluy, H. R. Khan, K. Raleva, and S. M. Goodnick. "Semiconductor Device Modeling." Journal of Computational and Theoretical Nanoscience 5, no. 6 (June 1, 2008): 999–1030. http://dx.doi.org/10.1166/jctn.2008.2538.

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Schöll, Eckehard. "Modeling Nonlinear and Chaotic Dynamics in Semiconductor Device Structures." VLSI Design 6, no. 1-4 (January 1, 1998): 321–29. http://dx.doi.org/10.1155/1998/84685.

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We review the modeling and simulation of electrical transport instabilities in semiconductors with a special emphasis on recent progress in the application to semiconductor microstructures. The following models are treated in detail: (i) The dynamics of current filaments in the regime of low-temperature impurity breakdown is studied. In particular we perform 2D simulations of the nascence of a filament upon application of a bias voltage. (ii) Vertical electrical transport in layered semiconductor structures like the heterostructure hot electron diode is considered. Periodic as well as chaotic spatio-temporal spiking of the current is obtained. In particular we find long transients of spatio-temporal chaos preceding regular spiking.
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IÑIGUEZ, BENJAMIN, TOR A. FJELDLY, MICHAEL S. SHUR, and TROND YTTERDAL. "SPICE MODELING OF COMPOUND SEMICONDUCTOR DEVICES." International Journal of High Speed Electronics and Systems 09, no. 03 (September 1998): 725–81. http://dx.doi.org/10.1142/s0129156498000312.

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We review recent advances in the modeling of novel and advanced semiconductor devices, including state-of-the-art MESFET and HFETs, heterodimensional FETs, resonant tunneling devices, and wide-bandgap semiconductor transistors. We emphasize analytical, physics-based modeling incorporating the important effects present in modern day devices, including deep sub-micrometer devices. Such an approach is needed in order to accurately describe and predict both stationary and dynamic device behavior and to make the models suitable for implementation in advanced computer aided design tool including circuit simulators such as SPICE.
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Górecki, Paweł. "Compact Thermal Modeling of Power Semiconductor Devices with the Influence of Atmospheric Pressure." Energies 15, no. 10 (May 12, 2022): 3565. http://dx.doi.org/10.3390/en15103565.

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The efficiency of the heat dissipation process generated in semiconductor devices depends on many factors, related both to the parameters of the cooling system and environmental factors. Regarding the latter factors, ambient temperature and volume in which the device operates are typically indicated as the most important. However, in the case of the operation of semiconductor devices in non-standard conditions, e.g., in stratospheric airships, the thermal parameters of the device are significantly affected by a low value of atmospheric pressure. This paper presents a compact thermal model of a semiconductor device, considering the effects of reduced atmospheric pressure along with its experimental verification under various cooling conditions, thus obtaining high compliance for computation and measurement results. The formulated model is dedicated to circuit-level simulations, and it enables computations of the junction temperature of the semiconductor device in a short time. It is also shown that lowering atmospheric pressure can double the value of the junction-ambient thermal resistance.
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Mantooth, H. A., S. Ahmed, and S. S. Ang. "Power Semiconductor Device Modeling and Simulation." ECS Transactions 58, no. 4 (August 31, 2013): 391–98. http://dx.doi.org/10.1149/05804.0391ecst.

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Geistlinger, Helmut. "Device modeling of semiconductor gas sensors." Sensors and Actuators B: Chemical 14, no. 1-3 (June 1993): 685–86. http://dx.doi.org/10.1016/0925-4005(93)85144-y.

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Hurst, S. L. "Introduction to semiconductor device yield modeling." Microelectronics Journal 24, no. 5 (August 1993): 589. http://dx.doi.org/10.1016/0026-2692(93)90136-3.

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Dimitrijev, S., and N. Stojadinović. "Introduction to semiconductor device yield modeling." Microelectronics Journal 25, no. 3 (May 1994): 249. http://dx.doi.org/10.1016/0026-2692(94)90016-7.

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Prijić, Z. D., and S. Z. Mijalković. "Advanced semiconductor device physics and modeling." Microelectronics Journal 25, no. 8 (November 1994): 768. http://dx.doi.org/10.1016/0026-2692(94)90142-2.

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Dimitrijev, S., and N. Stojadinović. "Introduction to semiconductor device yield modeling." Microelectronics Reliability 34, no. 10 (October 1994): 1696. http://dx.doi.org/10.1016/0026-2714(94)90056-6.

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Dissertations / Theses on the topic "Semiconductor device modeling"

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Shea, Patrick. "DESIGN AND MODELING OF RADIATION HARDENED LDMOSFET FOR SPACE CRAFT POWER SYSTEMS." Master's thesis, University of Central Florida, 2007. http://digital.library.ucf.edu/cdm/ref/collection/ETD/id/2822.

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NASA missions require innovative power electronics system and component solutions with long life capability, high radiation tolerance, low mass and volume, and high reliability in space environments. Presently vertical double-diffused MOSFETs (VDMOS) are the most widely used power switching device for space power systems. It is proposed that a new lateral double-diffused MOSFET (LDMOS) designed at UCF can offer improvements in total dose and single event radiation hardness, switching performance, development and manufacturing costs, and total mass of power electronics systems. Availability of a hardened fast-switching power MOSFET will allow space-borne power electronics to approach the current level of terrestrial technology, thereby facilitating the use of more modern digital electronic systems in space. It is believed that the use of a p+/p-epi starting material for the LDMOS will offer better hardness against single-event burnout (SEB) and single-event gate rupture (SEGR) when compared to vertical devices fabricated on an n+/n-epi material. By placing a source contact on the bottom-side of the p+ substrate, much of the hole current generated by a heavy ion strike will flow away from the dielectric gate, thereby reducing electrical stress on the gate and decreasing the likelihood of SEGR. Similarly, the device is hardened against SEB by the redirection of hole current away from the base of the device's parasitic bipolar transistor. Total dose hardness is achieved by the use of a standard complementary metal-oxide semiconductor (CMOS) process that has shown proven hardness against total dose radiation effects.
M.S.E.E.
School of Electrical Engineering and Computer Science
Engineering and Computer Science
Electrical Engineering MSEE
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Bürgler, Josef Franz. "Discretization and grid adaptation in semiconductor device modeling /." [S.l.] : [s.n.], 1990. http://e-collection.ethbib.ethz.ch/show?type=diss&nr=9146.

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Zhang, Minya. "Optoelectronic device modeling using field simulation techniques." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1998. http://www.collectionscanada.ca/obj/s4/f2/dsk1/tape11/PQDD_0005/NQ42892.pdf.

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Chang, Ruey-dar. "Physics and modeling of dopant diffusion for advanced device applications /." Digital version accessible at:, 1998. http://wwwlib.umi.com/cr/utexas/main.

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Lee, Brian 1975. "Exploring semiconductor device parameter space using rapid analytical modeling." Thesis, Massachusetts Institute of Technology, 1998. http://hdl.handle.net/1721.1/47431.

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Litsios, James. "A modeling language for mixed circuit and semiconductor device simulation /." [S.l.] : [s.n.], 1996. http://e-collection.ethbib.ethz.ch/show?type=diss&nr=11412.

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Benhsaien, Abdessamad. "Self-assembled quantum dot semiconductor nanostructures modeling: Photonic device applications." Thesis, University of Ottawa (Canada), 2006. http://hdl.handle.net/10393/27225.

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A microscopic analysis of a vertical stack of self-assembled InAs/GaAs lens-shaped quantum dot nanostructures is presented. The analysis revolves around a rigorous Hamiltonian formulation of an eight-band k.p. perturbation to account for the lattice-mismatch strain endured by the islands. The numerical implementation yields the effective bandgap energy and electronic structure of an InAs/GaAs quantum dot. Within the framework of a resonant two-level energy system, material gain and absorption spectra are calculated up to a third-order susceptibility to include nonlinearity. The material gain polarization dependence is expressed in the dipole transition strength. Polarization-dependent anisotropy factors corresponding to different interband transitions are derived and shown to satisfy a momentum conservation rule. Modal analysis of a rectangular core waveguide realized by imbedding the active quantum dot layer(s) into a cladding medium with lower refractive index is presented. Polarization-independent modal gain is achieved by optimizing the width of the rectangular core waveguide. In illustration of a quantum dot device, a realistic semiconductor optical amplifier model accounting for both stimulated and spontaneous emission is considered. The calculated carrier density longitudinal profile yields other parameters characterizing the amplifier performance.
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Weber, Michael Thomas. "Analysis of Zincblende-Phase GaN, Cubic-Phase SiC, and GaAs MESFETs Including a Full-Band Monte Carlo Simulator." Diss., Georgia Institute of Technology, 2005. http://hdl.handle.net/1853/7500.

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The objective of this research has been the study of device properties for emerging wide-bandgap cubic-phase semiconductors. Though the wide-bandgap semiconductors have great potential as high-power microwave devices, many gaps remain in the knowledge about their properties. The simulations in this work are designed to give insight into the performance of microwave high-power devices constructed from the materials in question. The simulation are performed using a Monte Carlo simulator which was designed from the ground up to include accurate, numerical band structures derived from an empirical pseudo-potential model. Improvements that have been made to the simulator include the generalized device structure simulation, the fully numerical final state selector, and the inclusion of the overlap integrals in the final-state selection. The first comparison that is made among the materials is direct-current breakdown. The DC voltage at which breakdown occurs is a good indication of how much power a transistor can provide. It is found that GaAs has the smallest DC breakdown, with 3C-SiC and ZB-GaN being over 3 times higher. This follows what is expected and is discussed in detail in the work. The second comparison made is the radio-frequency breakdown of the transistors. When devices are used in high-frequency applications it is possible to operate them beyond DC breakdown levels. This phenomenon is caused by the reaction time of the carriers in the device. It is important to understand this effect if these materials are used in a high-frequency application, since this effect can cause a change in the ability of a material to produce high-power devices. MESFETs made from these materials are compared and the results are discussed in detail.
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Fu, Yue. "Modeling,Design,and Characterization of Monolithic Bi-directional Power Semiconductor Switch." Doctoral diss., University of Central Florida, 2007. http://digital.library.ucf.edu/cdm/ref/collection/ETD/id/3778.

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Bidirectional power switching devices are needed in many power management applications, particularly in lithium-ion battery protection circuitry. A monolithic bidirectional power switch fabricated with a simplified CMOS technology is introduced in this dissertation. Throughout the design process, ISE TCAD tool plays an important role. Design variables are carefully analyzed to improve the device performance or yield the best trade off. Optimization is done with the help of TCAD simulation and theoretical calculations. The device has been successfully fabricated using simplified 0.5 micron CMOS process. The experimental result shows a breakdown voltage of 25V. Due to the interdigitated source to source design, the inter-terminal current flowing path is effectively reduced to a few microns. The experimental result shows an ultra low specific on resistance. In comparison with other bi-directional power semiconductor switches by some major semiconductor manufacturers, the proposed BDS device has less than one half of the specific on resistance, thus substantially lower on state power loss of the switch. The proposed BDS device has a unique NPNPN structure, in comparison with NPNP structure, which is the analytical structure for CMOS latch-up, the proposed device inherently exhibits a better latch up immunity than CMOS inverter, thanks to the negative feed back mechanism of the extra NPN parasitic BJT transistor. In order to implement the device into simulators like PSPICE or Cadence IC Design, a compact model named variable resistance model has been built. This simple analytical model fits quite well with experimental data, and can be easily implemented by Verilog-A or other hardware description languages. Also, macro modeling is possible provided that the model parameters can be extracted from experimental curves. Several advanced types of BDS devices have been proposed, they exceed the basic BDS design in terms of breakdown voltage and /or on resistance. These advanced structures may be prominent for further improvement of the basic BDS device to a higher extend. Some cell phone providers such as Nokia is already asking for higher breakdown voltage of BDS device, due to the possibility of incidentally insert the battery pack into the cell phone with wrong pin polarity. Hopefully, the basic BDS design or one of these advanced types may eventually be implemented into the leading brand cell phone battery packs.
Ph.D.
School of Electrical Engineering and Computer Science
Engineering and Computer Science
Electrical Engineering PhD
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Fan, Qian. "GaN heterojunction FET device Fabrication, Characterization and Modeling." VCU Scholars Compass, 2009. http://scholarscompass.vcu.edu/etd/35.

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This dissertation is focused on the research efforts to develop the growth, processing, and modeling technologies for GaN-based Heterojunction Field Effect Transistors (HFETs). The interest in investigating GaN HFETs is motivated by the advantageous material properties of nitride semiconductor such as large band gap, large breakdown voltage, and high saturation velocity, which make it very promising for the high power and microwave applications. Although enormous progress has been made on GaN transistors in the past decades, the technologies for nitride transistors are still not mature, especially concerning the reliability and stability of the device. In order to improve the device performance, we first optimized the growth and fabrication procedures for the conventional AlGaN barrier HFET, on which high carrier mobility and sheet density were achieved. Second, the AlInN barrier HFET was successfully processed, with which we obtained improved I-V characteristics compared with conventional structure. The lattice-matched AlInN barrier is beneficial in the removal of strain, which leads to better carrier transport characteristics. Furthermore, new device structures have been examined, including recess-gate HFET with n+ GaN cap layer and gate-on-insulator HFET, among which the insertion of gate dielectrics helps to leverage both DC and microwave performances. In order to depict the microwave behavior of the HFET, small signal modeling approaches were used to extract the extrinsic and intrinsic parameters of the device. An 18-element equivalent circuit model for GaN HFET has been proposed, from which various extraction methods have been tested. Combining the advantages from the cold-FET measurements and hot-FET optimizations, a hybrid extraction method has been developed, in which the parasitic capacitances were attained from the cold pinch-off measurements while the rest of the parameters from the optimization routine. Small simulation error can be achieved by this method over various bias conditions, demonstrating its capability for the circuit level design applications for GaN HFET. Device physics modeling, on the other hand, can help us to reveal the underlying physics for the device to operate. With the development of quantum drift-diffusion modeling, the self-consistent solution to the Schrödinger-Poisson equations and carrier transport equations were fulfilled. Lots of useful information such as band diagram, potential profile, and carrier distribution can be retrieved. The calculated results were validated with experiments, especially on the AlInN layer structures after considering the influence from the parasitic Ga-rich layer on top of the spacer. Two dimensional cross-section simulation shows that the peak of electrical field locates at the gate edge towards the drain, and of different kinds of structures the device with gate field-plate was found to efficiently reduce the possibility of breakdown failure.
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Books on the topic "Semiconductor device modeling"

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Ferris-Prabhu, Albert V. Introduction to semiconductor device yield modeling. Boston: Artech House, 1992.

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Kwyro, Lee, ed. Semiconductor device modeling for VLSI. Englewood Cliffs, N.J: Prentice Hall, 1993.

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Paolo, Antognetti, and Massobrio Giuseppe, eds. Semiconductor device modeling with SPICE. New York: McGraw-Hill, 1988.

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Paolo, Antognetti, ed. Semiconductor device modeling with SPICE. 2nd ed. New York: McGraw-Hill, 1993.

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Advanced semiconductor device physics and modeling. Boston: Artech House, 1993.

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Bürgler, Josef F. Discretization and grid adaptation in semiconductor device modeling. Konstanz: Hartung-Gorre, 1990.

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Litsios, James. A modeling language for mixed circuit and semiconductor device simulation. Konstanz: Hartung-Gorre, 1996.

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Meinecke, Stefan. Spatio-Temporal Modeling and Device Optimization of Passively Mode-Locked Semiconductor Lasers. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-030-96248-7.

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T, Dunham S., and Nelson Jeffrey S, eds. Semiconductor process and device performance modeling: Symposium held December 2-3, 1997, Boston, Massachusetts, U.S.A. Warrendale, Pa: Materials Research Society, 1998.

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Snowden, Christopher M., ed. Semiconductor Device Modelling. London: Springer London, 1989. http://dx.doi.org/10.1007/978-1-4471-1033-0.

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Book chapters on the topic "Semiconductor device modeling"

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Titinet, G. Clerico, and P. M. Scalafiotti. "Temperature Distribution on GaAs MESFETs: Thermal Modeling and Experimental Results." In Semiconductor Device Reliability, 479–89. Dordrecht: Springer Netherlands, 1990. http://dx.doi.org/10.1007/978-94-009-2482-6_28.

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Markowich, Peter A. "Mathematical Modeling of Semiconductor Devices." In The Stationary Semiconductor Device Equations, 7–30. Vienna: Springer Vienna, 1986. http://dx.doi.org/10.1007/978-3-7091-3678-2_2.

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Friedman, Avner. "Asymptotic Methods in Semiconductor Device Modeling." In The IMA Volumes in Mathematics and Its Applications, 57–65. New York, NY: Springer New York, 1988. http://dx.doi.org/10.1007/978-1-4615-7399-9_9.

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Friedman, Avner. "Multiple solutions in semiconductor device modeling." In The IMA Volumes in Mathematics and Its Applications, 49–64. New York, NY: Springer New York, 1989. http://dx.doi.org/10.1007/978-1-4615-7402-6_6.

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Avrutin, Eugene, and Julien Javaloyes. "Mode-Locked Semiconductor Lasers." In Handbook of Optoelectronic Device Modeling and Simulation, 183–234. Boca Raton, FL : CRC Press, Taylor & Francis Group, [2017] |: CRC Press, 2017. http://dx.doi.org/10.4324/9781315152318-7.

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Connelly, Michael J. "Semiconductor Optical Amplifier Fundamentals." In Handbook of Optoelectronic Device Modeling and Simulation, 611–30. Boca Raton, FL : CRC Press, Taylor & Francis Group, [2017] |: CRC Press, 2017. http://dx.doi.org/10.1201/9781315152301-20.

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Tijero, José-Manuel G., Antonio Pérez-Serrano, Gonzalo del Pozo, and Ignacio Esquivias. "Tapered Semiconductor Optical Amplifiers." In Handbook of Optoelectronic Device Modeling and Simulation, 697–714. Boca Raton, FL : CRC Press, Taylor & Francis Group, [2017] |: CRC Press, 2017. http://dx.doi.org/10.1201/9781315152301-22.

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Lilja, Klas. "Modeling the Limits of Stable Device Behaviour." In Power Semiconductor Devices and Circuits, 161–95. Boston, MA: Springer US, 1992. http://dx.doi.org/10.1007/978-1-4615-3322-1_7.

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Lingnau, Benjamin, and Kathy Lüdge. "Quantum-Dot Semiconductor Optical Amplifiers." In Handbook of Optoelectronic Device Modeling and Simulation, 715–46. Boca Raton, FL : CRC Press, Taylor & Francis Group, [2017] |: CRC Press, 2017. http://dx.doi.org/10.1201/9781315152301-23.

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Gupta, Yogendra, Niketa Sharma, Ashish Sharma, and Harish Sharma. "Machine Learning Algorithms for Semiconductor Device Modeling." In VLSI and Hardware Implementations Using Modern Machine Learning Methods, 163–79. Boca Raton: CRC Press, 2021. http://dx.doi.org/10.1201/9781003201038-9.

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Conference papers on the topic "Semiconductor device modeling"

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Moloney, J. V. "Semiconductor laser device modeling." In Fundamental issues of nonlinear laser dynamics. AIP, 2000. http://dx.doi.org/10.1063/1.1337763.

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Abe, Katsumi, Kazuki Ota, and Takeshi Kuwagaki. "Device Modeling of Oxide Semiconductor TFTs." In 2020 27th International Workshop on Active-Matrix Flatpanel Displays and Devices (AM-FPD). IEEE, 2020. http://dx.doi.org/10.23919/am-fpd49417.2020.9224488.

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Horn, Jason, David E. Root, and Gary Simpson. "GaN Device Modeling with X-Parameters." In 2010 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS). IEEE, 2010. http://dx.doi.org/10.1109/csics.2010.5619691.

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Adler, M. S., D. N. Pattanayak, B. J. Baliga, V. A. K. Temple, and H. R. Chang. "Device physics and modeling of integrated power devices." In [1987] NASECODE V: Fifth International Conference on the Numerical Analysis of Semiconductor Devices and Integrated Circuits. IEEE, 1987. http://dx.doi.org/10.1109/nascod.1987.721121.

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LAKE, ROGER, DEJAN JOVANOVIC, and CRISTIAN RIVAS. "NON-EQUILIBRIUM GREEN’S FUNCTIONS IN SEMICONDUCTOR DEVICE MODELING." In Proceedings of the Conference. WORLD SCIENTIFIC, 2003. http://dx.doi.org/10.1142/9789812705129_0013.

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Woods, Beth O., H. Alan Mantooth, and John D. Cressler. "SiGe HBT compact modeling for extreme temperatures." In 2007 International Semiconductor Device Research Symposium. IEEE, 2007. http://dx.doi.org/10.1109/isdrs.2007.4422239.

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Rusak, Tal, Akin Akturk, and Neil Goldsman. "Numerical modeling of nanotube embedded chemicapacitive sensors." In 2007 International Semiconductor Device Research Symposium. IEEE, 2007. http://dx.doi.org/10.1109/isdrs.2007.4422247.

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Wei Zhao, Xia Li, Matt Nowak, and Yu Cao. "Predictive technology modeling for 32nm low power design." In 2007 International Semiconductor Device Research Symposium. IEEE, 2007. http://dx.doi.org/10.1109/isdrs.2007.4422430.

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Joong-sik Kim and Taeyoung Won. "Two-Dimensional Quantum Mechanical Modeling for Multiple-Channel FinFET." In 2005 International Semiconductor Device Research Symposium. IEEE, 2005. http://dx.doi.org/10.1109/isdrs.2005.1596127.

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Dobes, Josef, and Ladislav Pospisil. "Modeling special high frequency devices using artificial neural networks." In 2007 International Semiconductor Device Research Symposium. IEEE, 2007. http://dx.doi.org/10.1109/isdrs.2007.4422303.

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Reports on the topic "Semiconductor device modeling"

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Grubin, H. L. Physics and Modeling of Compound SemiConductor Devices with Semi-Insulating and Native-Oxide Layers. Fort Belvoir, VA: Defense Technical Information Center, December 2000. http://dx.doi.org/10.21236/ada405684.

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