Relevant bibliographies by topics / Router

Academic literature on the topic 'Router'

Author: Grafiati
Published: 4 June 2021
Last updated: 21 February 2023

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Journal articles on the topic "Router"

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Zhang, Chun Yang, Jun Fu Li, and Qian Xu. "BU-Router: Researching on Techniques of Global Router." Applied Mechanics and Materials 513-517 (February 2014): 539–44. http://dx.doi.org/10.4028/www.scientific.net/amm.513-517.539.

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Variety of routing approaches are employed by global routers in the VLSI circuit designs. Rip-up and reroute, as a conveniently implemented method, is widely used in most of modern global routers. Maze algorithm is always performed iteratively as the final technique to eliminate overflow. Maze algorithm and its ramifications can obtain an optimum solution. However, it will cost much CPU time if being used impertinently. In this work, we present a global router called Bottom-Up Router (BU-Router), with an optimized maze algorithm, which is based on multi-source multi-sink maze. BU-Router processes not the nets but the segments of nets in a sequence ordered by the length. In the progress, segments will be fixed on the global route graph edge, when the edge is saturated, which is as the basis, also known as bottom. Then the edge will be set as a blockage, which wont accept path goes through it any more. This means the edge will push the possible congestion in the future. Besides this, BU-Router optimized cost function in two ways: make the function adaptive and congestion center avoidable. Additionally, a specific optimized maze algorithm is proposed for routing a long distance segment so as to reduce the run-time.
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Bhatia, Dinesh, and V. Shankar. "Greedy Segmented Channel Router." VLSI Design 5, no. 1 (January 1, 1996): 11–21. http://dx.doi.org/10.1155/1996/53512.

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An efficient solution to the generalized detailed routing problem in segmented channels for row-based FPGAs is presented. A generalized detailed routing allows routing of each connection using an arbitrary number of tracks, i.e., doglegs are allowed. This approach is different from the normally followed method where each connection is routed on a single straight track. We present a router that performs generalized segmented channel routing using a greedy approach to route channels. The router also renders itself to limited tolerance against faults in the routing architecture.
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Sandeep, Darshanala, M. Vinodhini, and N. S. Murty. "Route-on-Fly Network-on-Chip Router Design with Soft-Error Tolerance." Journal of Computational and Theoretical Nanoscience 17, no. 1 (January 1, 2020): 329–33. http://dx.doi.org/10.1166/jctn.2020.8670.

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Decrease in size of IP cores, the Network-On-Chip (NOC), which is used to interconnect them, becomes more complex. NOC employ Network Interface (NI), routers and links. Chip process technology is shrinking day by day resulting in design complexities. This rises the chances of NOC becoming faulty and corrupting the packets transmitted through it. Further NOC has great influence on the complete system performance. Despite the fact that the NOC outperforms the traditional bus based interconnects, NOC faces problems with the usage of router pipeline stages. Generic pipelined router consists of Routing Computation (RC) stage, Virtual channel Allocator (VA) stage, Switch Allocator (SA) stage and CrossBar (CB) stage. These routers are more liable to hard faults and soft-errors. Hence, incorporation of an error tolerant technique to the pipeline stages is required. However, these results in area, power and delay overhead. In this paper, we proposes Route-On-Fly NOC router architecture with Soft-error tolerance (ROFNS), an optimized pipeline router with tolerance to soft errors. In addition, optimized VA stage to achieve overall reduction in area and delay penalty is also proposed. Implementation results show that there is 70%, 3% and 16% reduction in area, power and delay respectively when compared to Soft-error Tolerant NOC Router (STNR).
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Gudmundsson, Gudni, and Simeon Ntafos. "A Greedy Algorithm for Over-The-Cell Channel Routing." VLSI Design 5, no. 1 (January 1, 1996): 23–36. http://dx.doi.org/10.1155/1996/10797.

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Recent advances in VLSI technology have made the area over cells available for routing. In this paper we present a new over-the-cell channel router that uses greedy heuristics to make the over-the-cell connections and to define the nets needed to complete the connections inside the channel. The router tries to reduce the channel density by moving segments that cross maximum density columns to the over-the-cell areas. The layout model used allows only planar connections over each cell. The final stage is to use an existing channel router to route the connections inside the channel. An important characteristic of the new router is that there is interaction between the decisions made for the over-the-cell connections and the connections needed inside the channel. It performs significantly better than previous over the-cell routers.
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Yuliastuti, Gusti Eka, Citra Nurina Prabiantissa, and Agung Mustika Rizki. "Implementasi Simulated Annealing untuk Penentuan Rute pada Jaringan." MATICS 13, no. 2 (October 1, 2021): 42–46. http://dx.doi.org/10.18860/mat.v13i2.12969.

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Abstract—Recently computer networks are increasingly complex. It needs to be a supporting device for network management such as a router. Router is a device that plays an important role in the routing process. In a router stored information in the form of routing paths, where the information includes data and which routers will be passed. In certain cases, a router can have more than one gateway. This is because the router needs to send data packets to several networks that have different segments. Such cases can be handled by using the appropriate routing path selection rules. The routing problem can be regarded as a traveling salesman problem (TSP), where a mechanism is needed to determine the shortest route to be traversed. The author implements the Simulated Annealing Algorithm because it can produce an optimal solution with light computing, so that the routing process can be more effective and efficient. Index Terms—Computer Network, Routing, Simulated Annealing, Travelling Salesman Problem Abstrak–-Jaringan komputer saat ini semakin kompleks. Perlu adanya suatu perangkat pendukung untuk manajemen jaringan seperti router. Router merupakan perangkat yang berperan penting dalam proses routing. Pada sebuah router tersimpan informasi berupa jalur routing, dimana informasi tersebut mencakup data dan router mana saja yang akan dilewati. Pada kasus tertentu, router dapat memiliki lebih dari satu gateway. Hal ini disebabkan karena router perlu mengirimkan paket data ke beberapa jaringan yang memiliki segmen berbeda. Kasus tersebut dapat ditangani dengan menggunakan aturan pemilihan jalur routing yang tepat. Permasalahan routing dapat dikatakan sebagai suatu permasalahan travelling salesman problem (TSP), dimana diperlukan suatu mekanisme dalam menentukan rute terpendek untuk dilalui. Penulis mengimplementasikan Algoritma Simulated Annealing karena dapat menghasilkan solusi yang optimal dengan komputasi ringan, sehingga proses routing dapat lebih efektif dan efisien. Kata Kunci—Jaringan Komputer, Penentuan Rute, Travelling Salesman Problem, Algoritma Simulated Annealing
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Yang, Ya, Jing Lu, and Lan Zhou. "Few-photon routing via chiral light-matter couplings." Communications in Theoretical Physics 74, no. 2 (January 21, 2022): 025101. http://dx.doi.org/10.1088/1572-9494/ac46a6.

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Abstract A quantum router is one of the essential elements in the quantum network. Conventional routers only direct a single photon from one quantum channel into another. Here, we propose a few-photon router. The active element of the router is a single qubit chirally coupled to two independent waveguides simultaneously, where each waveguide mode provides a quantum channel. By introducing the operators of the scatter-free space and the controllable space, the output state of the one-photon and two-photon scattering are derived analytically. It is found that the qubit can direct one and two photons from one port of the incident waveguide to an arbitrarily selected port of the other waveguide with unity, respectively. However, two photons cannot be simultaneously routed to the same port due to the anti-bunch effect.
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Tang, Xian Tuo, Guang Fu Zeng, Feng Wang, Zuo Cheng Xing, and Chao Chao Feng. "Locality-Route Pre-Configuration Mechanism for Latency Optimization in NoCs." Applied Mechanics and Materials 571-572 (June 2014): 381–88. http://dx.doi.org/10.4028/www.scientific.net/amm.571-572.381.

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By exploiting communication temporal and spatial locality represented in actual applications, the paper proposes a locality-route pre-configuration mechanism (i.e. LRPC) on top of the Pseudo-Circuit scheme, to further accelerate network performance. Under the original Pseudo-circuit scheme, LRPC attempts to preconfigure another sharable crossbar connection at each input port within a single router when the pseudo circuit is invalid currently, so as to produce more available sharable route for packets transfer, and hence to enhance the reusability of the sharable route as well as communication performance. Our evaluation results using a cycle-accurate network simulator with traces from Splash-2 Benchmark show 5.4% and 31.6% improvement in overall network performance compared to Pseudo-Circuit and BASE_LR_SPC routers, respectively. Evaluated with synthetic workload traffic, at most 10.91% and 33.72% performance improvement can be achieved by the LRPC router under the Uniform-random, Bit-complement and Transpose traffic as compared to Pseudo-Circuit and BASE_LR_SPC routers.
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Nasir, M. H. M., N. A. M. Radzi, W. S. H. M. W. Ahmad, F. Abdullah, and M. Z. Jamaludin. "Comparison of router testbeds: embedded system-based, software-based, and multiprotocol label switching (MPLS)." Indonesian Journal of Electrical Engineering and Computer Science 15, no. 3 (September 1, 2019): 1250. http://dx.doi.org/10.11591/ijeecs.v15.i3.pp1250-1256.

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<span>Multiprotocol Label Switching (MPLS) is a promising packet switching technology in the field of communication network, allowing router to forward the packets based on labels. However, off-the-shelves routers are made to be non-configurable, making it less suitable for academic research purposes. The aim of this paper is to explore the possibility of developing a configurable MPLS router by reviewing embedded system-based router, software-based router and commercial MPLS router itself. The architecture of the routers will be described in detail and their performances will be compared. From the analysis, we found that the development of reconfigurable MPLS router testbed is achievable by using embedded system-based hardware due to its freedom of reconfigurability.</span>
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Dong, Shaohua, Qing Zhang, Guangtao Cao, Jincheng Ni, Ting Shi, Shiqing Li, Jingwen Duan, et al. "On-chip trans-dimensional plasmonic router." Nanophotonics 9, no. 10 (April 23, 2020): 3357–65. http://dx.doi.org/10.1515/nanoph-2020-0078.

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AbstractPlasmons, as emerging optical diffraction-unlimited information carriers, promise the high-capacity, high-speed, and integrated photonic chips. The on-chip precise manipulations of plasmon in an arbitrary platform, whether two-dimensional (2D) or one-dimensional (1D), appears demanding but non-trivial. Here, we proposed a meta-wall, consisting of specifically designed meta-atoms, that allows the high-efficiency transformation of propagating plasmon polaritons from 2D platforms to 1D plasmonic waveguides, forming the trans-dimensional plasmonic routers. The mechanism to compensate the momentum transformation in the router can be traced via a local dynamic phase gradient of the meta-atom and reciprocal lattice vector. To demonstrate such a scheme, a directional router based on phase-gradient meta-wall is designed to couple 2D SPP to a 1D plasmonic waveguide, while a unidirectional router based on grating metawall is designed to route 2D SPP to the arbitrarily desired direction along the 1D plasmonic waveguide by changing the incident angle of 2D SPP. The on-chip routers of trans-dimensional SPP demonstrated here provide a flexible tool to manipulate propagation of surface plasmon polaritons (SPPs) and may pave the way for designing integrated plasmonic network and devices.
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Khusnandar, Wahyudi, Fransiscus Ati Halim, and Felix Lokananta. "Design of TTL Based Routing Algorithm on UTAR Network on Chip Communication Architecture." International Journal of New Media Technology 5, no. 1 (July 5, 2018): 54–57. http://dx.doi.org/10.31937/ijnmt.v5i1.738.

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XY adaptive routing protocol is a routing protocol used on UTAR NoC communication architecture. This routing algorithm adapts shrotest-path first algorithm, which will forward will not be able to work optimally if the closest route no longer have enough bandwidth to continue the packet. Packet will be stored inside the router and forwarded to the nearest router when closest route has enough bandwidth. This paper suggest TTL based routing algorithm to resolve this issue. TTL based routing algorithm adapts XY adaptive routing protocol by adding several parameters on RTL UTAR NoC and additional bit in each packet sent by router. This additional bit and parameter will be used by TTL based algorithm as additional factors in choosing alternative routes inside the communication architecture. Use of TTL on TTL based routing different from use of TTL on communication network. Packets that carry TTL value that equal to Maximum TTL will be route using XY adaptive routing protocol. TTL based routing algorithm has shown better performance compared to XY adaptive routing on some of the experiment done using MSCL NoC Traffic Pattern Suite. This research also proves that TTL based routing algorithm cannot work optimally on small-scaled architecture.
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Dissertations / Theses on the topic "Router"

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Morselli, Filippo. "Routex: un Router Multitecnologia per Internet of Things." Bachelor's thesis, Alma Mater Studiorum - Università di Bologna, 2016. http://amslaurea.unibo.it/11889/.

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L'Internet of Things (IoT) è oggetto di grande interesse per la ricerca e per l'industria. Le numerose tecnologie che sono state sviluppate rendono possibile la creazione di nuovi e utili servizi, ma introducono problemi legati alla reciproca incompatibilità. Nell'elaborato si analizza nel dettaglio questa situazione e si descrive l'implementazione di un sistema che ha come obiettivo la realizzazione di una rete composta da dispositivi che fanno uso di tecnologie differenti. Il progetto usa un Raspberry Pi come router, il cui scopo è quello di gestire le differenze fra gli standard di comunicazione utilizzati. Le tecnologie wireless supportate sono: WiFi, Bluetooth, ZigBee, nRF24L01 e moduli radio 433MHz. Sulla rete cosi formata è inoltre possibile lo sviluppo di applicazioni IoT, grazie alle logiche di funzionamento messe a disposizione dal sistema.
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BANTAN, NOUMAN. "A ROUTING PROTOCOL AND ROUTING ALGORITHM FOR SPACE COMMUNICATION." Kent State University / OhioLINK, 2007. http://rave.ohiolink.edu/etdc/view?acc_num=kent1172099125.

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Doody, Aaron L. (Aaron Lee). "CNC router modernization." Thesis, Massachusetts Institute of Technology, 2007. http://hdl.handle.net/1721.1/40405.

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Thesis (S.B.)--Massachusetts Institute of Technology, Dept. of Mechanical Engineering, 2007.
Includes bibliographical references.
A large-format CNC router has been stored in the Pappalardo Laboratory wood shop for several years in an unusable state. A need assessment determined that it would be cost effective to bring the router online for use in the mechanical engineering curriculum. The router was cleaned and inspected; it was determined that the router was in sound mechanical condition. The stepper motors, control system, and power supply were also functional, but the CNC interface software was outdated. To ensure the long term viability of the router as an effective teaching tool the most cost effective solution was to upgrade the motors, control system, and CNC interface software using a package provided by the original supplier, Techno-Isel Inc. The motors, control system, and software were installed, bringing the router to a fully functional state. Dust and ejected cuttings cause a safety hazard and cleanliness problem when operating the router. An enclosure was designed and installed in order to trap the majority of debris and reduce noise levels in the workspace, and a brief user guide has been compiled to ensure safe and effective usage.
by Aaron L. Doody.
S.B.
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Gao, Xiaojie Schulman Leonard J. "Router congestion control /." Diss., Pasadena, Calif. : California Institute of Technology, 2004. http://resolver.caltech.edu/CaltechETD:etd-06142004-161237.

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Karamanos, Emmanouil. "Investigation of home router security." Thesis, KTH, Kommunikationssystem, CoS, 2010. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-91107.

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Home routers are common in every household that has some kind of Internet connectivity. These embedded devices are running services such as web, file and DHCP server. Even though they have the same security issues as regular computers, they do no run protection software such as anti-virus and they are not updated. Moreover, the importance of these devices is misjudged; all network traffic is passing through them and they control the DNS of the network while, in most cases, they are on-line around the clock. When more and more non-Internet features are implemented into home routers, such as Voice over IP and network storage, their role becomes more special and many security concerns are raising. In this thesis, we investigate the issues resulting from this special role; the importance for these devices to be secure, the attacking vector and how the devices can be compromised to be part of a large home router botnet. We conclude by proposing ways to make the current implementation more secure, suggesting ways to protect routers from botnets without user interaction, that is from the ISP, while respecting the privacy of the end user and we identify what future work needs to be done.
Router är vanliga i hem som har någon slags Internet anslutning. De här inbyggda enheter kör tjänster som t.ex. web, file och DHCP basenheter. Fastän de har samma säkerhetsfrågor som vanliga datorer, så kan de inte använda säkerhets mjukvara som t.ex anti-virus och de är inte uppdaterade. Dessutom har betydelsen av de här apparaterna blivit felbedömmat; hela nätverket passerar genom dem och de kontrolerar nätverkets DNS medan, i de flesta fall, de är on-line dygnet runt. Men, när mer och mer icke-Internet lockvaror fars in i routern, som t.ex Voice över IP och nätverkslagring, blir deras roll viktigare och oron för säkerheten växer. I den här avhandlingen utforskars problemen och frågorna som efterföljer deras speciella roll, hur viktigt det är att de här apparaterna är skyddade, (the attacking vector) och hur de här apparaterna kan bli jämkningad för att bli en del av ett stort router botnet. Vi avsluter med att lägga fram sätt att göra det nuvarande verktyget mer skyddat, föreslå sätt att skydda routern från botnet utan användarinteraktion, som kommer från ISP, medan man respekterar det andra användarens privtaliv och markera vad som behövs ändras i framtiden.
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Sers, Rickard, and Victor Wiberg. "Konstruktion av CNC-Router." Thesis, Örebro universitet, Institutionen för naturvetenskap och teknik, 2012. http://urn.kb.se/resolve?urn=urn:nbn:se:oru:diva-23611.

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AASS (Applied Autonomous Sensor Systems, Centrum för Tillämpade Autonoma Sensorsystem) arbetar med forskning inom autonoma system. Deras stora användningsområden är utveckling av automatiska system till fordonsindustrin samt system till äldrevården. AASS, har ett önskemål om en enklare modell av en CNC fräs för enklare fräsning till bland annat prototyptillverkning. Fokus ska ligga på kostnaden då precisionen inte är av största intresse. Uppdraget innebär att ta fram en konstruktion av en cnc- router med tre axlar med ett arbetsrum på 600x450x150mm. Maskinen ska kunna skära i mjuka material som trä, plaster men även mjukare aluminium. Resultatet är en tre axlig cnc- router som drivs av tre stycken stepmotorer som är kopplade till respektive kulskruv. Cnc routern har ett arbetsrum på cirka 600x450x150mm. Den klarar av skärkrafter på 150N utan att deformationer kommer ge stora felaktiga värden på bearbetad detalj. Konstruktionen består till huvuddel av aluminiumprofiler som finns tillängliga på Örebro universitet. De rörliga delarna består av Quadro Tables som tillverkas av Rollco. Konstruktionen ger en bra lösning till en relativt låg kostnad.
AASS (Applied Autonomous Sensor Systems, Center for Applied Autonomous Sensor) works with research in autonomous systems. Their major application is the development of such systems for the automotive industry as well for the elderly.  AASS, have a desire for a simple model of a CNC milling machine for milling smaller parts for prototyping. The focus should be on cost when precision is not of great interest.  The mission is to develop a design of a CNC router with three axes with a workspace of 600x450x150mm. The machine should be able to cut soft materials such as wood, plastics as well as soft aluminum.  The result is a three-axis CNC router which is driven by three stepper motors which are coupled to respective ball screw. The Cnc router has a workspace of about 600x450x150mm. It is capable of cutting with cutting forces up to 150N without deformations that will produce large errors in values of processed detail. The design consists of main body of aluminum profiles available at Örebro University. The movable parts consist of Quadro Tables manufactured by Rollco. The design provides a good solution to a relatively low cost.
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Hidell, Markus. "Decentralized Modular Router Architectures." Doctoral thesis, Stockholm : Laboratory for Communications Networks, Royal Institute of Technology, 2006. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-4090.

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Kohler, Eddie 1973. "The Click modular router." Thesis, Massachusetts Institute of Technology, 2000. http://hdl.handle.net/1721.1/86585.

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Thesis (Ph.D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, February 2001.
Includes bibliographical references (p. 122-127).
by Eddie Kohler.
Ph.D.
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Aslam, Muhammad Awais. "Router Architecture for Junction Based Source Routing:Design and FPGA Prototyping." Thesis, Tekniska Högskolan, Högskolan i Jönköping, JTH, Data- och elektroteknik, 2012. http://urn.kb.se/resolve?urn=urn:nbn:se:hj:diva-17231.

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The increase in the number of cores that can be integrated on a single chip has forced the designer to use computer network concepts for design of System on Chip (SoC). This idea led to development of Network on Chip (NoC) to deal with more cores on a single chip. NoC has three main parts, namely routers, link and network interface through which cores are connected to NoC. Router is one of the most important parts because cores communicate with other cores through routers. One of the important tasks for a NoC designer is to design router with low latency.Router design depends on the routing protocol and routing algorithm used. Two kinds of routing algorithms are source routing and distributed routing. In source routing, complete route information is available in Head flit while in distributed routing, routing decisions are taken inside every router on the path. Source routing has speed advantage over distributed routing because the packet itself contains the routing information. But source routing leads to overhead to store complete path information in the header of each packet. To overcome this flaw, junction based source routing has been introduced. If destination is far away from the source then first packet will go to a junction and get the new path information from the junction to the destination. Thus we need to store the path information only for a few hops in the packet header. This idea has been taken from the daily experience of train journey. In this thesis we have developed design of a router for junction based source routing. Main component of simple router includes buffering, header modification and making route decision. Router includes a table called Path Table which stores information about paths from junction to various destinations. JB router also includes, picking up the new path information from Path Table and modify the header by adding new path information.We have developed VHDL designs of two versions of the routers for Junction Based Routing. The delay performance of routers have been analysed through simulation. A simple prototype of the router has also been implemented in Altera FPGA to find out the resource requirements of the new router designs.
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Balakrishnan, Ramasamy. "A greedy algorithm based router." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1998. http://www.collectionscanada.ca/obj/s4/f2/dsk3/ftp04/mq37475.pdf.

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Books on the topic "Router"

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Publishing, Fox Chapel. Router. East Petersburg, PA: Fox Chapel Pub., 2010.

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Rosendahl, Robert R. The router. Winnipeg: Oak Park Enterprises, 1989.

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Spielman, Patrick E. Router basics. New York: Sterling Pub. Co., 1990.

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Router joinery. Newtown, CT: Taunton Press, 1997.

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Leinwand, Allan. Cisco router configuration. [S.l.]: Cisco Press, 1998.

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Cisco router networking. New York: McGraw-Hill, 2000.

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Spielman, Patrick. Router jigs & techniques. New York: Sterling, 1988.

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24 router projects. 2nd ed. Blue Ridge Summit, PA: TAB Books, 1993.

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Leinwand, Allan. Cisco router configuration. 2nd ed. Indianapolis, Ind: Cisco, 2000.

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Router jigs & techniques. New York: Sterling Pub. Co., 1988.

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Book chapters on the topic "Router"

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Martins, Ricardo M. F., Nuno C. C. Lourenço, and Nuno C. G. Horta. "Router." In Generating Analog IC Layouts with LAYGEN II, 55–75. Berlin, Heidelberg: Springer Berlin Heidelberg, 2012. http://dx.doi.org/10.1007/978-3-642-33146-6_5.

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Weik, Martin H. "router." In Computer Science and Communications Dictionary, 1505. Boston, MA: Springer US, 2000. http://dx.doi.org/10.1007/1-4020-0613-6_16508.

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Kai, Yi, Bin Liu, and Jianyuan Lu. "Green Router: Power-Efficient Router Design." In Advances in Intelligent Systems and Computing, 197–204. New Delhi: Springer India, 2014. http://dx.doi.org/10.1007/978-81-322-1759-6_24.

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Bell, Charles. "MySQL Router." In Introducing InnoDB Cluster, 189–226. Berkeley, CA: Apress, 2018. http://dx.doi.org/10.1007/978-1-4842-3885-1_6.

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Lenhard, Thomas H. "Der Router." In Datensicherheit, 91–93. Wiesbaden: Springer Fachmedien Wiesbaden, 2020. http://dx.doi.org/10.1007/978-3-658-29866-1_17.

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Subramanian, Vasan. "React Router." In Pro MERN Stack, 233–65. Berkeley, CA: Apress, 2019. http://dx.doi.org/10.1007/978-1-4842-4391-6_9.

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Jerger, Natalie Enright, and Li-Shiuan Peh. "Router Microarchitecture." In On-Chip Networks, 76–96. Cham: Springer International Publishing, 2009. http://dx.doi.org/10.1007/978-3-031-01725-4_6.

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Weik, Martin H. "screening router." In Computer Science and Communications Dictionary, 1526. Boston, MA: Springer US, 2000. http://dx.doi.org/10.1007/1-4020-0613-6_16709.

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Buchanan, W. J. "Router Emulator." In The Handbook of Data Communications and Networks, 1281–314. Boston, MA: Springer US, 2004. http://dx.doi.org/10.1007/978-1-4020-7870-5_75.

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von Praun, Christoph, Christoph von Praun, Jeremy T. Fineman, Charles E. Leiserson, Efstratios Gallopoulos, Marc Snir, Michael Heath, et al. "Router Architecture." In Encyclopedia of Parallel Computing, 1748. Boston, MA: Springer US, 2011. http://dx.doi.org/10.1007/978-0-387-09766-4_2346.

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Conference papers on the topic "Router"

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Liao, Haiguang, Qingyi Dong, Xuliang Dong, Wentai Zhang, Wangyang Zhang, Weiyi Qi, Elias Fallon, and Levent Burak Kara. "Attention Routing: Track-Assignment Detailed Routing Using Attention-Based Reinforcement Learning." In ASME 2020 International Design Engineering Technical Conferences and Computers and Information in Engineering Conference. American Society of Mechanical Engineers, 2020. http://dx.doi.org/10.1115/detc2020-22219.

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Abstract In the physical design of integrated circuits, global and detailed routing are critical stages involving the determination of the interconnected paths of each net on a circuit while satisfying the design constraints. Existing actual routers as well as routability predictors either have to resort to expensive approaches that lead to high computational times, or use heuristics that do not generalize well. Even though new, learning-based routing methods have been proposed to address this need, requirements on labelled data and difficulties in addressing complex design rule constraints have limited their adoption in advanced technology node physical design problems. In this work, we propose a new router — attention router, which is the first attempt to solve the track-assignment detailed routing problem by applying reinforcement learning. Complex design rule constraints are encoded into the routing algorithm and an attention-model-based REINFORCE algorithm is applied to solve the most critical step in routing: sequencing device pairs to be routed. The attention router and its baseline genetic router are applied to solve different commercial advanced technologies analog circuits problem sets. The attention router demonstrates generalization ability to unseen problems and is also able to achieve more than 100× acceleration over the genetic router without severely compromising the routing solution quality. Increasing the number of training problems greatly improves the performance of attention router. We also discover a similarity between the attention router and the baseline genetic router in terms of positive correlations in cost and routing patterns, which demonstrate the attention router’s ability to be utilized not only as a detailed router but also as a predictor for routability and congestion.
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He, Yuan, Hiroshi Sasaki, Shinobu Miwa, and Hiroshi Nakamura. "Predict-More Router: A Low Latency NoC Router with More Route Predictions." In 2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum (IPDPSW). IEEE, 2013. http://dx.doi.org/10.1109/ipdpsw.2013.40.

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Ved, Sneha N., Ankit Bhange, Aparna Arya, and Joycee Mekie. "Route-on-Fly: A single cycle router." In 2017 4th International Conference on Signal Processing and Integrated Networks (SPIN). IEEE, 2017. http://dx.doi.org/10.1109/spin.2017.8049926.

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Hsieh, Hsun-Ping, Cheng-Te Li, and Shou-De Lin. "Trip Router: A Time-Sensitive Route Recommender System." In 2014 IEEE International Conference on Data Mining Workshop (ICDMW). IEEE, 2014. http://dx.doi.org/10.1109/icdmw.2014.34.

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Decasper, Dan, Zubin Dittia, Guru Parulkar, and Bernhard Plattner. "Router plugins: a software architecture for next generation routers." In the ACM SIGCOMM '98 conference. New York, New York, USA: ACM Press, 1998. http://dx.doi.org/10.1145/285237.285285.

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Ding, Duo, Yilin Zhang, Haiyu Huang, Ray T. Chen, and David Z. Pan. "O-Router." In the 46th Annual Design Automation Conference. New York, New York, USA: ACM Press, 2009. http://dx.doi.org/10.1145/1629911.1629983.

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Soukup, J. "Global router." In Papers. New York, New York, USA: ACM Press, 1988. http://dx.doi.org/10.1145/62882.62905.

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Bozkurt, Ilker Nadi, and Theophilus Benson. "Contextual Router." In SOSR '16: Symposium on SDN Research. New York, NY, USA: ACM, 2016. http://dx.doi.org/10.1145/2890955.2890972.

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Wang, Hui, Yuanyuan Cen, and Xuefeng Li. "Blockchain Router." In IEEA '17: 6th International Conference on Informatics, Environment, Energy and Applications. New York, NY, USA: ACM, 2017. http://dx.doi.org/10.1145/3070617.3070634.

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Abad, Pablo, Valentin Puente, José Angel Gregorio, and Pablo Prieto. "Rotary router." In the 34th annual international symposium. New York, New York, USA: ACM Press, 2007. http://dx.doi.org/10.1145/1250662.1250678.

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Reports on the topic "Router"

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Draves, R., and D. Thaler. Default Router Preferences and More-Specific Routes. RFC Editor, November 2005. http://dx.doi.org/10.17487/rfc4191.

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Berkowitz, H. Router Renumbering Guide. RFC Editor, January 1997. http://dx.doi.org/10.17487/rfc2072.

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Haberman, B., and J. Martin. Multicast Router Discovery. RFC Editor, December 2005. http://dx.doi.org/10.17487/rfc4286.

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Perkins, C. E., and E. Levy-Abegnoli. IPv6 Backbone Router. Edited by P. Thubert. RFC Editor, November 2020. http://dx.doi.org/10.17487/rfc8929.

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Deering, S., ed. ICMP Router Discovery Messages. RFC Editor, September 1991. http://dx.doi.org/10.17487/rfc1256.

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Katz, D. IP Router Alert Option. RFC Editor, February 1997. http://dx.doi.org/10.17487/rfc2113.

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Knight, S., D. Weaver, D. Whipple, R. Hinden, D. Mitzel, P. Hunt, P. Higginson, M. Shand, and A. Lindem. Virtual Router Redundancy Protocol. RFC Editor, April 1998. http://dx.doi.org/10.17487/rfc2338.

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Partridge, C., and A. Jackson. IPv6 Router Alert Option. RFC Editor, October 1999. http://dx.doi.org/10.17487/rfc2711.

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Crawford, M. Router Renumbering for IPv6. RFC Editor, August 2000. http://dx.doi.org/10.17487/rfc2894.

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Retana, A., L. Nguyen, R. White, A. Zinin, and D. McPherson. OSPF Stub Router Advertisement. RFC Editor, June 2001. http://dx.doi.org/10.17487/rfc3137.

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