Academic literature on the topic 'Reference circuit'

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Journal articles on the topic "Reference circuit"

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Latenko, V. I., I. A. Ornatsky, S. O. Fil, and Ie O. Zaitsev. "DIGITAL CONVERTERS METROLOGICAL SPECIFICATION FOR RESISTANT THERMAL THERMOSENSORS COMPARE." Tekhnichna Elektrodynamika 2021, no. 1 (January 14, 2021): 84–89. http://dx.doi.org/10.15407/techned2021.01.084.

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In this paper presents comparative metrological analysis of two options for connecting Pt100 resistive temperature sensors to high-precision analog-to-digital converters is carried out: a proportional circuit in which the reference resistor serves to form the reference voltage, and a canonical 4-wire circuit where the resistance of the reference resistor is measured in the same way as the resistance of the temperature sensor are presented. It is shown that the error of the one-stroke proportional circuit is determined by the long-term instability of the gain, while the resulting error of the push-pull canonical circuit is determined by the short-term instability of several elements. The insignificant advantage of the canonical circuit with the accuracy of conversion and in the absence of additional requirements for the input of the reference voltage is affirmed, which gives recommendations for the practical application of the circuits considered in meters of temperature. References 10, figures 2, table 1.
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Wang, Songlin, Shuang Feng, Hui Wang, Yu Yao, Jinhua Mao, and Xinquan Lai. "A novel high accuracy bandgap reference voltage source." Circuit World 43, no. 4 (November 6, 2017): 141–44. http://dx.doi.org/10.1108/cw-04-2017-0019.

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Purpose This paper aims to design a new bandgap reference circuit with complementary metal–oxide–semiconductor (CMOS) technology. Design/methodology/approach Different from the conventional bandgap reference circuit with operational amplifiers, this design directly connects the two bases of the transistors with both the ends of the resistor. The transistor acts as an amplifier to amplify the change of voltage, which is convenient for the feedback regulation of low dropout regulator (LDO) regulator circuit, at last to realize the temperature control. In addition, introducing the depletion-type metal–oxide–semiconductor transistor and the transistor operating in the saturation region through the connection of the novel circuit structure makes a further improvement on the performance of the whole circuit. Findings This design is base on the 0.18?m process of BCD, and the new bandgap reference circuit is verified. The results show that the circuit design not only is simple and novel but also can effectively improve the performance of the circuit. Bandgap voltage reference is an important module in integrated circuits and electronic systems. To improve the stability and performance of the whole circuit, simple structure of the bandgap reference voltage source is essential for a chip. Originality/value This paper adopts a new circuit structure, which directly connects the two base voltages of the transistors with the resistor. And the transistor acts as an amplifier to amplify the change of voltage, which is convenient for the feedback regulation of LDO regulator circuit, at last to realize the temperature control.
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Hu, Rong Bin, Xiang Cai, and Xiao Ying Zhang. "A Novel BiCMOS Current-Mode Bandgap Reference." Advanced Materials Research 760-762 (September 2013): 1048–52. http://dx.doi.org/10.4028/www.scientific.net/amr.760-762.1048.

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In this paper, a novel BiCMOS current steering bandgap is presented, which includes reference core, start-up circuit, and output circuit, of which the reference core is used to produce the temperature-stable current, the start-up to start up the reference core when powered on, and the output circuit to proportionally transport the reference current to other cells on the same chip. Compared to the traditional voltage-mode bandgap reference, because of the adoption of the current-steering mode, the reference proposed in this paper, has the merits of being immune to variation of the power supply, minimum transport consumption, better matches, temperature stability, smaller area, auto-startup, and so on, which are specially needed in AD/DA application. The simulation shows that the proposed current-mode reference circuit has full temperature range coefficient of 8.9ppm, which is better than that of the traditional voltage-and current-mode reference circuits.
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Duan, Ning, Shulin Liu, Xiangdong Zhu, Jinjun Pei, and Haipeng Zhu. "A High-precision Current Sense Circuit with Trimming for DC-DC Converts." MATEC Web of Conferences 232 (2018): 04057. http://dx.doi.org/10.1051/matecconf/201823204057.

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A high-precision current sense circuit with trimming is proposed to realize the over-current protection of the power management chip and improve its conversion efficiency. Based on solving the problem of voltage offset and current inrush caused by process deviation, this circuit can detect the value of the inductor current accurately. By designing the bandgap reference circuit and the reference voltage bias network, the required stable reference voltage and bias current can be obtained. The trimming bit selection circuit can realize the trimming function. This circuit is designed with TSMC 180nm 1P3M GEN2 process, and all circuits are verified by Cadence Spectre.
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Petkovsek, Marko, and Peter Zajec. "Evaluating Common-Mode Voltage Based Trade-Offs in Differential-Ended and Single-Supplied Signal Conditioning Amplifiers." Electronics 10, no. 16 (August 17, 2021): 1982. http://dx.doi.org/10.3390/electronics10161982.

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This paper focuses on a differential voltage measurement in low-voltage automotive devices whose subunits are separated with a low-side safety switch. In contrast to conventional applications with high-side switches, a common-mode voltage (CMV) with negative polarity exists at the input of the signal conditioning circuitry. To overcome the shortage of dedicated integrated circuits capable of withstanding negative CMV, the paper investigates single- and two-stage differential circuits with single-supplied operational amplifiers to find a cost-optimized counterpart. In addition, the proposed procedure tunes the circuit parameters in such a manner to obtain the largest possible full-scale range at the output. Though, such optimization results in very uncommon values for gain and reference voltages. This issue is additionally evaluated for reference voltages that are either cost-effective or more easily accessible to increase the circuit feasibility. Since the impact of resistances on circuits’ behaviour could be diminished to a great extent using high-precision and matched pair resistors, the sensitivity analysis was investigated only for a reference voltage change. Furthermore, a reversed termination of measured voltages results in a simplified reference voltage selection without hindering circuits’ performance, proven by simulation and experimental results.
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Gidney, Craig. "Stim: a fast stabilizer circuit simulator." Quantum 5 (July 6, 2021): 497. http://dx.doi.org/10.22331/q-2021-07-06-497.

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This paper presents “Stim", a fast simulator for quantum stabilizer circuits. The paper explains how Stim works and compares it to existing tools. With no foreknowledge, Stim can analyze a distance 100 surface code circuit (20 thousand qubits, 8 million gates, 1 million measurements) in 15 seconds and then begin sampling full circuit shots at a rate of 1 kHz. Stim uses a stabilizer tableau representation, similar to Aaronson and Gottesman's CHP simulator, but with three main improvements. First, Stim improves the asymptotic complexity of deterministic measurement from quadratic to linear by tracking the inverse of the circuit's stabilizer tableau. Second, Stim improves the constant factors of the algorithm by using a cache-friendly data layout and 256 bit wide SIMD instructions. Third, Stim only uses expensive stabilizer tableau simulation to create an initial reference sample. Further samples are collected in bulk by using that sample as a reference for batches of Pauli frames propagating through the circuit.
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Kushwaha, Dinesh, and D. K. Mishra. "Nano Power Current Reference Circuit consisting of Sub-threshold CMOS Circuits." Circulation in Computer Science 2, no. 1 (January 24, 2017): 1–4. http://dx.doi.org/10.22632/ccs-2016-251-36.

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This paper proposes a low voltage CMOS Nano power current reference circuit and presents its performance with circuit simulation in 180- nm UMC CMOS technology. The proposed circuit consists of start-up, Bias-voltage, current-source sub-circuits with most of the MOSFETs operating in sub-threshold region. Simulation results shows that the circuit generates a stable reference current of 4-nA in supply voltage range 1 V- 1.8 V with line sensitivity of 0.203%/V.The temperature coefficient of the current was 7592ppm/°C at 1.8 V in the range of 0°C-100°C. The power dissipation was 380 NW at 1.8 V Supply. The proposed circuit would be suitable for use in sub-threshold –operated power-aware large-scale integration
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Zawawi, Ruhaifi Bin Abdullah, Wajahat H. Abbasi, Seung-Hwan Kim, Hojong Choi, and Jungsuk Kim. "Wide-Supply-Voltage-Range CMOS Bandgap Reference for In Vivo Wireless Power Telemetry." Energies 13, no. 11 (June 10, 2020): 2986. http://dx.doi.org/10.3390/en13112986.

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The robustness of the reference circuit in a wide range of supply voltages is crucial in implanted devices. Conventional reference circuits have demonstrated a weak performance over wide supply ranges. Channel-length modulation in the transistors causes the circuit to be sensitive to power supply variation. To solve this inherent problem, this paper proposes a new output-voltage-line-regulation controller circuit. When a variation occurs in the power supply, the controller promptly responds to the supply deviation and removes unwanted current in the output path of the reference circuit. The proposed circuit was implemented in a 0.35-μm SK Hynix CMOS standard process. The experimental results demonstrated that the proposed reference circuit could generate a reference voltage of 0.895 V under a power supply voltage of 3.3 V, line regulation of 1.85 mV/V in the supply range of 2.3 to 5 V, maximum power supply rejection ratio (PSRR) of −54 dB, and temperature coefficient of 11.9 ppm/°C in the temperature range of 25 to 100 °C.
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Zawawi, Ruhaifi Bin Abdullah, Hojong Choi, and Jungsuk Kim. "High PSRR Wide Supply Range Dual-Voltage Reference Circuit for Bio-Implantable Applications." Electronics 10, no. 16 (August 21, 2021): 2024. http://dx.doi.org/10.3390/electronics10162024.

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On-chip systems are challenging owing to the limited size of the components, such as the capacitor bank in the rectifier. With a small on-chip capacitor, the output voltage of the rectifier might ring if the circuit experiences significant changes in current. The reference circuit is the first block after the rectifier, and the entire system relies on its robustness. A fully integrated dual-voltage reference circuit for bio-implantable applications is presented. The proposed circuit utilizes nonlinear current compensation techniques that significantly decrease supply variations and reject high-supply ripples for various frequencies. The reference circuit was verified using a 0.35 µm complementary metal-oxide semiconductor (CMOS) process. Maximum PSRR values of −112 dB and −128 dB were obtained. With a supply range from 2.8 to 12 V, the proposed design achieves 0.916 and 1.5 mV/V line regulation for the positive and negative reference circuits, respectively.
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Guang, Yang, Bin Yu, and Huang Hai. "Design of a High Performance CMOS Bandgap Voltage Reference." Advanced Materials Research 981 (July 2014): 90–93. http://dx.doi.org/10.4028/www.scientific.net/amr.981.90.

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Bandgap voltage reference, to provide a temperature and power supply insensitive output voltage, is a very important module in the analog integrated circuits and mixed-signal integrated circuits. In this paper, a high performance CMOS bandgap with low-power consumption has been designed. It can get the PTAT (Proportional to absolute temperature) current, and then get the reference voltage. Based on 0.35μm CMOS process, using HSPICE 2008 software for circuit simulation, the results showed that , when the temperature changes from -40 to 80 °C, the proposed circuit’s reference voltage achieve to 1.2V, temperature coefficient is 3.09ppm/°C. Adopt a series of measures, like ESD protection circuit, in layout design. The ultimately design through the DRC and LVS verification, and the final layout size is 700μm * 560μm.
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Dissertations / Theses on the topic "Reference circuit"

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Digvadekar, Ashish A. "A sub 1 V bandgap reference circuit /." Online version of thesis, 2005. https://ritdml.rit.edu/dspace/handle/1850/2595.

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Tran, Sung. "Development of a Sensor Readout Integrated Circuit Towards a Contact Lens for Wireless Intraocular Pressure Monitoring." DigitalCommons@CalPoly, 2017. https://digitalcommons.calpoly.edu/theses/1750.

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This design covers the design of an integrated circuit (IC) in support of the active contact lens project at Cal Poly. The project aims to monitor intraocular eye pressure (IOP) to help diagnose and treat glaucoma, which is expected affect 6.3 million Americans by 2050. The IC is designed using IBM’s 130 nm 8RF process, is powered by an on-lens thin film 3.8 V rechargeable battery, and will be fabricated at no cost through MOSIS. The IC features a low-power linear regulator that powers a current-starved voltage-controlled oscillator (CSVCO) used for establishing a backscatter communication link. Additional circuitry is included to regulate power to and from the battery. An undervoltage lockout circuit protects the battery from deep discharge damage. When recharging, a rectifier and a voltage regulator provides overvoltage protection. These circuit blocks are biased primarily using a 696 mV subthreshold voltage reference that consumes 110.5 nA.
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Bubla, Jiří. "Band Gap - přesná napěťová reference." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2009. http://www.nusl.cz/ntk/nusl-217808.

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This diploma thesis is specialized on a design of a high accuracy voltage reference Bandgap. A very low temperature coefficient and output voltage approx. 1,205V are the main features of this circuit. The paper contains a derivation of the Bandgap principle, examples of realizations of the circuits and methods of compensation temperature dependence and manufacture process, design of Brokaw and Gilbert reference, design of a testchip and measurement results.
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Serrano, Guillermo J. "High Performance Analog Circuit Design Using Floating-Gate Techniques." Diss., Georgia Institute of Technology, 2007. http://hdl.handle.net/1853/19819.

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The programmability property of floating-gate transistors is exploited in this work to compensate for mismatch and device parameter variations in various high performance analog circuits. A careful look is taken at the characteristics and behavior of floating-gate transistors; issues such as programming, precision, accuracy, and charge retention are addressed. An alternate approach to reduce the offset voltage of the amplifier is presented. The proposed approach uses floating-gate transistors as programmable current sources that provide offset compensation while being a part of the amplifier of interest during normal operation. This results in an offset voltage cancelation that is independent of other amplifier parameters and does not dissipate additional power. Two compact programmable architectures that implement a voltage reference based on the charge difference between two floating-gate transistors are introduced. The references exhibit a low temperature coefficient (TC) as all the transistors temperature dependencies are canceled. Programming the charge on the floating-gate transistors provides the flexibility of an arbitrary accurate voltage reference with a single design and allows for a high initial accuracy of the reference. Also, this work presents a novel programmable temperature compensated current reference. The proposed circuit achieves a first order temperature compensation by canceling the negative TC of an on-chip poly resistor with the positive TC of a MOS transistor operating in the ohmic region. Programmability of the ohmic resistor enables optimal temperature compensation while programmability of the reference voltage allows for an accurate current reference for a wide range of values. Finally, this work combines the already established DAC design techniques with floating-gate circuits to obtain a high precision converter. This approach enables higher accuracy along with a substantial decrease of the die size.
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Ozalevli, Erhan. "Exploiting Floating-Gate Transistor Properties in Analog and Mixed-Signal Circuit Design." Diss., Georgia Institute of Technology, 2006. http://hdl.handle.net/1853/14048.

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With the downscaling trend in CMOS technology, it has been possible to utilize the advantages of high element densities in VLSI circuits and systems. This trend has readily allowed digital circuits to predominate VLSI implementations due to their ease of scaling. However, high element density in integrated circuit technology has also entailed a decrease in the power consumption per functional circuit cell for the use of low-power and reconfigurable systems in portable equipment. Analog circuits have the advantage over digital circuits in designing low-power and compact VLSI circuits for signal processing systems. Also, analog circuits have been employed to utilize the wide dynamic range of the analog domain to meet the stringent signal-to-noise-and-distortion requirements of some signal processing applications. However, the imperfections and mismatches of CMOS devices can easily deteriorate the performance of analog circuits when they are used to realize precision and highly linear elements in the analog domain. This is mainly due to the lack of tunability of the analog circuits that necessitates the use of special trimming or layout techniques. These problems can be alleviated by making use of the analog storage and capacitive coupling capabilities of floating-gate transistors. In this research, tunable resistive elements and analog storages are built using floating-gate transistors to be incorporated into signal processing applications. Tunable linearized resistors are designed and implemented in CMOS technology, and are employed in building a highly linear amplifier, a transconductance multiplier, and a binary-weighted resistor digital-to-analog converter. Moreover, a tunable voltage reference is designed by utilizing the analog storage feature of the floating-gate transistor. This voltage reference is used to build low-power, compact, and tunable/reconfigurable voltage-output digital-to-analog converter and distributed arithmetic architecture.
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Gupta, Vishal. "An accurate, trimless, high PSRR, low-voltage, CMOS bandgap reference IC." Diss., Available online, Georgia Institute of Technology, 2007, 2007. http://etd.gatech.edu/theses/available/etd-07052007-073154/.

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Thesis (Ph. D.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2008.
Ayazi, Farrokh, Committee Member ; Rincon-Mora, Gabriel, Committee Chair ; Bhatti, Pamela, Committee Member ; Leach, W. Marshall, Committee Member ; Morley, Thomas, Committee Member.
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Gaddam, Ravi Shankar. "A 10-Bit Dual Plate Sampling Capacitive DAC with Auto-Zero On-Chip Reference Voltage Generation." University of Akron / OhioLINK, 2012. http://rave.ohiolink.edu/etdc/view?acc_num=akron1349294825.

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Caicedo, Jhon Alexander Gomez. "CMOS low-power threshold voltage monitors circuits and applications." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2016. http://hdl.handle.net/10183/144080.

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Um monitor de tensão de limiar (VT0) é um circuito que, idealmente, entrega o valor do VT0 como uma tensão na saída, para uma determinada faixa de temperatura, sem a necessidade de polarização externa, configurações paramétricas, ajuste de curvas ou qualquer cálculo subsequente. Estes circuitos podem ser usados em sensores de temperatura, referências de tensão e corrente, dosímetros de radiação e outras aplicações, uma vez que a dependência do VT0 nas condições de operação é um aspecto bem modelado. Além disso, estes circuitos podem ser utilizados para monitoramento de processos de fabricação e para compensação da variabilidade do processo, uma vez que o VT0 é um parâmetro chave para o comportamento do transistor e sua modelagem. Nesta tese, são apresentadas três novas topologias de circuitos, duas são monitores de VT0 NMOS e a terceira é um monitor de VT0 PMOS. As três estruturas são topologias de circuito auto-polarizadas que não utilizam resistências, e apresentam alta rejeição a variações na alimentação, baixa sensibilidade de Linea, e permitem a extração direta da tensão de limiar para grandes intervalos de temperatura e de tensão de alimentação, com pequeno erro. Sua metodologia de projeto é baseada no modelo unificado controlado por corrente (UICM), um modelo MOSFET que é contínuo, desde o nível de inversão fraca a forte e para as regiões de operação de triodo e saturação. Os circuitos ocupam uma pequena área de silício, consomem apenas dezenas de nanowatts, e podem ser implementados em qualquer processo padrão CMOS digital, uma vez que só utilizam transistores MOS (não precisa de nenhum resistor). Os monitores de VT0 são utilizados em diferentes aplicações, a fim de investigar a sua funcionalidade e comportamento como parte de um sistema. As aplicações variam de uma tensão de referência, que apresenta um desempenho comparável ao estado da arte, para uma configuração que permite obter uma menor variabilidade com processo na saída de um circuito auto-polarizado que gera um tensão CTAT. Além disso, explorando a capacidade de funcionar como um gerador de corrente específica (ISQ) que os monitores de VT0 aqui apresentados oferecem, introduz-se um novo circuito auto-polarizado que gera um tensão CTAT, que é menos sensível a variações de processo, e pode ser usado em referências de tensão band-gap.
A threshold voltage (VT0) monitor is a circuit that ideally delivers the estimated VT0 value as a voltage at its output, for a given temperature range, without external biases, parametric setups, curve fitting or any subsequent calculation. It can be used in temperature sensors, voltage and current references, radiation dosimeters and other applications since the MOSFET VT0 dependence on the operation conditions is a very well modeled aspect. Also, it can be used for fabrication process monitoring and process variability compensation, since VT0 is a key parameter for the transistor behavior and modeling. In this thesis, we present three novel circuit topologies, two of them being NMOS VT0 monitors and the last one being a PMOS VT0 monitor. The three structures are resistorless self-biased circuit topologies that present high power supply rejection, low line sensitivity, and allow the direct extraction of the threshold voltage for wide temperature and power supply voltage ranges, with small error. Its design methodology is based on the Unified Current Control Model (UICM), a MOSFET model that is continuous from weak to strong inversion and from triode to saturation regions. The circuits occupy small silicon area, consume just tens of nanoWatts, and can be implemented in any standard digital CMOS process, since they only use MOS transistors (does not need any resistor). The VT0 monitors are used in different applications in order to prove their functionality, and behavior as part of a system. The applications vary from a reference voltage, that presents performance comparable with state-of-the-art works, to a configuration that allows to obtain a lower process variability, in the output of a self-biased circuit that generates a complementary to the absolute temperature (CTAT) voltage. In addition, exploiting the ability to operate as an specific current (ISQ) generator, that the VT0 monitors presented here offer, we introduced a new self-biased circuit that produces a CTAT voltage and is less sensitive to process variations, and can be used in band-gap voltage references.
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Castellanos, Juan José Carrillo. "Projeto de uma fonte de tensão de referência CMOS usando programação geométrica." Universidade de São Paulo, 2010. http://www.teses.usp.br/teses/disponiveis/3/3140/tde-01032011-120430/.

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Nesta dissertação é apresentada a aplicação da programação geométrica no projeto de uma fonte de tensão de referência de baixa tensão de alimentação que pode ser integrada em tecnologias padrões CMOS. Também são apresentados os resultados experimentais de um projeto da fonte de bandgap feito por um método de projeto convencional, cuja experiência motivou e ajudou ao desenvolvimento da formulação do programa geométrico proposta neste trabalho. O programa geométrico desenvolvido nesta dissertação otimiza o desempenho da fonte de bandgap e agiliza seu tempo de projeto. As expressões matemáticas que descrevem o funcionamento e as principais especificações da fonte de bandgap foram geradas e adaptadas ao formato de um programa geométrico. A compensação da temperatura, o PSRR, o consumo de corrente, a área, a tensão de saída e a sua variação por causa da tensão de offset do OTA, e a estabilidade são as principais especificações deste tipo de fonte de tensão de referência e fazem parte do programa geométrico apresentado neste trabalho. Um exemplo do projeto usando o programa geométrico formulado neste trabalho, mostra a possibilidade de projetar a fonte de bandgap em alguns minutos com erros baixos entre os resultados do programa geométrico e de simulação.
This work presents the application of geometric programming in the design of a CMOS low-voltage bandgap voltage reference source. Test results of a bandgap voltage reference designed via a conventional method are showed, this design experience motivated and helped to formulate the geometric program developed in this work. The geometric program developed in this work optimizes the bandgap source performance and speeds up the design time. The mathematical expressions that describe the bandgap source functioning and specifications were developed and adapted in the geometric program format. The temperature compensation, the PSRR, the current consumption, the area, the output voltage and its variations under the operational tranconductance amplifier offset voltage, and the stability are the main specifications of this type of bandgap reference source and they are included into the geometric program presented in this work. An example of the design using the geometric program formulated in this work, shows the possibility of designing the bandgap source in a few minutes with low errors between the geometric program results and the simulation results.
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Montjane, Raesibe Oniccah. "The influence of English on mother-tongue in learning and teaching in secondary schools (Fet Band) with specific reference to Sepedi in Mankweng Circuit in the Limpopo Province." Thesis, University of Limpopo, 2013. http://hdl.handle.net/10386/1287.

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Thesis (MA. (Translation Studies and Linguistics)) -- University of Limpopo, 2013
The study sought to investigate the challenges that the learners and educators encountered in learning and teaching when they use English as a medium of instruction. The study reveals that African languages, along with their culture are being dominated by English. Most of Pedis’ learners cannot speak Sepedi without mixing it with English, and most of African people usually read English books and neglecting the Indigenous books. In addition, the study shows that learners performed better when they were taught in Sepedi than in English. The educators’ responses showed that learners have difficulties in understanding English as the medium of instruction and that they code-switch from English to Sepedi to enhance understanding.
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Books on the topic "Reference circuit"

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Printed circuit board designer's reference: Basics. Upper Saddle River, N.J: Prentice Hall Professional Technical Reference, 2004.

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CMOS voltage reference: An analytical and practical perspective. Hoboken: IEEE ; Wiley, 2013.

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Oregon. Circuit Court (Multnomah County). Reference manual for practice before the Multnomah County Circuit Court. 9th ed. Portland, Or: Court Administrator, Circuit Court of the State of Oregon, District Court of the State of Oregon, for Multnomah County, 1987.

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Middleton, Robert Gordon. Designing electronic circuits: A manual of procedures and essential reference data. Englewood Cliffs, N.J: Prentice-Hall, Business & Professional Division, 1985.

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Rutkus, Denis Steven. Judicial nomination statistics: U.S. district and circuit courts, 1977-2002. New York: Novinka Books, 2004.

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Heinz, Schmidt-Walter, ed. Electrical engineering: A pocket reference. Berlin: Springer-Verlag, 2003.

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Ninth Circuit Judicial Conference (1988 Coeur d'Alene, Idaho). Learning from the Ninth Circuit's innovations: The Browning years in perspectives : reference materials. Edited by Hellman Arthur D. 1942- and United States. Court of Appeals (9th Circuit). [San Francisco]: Ninth Judicial Circuit, 1988.

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The limit: Life and death on the 1951 Grand Prix circuit. Waterville, Me: Thorndike Press, 2012.

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Maserumule, Makgubje Erick. A study of attitudes toward mathematics among standard 8 pupils with special reference to five schoolsin Bohlabela Circuit, South Africa. Birmingham: University of Birmingham, 1990.

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Charles, Weston, ed. Essential circuits reference guide. New York: McGraw-Hill, 1988.

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Book chapters on the topic "Reference circuit"

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Weik, Martin H. "reference circuit." In Computer Science and Communications Dictionary, 1442. Boston, MA: Springer US, 2000. http://dx.doi.org/10.1007/1-4020-0613-6_15793.

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Wootton, Cliff. "Inter-Integrated Circuit (I2C)." In Samsung ARTIK Reference, 321–34. Berkeley, CA: Apress, 2016. http://dx.doi.org/10.1007/978-1-4842-2322-2_20.

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Barnes, John R. "Designing Power Supply Circuit." In Robust Electronic Design Reference Book, 571–600. New York, NY: Springer US, 2004. http://dx.doi.org/10.1007/1-4020-7830-7_24.

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van Staveren, Arie, Michiel H. L. Kouwenhoven, Wouter A. Serdijn, and Chris J. M. Verhoeven. "Bandgap Reference Design." In Trade-Offs in Analog Circuit Design, 139–67. Boston, MA: Springer US, 2002. http://dx.doi.org/10.1007/0-306-47673-8_5.

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Liping, Chang, An Kang, Liu Yao, Liang Bin, and Li Jinwen. "A High-PSRR CMOS Bandgap Reference Circuit." In Communications in Computer and Information Science, 94–102. Berlin, Heidelberg: Springer Berlin Heidelberg, 2016. http://dx.doi.org/10.1007/978-3-662-49283-3_10.

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Saidulu, Bellamkonda, Arun Manoharan, Bellamkonda Bhavani, and Jameer Basha Sk. "An Improved CMOS Voltage Bandgap Reference Circuit." In Advances in Intelligent Systems and Computing, 621–29. Singapore: Springer Singapore, 2018. http://dx.doi.org/10.1007/978-981-10-7868-2_59.

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Bhardwaj, Anandita, and Pragya Varshney. "No-Reference Image Corrosion Detection of Printed Circuit Board." In Advances in Intelligent Systems and Computing, 165–72. Singapore: Springer Singapore, 2018. http://dx.doi.org/10.1007/978-981-13-1822-1_15.

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Figueiredo, Michael, João Goes, and Guiomar Evans. "Application of Circuit Enhancement Techniques to ADC Building Blocks." In Reference-Free CMOS Pipeline Analog-to-Digital Converters, 73–115. New York, NY: Springer New York, 2012. http://dx.doi.org/10.1007/978-1-4614-3467-2_4.

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Varuvel, Vinitha Navis, A. Kanchana, and D. Samundeeswari. "Representation of Boolean Function as a Planar Graph to Reduce the Cost of a Circuit." In Intelligent Systems Reference Library, 225–34. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-030-90119-6_18.

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Agrawal, Madhusoodan, and Alpana Agarwal. "A Combined CMOS Reference Circuit with Supply and Temperature Compensation." In Communications in Computer and Information Science, 177–84. Berlin, Heidelberg: Springer Berlin Heidelberg, 2013. http://dx.doi.org/10.1007/978-3-642-42024-5_22.

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Conference papers on the topic "Reference circuit"

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Du, Kaixuan, Ziyuan Xu, Xiulong Wu, Libo Yang, Hao Zhang, Zhixuan Wang, and Le Ye. "A 5.5nW Voltage Reference Circuit." In 2020 China Semiconductor Technology International Conference (CSTIC). IEEE, 2020. http://dx.doi.org/10.1109/cstic49141.2020.9282512.

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Lee, Jong Mi, Youngwoo Ji, Seungnam Choi, Young-Chul Cho, Seong-Jin Jang, Joo Sun Choi, Byungsub Kim, Hong-June Park, and Jae-Yoon Sim. "5.7 A 29nW bandgap reference circuit." In 2015 IEEE International Solid- State Circuits Conference - (ISSCC). IEEE, 2015. http://dx.doi.org/10.1109/isscc.2015.7062945.

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Kucukkurt, Ozge, Saliha Celik, Zeynep Ayyildiz, Fatma Uysal, Eda Karacaoglan, and Mahmut Tokmakci. "Reference circuit design producing electrocardiogram signal." In 2017 Medical Technologies National Congress (TIPTEKNO). IEEE, 2017. http://dx.doi.org/10.1109/tiptekno.2017.8238055.

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Liu, Weihsing, and Tien-Hsin Wang. "An improved reference voltage circuit design." In 2018 7th International Symposium on Next Generation Electronics (ISNE). IEEE, 2018. http://dx.doi.org/10.1109/isne.2018.8394709.

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Koh, S. K., and L. Lee. "Low power CMOS bandgap reference circuit." In 2014 IEEE Student Conference on Research and Development (SCOReD). IEEE, 2014. http://dx.doi.org/10.1109/scored.2014.7072988.

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Chen, Hou-Ming, Bo-Yi Lee, Kuang-Hao Lin, Xian-Ji Huang, and Yu-Siang Huang. "Low-power and high-speed startup circuit for reference circuit." In 2017 IEEE International Conference on Consumer Electronics - Taiwan (ICCE-TW). IEEE, 2017. http://dx.doi.org/10.1109/icce-china.2017.7991017.

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Lazar, Alexandru, Mihail Florea, Danut Burdia, Luminita-Camelia Lazar, Georgian-Alexandru Lazar, and Dan Butnicu. "A bandgap reference circuit design for Power-on Reset related circuits." In 2009 International Symposium on Signals, Circuits and Systems - ISSCS 2009. IEEE, 2009. http://dx.doi.org/10.1109/isscs.2009.5206159.

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Lv, Jian, Yadong Jiang, Donglu Zhang, and Jason Liu. "A Loss of Reference Clock Detect Circuit." In 2009 IEEE Circuits and Systems International Conference on Testing and Diagnosis. IEEE, 2009. http://dx.doi.org/10.1109/cas-ictd.2009.4960749.

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Wang Shaodong and Wang Shuai. "A bandgap reference circuit with temperature compensation." In 2016 IEEE International Conference on Microwave and Millimeter Wave Technology (ICMMT). IEEE, 2016. http://dx.doi.org/10.1109/icmmt.2016.7761693.

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Wadhwa, Sanjay K. "A low voltage CMOS bandgap reference circuit." In 2008 IEEE International Symposium on Circuits and Systems - ISCAS 2008. IEEE, 2008. http://dx.doi.org/10.1109/iscas.2008.4542012.

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