Journal articles: 'Reconfigurable logic gates'

1

Vlădescu, Elena, and Daniela Dragoman. "Reconfigurable Plasmonic Logic Gates." Plasmonics 13, no. 6 (March 20, 2018): 2189–95. http://dx.doi.org/10.1007/s11468-018-0737-z.

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Luo, Shijiang, Min Song, Xin Li, Yue Zhang, Jeongmin Hong, Xiaofei Yang, Xuecheng Zou, Nuo Xu, and Long You. "Reconfigurable Skyrmion Logic Gates." Nano Letters 18, no. 2 (January 23, 2018): 1180–84. http://dx.doi.org/10.1021/acs.nanolett.7b04722.

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Díaz-Díaz, Irwin, and Eric Campos. "Toward a Voltage Reconfigurable Logic Gate." Memorias del Congreso Nacional de Control Automático 6, no. 1 (October 27, 2023): 503–6. http://dx.doi.org/10.58571/cnca.amca.2023.107.

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Currently, novel approaches are being developed to overcome the imminent Moore's law failure. The techniques attempt to gain greater computing power by reducing the number of transistors. This work presents the simulation of a reconfigurable voltage logic gate based on the equation of a plane. The proposal is achieved by using two variables of the equation of a plane as inputs and the other as output. The proposed circuit can perform the NAND and NOR logic gates, known as universal logic gates. The simulation results show the feasibility of the proposed reconfigurable logic gate. Also, the presented circuit is compatible with the transistor-transistor-logic and can be modified to implement other logic gates by changing a voltage level.

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Qi, Mingxuan, Peijun Shi, Xiaokang Zhang, Shuang Cui, Yuan Liu, Shihua Zhou, and Qiang Zhang. "Reconfigurable DNA triplex structure for pH responsive logic gates." RSC Advances 13, no. 15 (2023): 9864–70. http://dx.doi.org/10.1039/d3ra00536d.

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We constructed pH-responsive logic gates through substrate conformational change that uses two types of logic calculations, ‘AND’ and ‘OR’. Our logic gates necessitate fewer substrates when two types of logic calculations are needed.

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Medina‐Santiago, A., Mario Alfredo Reyes‐Barranca, Ignacio Algredo‐Badillo, Alfonso Martinez Cruz, Kelsey Alejandra Ramírez Gutiérrez, and Adrián Eleazar Cortés‐Barrón. "Reconfigurable arithmetic logic unit designed with threshold logic gates." IET Circuits, Devices & Systems 13, no. 1 (May 24, 2018): 21–30. http://dx.doi.org/10.1049/iet-cds.2018.0046.

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Zou, Jianping, Kang Zhang, Weifan Cai, Tupei Chen, Arokia Nathan, and Qing Zhang. "Optical-reconfigurable carbon nanotube and indium-tin-oxide complementary thin-film transistor logic gates." Nanoscale 10, no. 27 (2018): 13122–29. http://dx.doi.org/10.1039/c8nr01358f.

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Rothenbuhler, Adrian, Thanh Tran, Elisa Smith, Vishal Saxena, and Kristy Campbell. "Reconfigurable Threshold Logic Gates using Memristive Devices." Journal of Low Power Electronics and Applications 3, no. 2 (May 24, 2013): 174–93. http://dx.doi.org/10.3390/jlpea3020174.

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Raitza, Michael, Steffen Marcker, Jens Trommer, Andre Heinzig, Sascha Kluppelholz, Christel Baier, and Akash Kumar. "Quantitative Characterization of Reconfigurable Transistor Logic Gates." IEEE Access 8 (2020): 112598–614. http://dx.doi.org/10.1109/access.2020.3001352.

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Yang, Liu, Wendi Li, Ying Tao, Kaifeng Dong, Fang Jin, and Huihui Li. "Reconfigurable and reusable skyrmion logic gates with circular track." AIP Advances 13, no. 2 (February 1, 2023): 025227. http://dx.doi.org/10.1063/9.0000402.

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Magnetic skyrmion, a nano-sized spin texture with topological property, have the potential to develop high-density, low-power, and multifunctional spintronic devices. To realize the reconfiguration of a single logic device and the implementation of the complete logic functions, a new reconfigurable and reusable skyrmion logic is proposed and verified by micromagnetic simulation. Logic functions including AND, OR, NOT, NAND and NOR are realized in ferromagnetic (FM) nanotrack by skyrmion-edge repulsions and the voltage control of magnetic anisotropy (VCMA) effect. The working state of the potential well can be controlled by the link of the input signals, thus changing the function type. In addition, through reusing skyrmion in circular track, the energy required for creation and deletion is reduced. This work can provide guidance for the design and optimization of reconfigurable and reusable logic devices with circular track based on skyrmion.

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Zhang, Yuqing, Zheng Peng, Zhicheng Wang, Yilu Wu, Yuqi Hu, Jiagui Wu, and Junbo Yang. "Non-Volatile Reconfigurable Compact Photonic Logic Gates Based on Phase-Change Materials." Nanomaterials 13, no. 8 (April 15, 2023): 1375. http://dx.doi.org/10.3390/nano13081375.

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Photonic logic gates have important applications in fast data processing and optical communication. This study aims to design a series of ultra-compact non-volatile and reprogrammable photonic logic gates based on the Sb2Se3 phase-change material. A direct binary search algorithm was adopted for the design, and four types of photonic logic gates (OR, NOT, AND, and XOR) are created using silicon-on-insulator technology. The proposed structures had very small sizes of 2.4 μm × 2.4 μm. Three-dimensional finite-difference time-domain simulation results show that, in the C-band near 1550 nm, the OR, NOT, AND, and XOR gates exhibit good logical contrast of 7.64, 6.1, 3.3, and 18.92 dB, respectively. This series of photonic logic gates can be applied in optoelectronic fusion chip solutions and 6G communication systems.

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Gong, Xue, Jie Wei, Jing Liu, Ruomeng Li, Xiaoqing Liu, and Fuan Wang. "Programmable intracellular DNA biocomputing circuits for reliable cell recognitions." Chemical Science 10, no. 10 (2019): 2989–97. http://dx.doi.org/10.1039/c8sc05217d.

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A reconfigurable hybridization-based chain reaction was introduced to assemble enzyme-free DNA logic gates and advanced logic circuits for analyzing multiple endogenous miRNA expressions and discriminating different living cells.

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Butler, J., M. Shachar, B. Lee, D. Garcia, B. Hu, J. Hong, N. Amos, and S. Khizroev. "Reconfigurable and non-volatile vertical magnetic logic gates." Journal of Applied Physics 115, no. 16 (April 28, 2014): 163903. http://dx.doi.org/10.1063/1.4873297.

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13

Hai, Pham Nam, Satoshi Sugahara, and Masaaki Tanaka. "Reconfigurable Logic Gates Using Single-Electron Spin Transistors." Japanese Journal of Applied Physics 46, no. 10A (October 9, 2007): 6579–85. http://dx.doi.org/10.1143/jjap.46.6579.

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14

Kaya, Savas, Hesham F. A. Hamed, Darwin T. Ting, and Gregory Creech. "Reconfigurable threshold logic gates with nanoscale DG-MOSFETs." Solid-State Electronics 51, no. 10 (October 2007): 1301–7. http://dx.doi.org/10.1016/j.sse.2007.08.011.

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15

Hassan, S., D. Chack, and L. Pavesi. "High extinction ratio thermo-optic based reconfigurable optical logic gates for programmable PICs." AIP Advances 12, no. 5 (May 1, 2022): 055304. http://dx.doi.org/10.1063/5.0086185.

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In this paper, a new scheme is proposed to realize reconfigurable and multifunction optical logic gates (XOR, XNOR, NAND, and OR) using a Mach–Zehnder interferometer with a tunable thermo-optic phase shifter (TOPS). The reconfigurable optical logic gates are realized by tuning the phase of an optical signal using TOPS without changing the physical device structure. The logical input “0” or “1” is considered corresponding to the phase of the optical signal at TOPS. The logical output of the proposed device depends on the light intensity at output ports. The device is designed on silicon on insulator (SOI) platform and the simulation result shows that the on–off extinction ratio is greater than 37 dB at 1550 nm and >25 dB for the C-band. Moreover, it has a low insertion loss of 0.09 dB at a wavelength of 1550 nm and <0.8 dB for the C-band window. The proposed optical logic gates can be a promising logical device for programmable photonic integrated circuits.

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SHAHVERDIEV, E. M. "PARAMETER MISMATCHES, CHAOS SYNCHRONIZATION AND FAST DYNAMIC LOGIC GATES." International Journal of Modern Physics B 24, no. 23 (September 20, 2010): 4471–79. http://dx.doi.org/10.1142/s0217979210055731.

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By using chaos synchronization between nonidentical multiple time delay semiconductor lasers with optoelectronic feedbacks, we demonstrate numerically how fast dynamic logic gates can be constructed. The results may be helpful in obtaining computational hardware with reconfigurable properties.

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Sheng, Yi Yan, and Wen Bo Liu. "Function Expansion of a Chaotic Logic Unit." Advanced Materials Research 171-172 (December 2010): 283–87. http://dx.doi.org/10.4028/www.scientific.net/amr.171-172.283.

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Chaos computing is a new circuit design scheme of using chaos computing units to achieve reconfigurable logic gates. The computing unit can function as different kinds of logic gates by changing external parameters. In this paper, the possibilities of expanding the function of a chaotic NOR gate proposed in the literature is studied. The numerical model for the circuit design was built by constructing differential equations fit for Matlab integration mechanism. Besides, numerical model for integrator saturation was built to make results of numerical simulation conform to that of circuit simulation. Analysis of the impact of integrator saturation was done. With the analysis and by changing the control voltage, NAND function was expanded for the original chaotic logic gate that was only able to function as a NOR gate. By adding the function control signal to the input end and setting the voltage of it to different levels, the computing unit becomes a real time reconfigurable one.

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Peng, Haipeng, Gang Hu, Lixiang Li, Yixian Yang, and Jinghua Xiao. "Constructing Dynamic Multiple-Input Multiple-Output Logic Gates." Mathematical Problems in Engineering 2011 (2011): 1–12. http://dx.doi.org/10.1155/2011/380345.

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Investigation of computing devices with dynamic architecture which makes devices have reconfigurable ability is an interesting research direction for designing the next generation of computer chip. In this paper, we present a window threshold method to construct such dynamic logic architecture. Here, dynamic multiple-input multiple-output (MIMO) logic gates are proposed, analyzed, and implemented. By using a curve-intersections-based graphic method, we illustrate the relationships among the threshold, the control parameter, and the functions of logic gates. A noise analysis on all the parameters is also given. The chips based on the proposed schemes can be transformed into different arrangements of logic gates within a single clock cycle. With these schemes in hand, it is conceivable to build more flexible, robust, cost effective, yet general-purpose computing devices.

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Tella, Sherif A., Nouha Alcheikh, and Mohammad I. Younis. "A single MEMS resonator for reconfigurable multifunctional logic gates." Journal of Micromechanics and Microengineering 28, no. 9 (May 23, 2018): 095002. http://dx.doi.org/10.1088/1361-6439/aac13d.

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20

Behnia, S., Z. Pazhotan, N. Ezzati, and A. Akhshani. "Reconfigurable chaotic logic gates based on novel chaotic circuit." Chaos, Solitons & Fractals 69 (December 2014): 74–80. http://dx.doi.org/10.1016/j.chaos.2014.08.011.

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21

Li, Lixiang, Chunyu Yang, Sili Hui, Wenwen Yu, Jürgen Kurths, Haipeng Peng, and Yixian Yang. "A Reconfigurable Logic Cell Based on a Simple Dynamical System." Mathematical Problems in Engineering 2013 (2013): 1–7. http://dx.doi.org/10.1155/2013/735189.

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This paper introduces a new scheme to achieve a dynamic logic gate which can be adjusted flexibly to obtain different logic functions by adjusting specific parameters of a dynamical system. Based on graphical tools and the threshold mechanism, the distribution of different logic gates is studied, and a transformation method between different logics is given. Analyzing the performance of the dynamical system in the presence of noise, we discover that it is resistant to system noise. Moreover, we find some part of the system can be considered as a leaky integrator which has been already widely applied in engineering. Finally, we provide a proof-of-principle hardware implementation of the proposed scheme to illustrate its effectiveness. With the proposed scheme in hand, it is convenient to build the flexible, robust, and general purpose computing devices such as various network coding routers, communication encoders or decoders, and reconfigurable computer chips.

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22

Gauci, Gabriel, and David C. Magri. "Solvent-polarity reconfigurable fluorescent 4-piperazino-N-aryl-1,8-naphthalimide crown ether logic gates." RSC Advances 12, no. 54 (2022): 35270–78. http://dx.doi.org/10.1039/d2ra07568g.

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23

He, Kaiyu, Yong Li, Binbin Xiang, Peng Zhao, Yufang Hu, Yan Huang, Wang Li, Zhou Nie, and Shouzhuo Yao. "A universal platform for building molecular logic circuits based on a reconfigurable three-dimensional DNA nanostructure." Chemical Science 6, no. 6 (2015): 3556–64. http://dx.doi.org/10.1039/c5sc00371g.

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Nishimoto, Shohei, Yuki Yamanashi, and Nobuyuki Yoshikawa. "Design Method of Single-Flux-Quantum Logic Circuits Using Dynamically Reconfigurable Logic Gates." IEEE Transactions on Applied Superconductivity 25, no. 3 (June 2015): 1–5. http://dx.doi.org/10.1109/tasc.2014.2387251.

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25

Wu, Shiming. "Nonvolatile Programmable Spin-Logic Gates Show Potential in Reconfigurable Computing." MRS Bulletin 27, no. 3 (March 2002): 166. http://dx.doi.org/10.1557/mrs2002.56.

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26

Yamanashi, Y., I. Okawa, and N. Yoshikawa. "Design Approach of Dynamically Reconfigurable Single Flux Quantum Logic Gates." IEEE Transactions on Applied Superconductivity 21, no. 3 (June 2011): 831–34. http://dx.doi.org/10.1109/tasc.2010.2090856.

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27

Iftimie, S., A. Radu, and D. Dragoman. "Reconfigurable logic gates in nanowires with Rashba spin-orbit interaction." Physica E: Low-dimensional Systems and Nanostructures 120 (June 2020): 114064. http://dx.doi.org/10.1016/j.physe.2020.114064.

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28

Nemnes, G. A., and Daniela Dragoman. "Reconfigurable quantum logic gates using Rashba controlled spin polarized currents." Physica E: Low-dimensional Systems and Nanostructures 111 (July 2019): 13–19. http://dx.doi.org/10.1016/j.physe.2019.02.021.

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29

Chappanda, K. N., S. Ilyas, and M. I. Younis. "Micro-mechanical resonators for dynamically reconfigurable reduced voltage logic gates." Journal of Micromechanics and Microengineering 28, no. 5 (March 8, 2018): 055009. http://dx.doi.org/10.1088/1361-6439/aaafe5.

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Dragoman, Mircea, Adrian Dinescu, Daniela Dragoman, Cătălin Palade, Valentin Şerban Teodorescu, and Magdalena Lidia Ciurea. "Graphene/Ferroelectric (Ge-Doped HfO2) Adaptable Transistors Acting as Reconfigurable Logic Gates." Nanomaterials 12, no. 2 (January 17, 2022): 279. http://dx.doi.org/10.3390/nano12020279.

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We present an array of 225 field-effect transistors (FETs), where each of them has a graphene monolayer channel grown on a 3-layer deposited stack of 22 nm control HfO2/5 nm Ge-HfO2 intermediate layer/8 nm tunnel HfO2/p-Si substrate. The intermediate layer is ferroelectric and acts as a floating gate. All transistors have two top gates, while the p-Si substrate is acting as a back gate. We show that these FETs are acting memtransistors, working as two-input reconfigurable logic gates with memory, the type of the logic gate depending only on the values of the applied gate voltages and the choice of a threshold current.

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31

Bogoni, A., L. Potì, R. Proietti, G. Meloni, F. Ponzini, and P. Ghelfi. "Regenerative and reconfigurable all-optical logic gates for ultra-fast applications." Electronics Letters 41, no. 7 (2005): 435. http://dx.doi.org/10.1049/el:20058010.

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32

Dong Jian-Ji, Zhang Xin-Liang, Wang Yang, and Huang De-Xiu. "High speed reconfigurable logic gates based on single semiconductor optical amplifier." Acta Physica Sinica 57, no. 4 (2008): 2222. http://dx.doi.org/10.7498/aps.57.2222.

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33

Bae, Yonghee, Kyo-Seok Lee, Sun-Mi Lee, and Kyung-Hwa Yoo. "Reconfigurable logic gates in biological crossbar neural networks using STDP learning." Biophysical Journal 122, no. 3 (February 2023): 437a. http://dx.doi.org/10.1016/j.bpj.2022.11.2363.

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34

Jatkar, Mandar, and Kamal K. Jha. "Modeling and performance analysis of F-functionalized AGNR reconfigurable logic gates." Diamond and Related Materials 141 (January 2024): 110679. http://dx.doi.org/10.1016/j.diamond.2023.110679.

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35

Park, Taegyun, Yeong Rok Kim, Jihun Kim, Jinwon Lee, and Cheol Seong Hwang. "Reliable Domain‐Specific Exclusive Logic Gates Using Reconfigurable Sequential Logic Based on Antiparallel Bipolar Memristors." Advanced Intelligent Systems 4, no. 5 (May 2022): 2270021. http://dx.doi.org/10.1002/aisy.202270021.

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36

Kostadinov, Atanas N., and Guennadi A. Kouzaev. "A Novel Processor for Artificial Intelligence Acceleration." WSEAS TRANSACTIONS ON CIRCUITS AND SYSTEMS 21 (July 1, 2022): 125–41. http://dx.doi.org/10.37394/23201.2022.21.14.

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A variable predicate logic processor (VPLP) is proposed for artificial intelligence (AI), robotics, computer-aided medicine, electronic security, and other applications. The development is realized as an accelerating unit in AI computing machines. The difference from known designs, the datapath of this processor consists of universal gates changing on-the-fly their logical styles-subsets of predicate logic according to the data type and implemented instructions. In this paper, the processor’s reconfigurable gates and the main units are proposed, designed, modeled, and verified using a Field-Programmable Gate Array (FPGA) board and corresponding computer-aided design (CAD) tool. The implemented processor confirmed its reconfigurability on-the-fly performing testing codes. This processor is interesting in accelerating AI computing, molecular and quantum calculations in science, cryptography, computer-aided medicine, robotics, etc.

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37

Linn, Eike, and Heidemarie Schmidt. "Advancing in-memory Arithmetic Based on CMOS-integrable Memristive Crossbar Structures." PROOF 1 (November 27, 2021): 80–89. http://dx.doi.org/10.37394/232020.2021.1.12.

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Memristive computing will be advantageous in large-scale, highly parallel mixed-mode processing architectures because processing can be performed directly within memristive memory architectures and intrachip communication can be implemented by a memristive crossbar structure with reconfigurable logic gates. Here we report on the development of a new concept for in-memory adders, using XOR functionality. Exploited memristive crossbar structures are based on memristive complementary resistive switches, e.g. TaOx, and BiFeO3.

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38

Matsuno, Tomohiro, Satoshi Sugahara, and Masaaki Tanaka. "Novel Reconfigurable Logic Gates Using Spin Metal–Oxide–Semiconductor Field-Effect Transistors." Japanese Journal of Applied Physics 43, no. 9A (September 9, 2004): 6032–37. http://dx.doi.org/10.1143/jjap.43.6032.

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39

Chiang, Yu-Fan, Wei-Yu Chien, Yue-Der Chih, Jonathan Chang, Chrong Jung Lin, and Ya-Chin King. "FinFET CMOS logic gates with non-volatile states for reconfigurable computing systems." Integration 65 (March 2019): 97–103. http://dx.doi.org/10.1016/j.vlsi.2018.11.007.

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40

Hou, Jie, Liao Chen, Wenchan Dong, and Xinliang Zhang. "40 Gb/s reconfigurable optical logic gates based on FWM in silicon waveguide." Optics Express 24, no. 3 (February 2, 2016): 2701. http://dx.doi.org/10.1364/oe.24.002701.

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41

Worschech, L., F. Hartmann, T. Y. Kim, S. Höfling, M. Kamp, A. Forchel, J. Ahopelto, I. Neri, A. Dari, and L. Gammaitoni. "Universal and reconfigurable logic gates in a compact three-terminal resonant tunneling diode." Applied Physics Letters 96, no. 4 (January 25, 2010): 042112. http://dx.doi.org/10.1063/1.3302457.

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42

Abraham, Doron, Avraham Chelly, Joseph Shappir, and Zeev Zalevsky. "Hybrid optical and electrical reconfigurable logic gates based on silicon on insulator technology." Photonics and Nanostructures - Fundamentals and Applications 9, no. 1 (February 2011): 35–41. http://dx.doi.org/10.1016/j.photonics.2010.08.002.

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43

Han, Bingchen, and Yi Liu. "All-optical reconfigurable non-inverted logic gates with a single semiconductor optical amplifier." AIP Advances 9, no. 1 (January 2019): 015007. http://dx.doi.org/10.1063/1.5061828.

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Bae, Gi Yoon, Yechan Hwang, Sangmin Lee, and Wanjun Park. "Reconfigurable Logic Gates with in‐Plane Magnetic Tunnel Junctions Representing Full Boolean Functions." physica status solidi (a) 216, no. 6 (February 21, 2019): 1800959. http://dx.doi.org/10.1002/pssa.201800959.

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45

Lee, Kyung Hoon, Kunhao Yu, Hasan Al Ba’ba’a, An Xin, Zhangzhengrong Feng, and Qiming Wang. "Sharkskin-Inspired Magnetoactive Reconfigurable Acoustic Metamaterials." Research 2020 (February 5, 2020): 1–13. http://dx.doi.org/10.34133/2020/4825185.

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Most of the existing acoustic metamaterials rely on architected structures with fixed configurations, and thus, their properties cannot be modulated once the structures are fabricated. Emerging active acoustic metamaterials highlight a promising opportunity to on-demand switch property states; however, they typically require tethered loads, such as mechanical compression or pneumatic actuation. Using untethered physical stimuli to actively switch property states of acoustic metamaterials remains largely unexplored. Here, inspired by the sharkskin denticles, we present a class of active acoustic metamaterials whose configurations can be on-demand switched via untethered magnetic fields, thus enabling active switching of acoustic transmission, wave guiding, logic operation, and reciprocity. The key mechanism relies on magnetically deformable Mie resonator pillar (MRP) arrays that can be tuned between vertical and bent states corresponding to the acoustic forbidding and conducting, respectively. The MRPs are made of a magnetoactive elastomer and feature wavy air channels to enable an artificial Mie resonance within a designed frequency regime. The Mie resonance induces an acoustic bandgap, which is closed when pillars are selectively bent by a sufficiently large magnetic field. These magnetoactive MRPs are further harnessed to design stimuli-controlled reconfigurable acoustic switches, logic gates, and diodes. Capable of creating the first generation of untethered-stimuli-induced active acoustic metadevices, the present paradigm may find broad engineering applications, ranging from noise control and audio modulation to sonic camouflage.

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46

M. El-Medany, Wael. "A cost-effective programmable SoC for network security using Xilinx Spartan 3AN FPGA." Journal of Engineering, Design and Technology 12, no. 2 (April 29, 2014): 280–91. http://dx.doi.org/10.1108/jedt-01-2011-0008.

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Purpose – With the rapid development in wired and wireless networks, the demand for network security system is rising rapidly due to more and more new applications introduced. The main factors that rate the encryption algorithms are its ability to secure and protect data against attacks, its speed and efficiency. In this paper, a reconfigurable network security design using multi-mode data encryption standard (DES) algorithm has been implemented with low complexity and low cost, which will also reduce the speed. The paper aims to discuss these issues. Design/methodology/approach – The design can be easily reconfigured to 3DES (triple DES) which is more secure and more powerful in encryption and decryption, as one of the trick in designing 3DES is to reuse three instances of DES. The design can be used for wired and wireless network applications, and it has been described using VHDL and implemented in a reconfigurable Programmable System-on-Chip (PSoC). The hardware implementation has targeted Xilinx Spartan XC3S700-AN FPGA device. Findings – The main idea of reducing the complexity for the hardware implementation is by optimizing the number of logic gates and LUTs of the design. The number of logic gates can be decreased by changing the way of writing the VHDL code and by optimizing the size of the chip. Originality/value – The design has been tested in simulation and hardware levels, and the simulation results and performance are discussed.

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47

Tilbury, Dawn M. "Recon Figureable Logic Control for Manufacturing Systems." Mechanical Engineering 136, no. 12 (December 1, 2014): S16—S23. http://dx.doi.org/10.1115/1.2014-dec-7.

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This article explores optimistic use of reconfigurable logic control for manufacturing systems. The rapid advancement of computing and networking technologies is enabling more data to be gathered, stored, and analyzed. It is possible for all of the machines in a manufacturing plant to be connected to the Internet of Things (IoT), with their production data stored either in a local database or in a cloud system. This opens up new avenues for online decision-making based on real-time data coming from the system. However, it also introduces significant cybersecurity challenges that will need to be addressed for successful deployment. Traditionally, security in a manufacturing plant was handled through physical separation and access gates with badge identification. Connecting the manufacturing plant to the Internet results in multiple opportunities for improving performance through better data analytics, as well as myriad challenges for safety, security, and privacy.

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48

Hayakawa, Ryoma, Kosuke Honma, Shu Nakaharai, Kaname Kanai, and Yutaka Wakayama. "Electrically Reconfigurable Organic Logic Gates: A Promising Perspective on a Dual‐Gate Antiambipolar Transistor." Advanced Materials 34, no. 15 (February 27, 2022): 2109491. http://dx.doi.org/10.1002/adma.202109491.

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49

Dong, J., X. Zhang, Y. Wang, J. Xu, and D. Huang. "40 Gbit/s reconfigurable photonic logic gates based on various nonlinearities in single SOA." Electronics Letters 43, no. 16 (2007): 884. http://dx.doi.org/10.1049/el:20071220.

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50

Dong, Yonggang, Mei Liu, Hui Zhang, and Bin Dong. "Reconfigurable OR and XOR logic gates based on dual responsive on–off–on micromotors." Nanoscale 8, no. 15 (2016): 8378–83. http://dx.doi.org/10.1039/c6nr00752j.

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Journal articles on the topic 'Reconfigurable logic gates'

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