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Journal articles on the topic 'Programmable RF transmitter'
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Tang, Wankai, Jun Yan Dai, Mingzheng Chen, Xiang Li, Qiang Cheng, Shi Jin, Kai‐Kit Wong, and Tie Jun Cui. "Programmable metasurface‐based RF chain‐free 8PSK wireless transmitter." Electronics Letters 55, no. 7 (April 2019): 417–20. http://dx.doi.org/10.1049/el.2019.0400.
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Xu, Qin, Christopher Glielmi, Lei Zhou, Kisueng Choi, and Xiaoping Hu. "An inexpensive and programmable RF transmitter setup for two-coil CASL." Concepts in Magnetic Resonance Part B: Magnetic Resonance Engineering 33B, no. 4 (October 2008): 228–35. http://dx.doi.org/10.1002/cmr.b.20127.
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VOTIS, CONSTANTINOS I., PANOS KOSTARAKIS, and LEONIDAS P. IVRISSIMTZIS. "DESIGN AND MEASUREMENTS OF A MULTIPLE-OUTPUT TRANSMITTER FOR MIMO APPLICATIONS." Journal of Circuits, Systems and Computers 20, no. 03 (May 2011): 515–29. http://dx.doi.org/10.1142/s0218126611007426.
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The design of a multiple-output transmitter for digital beamforming (DBF), Multiple-Input Multiple-Output (MIMO) and channel sounder applications, based on Direct Digital Synthesis (DDS) system is presented and investigated in terms of antenna array performance. DDS generates independently modulated signals on specific carrier frequencies and is employed as the first stage in the proposed implementation, furnishing output signal of configurable amplitude, phase and frequency. The resulting phase progression, amplitude and beamforming accuracy of a beam steering array are further investigated, showing that the proposed architecture can provide a steering beam with high accuracy. Experimental results of system performance indicate that this architecture can drive efficiently and accurately an antenna array with independent modulated RF signals, with programmable frequency, initial phase, and magnitude.
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Ott, A. T., C. J. Eisner, M. D. Blech, and T. F. Eibert. "Reconfigurable ultra-wideband transmitter for generation of arbitrary impulse shapes and modulation schemes." Advances in Radio Science 10 (September 18, 2012): 57–62. http://dx.doi.org/10.5194/ars-10-57-2012.
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Abstract. In this paper a reconfigurable ultra-wideband (UWB) impulse radio (IR) transmitter is presented. The IR signal is synthesized at an intermediate frequency (IF) by employing a multi-Nyquist digital-to-analog converter (DAC) with 12 bit resolution and an update rate of 2.3 GHz. Digital generation of signals in a field programmable gate array (FPGA) guarantees very high flexibility of the reconfigurable design. For upconversion to the radio frequency (RF) band, a first order bandpass (BP) sampling concept and an alternative conventional concept with mixer stages, have been realized. The system enables to generate signals with arbitrary modulation schemes and techniques at an external host personal computer (PC) employing MATLAB. Different measurements using a digitizing oscilloscope have been conducted to demonstrate the performance of the transmitter.
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Davidson, Kyle, and Joey Bray. "Understanding Digital Radio Frequency Memory Performance in Countermeasure Design." Applied Sciences 10, no. 12 (June 15, 2020): 4123. http://dx.doi.org/10.3390/app10124123.
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This paper describes the design, implementation, and testing of a novel multi-function software defined Radio Frequency (RF) system designed for small airborne drone applications. The system was created using an inexpensive Field Programmable Gate Array (FPGA) to combine a coherent linear frequency modulated radar transmitter and receiver, with a Digital Radio Frequency Memory (DRFM) jammer for use with a common RF aperture in simultaneous operation. The system was implemented on a Xilinx Kintex-7 FPGA with a wideband analogue-to-digital/ digital-to-analogue (ADC/DAC) converter mezzanine board and tested using hardware-in-the-loop mode to validate its performance. This is the first known account of an integrated multifunction electronic attack and radar system on a single chip, capable of performing a simultaneous, not time shared, operation.
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Hoang, Nguyen Huy, Tran Van Nghia, and Le Van Ky. "IMPLEMENTATION OF FPGA-BASED DVB-T2 TRANSMITTER FOR A SECOND GENERATION DIGITAL TERRESTRIAL TELEVISION BROADCASTING SYSTEM." SYNCHROINFO JOURNAL 7, no. 1 (2021): 30–32. http://dx.doi.org/10.36724/2664-066x-2021-7-1-30-32.
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Nowadays, with strong development of Science and Technology, integrated circuits continue to dominate not only in the field of digital information. Over the last several years, Technological television industry has taken huge strides and powerful transformation to meet with government’s policy about digitization of television all over the country in period 2015 – 2020. Stemming from the practical needs of “localization of products” and mastering of technological design of DVB-T2 transmitter (Digital Video Broadcasting – Terrestrial for Second generation), the authors have made an effort to research in algorithm, designed and tested in Field Programmable Gate Array (FPGA) technology. DVB-T2 is mainly aimed to replace the current standard DVB-T. The main motivation of DVB-T2 is to provide broadcasters with more advanced and efficient alternative to DVB-T standards. In DVB-T2 transmitter system, digital audio, video, and other data are compressed into a single signal to be transmitted on a single RF channel, using orthogonal frequency-division multiplexing (OFDM) with concatenated channel coding and interleaving. The higher offered bit rate makes it a suited system for carrying HDTV signals on the terrestrial TV channel. The next generation broadcasting systems should be designed to make full use of spectral resources while providing reliable transmissions in order to enable services like multichannel HDTV (High Definition Television) and innovative data casting services. The efficient usage of the radio spectrum can be achieved by the introduction of Single Frequency Networks (SFN). Digital transmitter DVB-T2 implemented on FPGA using a software Xilinx System Generator for DSP tool and Xilinx ISE Design Suite 14.7. System Generator for DSP is in conjunction on environment MATLAB-Simulink that is capable of simulating the proposed hardware structures that is synthesized and implemented by the programmable elements in Field-programmable Gate Arrays. In this project, adaptative MPEG-TS bitrate converter is designed to allows to increasing or reducing the MPEG TS rate by adding or filtering NULL packets. The entire digital transmitter DVB-T2 is integrated in one chip Xilinx FPGA Kintex-7 XC7K325T-1FFG676. Experimental design on development Kit NetFPGA-1G-CML of Digilent Corporation is performed at design department of technology center of Vietnamese Communications Television Development JSC. Authors are continuing to improve products, put into practical applications to replace the digital terrestrial television broadcasting stations that are being used in Vietnam. The article named “Implementation of FPGA-based DVB-T2 transmitter for a second generation digital terrestrial television broadcasting system” presents the research results, design methods, test results to compare, evaluate the accuracy of algorithm implementation. The results open up new directions for technological television in Vietnam.
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Korošak, Žiga, Nejc Suhadolnik, and Anton Pleteršek. "Design of Multi Standard Near Field Communication Outphasing Transmitter with Modulation Wave Shaping." Electronics 10, no. 2 (January 15, 2021): 188. http://dx.doi.org/10.3390/electronics10020188.
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The aim of this work is to tackle the problem of modulation wave shaping in the field of near field communication (NFC) radio frequency identification (RFID). For this purpose, a high-efficiency transmitter circuit was developed to comply with the strict requirements of the newest EMVCo and NFC Forum specifications for pulse shapes. The proposed circuit uses an outphasing modulator that is based on a digital-to-time converter (DTC). The DTC based outphasing modulator supports amplitude shift keying (ASK) modulation, operates at four times the 13.56 MHz carrier frequency and is made fully differential in order to remove the parasitic phase modulation components. The accompanying transmitter logic includes lookup tables with programmable modulation pulse wave shapes. The modulator solution uses a 64-cell tapped current controlled fully differential delay locked loop (DLL), which produces a 360° delay at 54.24 MHz, and a glitch-free multiplexor to select the individual taps. The outphased output from the modulator is mixed to create an RF pulse width modulated (PWM) output, which drives the antenna. Additionally, this implementation is fully compatible with D-class amplifiers enabling high efficiency. A test circuit of the proposed differential multi-standard reader’s transmitter was simulated in 40 nm CMOS technology. Stricter pulse shape requirements were easily satisfied, while achieving an output linearity of 0.2 bits and maximum power consumption under 7.5 mW.
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Bangalore Lokanatha, Sujaya, and Sompura Basavaraju Bhanu Prashanth. "Design and performance analysis of human body communication digital transceiver for wireless body area network applications." International Journal of Electrical and Computer Engineering (IJECE) 12, no. 3 (June 1, 2022): 2206. http://dx.doi.org/10.11591/ijece.v12i3.pp2206-2213.
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Wireless body area network (WBAN) is a prominent technology for resolving health-care concerns and providing high-speed continuous monitoring and real-time help. Human body communication (HBC) is an IEEE 802.15.6 physical layer standard for short-range communications that is not reliant on radio frequency (RF). Most WBAN applications can benefit from the HBC's low-latency and low-power architectural features. In this manuscript, an efficient digital HBC transceiver (TR) hardware architecture is designed as per IEEE 802.15.6 standard to overcome the drawbacks of the RF-wireless communication standards like signal leakage, on body antenna and power consumption. The design is created using a frequency selective digital transmission scheme for transmitter and receiver modules. The design resources are analyzed using different field programmable gate array (FPGA) families. The HBC TR utilizes <1% slices, consumes 101 mW power, and provides a throughput of 24.31 Mbps on Artix-7 FPGA with a latency of 10.5 clock cycles. In addition, the less than 10-4bit error rate of HBC is achieved with a 9.52 Mbps data rate. The proposed work is compared with existing architectures with significant improvement in performance parameters like chip area, power, and data rate.
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Blech, M. D., A. T. Ott, P. Neumeier, M. Möller, and T. F. Eibert. "A reconfigurable software defined ultra-wideband impulse radio transceiver." Advances in Radio Science 8 (September 30, 2010): 67–73. http://dx.doi.org/10.5194/ars-8-67-2010.
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Abstract. An ultra-wideband (UWB) software defined radio (SDR) implementation is presented. The developed impulse radio (IR) transceiver employs first order bandpass (BP) sampling at a conversion frequency which is four times the channel bandwidth. The subsampling architecture directly provides the RF signal avoiding any non-ideal mixer stages and reduces the requirements of digital signal processing implemented in a field programmable gate array (FPGA). The transmitter consists basically of a multi-Nyquist digital to analog converter (DAC), whereas the implemented matched filter (MF) receiver prototype employs a standard digitizing oscilloscope. This design can be adaptively reconfigured in terms of modulation, data rate, and channel equalization. The reconfigurable design is used for an extensive performance analysis of the quadrature phase shift keying (QPSK) modulation scheme investigating the influence of different antennas, amplifiers, narrowband interferers as well as different equalizer lengths. Even for distances up to 7 m in a multipath environment robust communication was achieved.
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Prasanna, Talapala Lakshmi, Nalluri Siddaiah, Boppana Murali Krishna, and Maheswara Rao Valluri. "Implementation of the advanced encryption standard algorithm on an FPGA for image processing through the universal asynchronous receiver-transmitter protocol." International Journal of Electrical and Computer Engineering (IJECE) 12, no. 6 (December 1, 2022): 6114. http://dx.doi.org/10.11591/ijece.v12i6.pp6114-6122.
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<span lang="EN-US">Communication among end users can be based either on wired or wireless technology. Cryptography plays a vital role in ensuring data exchange is secure among end users. Data can be encrypted and decrypted using symmetric or asymmetric key cryptographic techniques to provide confidentiality. In wireless technology, images are exchanged through low-cost wireless peripheral devices, such as radio frequency identification device (RFID), nRF, and ZigBee, that can interface with field programmable gate array (FPGA) among the end users. One of the issues is that data exchange through wireless devices does not offer confidentiality, and subsequently, data can be lost. In this paper, we propose a design and implementation of AES-128 cipher algorithm on an FPGA board for image processing through the <a name="_Hlk107307233"></a>universal asynchronous receiver transmitter (UART) protocol. In this process, the advanced encryption standard (AES) algorithm is used to encrypt and decrypt the image, while the transmitter and receiver designs are implemented on two Xilinx BASYS-3 circuits connected with a ZigBee RF module. The encrypted image uses less memory, such as LUTs (141), and also consumes less chip power (0.0291 w), I/O (0.003), block RAM (0.001 w), data, and logic to provide much higher efficiency than wired communication technology. We also observe that images can be exchanged through the UART protocol with different baud rates in run time.</span>
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Galaviz-Aguilar, Jose Alejandro, Cesar Vargas-Rosales, José Ricardo Cárdenas-Valdez, Yasmany Martínez-Reyes, Everardo Inzunza-González, Yuma Sandoval-Ibarra, and José Cruz Núñez-Pérez. "A Weighted Linearization Method for Highly RF-PA Nonlinear Behavior Based on the Compression Region Identification." Applied Sciences 11, no. 7 (March 25, 2021): 2942. http://dx.doi.org/10.3390/app11072942.
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In this paper, we present an adaptive modeling and linearization algorithm using the weighted memory polynomial model (W-MPM) implemented in a chain involving the indirect learning approach (ILA) as a linearization technique. The main aim of this paper is to offer an alternative to correcting the undesirable effect of spectral regrowth based on modeling and linearization stages, where the 1-dB compression point (P1dB) of a nonlinear device caused by memory effects within a short time is considered. The obtained accuracy is tested for a highly nonlinear behavior power amplifier (PA) properly measured using a field-programmable gate array (FPGA) system. The adaptive modeling stage shows, for the two PAs under test, performances with accuracies of −32.72 dB normalized mean square error (NMSE) using the memory polynomial model (MPM) compared with −38.03 dB NMSE using the W-MPM for the (i) 10 W gallium nitride (GaN) high-electron-mobility transistor (HEMT) radio frequency power amplifier (RF-PA) and of −44.34 dB NMSE based on the MPM and −44.90 dB NMSE using the W-MPM for (ii) a ZHL-42W+ at 2000 MHz. The modeling stage and algorithm are suitably implemented in an FPGA testbed. Furthermore, the methodology for measuring the RF-PA under test is discussed. The whole algorithm is able to adapt both stages due to the flexibility of the W-MPM model. The results prove that the W-MPM requires less coefficients compared with a static model. The error vector magnitude (EVM) is estimated for both the static and adaptive schemes, obtaining a considerable reduction in the transmitter chain. The development of an adaptive stage such as the W-MPM is ideal for digital predistortion (DPD) systems where the devices under test vary their electrical characteristics due to use or aging degradation.
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Webber, John Beausire Wyatt, and Pavel Demin. "Digitally Based Precision Time-Domain Spectrometer for NMR Relaxation and NMR Cryoporometry." Micro 3, no. 2 (April 3, 2023): 404–33. http://dx.doi.org/10.3390/micro3020028.
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NMR Relaxation (NMRR) is an extremely useful quantitative technique for material science, particularly for studying polymers and porous materials. NMR Cryoporometry (NMRC) is a powerful technique for the measurement of pore-size distributions and total porosities. This paper discusses the use, capabilities and application of a newly developed compact NMR time-domain relaxation spectrometer suitable for studying both solid and liquid samples (Mk3 NMR Relaxation spectrometer & Cryoporometer, Lab-Tools (nano-science), Ramsgate, Kent, UK. (2019)). This highly compact precision NMR Spectrometer is based on a Field Programmable Gate array (FPGA) module and custom surface mount low-noise NMR receiver and NMR linear transmitter. A high proportion of the RF circuitry is in a digital form, implemented as firmware in the FPGA, which gives the instrument an excellent long-term stability. It also includes an on-chip Linux computer. The FPGA module is credit-card sized, and both the NMR receiver and NMR transmitter are even smaller. The software, including the top-level NMR pulse sequence definitions, are written in an array processing language, Apl. The spectrometer comes complete with a Graphical User Interface (GUI) for control and on- and offline curve fitting and data analysis. The recent development of the Lab-Tools Peltier thermo-electrically cooled NMR variable-temperature (V-T) probe that cools the sample below −60 °C is also discussed. This Peltier cooling gives the precision temperature control and smoothness needed by NMR Cryoporometry (10 mK near the probe liquid bulk melting point). This enables the NMRC measurement of pore-size distributions in porous materials, for the unusually wide pore-size range of sub-nano to over 1 micron-sized pores. The NMR Spectrometer’s unusually small size, ability to measure solids, low noise and high performance make it particularly suitable for material science studies both in the field and in university, research institute, company and even school laboratories. A human portable version now exists. Use of the controlling GUI is described, and results from example NMR Relaxation and NMR Cryoporometric measurements are given.
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Karyakin, Vladimir L. "Client-server system for monitoring the quality of TV broadcasting in Russia." Physics of Wave Processes and Radio Systems 25, no. 3 (September 29, 2022): 36–42. http://dx.doi.org/10.18469/1810-3189.2022.25.3.36-42.
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The strategy for the development of television and radio broadcasting in the Russian Federation until 2025 specifically states the need to ensure the reliability of uninterrupted television and radio broadcasting. The quality of DVB-T2 broadcasting is estimated by the data transmission rate and the bit error rate BER (Bit Error Ratio) stability margin «at the last mile» in the retransmitters’ broadcast zones. The distributed client-server system of broadcast quality monitoring in RF, proposed in the article, uses the necessary equipment, including BER sensors based on programmable receivers combined with single-board microcomputers implemented on SoC processors. Collection and processing of data in broadcasting areas with the help of the proposed monitoring system will allow specialists engaged in practical network development to make an objective conclusion about the necessity and ways of SFN network reconstruction to provide uninterrupted TV and radio broadcasting in RF. Modernization and technical re-equipment of SFN networks will provide a solution to the problems related to certification of satellite earth stations and transmitters of SFN networks, provision of various services and broadcasting services of DVB-T2 standard to the population with high quality.
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Yani, Kalfika, Fiky Y. Suratman, and Koredianto Usman. "Design and Implementation Pulse Compression for S-Band Surveillance Radar." Journal of Measurements, Electronics, Communications, and Systems 7, no. 1 (December 30, 2020): 20. http://dx.doi.org/10.25124/jmecs.v7i1.2631.
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The radar air surveillance system consists of 4 main parts, there are antenna, RF front-end, radar signal processing, and radar data processing. Radar signal processing starts from the baseband to IF section. The radar waveform consists of two types of signal, there are continuous wave (CW) radar, and pulse compression radar [1]. Range resolution for a given radar can be significantly improved by using very short pulses. Pulse compression allows us to achieve the average transmitted power of a relatively long pulse, while obtaining the range resolution corresponding to a short pulse. Pulse compression have compression gain. With the same power, pulse compression radar can transmit signal further than CW radar. In the modern radar, waveform is implemented in digital platform. With digital platform, the radar waveform can optimize without develop the new hardware platform.
Field Programmable Gate Array (FPGA) is the best platform to implemented radar signal processing, because FPGA have ability to work in high speed data rate and parallel processing. In this research, we design radar signal processing from baseband to IF using Xilinx ML-605 Virtex-6 platform which combined with FMC-150 high speed ADC/DAC.
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Sheybani, Ehsan, and Giti Javidi. "Integrating Software Defined Radio with USRP." International Journal of Interdisciplinary Telecommunications and Networking 9, no. 3 (July 2017): 1–9. http://dx.doi.org/10.4018/ijitn.2017070101.
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The USRP1 is the original Universal Software Radio Peripheral hardware (USRP) that provides entry-level RF processing capability. Its primary purpose is to provide flexible software defined radio development capability at a low price. You can control the frequency you receive and transmit by installing different daughter-boards. The authors' USRP model had been configured to receive a signal from local radio stations in the DC, Maryland metropolitan area with the BasicRX model daughterboard. The programmable USRP was running python block code implemented in the GNU Radio Companion (GRC) on Ubuntu OS. With proper parameters and sinks the authors were able to tune into the radio signal, record the signal and extract the in-phase (I) and quadrature phase (Q) data and plot the phase and magnitude of the signal. Using the terminal along with proper MATLAB and Octave code, they were able to read the I/Q data and look at the Fast Fourier Transform (FFT) plot along with the I/Q data. With the proper equations, you could determine not only the direction of arrival, but one would also be able to calculate the distance from the receiver to the exact location where the signal is being transmitted. The purpose of doing this experiment was to gain experience in signal processing and receive hands on experience with the USRP and potentially add a tracking system to the authors' model for further experiments.
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Setiawan Sumadi, Fauzi Dwi, Alrizal Rakhmat Widagdo, Abyan Faishal Reza, and Syaifuddin. "SD-Honeypot Integration for Mitigating DDoS Attack Using Machine Learning Approaches." JOIV : International Journal on Informatics Visualization 6, no. 1 (March 26, 2022): 39. http://dx.doi.org/10.30630/joiv.6.1.853.
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Distributed Denial of Services (DDoS) is still considered the main availability problem in computer networks. Developing a programmable Intrusion Prevention System (IPS) application in a Software Defined Network (SDN) may solve the specified problem. However, the deployment of centralized logic control can create a single point of failure on the network. This paper proposed the integration of Honeypot Sensor (Suricata) on the SDN environment, namely the SD-Honeypot network, to resolve the DDoS attack using a machine learning approach. The application employed several algorithms (Support Vector Machine (SVM), Multilayer Perceptron (MLP), Gaussian Naive Bayes (GNB), K-Nearest Neighbors (KNN), Classification and Regression Trees (CART), and Random Forest (RF)) and comparatively analyzed. The dataset used during the emulation utilized the extracted Internet Control Message Protocol (ICMP) flood data from the Suricata sensor. In order to measure the effectiveness of detection and mitigation modules, several variables were examined, namely, accuracy, precision, recall, and the promptness of the flow mitigation installation process. The Honeypot server transmitted the flow rule modification message for blocking the attack using the Representational State Transfer Application Programming Interface (REST API). The experiment results showed the effectiveness of CART algorithm for detecting and resolving the intrusion. Despite the accuracy score pointed at 69-70%, the algorithm could promptly deploy the mitigation flow within 31-49ms compared to the SVM, which produced 93-94% accuracy, but the flow installation required 112-305ms. The developed CART module can be considered a solution to prevent the attack effectively based on the analyzed variable.
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Chen, Qian, Zilin Qiao, Juliang Lv, Yong Ye, Xingang Ren, Wei Wang, Zhixiang Huang, Lixia Yang, and Yingsong Li. "A programmable solar‐powered radio frequency transmitter." Microwave and Optical Technology Letters 66, no. 3 (March 2024). http://dx.doi.org/10.1002/mop.34101.
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AbstractThis paper proposes a programmable solar‐powered radio frequency (RF) transmitter. It employs a novel five‐layer structure that effectively integrates solar cells, active circuits, and broadband antenna. This design can directly emit RF signals without the need for additional power supply, enabling efficient energy conversion and transmission. In addition, a U‐shaped coupling line model is introduced to evaluate the performance of the active circuit. We fabricated a sample and measured it. The results of the measurements indicate that the proposed RF transmitter can achieve self‐powering and programmable output at any frequency within the range of 2.08–4.1 GHz, with an output power of no less than 14 dBm. Moreover, the solar cells are placed on both sides of the circuits and antenna for energy harvesting, achieving 100% sunlight insolation with a 75.5% coverage ratio. This design can be used for self‐powered green wireless system applications.
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Perotoni, Marcelo B., Kenedy M. G. dos Santos, Danilo B. Almeida, and Daniel Jonathas. "SDR-based Radar for Human Detection." Applied Computational Electromagnetics Society Journal (ACES), December 29, 2022. http://dx.doi.org/10.13052/2022.aces.j.370710.
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Software-defined radios (SDRs) have been applied to several applications, taking advantage of their inherent versatility. It is reported a low-cost radar intended to detect human activity, at the frequency of 4.1 GHz, with an SDR on the receiving branch and a programmable RF synthesizer operating as a continuous-wave transmitter. Amplitude variations on the received signal indicate human activity, its operation is tested in indoor and outdoor scenarios. The interface to the SDR is performed using the open-source tool GNU Radio. It was possible to detect human movement at a maximum distance of 9 meters, in an open area. The system is versatile in terms of power and frequency, totally controlled by software in a transparent and straightforward way.
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Forte, Luca A. "Stepped Frequency Ultrasound Computed Tomography With Waveform Inversion." Biomedical Physics & Engineering Express, February 2, 2024. http://dx.doi.org/10.1088/2057-1976/ad25bb.
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Abstract Routine US (ultrasound) scans for breast imaging run on a conventional console suffer from machine and operator dependence and are subject to personal interpretation. Recently, the framework of USCT (ultrasound computed tomography) has emerged as a safe, powerful and operator independent alternative to diagnostic US scans and X-rays mammography. The most known systems employ one circular array or a combination of transmitters and receivers by exploiting reflection, diffraction and transmission data. These systems are based on a pulsed transmission. Following propagation in tissue, the signals are usually recorded with a direct RF sampling scheme and stored as digital time-series. Image reconstruction is performed in the frequency domain in the 400 kHz - 1 MHz bandwidth over a limited number of discrete frequencies.
In this paper, we propose a new architecture based on the stepped frequency continuous waveform (SFCW) principle. In this scheme, the transmission is a continuous one and the received waveforms undergo a homo-dyne stage. By sequentially transmitting single tones at different frequencies, data can be collected directly in the frequency domain at specific frequencies, with programmable frequency steps and with any desired SNR. We describe in detail the transmitter and the receiver paths and compare with a conventional pulsed USCT architecture. Finally, we highlight the benefits of a SFCW-USCT device and comment on SNR, absorbed power, data fidelity and data storage.
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Сқабылов, Ә. Ә. "ПРОГРАММНО-АППАРАТНАЯ РЕАЛИЗАЦИЯ QPSK НА БАЗЕ ZYNQ И MATLAB." BULLETIN Series Physical and Mathematical Sciences, no. 1 (March 1, 2023). http://dx.doi.org/10.51889/2022-1.1728-7901.20.
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Сымсыз құрылғылардың өсуімен ұялы желіге қойылатын талаптар артып келеді. Бізді қоршаған ортадағы ақпараттың үлкен ағымына байланысты тез әрекет ететін, шуылға төзімді, іске асыруға оңай және үнемді ақпараттық деректерді қабылдау мен беру құрылғыларын құру өзекті болып табылады. Жоғары жылдамдықты, кең жолақты радио модульдерін жасау үшін бағдарламаланатын логикалық интегралды схемалар ең қолайлы жабдық болып табылады. Параллельді есептеу мүмкіндігі және осы сандық құрылғылардағы көптеген логикалық ұяшықтар бүкіл жабдықтың салыстырмалы түрде үлкен өнімділігін береді. Сонымен қатар, интегралды микропроцессор ең жоғары өнімді телекоммуникациялық жабдықты жасауға мүмкіндік береді. Осылайша, нақты уақыт режимінде түсетін ақпараттық деректердің үлкен көлемін өңдеу кезінде уақыттың кідірісін болдырмауға болады. Бұл жұмыста SoC (System on a chip) негізінде QPSK (Quadrature phase-shift keying) сигналдарын қабылдағыш қондырғысы әзірленді. Zedboard тақтасы мен RF ad-FMCOMMS3-EBZ платформасымен өзара әрекеттесу үшін таратқыш пен қабылдағыштың QPSK модельдері қолданылды. Құрылған цифрлық радиожүйе моделі қазіргі телекоммуникациялық технологияның радио модуліне сәйкес келетін микросхемадағы жүйенің көмегімен көрсетіледі. Требования для мобильной сети растет с увеличением беспроводных устройств. В связи с существующим большим потоком информации в окружающей нас среде,актуальнымявляется создание быстродействующих, помехоустойчивых, простых по реализации и экономичных устройств приема-передачи информационных данных.Для разработки высокоскоростных, широкополосных радио модулей наиболее подходящими аппаратными средствами являются программируемые логические интегральные схемы. Возможность параллельных вычислений и большое количество логических ячеек в этих цифровых устройствахдают относительно большую производительность всего оборудования. Тем более, встроенный микропроцессор в интегральную микросхемы позволяет создавать самые высокопроизводительные телекоммуникационные оборудования. В данной работеразработанприемо-передатчик сигналов QPSK (Quadraturephase-shiftkeying) на основе SoC(System on a chip). Были использованы модели QPSK передатчика и приемника для взаимодействияс платой ZedBoardиRF платформой AD-FMCOMMS3-EBZ. Продемонстрировано построенная цифровая радиосистема с помощьюсистемы на кристалле, модель которой соответствует радио модулю современной телекоммуникационной техники. The requirements for a mobile network are growing with the increase of wireless devices. In connection with the existing large flow of information in the environment around us, it is urgent to create high-speed, noise-resistant, simple to implement and economical devices for receiving and transmitting information data. For the development of high-speed, wideband radio modules, the most suitable hardware is programmable logic integrated circuits. The possibility of parallel computing and the large number of logical cells in these digital devices give a relatively high performance for all equipment. Moreover, the built-in microprocessor in an integrated microcircuit makes it possible to create the most high-performance telecommunication equipment. In this paper, a QPSK (quadrature phase manipulation) signal Абай атындағы ҚазҰПУ-нің ХАБАРШЫСЫ, «Физика-математика ғылымдары» сериясы, No1(77), 2022147transceiver based on SoC (system on a chip) has been developed. The QPSK models of the transmitter and receiver were used to interact with the ZedBoard board and the AD-FMCOMMS3-EBZ RF platform. the constructed digital radiosystem had been demonstrated using system on a chip, which model correspond to the radio module of modern telecommunication techniques.
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Eric Schwartz, David, Clinton J. Smith, Joseph Lee, Shakthi Priya Gowri, George Daniel, Christopher Lalau-Keraly, Quentin Baudenon, and J. R. M. Saavedra. "Peel-and-Stick Sensors Powered by Directed Radio-Frequency Energy." Journal of Electronic Packaging 140, no. 2 (May 9, 2018). http://dx.doi.org/10.1115/1.4039138.
Full textAbstract:
PARC, a Xerox Company, is developing a low-cost system of peel-and-stick wireless sensors that will enable widespread building environmental sensor deployment with the potential to deliver up to 30% energy savings. The system is embodied by a set of radio-frequency (RF) hubs that provide power to automatically located sensor nodes and relay data wirelessly to the building management system (BMS). The sensor nodes are flexible electronic labels powered by rectified RF energy transmitted by the RF hub and can contain multiple printed and conventional sensors. The system design overcomes limitations in wireless sensors related to power delivery, lifetime, and cost by eliminating batteries and photovoltaic devices. Sensor localization is performed automatically by the inclusion of a programmable multidirectional antenna array in the RF hub. Comparison of signal strengths as the RF beam is swept allows for sensor localization, reducing installation effort and enabling automatic recommissioning of sensors that have been relocated. PARC has already demonstrated wireless power and temperature data transmission up to a distance of 20 m with 71 s between measurements, using power levels well within the Federal Communications Commission regulation limits in the 902–928 MHz industrial, medical and scientific (ISM) band. The sensor's RF energy harvesting antenna achieves high performance with dimensions of 5 cm × 9.5 cm.