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1

Chen, Siting, Yuzhi Li, Yilong Lin, Penghui He, Teng Long, Caihao Deng, Zhuo Chen, et al. "Inkjet-Printed Top-Gate Thin-Film Transistors Based on InGaSnO Semiconductor Layer with Improved Etching Resistance." Coatings 10, no. 4 (April 24, 2020): 425. http://dx.doi.org/10.3390/coatings10040425.

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Inkjet-printed top-gate metal oxide (MO) thin-film transistors (TFTs) with InGaSnO semiconductor layer and carbon-free aqueous gate dielectric ink are demonstrated. It is found that the InGaO semiconductor layer without Sn doping is seriously damaged after printing aqueous gate dielectric ink onto it. By doping Sn into InGaO, the acid resistance is enhanced. As a result, the printed InGaSnO semiconductor layer is almost not affected during printing the following gate dielectric layer. The TFTs based on the InGaSnO semiconductor layer exhibit higher mobility, less hysteresis, and better stability compared to those based on InGaO semiconductor layer. To the best of our knowledge, it is for the first time to investigate the interface chemical corrosivity of inkjet-printed MO-TFTs. It paves a way to overcome the solvent etching problems for the printed TFTs.
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2

Li, Yuzhi, and Shengdong Zhang. "Fully Inkjet-Printed Short-Channel Metal-Oxide Thin-Film Transistors Based on Semitransparent ITO/Au Source/Drain Electrodes." Coatings 10, no. 10 (September 30, 2020): 942. http://dx.doi.org/10.3390/coatings10100942.

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In this work, short-channel semitransparent indium-tin-oxide (ITO)/Au electrode pairs were fabricated via inkjet printing and lift-off technology. The printed hydrophobic coffee stripes not only define the channel length of ITO/Au electrode pairs, but also help the realization of uniform short-channel In0.95Ga0.05Ox thin-film transistors (TFTs). The patterned semitransparent ITO/Au films, with the assistance of inkjet printing, exhibit an excellent conductivity compared to that of printed ITO films, and the short-channel In0.95Ga0.05Ox TFTs based on the semitransparent ITO/Au source/drain electrodes exhibit a maximum mobility of 2.9 cm2 V−1 s−1. This work proposes a method to prepare patterned high-conductive electrodes for TFTs with the assistance of inkjet printing.
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3

Scheideler, William J., and Vivek Subramanian. "How to print high-mobility metal oxide transistors—Recent advances in ink design, processing, and device engineering." Applied Physics Letters 121, no. 22 (November 28, 2022): 220502. http://dx.doi.org/10.1063/5.0125055.

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High-throughput printing-based fabrication has emerged as a key enabler of flexible electronics given its unique capability for low-cost integration of circuits based on printed thin film transistors (TFTs). Research in printing inorganic metal oxides has revealed the potential for fabricating oxide TFTs with an unmatched combination of high electron mobility and optical transparency. Here, we highlight recent developments in ink chemistry, printing physics, and material design for high-mobility metal oxide transistors. We consider ongoing challenges for this field that include lowering process temperatures, achieving high speed and high resolution printing, and balancing device performance with the need for high mechanical flexibility. Finally, we provide a roadmap for overcoming these challenges with emerging synthetic strategies for fabricating 2D oxides and complementary TFT circuits for flexible electronics.
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4

Choi, Seungbeom, Kyung-Tae Kim, Sung Park, and Yong-Hoon Kim. "High-Mobility Inkjet-Printed Indium-Gallium-Zinc-Oxide Thin-Film Transistors Using Sr-Doped Al2O3 Gate Dielectric." Materials 12, no. 6 (March 13, 2019): 852. http://dx.doi.org/10.3390/ma12060852.

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In this paper, we demonstrate high-mobility inkjet-printed indium-gallium-zinc-oxide (IGZO) thin-film transistors (TFTs) using a solution-processed Sr-doped Al2O3 (SAO) gate dielectric. Particularly, to enhance to the electrical properties of inkjet-printed IGZO TFTs, a linear-type printing pattern was adopted for printing the IGZO channel layer. Compared to dot array printing patterns (4 × 4 and 5 × 5 dot arrays), the linear-type pattern resulted in the formation of a relatively thin and uniform IGZO channel layer. Also, to improve the subthreshold characteristics and low-voltage operation of the device, a high-k and thin (~10 nm) SAO film was used as the gate dielectric layer. Compared to the devices with SiO2 gate dielectric, the inkjet-printed IGZO TFTs with SAO gate dielectric exhibited substantially high field-effect mobility (30.7 cm2/Vs). Moreover, the subthreshold slope and total trap density of states were also significantly reduced to 0.14 V/decade and 8.4 × 1011/cm2·eV, respectively.
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5

Choi, Woon-Seop. "Preparation of Li-Doped Indium-Zinc Oxide Thin-Film Transistor at Relatively Low Temperature Using Inkjet Printing Technology." Korean Journal of Metals and Materials 59, no. 5 (May 5, 2021): 314–20. http://dx.doi.org/10.3365/kjmm.2021.59.5.314.

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Inkjet printing is a very attractive technology for printed electronics and a potential alternative to current high cost and multi-chemical lithography processes, for display and other applications in the electronics field. Inkjet technology can be employed to fabricate organic light emitting diodes (OLED), quantum dots displays, and thin-film transistors (TFTs). Among potential applications, metal oxide TFTs, which have good properties and moderate processing methods, could be prepared using inkjet printing in the display industry. One effective method of improving their electrical properties is via doping. Lithium doping an oxide TFT is a very delicate process, and difficult to get good results. In this study, lithium was added to indium-zinc oxide (IZO) for inkjet printing to make oxide TFTs. Electrical properties, transfer and output curves, were achieved using inkjet printing even at the relatively low annealing temperature of 200 oC. After optimizing the inkjet process parameters, a 0.01 M Li-doped IZO TFT at 400 oC showed a mobility of 9.08 ± 0.7 cm2/V s, a sub-threshold slope of 0.62 V/dec, a threshold voltage of 2.66 V, and an on-to-off current ratio of 2.83 × 108. Improved bias stability and hysteresis behavior of the inkjet-printed IZO TFT were also achieved by lithium doping.
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6

Lee, S. H., Y. J. Kwack, J. S. Lee, and W. S. Choi. "Inkjet-Printed Oxide TFTs with Solution-Processed Dual Semiconductors." ECS Transactions 75, no. 10 (September 23, 2016): 127–31. http://dx.doi.org/10.1149/07510.0127ecst.

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7

Ye, Heqing, Hyeok-Jin Kwon, Xiaowu Tang, Dong Yun Lee, Sooji Nam, and Se Hyun Kim. "Direct Patterned Zinc-Tin-Oxide for Solution-Processed Thin-Film Transistors and Complementary Inverter through Electrohydrodynamic Jet Printing." Nanomaterials 10, no. 7 (July 3, 2020): 1304. http://dx.doi.org/10.3390/nano10071304.

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The solution-processed deposition of metal-oxide semiconducting materials enables the fabrication of large-area and low-cost electronic devices by using printing technologies. Additionally, the simple patterning process of these types of materials become an important issue, as it can simplify the cost and process of fabricating electronics such as thin-film transistors (TFTs). In this study, using the electrohydrodynamic (EHD) jet printing technique, we fabricated directly patterned zinc-tin-oxide (ZTO) semiconductors as the active layers of TFTs. The straight lines of ZTO semiconductors were successfully drawn using a highly soluble and homogeneous solution that comprises zinc acrylate and tin-chloride precursors. Besides, we found the optimum condition for the fabrication of ZTO oxide layers by analyzing the thermal effect in processing. Using the optimized condition, the resulting devices exhibited satisfactory TFT characteristics with conventional electrodes and conducting materials. Furthermore, these metal-oxide TFTs were successfully applied to complementary inverter with conventional p-type organic semiconductor-based TFT, showing high quality of voltage transfer characteristics. Thus, these printed ZTO TFT results demonstrated that solution processable metal-oxide transistors are promising for the realization of a more sustainable and printable next-generation industrial technology.
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8

Chang, Yeoungjin, Ravindra Naik Bukke, Jinbaek Bae, and Jin Jang. "Low-Temperature Solution-Processed HfZrO Gate Insulator for High-Performance of Flexible LaZnO Thin-Film Transistor." Nanomaterials 13, no. 17 (August 25, 2023): 2410. http://dx.doi.org/10.3390/nano13172410.

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Metal-oxide-semiconductor (MOS)-based thin-film transistors (TFTs) are gaining significant attention in the field of flexible electronics due to their desirable electrical properties, such as high field-effect mobility (μFE), lower IOFF, and excellent stability under bias stress. TFTs have widespread applications, such as printed electronics, flexible displays, smart cards, image sensors, virtual reality (VR) and augmented reality (AR), and the Internet of Things (IoT) devices. In this study, we approach using a low-temperature solution-processed hafnium zirconium oxide (HfZrOx) gate insulator (GI) to improve the performance of lanthanum zinc oxide (LaZnO) TFTs. For the optimization of HfZrO GI, HfZrO films were annealed at 200, 250, and 300 °C. The optimized HfZrO-250 °C GI-based LaZnO TFT shows the μFE of 19.06 cm2V−1s−1, threshold voltage (VTH) of 1.98 V, hysteresis voltage (VH) of 0 V, subthreshold swing (SS) of 256 mV/dec, and ION/IOFF of ~108. The flexible LaZnO TFT with HfZrO-250 °C GI exhibits negligible ΔVTH of 0.25 V under positive-bias-temperature stress (PBTS). The flexible hysteresis-free LaZnO TFTs with HfZrO-250 °C can be widely used for flexible electronics. These enhancements were attributed to the smooth surface morphology and reduced defect density achieved with the HfZrO gate insulator. Therefore, the HfZrO/LaZnO approach holds great promise for next-generation MOS TFTs for flexible electronics.
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9

Lee, Yong Gu, and Woon-Seop Choi. "Electrohydrodynamic Jet-Printed Zinc–Tin Oxide TFTs and Their Bias Stability." ACS Applied Materials & Interfaces 6, no. 14 (July 15, 2014): 11167–72. http://dx.doi.org/10.1021/am5009826.

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10

Chandra, Aditi, Mao Takashima, and Arvind Kamath. "Silicon and Dopant Ink-Based CMOS TFTs on Flexible Steel Foils." MRS Advances 2, no. 23 (2017): 1259–65. http://dx.doi.org/10.1557/adv.2017.227.

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ABSTRACTPolysilicon complementary metal oxide semiconductor (CMOS) thin film transistors (TFTs) are fabricated on large area, flexible stainless steel foils using novel ink depositions within a hybrid printed/conventional process flow. A self-aligned top gate TFT structure is realized with an additive materials approach to substitute the use of high capital cost ion implantation and lithography processes. Polyhydrosilane-based silicon ink is coated and laser crystallized to form the polysilicon channel. Semiconductor grade P-type and N-type unique dopant ink formulations are screen printed and combined with thermal drive in and activation to form self-aligned doped source and drain regions. A high refractory top gate material is chosen for its process compatibility with printed dopants, chemical resistance, and work function. Steel foil substrates are fully encapsulated to allow for high temperature processing. The resultant materials set and process flow enables TFT electrical characteristics with NMOS and PMOS mobilities exceeding 120 cm2/Vs and 60 cm2/Vs, respectively. On/Off ratios are >107. Reproducibility, uniformity, and reliability data in a production environmental is shown to demonstrate high volume, high throughput manufacturability. The device characteristics and scheme enable NFC (13.56MHz) capable circuits for use in flexible NFC and display-based smart labels and packaging.
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11

Jang, Hye-Ryun, Young-Jin Kwack, and Woon-Seop Choi. "Inkjet-printed zinc-tin-oxide TFTs with a solution-processed hybrid dielectric layer." Journal of the Korean Physical Society 65, no. 9 (November 2014): 1435–40. http://dx.doi.org/10.3938/jkps.65.1435.

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12

Hamlin, Andrew Bradford, Youxiong Ye, Julia Elizabeth Huddy, and William Joseph Scheideler. "Modulation Doped 2D InOx/GaOx Heterostructure Tfts Via Liquid Metal Printing." ECS Meeting Abstracts MA2022-01, no. 31 (July 7, 2022): 1326. http://dx.doi.org/10.1149/ma2022-01311326mtgabs.

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Indium gallium zinc oxide (IGZO) and similar wide bandgap metal oxides are among the most widely used channel materials for drive transistors in displays due to their excellent electronic mobility and their ultra-high transparency1. However, industry-standard processing involves expensive vacuum deposition and elevated activation temperatures to produce semiconducting thin films. Liquid metal printing (LMP) is an emerging technique for oxide semiconductor fabrication poised to overcome these drawbacks via scalable vacuum-free transfer of the native oxide layers formed by spontaneous surface oxidation of molten metals2–4. Heterostructures of these 1-4 nm 2D oxide layers provide unprecedented opportunities for engineering electrostatic control of multilayers in thin film transistors, leading to improved mobility, Ion/Ioff ratios, and faster switching capabilities. Likewise, the backchannel is of high importance to these devices, as selection of an appropriate capping layer can enhance performance via remote doping while also mitigating bias stress effects. Herein, we compare the results of heterostructure InOx/GaOx with pure InOx TFTs, which demonstrates the mobility enhancement provided by GaOx modulation doping. Bottom gate thin film transistors (TFTs) (Figures 1a and 1b) were fabricated on Si substrates with 100 nm of thermally grown SiO2. 4 nm thick InOx and GaOx were deposited at 240 ˚C and 180 ˚C, respectively, using a linear printing speed of 8 cm/s. InOx and GaOx were printed in less than 10 s, with no post annealing necessary. Figure 1c illustrates the proposed mechanism for electron donation from GaOx at the heterointerface with InOx. The conduction band offset between these materials results in band bending at the interface and an increased carrier concentration in the InOx layer. The substoichiometric, defective GaOx is expected to further enhance this effect. Figure 1d demonstrates the transfer characteristics of heterostructure InOx/GaOx in comparison with pure InOx. The improved mobility for the heterostructure (7.8 cm2/Vs) vs pure InOx (3.8 cm2/Vs) channels can be attributed to modulation doping provided by GaOx and can be analyzed by extracting the electronic density of states (eDOS). These results illustrate a unique capability of LMP, which is to engineer the electronic structure of highly conductive 2D oxides while maintaining electrostatic control. This work also investigates the material properties of these 2D oxide heterostructures by UV-vis, XRD and XPS characterization. UV-Vis analysis revealed that the GaOx capping layer induces band gap widening and enhanced transparency, which can be explained by the Burstein-Moss effect from modulation doping. Unique to this LMP process is also the low temperature crystallization of the InOx films. XRD showed that even with low deposition temperatures (200 – 240 ˚C), these InOx films are highly crystalline with grain sizes substantially larger than the film thickness. Finally, XPS analysis of the O1s peak was utilized to understand the stoichiometry and interactions between the InOx and GaOx layers. This work demonstrates an effective pathway to enhance electronic transport in semiconducting metal oxides through liquid metal printed 2D heterostructures. The ultrathin films produced by LMP are well suited for thin film devices requiring nm-scale electrostatic control for effective gating. Combining this 2D nature of LMP InOx with a 2D GaOx backchannel capping layer is shown to yield high-performance printed transistors. This approach demonstrates a rapid, open-air compatible and low temperature manufacturing method, elucidating the broad impact of this technology in display fabrication, low-cost and flexible electronics. H. Hosono, Nat Electron, 1, 428–428 (2018). K. A. Messalea et al., ACS Nano, 15, 16067–16075 (2021). R. S. Datta et al., Nat Electron, 3, 51–58 (2020). A. Jannat et al., ACS Nano, 15, 4045–4053 (2021). A. Goff et al., Dalton Transactions, 50, 7513–7526 (2021). C.-H. Choi, Y.-W. Su, L.-Y. Lin, C.-C. Cheng, and C. Chang, RSC Advances, 5, 93779–93785 (2015). Figure 1
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13

Sykora, Benedikt, Di Wang, and Heinz von Seggern. "Multiple ink-jet printed zinc tin oxide layers with improved TFT performance." Applied Physics Letters 109, no. 3 (July 18, 2016): 033501. http://dx.doi.org/10.1063/1.4958701.

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14

Choi, Woon-Seop, and Yoonsu Kim. "Inkjet-printed ZTO TFT with a combustion-processed aluminum oxide (Al2O3) gate dielectric." Molecular Crystals and Liquid Crystals 679, no. 1 (January 22, 2019): 111–18. http://dx.doi.org/10.1080/15421406.2019.1597554.

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15

Liang, Kun, Dingwei Li, Huihui Ren, Momo Zhao, Hong Wang, Mengfan Ding, Guangwei Xu, et al. "Fully Printed High-Performance n-Type Metal Oxide Thin-Film Transistors Utilizing Coffee-Ring Effect." Nano-Micro Letters 13, no. 1 (August 3, 2021). http://dx.doi.org/10.1007/s40820-021-00694-4.

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AbstractMetal oxide thin-films transistors (TFTs) produced from solution-based printing techniques can lead to large-area electronics with low cost. However, the performance of current printed devices is inferior to those from vacuum-based methods due to poor film uniformity induced by the “coffee-ring” effect. Here, we report a novel approach to print high-performance indium tin oxide (ITO)-based TFTs and logic inverters by taking advantage of such notorious effect. ITO has high electrical conductivity and is generally used as an electrode material. However, by reducing the film thickness down to nanometers scale, the carrier concentration of ITO can be effectively reduced to enable new applications as active channels in transistors. The ultrathin (~10-nm-thick) ITO film in the center of the coffee-ring worked as semiconducting channels, while the thick ITO ridges (>18-nm-thick) served as the contact electrodes. The fully inkjet-printed ITO TFTs exhibited a high saturation mobility of 34.9 cm2 V−1 s−1 and a low subthreshold swing of 105 mV dec−1. In addition, the devices exhibited excellent electrical stability under positive bias illumination stress (PBIS, ΔVth = 0.31 V) and negative bias illuminaiton stress (NBIS, ΔVth = −0.29 V) after 10,000 s voltage bias tests. More remarkably, fully printed n-type metal–oxide–semiconductor (NMOS) inverter based on ITO TFTs exhibited an extremely high gain of 181 at a low-supply voltage of 3 V, promising for advanced electronics applications.
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16

Liu, Fei, Asko Matti Sneck, Ari T. Alastalo, and Jaakko H. Leppaniemi. "Oxide TFTs with S/D-contacts patterned by high-resolution reverse-offset printed resist layers." Flexible and Printed Electronics, February 27, 2023. http://dx.doi.org/10.1088/2058-8585/acbf65.

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Abstract Besides the metal oxide thin-film transistors (TFTs) in flat-panel displays that are fabricated using vacuum-processes, there is a growing interest in the fabrication of metal oxide TFTs by means of scalable, low-cost solution and printing processes for applications such as flexible displays and biosensors. Although devices with printed semiconductor and gate insulator can exhibit good electrical performance, source/drain-contacts (S/D) printed from silver (Ag) nanoparticles (NPs) typically suffer from deteriorated electrical characteristics and stability problems. On the other hand, metals providing good contacts, such as aluminum (Al), titanium (Ti) and molybdenum (Mo), cannot be formed as air-stable NPs. To overcome these issues, we have developed a patterning method based on high-resolution reverse-offset printing (ROP) of a sacrificial polymer resist layer. ROP delivers patterns with micrometer-level resolution and steep sidewalls, which are ideal for patterning vacuum-deposited metal contacts at high resolution via lift-off process. Solution-processed indium oxide (In2O3) TFTs were successfully fabricated by using ROP lift-off process for patterning of gate and S/D-electrodes using Al. The fabricated In2O3-based TFTs with Al S/D-contacts exhibit good uniformity, constant mobility (μsat) ~ 2 cm2/(Vs) over a wide range of width/length-ratios (W/L) and almost zero turn-on voltage (Von) ~ -0.2 V. TFTs down to 5 µm channel lengths were successfully patterned. Further development of the fabrication process could lead to flexible fully-print-patterned high-resolution TFT backplanes for flexible displays, biosensors, photosensors and X-ray detectors.
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17

"Inkjet-Printed Oxide TFTs with Solution-Processed Dual Semiconductors." ECS Meeting Abstracts, 2016. http://dx.doi.org/10.1149/ma2016-02/33/2170.

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18

Park, Sung Kyu, Jeong In Han, Dae Gyu Moon, Won Keun Kim, and Yong Hoon Kim. "High Performance Polymer Thin Film Transistors Array Printed on a Flexible Polycarbonate Substrate." MRS Proceedings 736 (2002). http://dx.doi.org/10.1557/proc-736-d7.3.

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ABSTRACTHigh performance poly (3-hexylthiophene) (P3HT) thin film transistors (TFTs) array was fabricated on a polycarbonate substrate by micro-contact printing method. A thin polyimide layer (40 nm) was applied before silicon oxide deposition to improve the electrical properties of the TFT device. Also, the effects of O2 plasma treatment on the field effect mobility and output current behaviors of the devices were investigated. By plasma treatment, the surface roughness of gate dielectric was improved which accounts for the increased field effect mobility and the hole Schottky barrier height in electrode/semiconductor interface was lowered resulting in large drain current in the device. Based on the experiments, we fabricated P3HT TFTs array with 0.025 cm2/V·s in saturation field effect mobility and on/off current ratio of 103 ∼ 104 on a polycarbonate substrate.
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19

Devabharathi, Nehru, Jyoti Ranjan Pradhan, Sushree Sangita Priyadarsini, Torsten Brezesinski, and Subho Dasgupta. "Inkjet‐Printed Narrow‐Channel Mesoporous Oxide‐Based n‐Type TFTs and All‐Oxide CMOS Electronics." Advanced Materials Interfaces, August 9, 2022, 2200949. http://dx.doi.org/10.1002/admi.202200949.

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20

Liang, Kelly, Xin Xu, Yuchen Zhou, Xiao Wang, Calla M. McCulley, Liang Wang, Jaydeep Kulkarni, and Ananth Dodabalapur. "Nanospike electrodes and charge nanoribbons: A new design for nanoscale thin-film transistors." Science Advances 8, no. 4 (January 28, 2022). http://dx.doi.org/10.1126/sciadv.abm1154.

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To scale down thin-film transistor (TFT) channel lengths for accessing higher levels of speed and performance, a redesign of the basic device structure is necessary. With nanospike-shaped electrodes, field-emission effects can be used to assist charge injection from the electrodes in sub–200-nm channel length amorphous oxide and organic TFTs. These designs result in the formation of charge nanoribbons at low gate biases that greatly improve subthreshold and turn-off characteristics. A design paradigm in which the gate electric field can be less than the source-drain field is proposed and demonstrated. By combining small channel lengths and thick gate dielectrics, this approach is also shown to be a promising solution for boosting TFT performance through charge focusing and charge nanoribbon formation in flexible/printed electronics applications.
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