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Journal articles on the topic 'Poly-Si'

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Author: Grafiati

Published: 4 June 2021

Last updated: 19 February 2022

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1

Geng, X. H., J. M. Xue, H. C. Ge, H. B. Li, Z. P. Wang, Q. Z. Wang, and H. Z. Ren. "Modeling of a-Si/poly-Si and a-Si/poly-Si/poly-Si stacked solar cells." Solar Energy Materials and Solar Cells 75, no. 3-4 (February 2003): 489–95. http://dx.doi.org/10.1016/s0927-0248(02)00200-3.

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2

Chao, T. S., C. L. Lee, and T. F. Lei. "Thickness determination of poly-Si/poly-oxide/poly-Si/SiO2/Si structure by ellipsometer." Electronics Letters 29, no. 13 (1993): 1157. http://dx.doi.org/10.1049/el:19930774.

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3

Chao, T. S., C. L. Lee, T. F. Lei, and Y. T. Yen. "Poly-oxide/poly-Si/SiO2/Si structure for ellipsometry measurement." Electronics Letters 28, no. 12 (1992): 1144. http://dx.doi.org/10.1049/el:19920722.

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4

Kee-Chan Park, Kwon-Young Choi, Juhn-Suk Yoo, and Min-Koo Han. "A new poly-Si thin-film transistor with poly-Si/a-Si double active layer." IEEE Electron Device Letters 21, no. 10 (October 2000): 488–90. http://dx.doi.org/10.1109/55.870610.

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5

Min, Byung-Hyuk, Cheol-Min Park, Juhn-Suk Yoo, and Min-Koo Han. "A new poly-Si TFT to improve surface roughness at poly-oxide/poly-Si interface." Physica Scripta T69 (January 1, 1997): 229–32. http://dx.doi.org/10.1088/0031-8949/1997/t69/047.

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6

Maksimov, S. K. "HREM investigations of Si/SiO2/poly-si compositions." Proceedings, annual meeting, Electron Microscopy Society of America 48, no. 4 (August 1990): 580–81. http://dx.doi.org/10.1017/s0424820100176034.

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Application of poly-silicon conductive films in integrated circuits promises a number of advantages. In poly-Si technology, however, there are many unsolved problems. In particular, the cause of anomalously high current gains (β) observed by many authors is now being discussed. For their explanation two hypotheses are mostly put forward: according to the first the effect is accounted for by tunneling carriers through the boundary layer of SiO2. according to the second - it is associated with clustering the impurites at the interface. The present paper is an attempt to explain the effect by investigating the structure of the interfaces in Si/SiO2/poly-Si compositions.Layers of poly-Si 0.3μm thick were deposited at 620° on the Si (001) surface prepared by various ways: by etching in HF:H2O/(1:50).using a natural oxide or thermal oxide layers of different thickneses. Then Part of samples was doped with As+ ions with energy of 75 keV at dose 1×1016 cm-2 . The samples were annealed at 850° C during 1 hour; part of them were subjected to a repeat annealing during 30 min at 1000°C.

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7

Boehringer, M., J. E. Pillion, V. Erdmann, M. Rygula, K. Winz, P. Brauchle, D. Aquino, et al. "Effect of Copper on the Breakthrough Voltage of Poly-Si - Poly-Si Capacitors." Solid State Phenomena 76-77 (January 2001): 279–82. http://dx.doi.org/10.4028/www.scientific.net/ssp.76-77.279.

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8

Chang, C. Y., Y. D. Wang, F. C. Tzeng, C. T. Chen, and S. J. Wang. "An isolated Al-poly Si-(p)Si-(n+)Si switching device." Solid-State Electronics 29, no. 7 (July 1986): 735–37. http://dx.doi.org/10.1016/0038-1101(86)90159-0.

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9

Lin, Horng-Chih. "Poly-Si Nanowire Device Technology." Nanoscience &Nanotechnology-Asia 1, no. 2 (December 1, 2011): 109–22. http://dx.doi.org/10.2174/2210681211101020109.

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10

Lin, Horng-Chih. "Poly-Si Nanowire Device Technology." Nanoscience & Nanotechnology-Asiae 1, no. 2 (December 1, 2011): 109–22. http://dx.doi.org/10.2174/2210682011101020109.

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11

Ayres, J. R., S. D. Brotherton, I. R. Clarence, and P. J. Dobson. "Photocurrents in poly-Si TFTs." IEE Proceedings - Circuits, Devices and Systems 141, no. 1 (1994): 27. http://dx.doi.org/10.1049/ip-cds:19949952.

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12

Kim, I. G., H. H. Lee, D. H. Kim, W. Y. Park, B. H. Min, J. H. Souk, and B. H. Jung. "53.3: Multisync Poly-Si AMLCD." SID Symposium Digest of Technical Papers 31, no. 1 (2000): 1199. http://dx.doi.org/10.1889/1.1832879.

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13

Won, Sunghwan. "Poly Si TFT on Microsheet." ECS Transactions 25, no. 3 (December 17, 2019): 255–58. http://dx.doi.org/10.1149/1.3204413.

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14

Brotherton, SD, DJ McCulloch, JP Gowers, and A. Gill. "Laser crystallised poly-Si TFTs." Microelectronic Engineering 19, no. 1-4 (September 1992): 101–4. http://dx.doi.org/10.1016/0167-9317(92)90401-c.

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15

Gudmundsson, V., P.-E. Hellström, S.-L. Zhang, and M. Östling. "Direct measurement of sidewall roughness on Si, poly-Si and poly-SiGe by AFM." Journal of Physics: Conference Series 100, no. 6 (March 1, 2008): 062021. http://dx.doi.org/10.1088/1742-6596/100/6/062021.

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16

Horiuchi, Toshikazu, Wen Ma, Chin Chou Lim, Masashi Yoshimi, Kiminori Hattori, Chitose Sada, Hiroaki Okamoto, and Yoshihiro Hamakawa. "High Efficiency a-Si//poly-Si Tandem Solar Cell." IEEJ Transactions on Power and Energy 113, no. 9 (1993): 1046–52. http://dx.doi.org/10.1541/ieejpes1990.113.9_1046.

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17

Horiuchi, Toshikazu, Wen Ma, C. C. Lim, Masashi Yoshimi, Kiminori Hattori, Chitose Sada, Hiroaki Okamoto, and Yoshihiro Hamakawa. "High efficiency a-Si//poly-Si tandem solar cell." Electrical Engineering in Japan 114, no. 5 (1994): 75–81. http://dx.doi.org/10.1002/eej.4391140509.

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18

Park, Taegun, and Sangwoo Lim. "Reaction Kinetics of Poly-Si Etching in TMAH Solution." Solid State Phenomena 314 (February 2021): 60–65. http://dx.doi.org/10.4028/www.scientific.net/ssp.314.60.

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Tetramethylammonium hydroxide (TMAH) is a metal-free strong alkaline solution which can etch poly-Si. The concentration of dissolved gas as well as the concentration of TMAH affects etching rate of poly-Si. The detailed kinetics of poly-Si etching in TMAH solution is investigated in this study. The effect of water and TMAH concentration on the etching kinetics of poly-Si was investigated by using various concentrations of TMAH solution. It is found that H2O in TMAH solution plays an important role in etching poly-Si. Presence of dissolved CO2 and O2 in TMAH solution tends to inhibit etching of poly-Si. The concentration of dissolved CO2 and O2 in TMAH were reduced by Ar bubbling, thereby the poly-Si etching rate increased.

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19

Emori, Kenta, Toshiharu Marui, Yuji Saito, Wei Ni, Yasushi Nakajima, Tetsuya Hayashi, and Masakatsu Hoshi. "Novel Poly-Si/GaN Vertical Heterojunction Diode." Materials Science Forum 821-823 (June 2015): 1015–18. http://dx.doi.org/10.4028/www.scientific.net/msf.821-823.1015.

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We previously reported a unipolar mode p+-polycrystalline silicon (poly-Si)/4H-SiC heterojunction diode (SiC-HJD) [1-3]. In this work, we demonstrate a poly-Si/GaN vertical unipolar heterojunction diode (GaN-HJD) based on numerical simulation and experimental results. The GaN-HJD is expected to control the electrical characteristics of both Schottky action with a p-type poly-Si and ohmic action with an n-type poly-Si. We investigated the detailed physics of the GaN-HJD between p+Si and n+Si by numerical simulation. The GaN-HJD was also fabricated with p+-type polycrystalline silicon on an n--type epitaxial layer on bulk GaN substrates. The measured barrier height of the GaN-HJD was 0.79 eV and the ideality factor was 1.10.

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20

Byung-Hyuk Min, Cheol-Min Park, and Min-Koo Han. "Electrical characteristics of poly-Si TFT's with smooth surface roughness at oxide/poly-Si interface." IEEE Transactions on Electron Devices 44, no. 11 (1997): 2036–38. http://dx.doi.org/10.1109/16.641379.

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21

Lee, Seung Ryul, Kyung Min Ahn, and Byung Tae Ahn. "Silicon Epitaxial Growth on Poly-Si Film by HWCVD for Low-Temperature Poly-Si TFTs." Journal of The Electrochemical Society 154, no. 9 (2007): H778. http://dx.doi.org/10.1149/1.2752030.

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22

Akimoto, H., M. Hatano, and T. Sakai. "30.4: Short-Channel Effect of Sub-Micron Poly-Si TFTs with Large Poly-Si Grains." SID Symposium Digest of Technical Papers 29, no. 1 (1998): 891. http://dx.doi.org/10.1889/1.1833907.

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23

Choi, Y. J., W. K. Kwak, S. J. Park, S. Y. Yoon, C. O. Kim, and J. Jang. "A Low Temperature Poly-Si TFT with a SMC Poly-Si Crystallized at 420 °C." SID Symposium Digest of Technical Papers 30, no. 1 (1999): 508. http://dx.doi.org/10.1889/1.1834069.

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24

Maegawa, S., T. Ipposhi, S. Maeda, H. Nishimura, T. Ichiki, M. Ashida, O. Tanina, Y. Inoue, T. Nishimura, and N. Tsubouchi. "Performance and reliability improvements in poly-Si TFT's by fluorine implantation into gate poly-Si." IEEE Transactions on Electron Devices 42, no. 6 (June 1995): 1106–12. http://dx.doi.org/10.1109/16.387244.

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25

Pyo, Jeongsang, Bohae Lee, and Han-Youl Ryu. "Evaluation of Crystalline Volume Fraction of Laser-Annealed Polysilicon Thin Films Using Raman Spectroscopy and Spectroscopic Ellipsometry." Micromachines 12, no. 8 (August 22, 2021): 999. http://dx.doi.org/10.3390/mi12080999.

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We investigated the crystallinities of poly silicon (poly Si) annealed via green laser annealing (GLA) with a 532-nm pulsed laser and blue laser annealing (BLA) with 450-nm continuous-wave lasers. Three-dimensional heat transfer simulations were performed to obtain the temperature distributions in an amorphous silicon (a-Si) thin film, and GLA and BLA experiments were conducted based on the thermal simulation results. The crystallinity of annealed poly Si samples was analyzed using Raman spectroscopy and spectroscopic ellipsometry. To evaluate the degree of crystallization for the annealed samples quantitatively, the measured spectra of laser-annealed poly Si were fitted to those of crystalline Si and a-Si, and the crystal volume fraction (fc) of the annealed poly Si sample was determined. Both the Raman spectroscopy and ellipsometry showed consistent results on fc. The fc values were found to reach >85% for optimum laser power of GLA and BLA, showing good crystallinity of the laser-annealed poly Si thin films comparable to thermal furnace annealing.

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26

Kang, Seung Oh, Uk June Lee, Seung Hyun Kim, Ho Jung You, Kun Park, Sung Eun Park, and Jong Hoon Park. "Gas Nozzle Effect on the Deposition of Polysilicon by Monosilane Siemens Reactor." International Journal of Photoenergy 2012 (2012): 1–6. http://dx.doi.org/10.1155/2012/697653.

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Deposition of polysilicon (poly-Si) was tried to increase productivity of poly-Si by using two different types of gas nozzle in a monosilane Bell-jar Siemens (MS-Siemens) reactor. In a mass production of poly-Si, deposition rate and energy consumption are very important factors because they are main performance indicators of Siemens reactor and they are directly related with the production cost of poly-Si. Type A and B nozzles were used for investigating gas nozzle effect on the deposition of poly-Si in a MS-Siemens reactor. Nozzle design was analyzed by computation cluid dynamics (CFD). Deposition rate and energy consumption of poly-Si were increased when the type B nozzle was used. The highest deposition rate was 1 mm/h, and the lowest energy consumption was72 kWh⋅kg-1in this study.

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27

Parizotto, R., and H. Boudinov. "Irradiation effects of proton bombarded poly-Si/SiO2/Si structure." Nuclear Instruments and Methods in Physics Research Section B: Beam Interactions with Materials and Atoms 218 (June 2004): 362–67. http://dx.doi.org/10.1016/j.nimb.2003.12.060.

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28

Lyou, Jonghun, Kyung-Sik Yoon, Eun Kyu Kim, and Suk-Ki Min. "Structural change and photo-response in porous poly-Si/Si." Thin Solid Films 358, no. 1-2 (January 2000): 259–63. http://dx.doi.org/10.1016/s0040-6090(99)00715-4.

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29

Focsa, A., I. Gordon, G. Beaucarne, O. Tuzun, A. Slaoui, and J. Poortmans. "Heterojunction a-Si/poly-Si solar cells on mullite substrates." Thin Solid Films 516, no. 20 (August 2008): 6896–901. http://dx.doi.org/10.1016/j.tsf.2007.12.097.

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30

Lih, Jiin-Jou, Chih-Feng Sung, Chun-Huai Li, Tiao-Hung Hsiao, and Hsin-Hung Lee. "Comparison of a-Si and Poly-Si for AMOLED displays." Journal of the Society for Information Display 12, no. 4 (2004): 367. http://dx.doi.org/10.1889/1.1847734.

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31

Kwon, Kijin, Yoshinori Matsumoto, Makoto Ishida, and Sekwang Park. "Three Dimensional Polysilicon Type Accelerometer Using Poly-Si/SiO2/Si/SiO2/Si Structure." IEEJ Transactions on Sensors and Micromachines 117, no. 7 (1997): 384–90. http://dx.doi.org/10.1541/ieejsmas.117.384.

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32

Ibaraki, N. "Low Temperature Poly-Si TFT Technology." SID Symposium Digest of Technical Papers 30, no. 1 (1999): 172. http://dx.doi.org/10.1889/1.1833987.

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33

Watanabe, H. "Depletion Layer of Gate Poly-Si." IEEE Transactions on Electron Devices 52, no. 10 (October 2005): 2265–71. http://dx.doi.org/10.1109/ted.2005.856791.

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34

Shen, Haoting, Fahim Rahman, Bicky Shakya, Xiaolin Xu, Mark Tehranipoor, and Domenic Forte. "Poly-Si-Based Physical Unclonable Functions." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25, no. 11 (November 2017): 3207–17. http://dx.doi.org/10.1109/tvlsi.2017.2733531.

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35

Chung, Hoon-Ju, Seung-Woo Lee, and Chul-Hi Han. "Poly-Si TFT push-pull analogue buffer for integrated data drivers of poly-Si TFT-LCDs." Electronics Letters 37, no. 17 (2001): 1093. http://dx.doi.org/10.1049/el:20010710.

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36

Kwangsoo Choi and M. Matsumura. "Poly-Si/poly-SiC/sub x/ heterojunction thin-film transistors." IEEE Transactions on Electron Devices 45, no. 2 (1998): 401–5. http://dx.doi.org/10.1109/16.658673.

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37

Nakabayashi, N., H. Ohyama, E. Simoen, M. Ikegami, C. Claeys, K. Kobayashi, M. Yoneoka, and K. Miyahara. "Mechanical stress of the electrical performance of polycrystalline-silicon resistors." Journal of Materials Research 16, no. 9 (September 2001): 2579–82. http://dx.doi.org/10.1557/jmr.2001.0354.

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Results are presented of a study on the mechanical stress dependence of the resistance of polycrystalline silicon (Poly-Si) films doped with different atomic species. Two types of Poly-Si film implanted with boron and phosphorus ions were studied, namely, B-doped films of 400 nm and P-doped films of 250 nm thickness, which were deposited by low-pressure chemical vapor deposition at 620 °C on thermally oxidized silicon wafers. The film doping was done by ion implantation at 50 keV, with a dose of boron and phosphorus of 2 × 1014 and 5.3 × 1014 cm−2, respectively. The Poly-Si films were annealed in a N2 ambient at 1000 °C for 20 min to activate the implanted atoms. A controlled amount of external stress was applied to the silicon wafers to study the impact on the electrical performance of the implanted Poly-Si resistors. The resistance of the B-doped Poly-Si films is shown to increase by the mechanical stress, while the resistance of the P-implanted Poly-Si films remained unchanged. It is concluded that this difference is related to the structural differences between Poly-Si films implanted with boron and phosphorus, respectively.

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38

Stepina, N. P., V. V. Kirienko, A. V. Dvurechenskii, S. A. Alyamkin, V. A. Armbrister, and A. V. Nenashev. "Selective oxidation of poly-Si with embedded Ge nanocrystals in Si/SiO2/Ge(NCs)/poly-Si structure for memory device fabrication." Semiconductor Science and Technology 24, no. 2 (January 9, 2009): 025015. http://dx.doi.org/10.1088/0268-1242/24/2/025015.

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39

Muhida, Riza, Toshihiko Toyama, and Hiroaki Okamoto. "Influence of Surface Morphology of Textured Substrate against Poly-Si Thin Film Solar Cells Performance." Materials Science Forum 737 (January 2013): 105–9. http://dx.doi.org/10.4028/www.scientific.net/msf.737.105.

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Since poly-Si is an indirect band gap material and has low optical absorption coefficient in the visible-infrared region, the light trapping in thin film poly-Si layer by using textured substrate is one of the important technical issue for achievement of high short current. Surface texture of a transparent conductive oxide (TCO) layer on a glass substrate as well as SnO2 with a large grain are usually utilized for the light-trapping technique, i.e., path lengths of the incident light in the poly-Si layer are effectively enhanced by the light-scattering at the textured surface. In this paper, a systematic investigation has been carried out concerning the relationship between poly-Si thin film solar cells performance and surface morphology of substrate texture as a function of root mean square roughness of substrate surface, in order to find the optimum textured substrate and realize the light trapping in the poly-Si solar cells. Furthermore, the influence of textured substrate on optical reflectance, poly-Si microstructure and photovoltaic performance are also discussed.

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40

Kim, Hyeonjeong, Songyi Yoo, In-Man Kang, Seongjae Cho, Wookyung Sun, and Hyungsoon Shin. "Analysis of the Sensing Margin of Silicon and Poly-Si 1T-DRAM." Micromachines 11, no. 2 (February 23, 2020): 228. http://dx.doi.org/10.3390/mi11020228.

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Recently, one-transistor dynamic random-access memory (1T-DRAM) cells having a polysilicon body (poly-Si 1T-DRAM) have attracted attention as candidates to replace conventional one-transistor one-capacitor dynamic random-access memory (1T-1C DRAM). Poly-Si 1T-DRAM enables the cost-effective implementation of a silicon-on-insulator (SOI) structure and a three-dimensional (3D) stacked architecture for increasing integration density. However, studies on the transient characteristics of poly-Si 1T-DRAM are still lacking. In this paper, with TCAD simulation, we examine the differences between the memory mechanisms in poly-Si and silicon body 1T-DRAM. A silicon 1T-DRAM cell’s data state is determined by the number of holes stored in a floating body (FB), while a poly-Si 1T-DRAM cell’s state depends on the number of electrons trapped in its grain boundary (GB). This means that a poly-Si 1T-DRAM can perform memory operations by using GB as a storage region in thin body devices with a small FB area.

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41

Moser, M., L. P. Scheller, and N. H. Nickel. "Charge carrier transport in boron doped poly-Si." Canadian Journal of Physics 92, no. 7/8 (July 2014): 705–8. http://dx.doi.org/10.1139/cjp-2013-0563.

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The influence of the used substrate and the boron doping concentration of the charge-transport properties of solid-phase crystallized polycrystalline silicon (poly-Si) is explored. The samples were characterized using temperature dependent transport measurements to determine mobility, carrier concentration, and conductivity. While Arrhenius plots of the hole concentration cannot be used to determine the position of the Fermi energy, a detailed analysis of the temperature dependent carrier concentration shows a Meyer–Neldel and an anti-Meyer–Neldel rule. Charge transport in poly-Si on SiN coated Borofloat glass with a boron concentraion [B] < 1016 cm–3 is limited by phonon scattering. On the other hand, for all poly-Si samples on Corning glass and poly-Si on SiN coated Borofloat glass with [B] > 1016 cm–3 charge-carrier transport is governed by thermionic emission over potential barriers. The data are discussed in terms of the Baccarani transport model.

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42

Toko, Kaoru, Mitsuki Nakata, Atsushi Okada, Masato Sasase, Noritaka Usami, and Takashi Suemasu. "Influence of Substrate on Crystal Orientation of Large-Grained Si Thin Films Formed by Metal-Induced Crystallization." International Journal of Photoenergy 2015 (2015): 1–7. http://dx.doi.org/10.1155/2015/790242.

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Producing large-grained polycrystalline Si (poly-Si) film on glass substrates coated with conducting layers is essential for fabricating Si thin-film solar cells with high efficiency and low cost. We investigated how the choice of conducting underlayer affected the poly-Si layer formed on it by low-temperature (500°C) Al-induced crystallization (AIC). The crystal orientation of the resulting poly-Si layer strongly depended on the underlayer material: (100) was preferred for Al-doped-ZnO (AZO) and indium-tin-oxide (ITO); (111) was preferred for TiN. This result suggests Si heterogeneously nucleated on the underlayer. The average grain size of the poly-Si layer reached nearly 20 µm for the AZO and ITO samples and no less than 60 µm for the TiN sample. Thus, properly electing the underlayer material is essential in AIC and allows large-grained Si films to be formed at low temperatures with a set crystal orientation. These highly oriented Si layers with large grains appear promising for use as seed layers for Si light-absorption layers as well as for advanced functional materials.

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43

Jun, M. C., J. W. Kim, K. B. Kim, B. C. Ahn, and M. K. Han. "Improved Surface Roughness at Poly-Oxide/Poly-Si Interface by a Novel Oxidation Method." MRS Proceedings 343 (1994). http://dx.doi.org/10.1557/proc-343-505.

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ABSTRACTWe present a novel oxidation method to improve the surface roughness at the poly-oxide/poly-Si interface. Instead of directly oxidizing the poly-Si to the desired thickness of the SiO2, a thin oxide layer is thermally grown on the poly-Si layer and then an a-Si layer is deposited on the top of the oxide layer. The a-Si layer is used as a silicon-source during next step of oxidation. The a-Si layer is fully oxidized until the poly-oxide/poly-Si interface advances below the initial interface. For comparison, the poly-oxide/poly-Si interface is also obtained by the conventional oxidation method. The surface roughness at the interface is investigated using transmission electron microscopy (TEM) and atomic force microscopy (AFM). For the novel oxidation method with the 50 Å thick intermediate oxide, the rms surface roughness at the poly-oxide/poly-Si interface is 30 Å, whereas that is 120 Å for the conventional method.

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44

Sakamoto, T., H. Tokioka, S. Takanabe, T. Kubota, Y. Niwano, Y. Goto, H. Namizaki, O. Wada, and H. Kurokawa. "Structural and Electrical Characterization of Undoped Poly-Si Oxides." MRS Proceedings 358 (1994). http://dx.doi.org/10.1557/proc-358-933.

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ABSTRACTWe evaluated structural and electrical characteristics of undoped poly-Si oxide films. Poly-Si films made by solid phase crystallization at 600-900°C from undoped amorphous Si films were oxidized to form oxide layers of 140nm thickness. We observed protuberances on the surface of poly-Si layers after oxidation. Poly-Si oxide layers also generated protuberances above the protuberances of poly-Si films. The number of protuberances per unit area is larger in the case of high temperature crystallization. The measurement of current through the poly-Si oxide films shows that the conductivity of poly-Si oxide films depends on crystallization temperature of poly-Si films in the case of positive gate bias. When the gate is biased negatively, current through the poly-Si oxide films remained almost constant regardless of crystallization temperature. We find that poly-Si crystallized at lower temperatures offers poly-Si oxide films of lower leakage current in the case of electron injection from undoped poly-Si layers. The lower leakage current is due to highness of energy barrier for electron at undoped poly-Si/poly-Si oxide interface.

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45

"Poly Si TFT on Microsheet." ECS Meeting Abstracts, 2009. http://dx.doi.org/10.1149/ma2009-02/22/1985.

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46

Kim, Y. W., I. K. Kim, N. I. Lee, J. W. Ko, S. T. Ahn, M. Y. Lee, and J. G. Lee. "Effect of the Crystallographic Orientation of Underlying Poly-Si on the Thermal Stability of the TiSi2 Film." MRS Proceedings 280 (1992). http://dx.doi.org/10.1557/proc-280-599.

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ABSTRACTThe effect of the crystallographic orientation of underlying poly-Si film on the thermal stability of the TiSi2 film was studied. Different preferred orientations of the poly-Si film were obtained by annealing poly-Si or amorphous Si films at various temperatures. The TiSi2 film was formed by the solid-state reaction of the Ti film sputtered on the poly-Si film. The thermal stability of the TiSi2 film was evaluated by changes in the sheet resistance and microstructural evolution during furnace anneals. The TiSi2 film on poly-Si with the <110> preferred orientation shows more stable conductivity during high temperature anneals than with the <111> orientation. The surface energy of underlying poly-Si is expected to influence the thermal stability of the TiSi2/poly-Si structure significantly. Better thermal stability of the TiSi2 film can be obtained by the higher surface energy of underlying poly-Si.

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47

Park, Kee-Chan, In-Hyuk Song, Sang-Hoon Jung, and Min-Koo Han. "Excimer Laser Annealing Effect on MILC Polycrystalline Silicon Film." MRS Proceedings 685 (2001). http://dx.doi.org/10.1557/proc-685-d3.5.1.

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AbstractXeCl excimer laser was irradiated on metal induced laterally crystallized (MILC) polycrystalline silicon (poly-Si) film in order to eliminate the intra-grain defects of MILC poly-Si film which incorporated 2 μm wide metal induced crystallized (MIC) poly-Si line pattern. On the irradiation of the laser beams, different melt and recrystallization phenomena were observed in the MILC and the MIC poly-Si region due to the Ni content difference in each film. The transmission electron microscopy (TEM) and secondary ion mass spectrometry (SIMS) measurements indicated that the melting temperature of the poly-Si film decreased as the Ni content increased. With the laser irradiation energy density of 370 mJ/cm2, 2 μm long defect-free poly-Si grain was successfully grown in the MILC poly-Si due to the melting temperature variation at the MILC-MIC poly-Si boundary.

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48

Park, C.-M., J.-S. Yoo, B.-H. Min, and M.-K. Han. "The Poly-Si Tfts Fabricated by Novel Oxidation Method with Intermediate Oxide." MRS Proceedings 424 (1996). http://dx.doi.org/10.1557/proc-424-183.

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AbstractWe have fabricated a poly-Si TFT using a novel oxidation method, which improves the surface roughness at the interface between the poly-Si layer and the gate oxide layer. Compared with the poly-Si TFTs fabricated by the conventional oxidation method, the proposed poly-Si TFT exhibits the remarkable enhancement of the electrical parameters, such as the subthreshold swing and the threshold voltage. It is observed that the proposed poly-Si TFT has a higher dielectric strength and the device characteristics are not degraded significantly after an electrical stress. The improvement of the surface roughness at oxide/poly-Si interface is found to be critical to enhance the device performance.

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49

Chen, Shih-Chang, Akihiro Sakamoto, Hiroyuki Tamura, Masaki Yoshimaru, and Masayoshi Ino. "The Effect of Amorphous Silicon Layer in Pe-Cvd Titanium Polycide Gate Dielectrics." MRS Proceedings 181 (1990). http://dx.doi.org/10.1557/proc-181-179.

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ABSTRACTTitanium silicide (TiSix), used as polycide gate consists of TiSi1.1 and amorphous silicon (a-Si), was deposited by Plasma Enhanced Chemical Vapor Deposition method (PE-CVD). The effect of a-Si layer in PE-CVD Ti polycide gate dielectrics has been studied. In order to evaluate the a-Si layer effect, three types of samples were prepared on gate SiO2 film with following structures : a) a-Si / TiSi-1.1 / a-Si / phosphorus (P) doped poly-Si, b) a-Si / TiSi-1.1 / non-doped poly-Si / P doped poly-Si and c) a-Si / TiSi1.1 / P doped poly-Si, respectively. Furthermore, in order to avoid the influence of native oxide existence at the interface, the pre-cleaning treatment was performed in-situ on the poly-Si film surface before TiSi1.1 film deposition. The gate dielectric strengths of these samples indicate that the gate dielectric degradation in PE-CVD Ti polycide gate is greatly dependent on Si under layer crystallization. It is effective using a-Si film as the under layer in decreasing the gate dielectric degradation . This is due to the Ti oxide interlayer, formed at the interface of TiSi2.0 and poly-Si films, which restrains the TiSix local penetration.

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50

Chen, Shih-Chang, Akihiro Sakamoto, Hiroyuki Tamura, Masaki Yoshimaru, and Masayoshi Ino. "The Effect of Amorphous Silicon Layer in PE-CVD Titanium Polycide Gate Dielectrics." MRS Proceedings 182 (1990). http://dx.doi.org/10.1557/proc-182-77.

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AbstractTitanium silicide (TiSix), used as polycide gate consists of TiSi1.1 and amorphous silicon (a—Si), was deposited by Plasma Enhanced Chemical Vapor Deposition method (PE—CVD). The effect of a—Si layer in PE—CVD Ti polycide gate dielectrics has been studied. In order to evaluate the a—Si layer effect, three types of samples were prepared on gate SiO2 film with following structures: a) a—Si / TiSil.1 / a—Si / phosphorus (P) doped poly—Si, b) a—Si / TiSi1.1 / non—doped poly—Si / P doped poly—Si and c) a—Si / TiSi1.1 / P doped poly—Si, respectively. Furthermore, in order to avoid the influence of native oxide existence at the interface, the pre—cleaning treatment was performed in—situ on the poly—Si film surface before TiSi1.1 film deposition. The gate dielectric strengths of these samples indicate that the gate dielectric degradation in PE—CVD Ti polycide gate is greatly dependent on Si under layer crystallization. It is effective using a—Si film as the under layer in decreasing the gate dielectric degradation. This is due to the Ti oxide interlayer, formed at the interface of TiSi2.0 and poly—Si films, whichrestrains the TiSix local penetration.

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