Dissertations / Theses on the topic 'Peripheral Circuits'
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Qi, Feng. "Peripheral Circuits Study for High Temperature Inverters Using SiC MOSFETs." The Ohio State University, 2016. http://rave.ohiolink.edu/etdc/view?acc_num=osu1460991531.
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Gulersen, Elvira. "5-V only zener based flash E²PROM architecture and peripheral circuits." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1995. http://www.collectionscanada.ca/obj/s4/f2/dsk3/ftp04/MQ51534.pdf.
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Horstman, Gabrielle Marie. "Limitations of Functional Recovery of Stretch Reflex Circuitry After Peripheral Nerve Regeneration." Wright State University / OhioLINK, 2012. http://rave.ohiolink.edu/etdc/view?acc_num=wright1347852976.
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Rachamadugu, Arun. "Digital implementation of high speed pulse shaping filters and address based serial peripheral interface design." Thesis, Atlanta, Ga. : Georgia Institute of Technology, 2008. http://hdl.handle.net/1853/26603.
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Thesis (M. S.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2009.Committee Chair: Laskar, Joy; Committee Member: Anderson, David; Committee Member: Cressler, John. Part of the SMARTech Electronic Thesis and Dissertation Collection.
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Levi, Meir H. "Intelligent reflexive interfaces and their applications." Thesis, McGill University, 1985. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=65931.
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Gasquez, Julien. "Conception de véhicules de tests pour l’étude de mémoires non-volatiles émergentes embarquées." Electronic Thesis or Diss., Aix-Marseille, 2022. http://www.theses.fr/2022AIXM0419.
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La mémoire à changement de phase (PCM) s’inscrit dans la stratégie de développement de mémoires non-volatiles embarquées sur les nœuds technologiques avancés (sub 28nm). En effet, la mémoire Flash-NOR devient de plus en plus onéreuse à intégrer dans les technologies avec des diélectriques à forte permittivité et des grilles métalliques. Cette thèse a donc pour objectif principal de réaliser des véhicules de tests afin d’étudier un point mémoire novateur PCM + OTS et de proposer des solutions afin de combler ses lacunes et ses limites suivant les applications envisagées. L’étude a pour support deux technologies différentes le HCMOS9A et le P28FDSOI. La première sert de support pour le développement d’un véhicule de validation technologique du point mémoire OTS+PCM. La deuxième est, quant à elle, utilisée pour démontrer la surface obtenu avec un dimensionnement agressif du point mémoire. Enfin, un circuit de lecture optimisé pour ce point mémoire a été réalisé permettant la compensation des courants de fuites ainsi que la régulation des tensions de polarisations de la matrice au cours de la lecturePhase change memory (PCM) is part of the strategy to develop non-volatiles memories embedded in advanced technology nodes (sub 28nm). Indeed, Flash-NOR memory is becoming more and more expensive to integrate in technologies with high permittivity dielectrics and metallic gates. The main objective of this thesis is therefore to realize tests vehicles in order to study an innovative PCM + OTS memory point and to propose solutions to fill its gaps and limitations according to the envisaged applications. The study is based on two different technologies: HCMOS9A and P28FDSOI. The first one is used as support for the development of a technological validation vehicle of the OTS+PCM memory point. The second one is used to demonstrate the surface obtained with an aggressive sizing of the memory point. Finally, an optimized readout circuit for this memory point has been realized allowing the compensation of leakage currents as well as the regulation of the bias voltages of the matrix during the reading
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Bullinger, Katie Leigh. "Cellular Function of the Ia-motoneuron Circuit Following Peripheral Nerve Regeneration." Wright State University / OhioLINK, 2009. http://rave.ohiolink.edu/etdc/view?acc_num=wright1247152864.
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Giguere, Christian. "Speech processing using a wave digital filter model of the auditory periphery." Thesis, University of Cambridge, 1993. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.309156.
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Söllner, Heidi [Verfasser], Wolfgang Akademischer Betreuer] Wurst, and Magdalena [Akademischer Betreuer] [Götz. "Developmental wiring and adaptive plasticity of peripheral sensorimotor circuitry / Heidi Söllner. Gutachter: Wolfgang Wurst ; Magdalena Götz. Betreuer: Wolfgang Wurst." München : Universitätsbibliothek der TU München, 2012. http://d-nb.info/1037198298/34.
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Rombach, Michaela Puck. "Colouring, centrality and core-periphery structure in graphs." Thesis, University of Oxford, 2013. http://ora.ox.ac.uk/objects/uuid:7326ecc6-a447-474f-a03b-6ec244831ad4.
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Krivelevich and Patkós conjectured in 2009 that χ(G(n, p)) ∼ χ=(G(n, p)) ∼ χ∗=(G(n, p)) for C/n < p < 1 − ε, where ε > 0. We prove this conjecture for n−1+ε1 < p < 1 − ε2 where ε1, ε2 > 0. We investigate several measures that have been proposed to indicate centrality of nodes in networks, and find examples of networks where they fail to distinguish any of the vertices nodes from one another. We develop a new method to investigate core-periphery structure, which entails identifying densely-connected core nodes and sparsely-connected periphery nodes. Finally, we present an experiment and an analysis of empirical networks, functional human brain networks. We found that reconfiguration patterns of dynamic communities can be used to classify nodes into a stiff core, a flexible periphery, and a bulk. The separation between this stiff core and flexible periphery changes as a person learns a simple motor skill and, importantly, it is a good predictor of how successful the person is at learning the skill. This temporally defined core-periphery organisation corresponds well with the core- periphery detected by the method that we proposed earlier the static networks created by averaging over the subjects dynamic functional brain networks.
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Sorzano, Olga Lucia. "Circus between centre and periphery : the recognition of the form in 21st century Britain and Colombia." Thesis, City, University of London, 2018. http://openaccess.city.ac.uk/21141/.
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The turn of the 21st century arguably marked the point when circus gained recognition by cultural establishments in Britain and Colombia. Issues of identity and recognition were becoming central questions in the analysis of a practice regarded as marginal or lowbrow. This thesis addresses such questions by comparing circus movements in Britain and Colombia. The aim is to investigate global power structures that operate behind the current process of recognition. The analysis is conducted within the disciplines of cultural studies and circus studies. It follows mixed methods of research that include multi-sited ethnography, semi-structured interviews, textual analysis, archival research and political economy. Interviews were conducted with over 60 circus artists, arts administrators, and policy-makers; they enquire into the factors behind recognition and the distinctive character of the form. The research finds the internal peripheries of circus and a divided practice which is split into differentiated movements such as ‘traditional’, ‘contemporary’ or ‘social’ circus. While contemporary circus gains recognition as art, traditional circus is regarded as entertainment and social circus as therapy or social work. The historical review on the other hand, reveals that the 21st century is not the only period in which circus is gaining recognition. The 18th century saw the consolidation of ‘modern circus’ in Britain, the point when circus is said to emerge as a distinct genre and a performing art. The thesis brings those moments together as evidence of a cycle in which an itinerant and ambivalent practice encounters formalisation. Both periods coincide with a moment when cultural elites and official establishments embrace circus as a valid endeavour. In the process of recognition, crucial agents are often ignored and become invisible. The research contributes to understandings of circus beyond the West and the centre - more precisely, capitalism, the bourgeoisie, urban centres, expert knowledge and stakeholders. It highlights the influence that narratives found in 19th century Europe are having on contemporary developments of circus in both Britain and Colombia. It proposes that the understanding of global power forces operating behind circus transformations could help to alleviate internal disputes connected with intrinsic differences within circus. It also contributes towards a definition of cultural policies that embrace diversity and incentivise circus developments beyond central figures and models borrowed from the past.
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Becker, Sebastian [Verfasser], Herbert [Akademischer Betreuer] Hudde, and Karlheinz [Akademischer Betreuer] Ochs. "A physiology-based circuit model of the human peripheral ear revealing the mechanisms of non-linear active cochlear gain and otoacoustic emissions / Sebastian Becker. Gutachter: Herbert Hudde ; Karlheinz Ochs." Bochum : Ruhr-Universität Bochum, 2016. http://d-nb.info/1095884980/34.
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Obeidat, Ahmed Zayed. "New Insights into the Spinal Recurrent Inhibitory Pathway Normally and After Motoneuron Regeneration." Wright State University / OhioLINK, 2013. http://rave.ohiolink.edu/etdc/view?acc_num=wright1369702090.
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PEREIRA, Mariana Cavalcanti. ""O bom é a arriação!": circuitos de lazer e outras interações entre jovens de Campina Grande." Universidade Federal de Campina Grande, 2016. http://dspace.sti.ufcg.edu.br:8080/jspui/handle/riufcg/126.
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Dissertacao final.pdf: 3066398 bytes, checksum: 1e25dbf8624d3f945c3ca75b9a225177 (MD5)Made available in DSpace on 2017-11-16T14:06:45Z (GMT). No. of bitstreams: 1 Dissertacao final.pdf: 3066398 bytes, checksum: 1e25dbf8624d3f945c3ca75b9a225177 (MD5) Previous issue date: 2016-02
Esta pesquisa pretende levantar um debate acerca de experiências e práticas juvenis em uma periferia da cidade de Campina Grande, Paraíba, trazendo reflexões sobre a juventude enquanto categoria a ser compreendida etnograficamente. O principal objetivo é compreender as experiências dos jovens moradores do bairro, principalmente no que concerne às práticas de lazer. Nesse sentido, foi adotada uma perspectiva que privilegia a análise da juventude através da reflexão de categorias como circuito, pedaço e trajeto (MAGNANI, 2007) a partir da etnografia dos espaços que são ocupados e (res)significados pelos jovens. Para tanto, foi analisada as interações entre os jovens, e também o tema da periferia e os seus espaços, em suas redes de interdependência com outros grupos e outros lugares da cidade, o que nos remete aos ensinamentos de DaMatta (2003), ao considerar que muitos espaços e temporalidades convivem simultaneamente, sendo tempo (realidade) e espaço frutos de uma construção social. Assim, a cidade, enquanto rede que interpela os atores em suas múltiplas dimensões, chama-nos a compreender as transformações empregadas nos espaços previamente concebidos. Nessa pesquisa, é pontuada a relação dos jovens e o estabelecimento de sociabilidades nos espaços do Pedregal. Além disso, são destacadas algumas questões como exclusão social e classificação de periferia como elementos importantes para situar o presente trabalho.
This research aims to raise a debate about youth experiences and practices in a periphery of the city of Campina Grande, Paraíba, bringing reflections about youth as a category to be understood by an ethnographic perspective. The main objective is to understand the experiences of the young residents of the neighborhood, especially when it comes to leisure activities. In this sense, a perspective was adopted which focuses on the analysis of youth through reflection categories such as circuit piece and path (MAGNANI, 2007) from the ethnography of the spaces that are occupied and (re) meanings by the young people. For this, it analyzed the interactions among young people, and also the theme of the periphery and their spaces, their interdependence networks with other groups and other places in the city, which brings us to the teachings of Da Matta (2003), who consider that many spaces and temporalities coexist simultaneously, and time (reality) and space fruits of a social construction. Thus, the city as a network that challenges the actors in their multiple dimensions, calls us to understand the transformations used in previously designed spaces. In this research, it is punctuated the relationship of young people and the establishment of sociability in Pedregal spaces. Moreover, they highlighted some issues such as social exclusion and the outskirts of conceptualization as important elements to situate this work.
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Hedin, Alexander. "Testing and evaluation of the integratability of the Senior processor." Thesis, Linköpings universitet, Datorteknik, 2011. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-71043.
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The first version of the Senior processor was created as part of a thesis projectin 2007. This processor was completed and used for educational purposes atLinköpings University. In 2008 several parts of the processor were optimized andthe processor expanded with additional functionality as part of another thesisproject. In 2009 an EU funded project called MULTI-BASE started, in which theComputer Division at the Department of Electrical Engineering participated in.For their part of the MULTI-BASE project, the Senior processor was selected tobe used. After continuous revision and development, this processor was sent formanufacturing. The assignment of this thesis project was to test and verify the different func-tions implemted in the Senior processor. To do this a PCB was developed fortesting the Senior processor together with a Virtex-4 FPGA. Extensive testingwas done on the most important functions of the Senior processor. These testsshowed that the manufactured Senior processor works as designed and that it alonecan perform larger calculations and use external hardware accelerators with thehelp of its various interfaces.Den första versionen av Senior processorn skapades som en del i ett examensarbe-te under 2007, denna processor färdigställdes och användes i utbildningssyfte påLinköping Universitet. 2008 optimerades flera delar av processorn och utökadesmed extra funktionalitet som del av ytterligare ett examensarbete. 2009 startadeett EU finansierat projekt vid namn MULTI-BASE, som ISYs Datortekniks avdel-ning deltar i. Till deras del av MULTI-BASE projektet valdes Senior processorn attanvändas, efter ytterligare utveckling skickades denna processor för tillverkning. Detta examensarbete hade i uppgift att testa och verifiera de olika funktionernasom Senior processorn har implementerats med. För att göra detta tillverkades ettkretskort som ska användas för att testa Senior processorn tillsammans med enVirtex-4 FPGA. Utförliga tester gjordes på de viktigaste funktionerna hos Seniorprocessorn, dessa tester visade att den tillverkade Senior processorn fungerar somplanerat. Den kan på egen hand utföra större beräkningar och använda sig avexterna hårdvare acceleratorer med hjälp av sina olika gränssnitt.
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Hawkins, Sara Joy. "The timing of regeneration in the amphibian olfactory system." Master's thesis, Universidade de Aveiro, 2015. http://hdl.handle.net/10773/15444.
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Mestrado em Biologia Molecular e CelularComprehending the mechanisms that make lifelong neurogenesis possible has a clear interest for the better understanding of the basic principles that govern cellular and molecular interactions in the nervous system, as well as a relevant clinical interest. The limited ability of the central nervous system to generate new neurons in order to replace those that have been lost is a formidable obstacle to recovery from neuronal damage caused by injury or neurodegenerative disease. The olfactory system (OS) is an ideal system to study the process of neuronal recovery after injury, as it is known for its lifelong capacity to replenish cells lost during natural turnover, as well as its remarkable ability to regenerate after severe lesion. The olfactory epithelium (OE) shows neurogenesis throughout life. Newly differentiated olfactory receptor neurons (ORNs) are continuously reintegrated into an existing circuitry to maintain the sense of smell. The aim of this thesis is to describe the morphological and functional alterations that occur over time in the OS of larval Xenopus laevis, after transection of the olfactory nerve (ON). Results obtained using immunohistochemistry essays, as well as sensory neuron labeling and calcium imaging techniques, indicate that ORN cell death reaches its peak 48 hours after transection, and that proliferating stem cells found in the basal cell layer of the OE are quickly upregulated after lesion. Supporting cells seem to maintain both morphological and functional integrity after transection of the ON. The OE recovers its original morphological structure 1 week after transection, at which time the first axons reach the olfactory bulb (OB) and begin the process of reinnervation. Spontaneous activity of mitral/tufted cells occurs in the OB during the first weeks after transection but no odor-induced activity is observed. After 3-4 weeks glomerular responses were observed in some animals upon application of stimulus, but the response and glomerular morphology are clearly altered as compared to control. After 6-7 weeks responses seem to have fully recovered, indicating that the OS of larval X. laevis recovers morphologically and functionally 6-7 weeks after ON transection.
O estudo dos mecanismos responsáveis pela neuro-regeneração tem um marcado interesse para a compreensão dos princípios básicos que governam as interações celulares e moleculares no sistema nervoso, bem como um interesse clínico relevante. A limitada capacidade do sistema nervoso central para dar origem a novos neurónios é um obstáculo formidável para a recuperação do sistema após lesão neuronal ou doença neurodegenerativa. O sistema olfativo é um sistema ideal para o estudo do processo de recuperação após lesão neuronal, pois é conhecido no mundo científico pela sua capacidade contínua e vitalícia para repor células perdidas durante a renovação celular natural, bem como a sua notável capacidade para regenerar após uma lesão grave. O epitélio olfativo apresenta a capacidade para dar origem a novos neurónios ao longo de toda a vida. Neurónios sensoriais olfativos diferenciados são continuamente reintegrados num circuito já existente, mantendo assim o sentido do olfato. O objetivo desta tese é descrever as alterações morfológicas e funcionais que ocorrem ao longo do tempo no sistema olfativo de Xenopus laevis em estado larvar, após o corte do nervo olfativo. Os resultados obtidos através do uso de ensaios de imunohistoquímica, bem como técnicas de marcação neuronal sensorial e de imagiologia de cálcio, indicam que a morte celular na população de neurónios sensoriais olfativos atinge o seu máximo 48 horas após a lesão, e que células estaminais encontradas na camada basal do epitélio olfativo são positivamente reguladas após lesão e proliferam rapidamente. Células de suporte parecem manter tanto a integridade morfológica como funcional após o corte do nervo olfativo. O epitélio olfativo recupera a sua estrutura morfológica inicial 1 semana após a lesão, momento em que os primeiros axónios atingem o bolbo olfativo e começam o processo de reintegração. Ocorre atividade espontânea das células mitrais/tufados do bolbo olfativo durante as primeiras semanas após a lesão, mas nenhuma atividade induzida por estímulo com odor foi observada. Depois de 3-4 semanas, atividade glomerular foi observada em alguns animais após a aplicação de estímulos, mas a resposta e morfologia glomerular foram claramente alteradas em relação ao controlo. Depois de 6-7 semanas as respostas parecem ter recuperado totalmente, indicando que o sistema olfativo de X. laevis em estado larvar recupera morfológica e funcionalmente 6-7 semanas após o corte do nervo olfativo.
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Bynum, Alexander Jerome. "Impact of Collateral Enlargement on Smooth Muscle Phenotype." DigitalCommons@CalPoly, 2011. https://digitalcommons.calpoly.edu/theses/658.
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Peripheral Artery Disease is a very serious disease characterized by an arterial occlusion due to atherosclerotic plaques. In response to an arterial occlusion, arteriogenesis occurs, causing smooth muscle cells to transition from a contractile to synthetic state. Also following an arterial occlusion, functional impairment was seen in the collateral circuit. An immunofluorescence protocol was developed in order to assess the impact of collateral enlargement (arteriogenesis) on smooth muscle phenotype at various time points. Smooth muscle α-actin was used to mark all smooth muscle cells, Ki-67 was used to label proliferating smooth muscle cells, and a fluorescent nuclear stain was used to quantify the number of cells present. Samples of the profunda femoris and gracilis were dissected from each mouse hind limb (one ligated, one sham) at three different time points: 3 days, 7 days, and 14 days after a femoral artery ligation surgery. Smooth muscle cell phenotype and luminal cross-sectional area were assessed in the profunda femoris and the midzone of the gracilis collaterals. Smooth muscle cells were proliferating at 3 and 7 days following the occlusion in the gracilis collaterals and significant collateral vessel growth was observed over the two week period. No proliferation was observed in the profunda femoris and although there was an increasing trend in vessel size over the two week period, the averages were not significantly different. The phenotypic transition of the smooth muscle cells was not the cause of vascular impairment in the collateral circuit. This shows that further research is needed to characterize impairment in the collateral circuit.
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Havran, Josef. "Řízení obvodu účastnického rozhraní." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2008. http://www.nusl.cz/ntk/nusl-217312.
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The aim of this thesis is to design a connection of the development kit for the subscriber line interface circuit Si3220 with the development kit for the digital signal processor DSP56858EVM and implement a test application, which will allow us to use the development kit as a small private branch exchange. The application allows us to operate up to ten telephone machines and it disposes of basic telephone exchange functions -- generating tones to the headphone, detecting the DTMF dialing, generating the ringing and the voice connection of the subscribers.
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Mansilla, Juan Camilo. "Résistance culturelle hybride des jeunes des quartiers populaires à l’ère du numérique : étude de cas et analyse quali-quantitative comparée (AQQC-QCA) de Medellin, Paris et Sao Paulo." Thesis, Sorbonne Paris Cité, 2017. http://www.theses.fr/2017USPCA123/document.
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À partir d’une analyse quali-quantitative comparée (AQQC-QCA), conçue par Ragin (1987), nous proposons un modèle théorique sur l’émergence et la transmission des pratiques de résistance culturelle des jeunes des quartiers populaires de Medellín (Colombie), Paris (France) et São Paulo (Brésil). Nos résultats indiquent que les pratiques de résistance culturelle hybride de ces jeunes se produisent selon deux scénarios. Le premier (i.e., M[P+A] → R) apparaît lorsque des communautés morales à forte identité collective (i.e., dont les membres ne sont pas nécessairement localisés dans la même zone géographique) se nourrissent des flux d’information de stigmatisation en provenance de la sphère médiatique centrale de la ville (SMCV), et disposent soit de ressources informationnelles offertes par la mise en place de politiques publiques d’intervention populaire, soit d’un accès libre et répandu aux technologies d’information et communication liées à Internet (TICi). Le second (i.e., OA → R), émerge lorsque l’utilisation des TICi par ces jeunes augmente et qu’ils ont la perception que le gouvernement ne s’intéresse pas à eux, à leurs demandes et besoins. Le contexte actuel globalisé d’échanges présentiels/virtuels d’informations a) modifie les réseaux culturels hybrides des communautés morales, et ; b) construit l’expérience urbaine des individus à partir d’espaces publics hybrides. Notre proposition théorique sert, plus largement, à comprendre l’évolution de la « symbole-sphère » des communautés morales périphériques de la ville à l’ère du numérique, ainsi que la nature de l’information développée par Schumann et Logan (2005) et Logan (2012)Based on a qualitative comparative analysis (QQA), a method developed by (Ragin, 1987), we propose a theoretical model of the emergence of transmission of the cultural resistance practices of the low income youth from popular neighborhoods of Medellín (Colombia), Paris (France) and São Paulo (Brazil). Our results indicate that the cultural resistance practices of this population appears in two different settings. The first one (M[P+A] → R) happens when the moral communities (that is, not necessarily located in the same geographical area) reach a strong cultural identity, feeds on stigmatizing information flows from the central media sphere of the city (SMCV), and have either information resources offered by the set of public policies of popular intervention or widespread and free use of information and communication technologies related to the Internet. The second one (OA → R), occurs when the use of the TICs by this youth wins density following the growing perception that the government is not interested in attending theirs demands and needs. The current context of global exchange of real and virtual information a) modifies the cultural hybrid networks associated with moral communities and b) builds an urban experience of individuals starting with hybrid public spaces. Our theoretical proposition serves a better understanding of the evolution of the symbolosphere of the peripheral moral communities in the cities of the digital age and the nature of the information as developed by Schumann et Logan (2005) et Logan (2012)
A partir de un análisis cualitativo comparado (QCA), método concebido por Ragin (1987), proponemos un modelo teórico sobre la emergencia y la transmisión de las prácticas de resistencia cultural de los jóvenes de barrios populares de Medellín (Colombia), Paris (Francia) et São Paulo (Brasil). Nuestros resultados indican que las prácticas de resistencia cultural híbrida de estos jóvenes se producen en dos escenarios. El primero (M[P+A] → R) aparece cuando las comunidades morales (i.e., no necesariamente ubicadas en la misma zona geográfica) con una fuerte identidad colectiva, se alimentan de flujos de información estigmatizantes procedentes de la esfera mediática central de la ciudad (SMCV), y disponen ya sea de recursos informacionales ofrecidos por la existencia de políticas públicas de intervención popular, o bien de un acceso generalizado y libre a las tecnologías de la información y la comunicación relacionadas con Internet (TICi). El segundo (OA → R) emerge cuando el uso de las TICi por parte de estos jóvenes aumenta y tienen la percepción de que el gobierno no se interesa en ellos, ni en sus demandas ni en sus necesidades. El contexto global actual de intercambio presencial y virtual de información a) modifica las redes culturales híbridas asociadas a las comunidades morales, y; b) construye la experiencia urbana de los individuos a partir de espacios públicos híbridos. Nuestra propuesta teórica sirve, de manera general, para entender la evolución de la “simbolosfera” de las comunidades morales periféricas urbanas en la era digital, así como la naturaleza de la información propuesta por Schumann et Logan (2005) et Logan (2012)
Com base em uma análise qualitativa comparativa ou “Qualitative Comparative Analysis” (QCA), método desenvolvido por (Ragin, 1987), propomos um modelo teórico da emergência e da transmissão de práticas de resistência cultural entre jovens de baixa renda em territórios populares de Medellín (Colômbia), Paris (França) e São Paulo (Brasil). Nossos resultados indicam que as práticas de resistência cultural híbrida desses jovens seguem dois roteiros. O primeiro (M[P+A] → R), quando as comunidades morais (ou seja, não necessariamente localizados na mesma área geográfica) alcançam forte identidade coletiva, alimenta-se de fluxos de informação estigmatizantes oriundos da esfera de mídia central da cidade (SMCV) e dispõem seja de recursos de informação oferecidos pelo conjunto de políticas públicas de intervenção popular, seja de um aceso generalizado e livre as tecnologias de informação e comunicação relacionadas à Internet (TICi). O segundo (OA → R), quando o uso das TICs por esses jovens ganha densidade na medida em que amadurecem a percepção de que o governo não está interessado em atender suas demandas e necessidades. O atual contexto global de troca presencial e virtual de informações a) modifica as redes culturais híbridas associadas a comunidades morais e b) constrói a experiência urbana de indivíduos a partir de espaços públicos híbridos. Nossa proposta teórica serve, mais amplamente, para entender a evolução da “simbolosfera” das comunidades morais periféricas das cidades na era digital e a natureza da informação tal como desenvolvida por Schumann e Logan (2005) e Logan (2012)
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Wu, Wan-Chi, and 吳婉琪. "SRAM Variation Analysis and Peripheral R/W-Assist Circuits using Monolithic 3D BEOL FinFET Circuits." Thesis, 2019. http://ndltd.ncl.edu.tw/handle/hs6vda.
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碩士國立交通大學
國際半導體產業學院
108
Monolithic 3D-IC is an enabling technology for reducing chip size and power consumption and enhancing the overall system performance and using BEOL circuits. To avoid damaging transistors on the bottom silicon layer, low thermal budget is required for while fabricating polycrystalline BEOL circuits on top layers. However, if polycrystalline semiconductor is used, the yield of Monolithic 3D technology is decreased by the random grain boundaries of Si grains. In this thesis, SRAM design using the Location-Controlled-Grain (LCG) technique is presented to reduce the overall bit error rate (BER). Moreover, a graph-based statistical BER analysis is adopted using both transistor-level and cell-level boundary assignments for random grains. The BER of LCG SRAM can be significantly reduced. The defects of monolithic 3D BEOL circuits is still one of design challenges in monolithic 3D SRAM. Instead of placing SRAM cells on BEOL layers, WL-boosted repeaters and ripple-BL buffers are proposed using monolithic 3D BEOL FinFETs to decrease the catastrophic RC effect of SRAM in sub-10nm technologies. The WL-boosted repeaters and ripple-BL buffers can achieve 24.8% delay reduction and 19.6% area reduction, respectively.
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Trotter, Robert Nicholas. "Central and peripheral circuits regulating thymic atrophy in the mouse and rat /." 2006. http://wwwlib.umi.com/dissertations/fullcit/3225930.
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Lin, Chien-Hung, and 林建宏. "A Grid-Based Routing Algorithm for Customized Peripheral Circuits of SRAM System." Thesis, 2019. http://ndltd.ncl.edu.tw/handle/3bx745.
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碩士國立交通大學
電子研究所
108
As the complexity of a layout design grows, layout generation problem has been more challenging. In this work, we propose a routing flow that considers the guard-ring design strategy and generates the layout of a customized circuit without design rule violations. In track-assignment stage, we indicate that the best track location of the pin of the drains and the gates. Then, we utilize the grid-based maze route considering design rule constrains(DR) and rip-up and re-route strategy to complete the detailed routing. With the objective function and the DR that modeled in the grid-map, we can generate the layout of the customized circuit with minimized wire length and without DR violations. Besides, area, leakage current, and capacitance improve more than 10% improvement and performance is not inferior to industry layouts.
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Chang, Ting-Yu, and 張廷宇. "Design of Peripheral Circuits for Low-TemperaturePolycrystalline Silicon Thin-Film Transistor-Liquid Crystal Display." Thesis, 2007. http://ndltd.ncl.edu.tw/handle/89194368591527087876.
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碩士國立中興大學
電機工程學系所
94
This thesis is about peripheral circuits of TFT-LCDs by using low temperature polysilicon (LTPS) process. A novel charging pump circuit and a novel Digital-to-Analog Converter (DAC) had been developed. Because traditional Dickson charge pump circuit features low efficiency and huge output ripple. In the novel charging pump circuit, it uses a new complementary architecture which has smaller ripple voltage and reaches 84.21% of the power efficiency. According as a traditional R-string DAC had a large area, the capacitor ratio of the traditional weighted-capacitor DAC was hard to control accuracy, a traditional switch-capacitor DAC had a long transfer time, and a traditional current DAC needed a set I-V converter. In the novel DAC circuit, it uses a switch-capacitor architecture. For the DAC, the power consumption is better than traditional SC-DAC and the circuit area was decreased significantly compared with traditional R-String DAC. The novel DAC has low integral nonlinearity error (INL) and differential nonlinearity Error (DNL) within one LSB.
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Meng, Andrew, and 孟慶明. "The Design and Test of Peripheral Circuits of Image Sensor for a Digital Camera." Thesis, 2003. http://ndltd.ncl.edu.tw/handle/952bt3.
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碩士中原大學
電機工程研究所
91
ABSTRACT The invention of the digital camera creates not only a new technology for the photography but also new applications and developments with the combination of electrical devices. Compared to traditional cameras,the digital camera has the following advantages: *Image could be stored easily. *Image could be repaired. *Image could be deleted. *Image could be transmitted through network. This thesis compares the basic and how to acquire image differences between the CMOS sensor and CCD sensor first, and then study the design of peripheral circuits of CMOS sensor for a digital Camera and power management. Finally, the test method of digital camera must meet the EMC (ESD, EFT/B and EMI) international verification standard.
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Wu, Chia-You, and 吳嘉祐. "Chip Design for the Peripheral Circuits of Embedded Differential Multi-Time-Programmable Memories Including Switched-Capacitor Step-Down Converters." Thesis, 2013. http://ndltd.ncl.edu.tw/handle/pya46f.
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碩士國立中興大學
電機工程學系所
101
In the development of systems-on-chip technologies, the CMOS embedded non-volatile memories usually need extra process steps. However, those without extra processes are also possible. The former is suitable for median memory capacities with the higher cost. The latter is appropriate for small memory capacities. If the systems do not require large memory capacities, the technique without the extra processes can be applied for cost and fabrication time reduction. In this thesis, the peripheral circuits are designed for differential Multi-Time-Programmable (MTP) non-volatile memories, which were recently proposed by our laboratory using the standard 0.18μm CMOS process. Those peripheral circuits include the address buffer and decoder, word line driver, bit line driver, control line driver, current sense amplifier, verify circuit and output stage in order to program, erase, and read, as well as verify the differential MTP memory array. However, the special memory cells need the voltage higher than the standard supply voltage and the negative voltage during program and erase. Thus, the special voltage tolerable circuits are required. After the peripheral circuits were designed and simulated, they were fabricated and measured successfully. The measurement results show that the memory cells can be programmed and erased within 1 millisecond, and the time to randomly read any memory cells is within 11.4 nanoseconds. Besides, because various bias voltages are required, the step-down regulator was also designed. The converters use the switched-capacitor structure which is combination of capacitors in parallel and series to generate constant step-down output voltages. In addition, the loading current can be increased and the ripple can be decreased by changing the reference voltages. The regulator producing 1V and 1.2V was designed, simulated and under fabrication using the TSMC 0.25μm HV CMOS process. The simulation results demonstrate the efficiencies of 60.3% for the output of 1.2 V and 52% for that of 1 V with the loading currents of 90mA and 120mA, respectively.
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Li, De-Yun, and 李德耘. "Novel Low Power SRAM Cell and Peripheral Circuit Design." Thesis, 2008. http://ndltd.ncl.edu.tw/handle/14817404101542345194.
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碩士南台科技大學
電子工程系
96
The development of VLSI design nowadays is mainly focused on low power consumption. With the evolution of CMOS process, device sizes and power supply are also improved. The transistor counts within a chip system is increasing due to huge demand of memory size. In this paper, we try to study memories which occupied a lot of layout area. The decreasing of device sizes introduces many unpredictable problems such as static power dissipation. Thus, we propose 3 static random access memory architectures with the advantages of low dynamic/static power dissipation. The proposed designs does prove its improvements after we compete with prior design. As to chip read/write operation, the power consumption in charge/discharge operation of bit line during read/write period is also crucial. We've add selectable charge bit line design and refine the corrosponding circuits. In addition, we also propose a novel design of address sense circuit which also improves in power consumption and transistor counts.
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LIU, HONG-ZHI, and 劉鴻志. "The design of peripheral circuit and memory cell of CMOS sram." Thesis, 1989. http://ndltd.ncl.edu.tw/handle/99458034859838334129.
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Olivier, Laurentz Eugene. "Peripheral control tools for a run-of-mine ore milling circuit." Diss., 2012. http://hdl.handle.net/2263/26420.
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Run-of-mine ore milling circuits are generally difficult to control owing to the presence of strong external disturbances, poor process models and the unavailability of important process variable measurements. These shortcomings are common for processes in the mineral-processing industry. For processes that fall into this class, the peripheral control tools in the control loop are considered to be as important as the controller itself. This work addresses the implementation of peripheral control tools on a run-of-mine ore milling circuit to help overcome the deteriorated control performance resulting from the aforementioned shortcomings. The effects of strong external disturbances are suppressed through the application of a disturbance observer. A fractional order disturbance observer is also implemented and a novel Bode ideal cutoff disturbance observer is introduced. The issue of poor process models is addressed through the detection of significant mismatch between the actual plant and the available model from process data. A closed-form expression is given for the case where the controller has a transfer function. If the controller does not have a transfer function, a partial correlation analysis is used to detect the transfer function elements in the model transfer function matrix that contain significant mismatch. The mill states and important mill parameters are estimated with the use of particle filters. Simultaneous state and parameter estimation is compared with a novel dual particle filtering scheme. A sensitivity analysis shows the class of systems for which dual estimation would provide superiorestimation accuracy over simultaneous estimation. The implemented peripheral control tools show promise for current milling circuits where proportional-integral-derivative (PID) control is prevalent, and also for advanced control strategies, such as model predictive control, which are expected to become more common in the future. AFRIKAANS : Maalkringe wat onbehandelde erts maal is oor die algemeen moeilik om te beheer as gevolg van die teenwoordigheid van sterk eksterne steurings, onakkurate aanlegmodelle en metings van belangrike prosesveranderlikes wat ontbreek. Hierdie probleme is algemeen vir aanlegte in die mineraalprosesseringsbedryf. Vir aanlegte in hierdie klas word die randbeheerinstrumente as net so belangrik as die beheerder beskou. Hierdie verhandeling beskryf die implementering van randbeheerinstrumente vir ’n maalkring wat onbehandelde erts maal, om die verswakte beheerverrigting teen te werk wat veroorsaak word deur bogenoemde probleme. Die impak van sterk eksterne steurings word teengewerk deur die implementering van ’n steuringsafskatter. ’n Breuk-orde-steuringsafskatter is ook geïmplementeer en ’n nuwe Bode ideale afsnysteuringsafskatter word voorgestel. Die kwessie van onakkurate aanlegmodelle word hanteer deur van die aanlegdata af vas te stel of daar ’n verskil is tussen die aanleg en die beskikbare model van die aanleg. ’n Uitdrukking word gegee vir hierdie verskil vir die geval waar die beheerder met ’n oordragsfunksie voorgestel kan word. Indien die beheerder nie ’n oordragsfunksie het nie, word van ‘n parsiële korrelasie-analise gebruik gemaak om die element, of elemente, in die aanleg se oordragsfunksiematriks te identifiseer wat van die werklike aanleg verskil. Die toestande en belangrike parameters in die meul word beraam deur van partikel-filters gebruikte maak. Gelyktydige toestand- en parameter-beraming word vergelyk met ’n nuwe dubbel-partikelfilter skema. ’n Sensitiwiteitsanalise wys die klas van stelsels waarvoor dubbel-afskatting meer akkurate waardes sal gee as gelyktydige afskatting. Die voorgestelde randbeheerinstrumente is toepaslik vir huidige maalkringe waar PID-beheer algemeen is, asook vir gevorderde beheerstrategieë, soos model-voorspellende beheer, wat na verwagting in die toekoms meer algemeen sal word. CopyrightDissertation (MEng)--University of Pretoria, 2012.
Electrical, Electronic and Computer Engineering
unrestricted
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Jeng, Kuen-Feng, and 鄭昆豐. "The Peripheral Circuit Design & Implementation of Wavelet-Based Audio Processing System." Thesis, 1999. http://ndltd.ncl.edu.tw/handle/04302030785700964710.
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碩士國立交通大學
電機與控制工程系
87
In this thesis, we design the peripheral circuit of Wavelet-Based audio process system, with the personal computer, FPGA (Field Programmable Gate Array), and microcontroller AT89C51. We sample stereo audio signals , by CODEC , and send the signals to the part of DWT (Discrete Wavelet Transform). Then, we save the transformed data to SRAM buffers, and wait for the host to read data. Finally, we save data in Hard-disk, that can be read and write as we wish. Hardware description language is the new trend in IC design. In this thesis, we use VHDL ( Very High Speed ICs Hardware Description Language ) to design the controller of CODEC、SRAM and EPP transmission mode.
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Liu, Yi-hsien, and 劉益賢. "Designing The Peripheral Circuit of Embedded System for High-Performance and Low-Power Characteristics." Thesis, 2005. http://ndltd.ncl.edu.tw/handle/66717977308033846734.
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碩士義守大學
電子工程學系碩士班
93
In this thesis the efficiency and the power dissipation of the low speed input/output peripheral circuits for the portable electronic products and improved. ARM is used as the processor of the system, and the low speed input/output peripheral circuits are connected to the high performance bus AHB of the AMBA bus system in ARM. A DMA Controller is adopted to manage the direct memory access between the input/output peripheral circuits and memory. It reduces the transmission of data between the processor and the peripheral circuits, and therefore, it improves the performance of the processor and the system. To reduce the power dissipation , a clock management(CM) technique is used for the design of the peripheral circuits, it can manage the clock inside the peripheral circuits according to the currently work, and stop the power consumption in those circuits which are not being used. In the work, those techniques are used to design an UART, an IrDA and a DMA Controller. They are implemented in the RTL code using Verilog HDL, and ModelSim is used to verify and analyze the characteristics of the circuits and the system.
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Liu, Yi-Hsien, and 劉益賢. "Designing The Peripheral Circuit of Embedded System for High-Performance and Low-Power Characteristics." Thesis, 2005. http://ndltd.ncl.edu.tw/handle/16387621727899307365.
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碩士義守大學
電子工程學系碩士班
93
In this thesis the efficiency and the power dissipation of the low speed input/output peripheral circuits for the portable electronic products and improved. ARM is used as the processor of the system, and the low speed input/output peripheral circuits are connected to the high performance bus AHB of the AMBA bus system in ARM. A DMA Controller is adopted to manage the direct memory access between the input/output peripheral circuits and memory. It reduces the transmission of data between the processor and the peripheral circuits, and therefore, it improves the performance of the processor and the system. To reduce the power dissipation , a clock management(CM) technique is used for the design of the peripheral circuits, it can manage the clock inside the peripheral circuits according to the currently work, and stop the power consumption in those circuits which are not being used. In the work, those techniques are used to design an UART, an IrDA and a DMA Controller. They are implemented in the RTL code using Verilog HDL, and ModelSim is used to verify and analyze the characteristics of the circuits and the system.
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Rosenkranz, Melissa A. "Reciprocal modulation of peripheral inflammation and affective neural circuitry in health and disease." 2008. http://www.library.wisc.edu/databases/connect/dissertations.html.
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Tsung-HanLu and 呂宗翰. "Reliability of Devices in NAND Flash Memory Periphery Circuitry." Thesis, 2013. http://ndltd.ncl.edu.tw/handle/80883942352840542816.
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碩士國立成功大學
微電子工程研究所碩博士班
101
Recent years, NAND flash storage drive is one of the most important products used in mobile electric products. The NAND Flash device is with the advantages which are high integrated and fast storage speed. The main purpose of this thesis is about the reliability studies of NAND Flash Periphery devices. Since the NAND flash needs high voltage around 18V during program / erase operation, The Devices in NAND Flash Memory Periphery Circuitry in this thesis is word-line driver circuits, the devices have to pass high voltage from superior circuit to cell devices. The first part research in this thesis focused on the reliability issue which took place in the transition of the devices from OFF-state to ON-state, and last part, we discussed the impact of reliability on different channel length devices. The second stage is the word-line driver circuit which used enhanced-mode NMOSFET. The devices operated in the transition from OFF-state to ON-state incessantly. In this switching process, the devices will be operated at high VDS and high VBS. From the experimental results, there is a critical impact ionization in the drain side drift region which caused by hot-carrier effect when device operated at high VDS, it will induced that interface state (Nit) are generate in the Si/SiO2 surface and cause IDlin degradation. The experimental results are verified by TCAD simulation. On the other hand, the vertical electric field inside device will increase when device operated at high VBS and induced secondary impact ionization below the region of channel and drift region, this mechanism will cause more carrier generation and may cause electrons injection into gate oxide, and resulting in the formation of defects inside the gate oxide, the gate control of the channel decreased and caused VTH increased. The other part of this thesis, we research the different channel length of for the impact of the reliability of devices. We stressed the devices which are different channel length devices, as the experimental results, the degraded mechanism in different channel length devices are the same, and as we expected that the sustainable capability of the short-channel device is relatively poor, in short channel devices, IDlin degradation and VTH shift are relatively large. Besides, we defined the lifetime of devices and summarized the influence of different channel the length on the lifetime.
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WU, TONG-JUN, and 吳統鈞. "A new high speed and high density mos static ram cell and its peripheral interface circuit designs." Thesis, 1986. http://ndltd.ncl.edu.tw/handle/82329971323155830286.
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Chun-PoChang and 張鈞博. "Breakdown Voltage and Reliability Studies of Devices in NAND Flash Memory Periphery Circuitry." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/58759552904041180838.
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碩士國立成功大學
微電子工程研究所
102
In this thesis, we study the high-voltage device which is depletion-mode lateral diffused metal-oxide-semiconductor (LDMOS). The HV device in the periphery circuit is applied to NAND Flash Cell for Program/Erase operation. In periphery circuit, the high off-state breakdown voltage (off-state VBD) is an important requirement for this device. Therefore, the LDMOS breakdown mechanism with different BF2 implant by varying implant dosage in N- region is investigated. As expected, the off-state breakdown voltage increase with the raise of BF2 concentration. Experimental data and technology computer aided design simulations show that gate-induced-drain-leakage (GIDL) and PN junction breakdown are responsible for the variation of breakdown voltage. Moreover, in the circuit operating environment, there might be hot carrier degradation in the device. The damage will happen while device is programming or erasing data. Generally, the ISUB peak will be the index of the HCI degradation. However, in our study, the measurement results contradict pervious study because the distribution of the impact ionization peak would dominant the hot carrier degradation instead of the amount of the ISUB current. The impact ionization which is located near drain side is greater with higher BF2 concentration. In conclusion, the device with higher BF2 implant suffers worse HCI degradation because of more high energy carrier injection. According to the results in this study, care should be taken when we implant the BF2 into the drift region, since there is a trade-off between VBD and HCI reliability issue.
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Rodrigues, David Alexandre Bento. "Desenvolvimento de um dispositivo portátil de eletrocardiograma." Master's thesis, 2013. http://hdl.handle.net/10316/26152.
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Dissertação de Mestrado em Engenharia Biomédica apresentada à Faculdade de Ciências e Tecnologia da Universidade de Coimbra.As doenças cardiovasculares continuam a liderar o ranking mundial de causas de morte. Este factor, associado àquilo que parece ser um aumento contínuo da população idosa e às limitações de infraestruturas de saúde capazes de dar resposta às suas necessidades, fazem do Ambient Assisted Living (AAL) uma solução cada vez mais válida. O recurso a soluções portáteis que permitem uma monitorização e diagnóstico mais rápido de diversos índices orgânicos, está na origem deste projeto, que tem como objetivo central a realização do hardware e firmware para um dispositivo portátil de eletrocardiograma (ECG). Esta tese detalha o desenvolvimento de um ECG portátil. O trabalho realizado incluiu a elaboração de esquemáticos e de uma Printed Circuit Board (PCB) integrando todos os componentes estudados e selecionados para incorporar o dispositivo. Recorreu-se, no projeto, a um circuito integrado da Texas Instruments, o ADS1192, que possui os conversores analógico-digitais (ADC) para as duas entradas diferenciais desenhadas que transportam o sinal analógico recolhido através de quatro elétrodos que compõem o sistema. A programação do circuito desenvolvido foi conseguida através da utilização de uma placa de desenvolvimento que contém um microcontrolador (MCU), o ATmega 128, para o qual foi desenvolvido todo o firmware que permite o correto funcionamento do ADS1192. Para o desenvolvimento do hardware estudaram-se fatores como: as dimensões finais do dispositivo; o consumo elétrico de todos os componentes a integrar o circuito; o recurso mínimo a filtros analógicos em detrimento de filtros digitais para o processamento de sinal. Foram elaborados testes ao sistema desenvolvido que possibilitaram a recolha e a análise do sinal de ECG proveniente dos dois canais, com o recurso a um simulador de sinais de eletrocardiograma, e foi desenvolvida uma interface em C# para construir um gráfico em tempo real do sinal recolhido. Por fim, são ainda discutidos formatos de armazenamento de dados de ECG, realizando-se, inclusive, uma conversão para o formato Standard Communications Protocol for Computer Assisted Electrocardiography (SCP-ECG) depois de se ter adicionado uma memória flash ao sistema.
Cardiovascular diseases are still leading the ranking of death causes worldwide. This fact, in association with what looks like a chronic increase in the elderly population and limited health infrastructures capable of answering their needs, make the Ambient Assisted Living (AAL) an increasingly valid solution. The use of portable solutions that allow constant monitoring and faster diagnosis are at the origin of this project, with the main objective of developing a portable electrocardiogram (ECG). This thesis deals with the entire development of this medical device. It includes the design of schematics and of a Printed Circuit Board (PCB) that includes the electrical components selected to incorporate the device disposed within a studied configuration. In this project, an integrated circuit from Texas Instruments was used, the ADS1192, which has already the analog to digital converters (ADCs) for two differential inputs designed to carry the ECG analog signals collected through four electrodes. The developed circuit was programmed using a development board containing a microcontroller (MCU), the ATmega 128, where the entire firmware was designed to enable the correct operation of ADS1192. During hardware development, several factors were studied, such as the dimensions of the device, the power consumption of all components of the integrated circuit and the minimum number of analog filters needed in the system, as we had the aim of replacing analog filters by digital filters at the signal processing level. Several tests were made to the system that enabled the collection and analysis of the ECG signals from the two channels with the use of an ECG signal simulator, and an interface developed in C# for building a real-time graphic of the acquired signal. Finally, storage formats for ECG data were discussed and, after the addition of a flash memory to the system, a conversion of the ECG data collected from the ADS1192 to the Standard Communications Protocol for Computer Assisted Electrocardiography (SCP-ECG) standard format was achieved.