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Dissertations / Theses on the topic 'Parallel processing'

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Published: 4 June 2021

Last updated: 29 July 2024

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1

Poggiali, Dario. "Parallel geometry processing." Zürich : ETH, Eidgenössische Technische Hochschule Zürich, cgl Computer Graphics Laboratory, 2008. http://e-collection.ethbib.ethz.ch/show?type=dipl&nr=393.

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2

Holt, C. M. "Quasi-parallel processing." Thesis, University of Oxford, 1986. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.375244.

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3

Zhang, Hua 1954. "Practical Parallel Processing." Thesis, University of North Texas, 1996. https://digital.library.unt.edu/ark:/67531/metadc278769/.

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The physical limitations of uniprocessors and the real-time requirements of numerous practical applications have made parallel processing an essential technology in military, industry and scientific research. In this dissertation, we investigate parallelizations of three practical applications using three parallel machine models. The algorithms are: Finitely inductive (FI) sequence processing is a pattern recognition technique used in many fields. We first propose four parallel FI algorithms on the EREW PRAM. The time complexity of the parallel factoring and following by bucket packing is O(sk^2 n/p), and they are optimal under some conditions. The parallel factoring and following by hashing requires O(sk^2 n/p) time when uniform hash functions are used and log(p) ≤ k n/p and pm ≈ n. Their speedup is proportional to the number processors used. For these results, s is the number of levels, k is the size of the antecedents and n is the length of the input sequence and p is the number of processors. We also describe algorithms for raster/vector conversion based on the scan model to handle block-like connected components of arbitrary geometrical shapes with multi-level nested dough nuts for the IES (image exploitation system). Both the parallel raster-to-vector algorithm and parallel vector-to-raster algorithm require O(log(n2)) or O(log2(n2)) time (depending on the sorting algorithms used) for images of size n2 using p = n2 processors. Not only is the DWT (discrete wavelet transforms) useful in data compression, but also has it potentials in signal processing, image processing, and graphics. Therefore, it is of great importance to investigate efficient parallelizations of the wavelet transforms. The time complexity of the parallel forward DWT on the parallel virtual machine with linear processor organization is O(((so+s1)mn)/p), where s0 and s1 are the lengths of the filters and p is the number of processors used. The time complexity of the inverse DWT is also O(((so+s1)mn)/p). If the processors are organized as a 2D array with PrawPcol processors, both the interleaved parallel DWT and IDWT have the time complexity of O(((so+s1)mn)/ProwPcol). We have parallelized three applications and achieved optimality or best-possible performances for each of the three applications over each of the chosen machine models. Future research will involve continued examination of parallel architectures for implementation of practical problems.

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4

Spray, Andrew J. C. "VLSI parallel processing architectures." Thesis, Bangor University, 1990. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.278108.

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5

Castro, Fernandez Raul. "Stateful data-parallel processing." Thesis, Imperial College London, 2016. http://hdl.handle.net/10044/1/31596.

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Democratisation of data means that more people than ever are involved in the data analysis process. This is beneficial - it brings domain-specific knowledge from broad fields - but data scientists do not have adequate tools to write algorithms and execute them at scale. Processing models of current data-parallel processing systems, designed for scalability and fault tolerance, are stateless. Stateless processing facilitates capturing parallelisation opportunities and hides fault tolerance. However, data scientists want to write stateful programs - with explicit state that they can update, such as matrices in machine learning algorithms - and are used to imperative-style languages. These programs struggle to execute with high-performance in stateless data-parallel systems. Representing state explicitly makes data-parallel processing at scale challenging. To achieve scalability, state must be distributed and coordinated across machines. In the event of failures, state must be recovered to provide correct results. We introduce stateful data-parallel processing that addresses the previous challenges by: (i) representing state as a first-class citizen so that a system can manipulate it; (ii) introducing two distributed mutable state abstractions for scalability; and (iii) an integrated approach to scale out and fault tolerance that recovers large state - spanning the memory of multiple machines. To support imperative-style programs a static analysis tool analyses Java programs that manipulate state and translates them to a representation that can execute on SEEP, an implementation of a stateful data-parallel processing model. SEEP is evaluated with stateful Big Data applications and shows comparable or better performance than state-of-the-art stateless systems.

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6

Bibby, Geoffrey Thomas. "Digital image processing using parallel processing techniques." Thesis, Liverpool John Moores University, 1991. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.304539.

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7

Göthe, Katrin. "The limits of parallel processing." Phd thesis, Universität Potsdam, 2009. http://opus.kobv.de/ubp/volltexte/2010/4606/.

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Trying to do two things at once decreases performance of one or both tasks in many cases compared to the situation when one performs each task by itself. The present thesis deals with the question why and in which cases these dual-task costs emerge and moreover, whether there are cases in which people are able to process two cognitive tasks at the same time without costs. In four experiments the influence of stimulus-response (S-R) compatibility, S-R modality pairings, interindividual differences, and practice on parallel processing ability of two tasks are examined. Results show that parallel processing is possible. Nevertheless, dual-task costs emerge when: the personal processing strategy is serial, the two tasks have not been practiced together, S-R compatibility of both tasks is low (e.g. when a left target has to be responded with a right key press and in the other task an auditorily presented “A” has to be responded by saying “B”), and modality pairings of both tasks are Non Standard (i.e., visual-spatial stimuli are responded vocally whereas auditory-verbal stimuli are responded manually). Results are explained with respect to executive-based (S-R compatibility) and content-based crosstalk (S-R modality pairings) between tasks. Finally, an alternative information processing account with respect to the central stage of response selection (i.e., the translation of the stimulus to the response) is presented.
Versucht man zwei Aufgaben zur gleichen Zeit zu erledigen, so verschlechtert sich die Leistung einer oder beider Aufgabe(n) im Vergleich zur Situation, in der man beide Aufgaben einzeln erledigt. Die vorliegende Dissertation beschäftigt sich mit der Frage, warum und unter welchen Umständen diese Doppelaufgabenkosten entstehen. Darüber hinaus geht sie der Frage nach, ob es Aufgabenkombinationen gibt, für die parallele Verarbeitung ohne Kosten gezeigt werden kann. In vier Experimenten wurde der Einfluss von Stimulus-Reaktion (S-R) Kompatibilität, S-R Modalitätspaarungen, interindividueller Unterschiede und Training auf das Parallelverarbeitungspotential zweier Aufgaben untersucht. Die Ergebnisse zeigen, dass parallele Verarbeitung generell möglich ist. Dennoch entstehen Doppelaufgabenkosten, wenn die persönliche Verarbeitungsstrategie seriell ist, die beiden Aufgaben nicht genügend zusammen trainiert wurden, die S-R Kompatibilität beider Aufgaben gering ist (z.B. wenn ein linker Zielreiz mit einem Druck auf die rechten Taste beantwortet und in der anderen Aufgabe ein auditiv präsentiertes „A“ mit der Aussprache eines „Bs“ beantwortet werden muss) und die Modalitätspaarungen beider Aufgaben Nicht-Standard sind (d.h. visuell-räumliche Stimuli mit vokalen und auditiv-verbale Stimuli mit manuellen Reaktionen beantwortet werden müssen). Die gewonnenen Ergebnisse werden durch „Crosstalk“ der exekutiven Signale (S-R Kompatibilität) und durch inhaltsbasierten „Crosstalk“ (S-R Modalitätspaarungen) erklärt. Weiterhin wird ein alternatives Modell der Informationsverarbeitung mit Hinblick auf die zentrale Phase der Antwortauswahl (d.h. die Phase in der die Stimulusinformation in eine Antwort übersetzt wird) vorgestellt.

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8

Tse, Kin Wing. "A parallel image processing system." Thesis, University of Liverpool, 1997. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.243204.

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9

Topham, N. P. "A parallel vector processing system." Thesis, University of Manchester, 1985. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.370965.

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10

Ho, Pi-Luen. "Parallel processing of robot control." Thesis, University of Reading, 1991. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.293162.

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11

Beckett, Keith. "Real-time parallel SAR processing." Thesis, University of Liverpool, 1995. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.309878.

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12

Fleury, Martin. "Efficient parallel image-processing software." Thesis, University of Essex, 1997. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.361038.

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13

Kao, Frank. "Parallel processing interfaces to television." Thesis, Massachusetts Institute of Technology, 1995. http://hdl.handle.net/1721.1/61817.

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14

Vasconcellos, Brett W. (Brett William) 1977. "Parallel signal-processing for everyone." Thesis, Massachusetts Institute of Technology, 2000. http://hdl.handle.net/1721.1/9097.

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Thesis (M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2000.
Includes bibliographical references (p. 65-67).
We designed, implemented, and evaluated a signal-processing environment that runs on a general-purpose multiprocessor system, allowing easy prototyping of new algorithms and integration with applications. The environment allows the composition of modules implementing individual signal-processing algorithms into a functional application, automatically optimizing their performance. We decompose the problem into four independent components: signal processing, data management, scheduling, and control. This simplifies the programming interface and facilitates transparent parallel signal processing. For tested applications, our system both runs efficiently on single-processors systems and achieves near-linear speedups on symmetric-multiprocessor (SMP) systems.
by Brett W. Vasconcellos.
M.Eng.

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15

de, Errico Luciano. "Agent-based distributed parallel processing." Thesis, University of Surrey, 1996. http://epubs.surrey.ac.uk/843822/.

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This work concerns the design and prototype implementation of an agent-based parallel architecture for physically distributed systems. The generic goal is to combine the processing power of widely available, low-cost networks of workstations, providing parallelism inside single applications. The specific goal is to investigate ways of implementing agent-based parallel processing in distributed systems. In this context, an agent is a lightweight mobile process that can freely move in the network and execute when it reaches a processing node. The Swarm architecture addresses these points by providing an abstract environment that can span many or all machines in the network. The environment is structured as a virtual machine, whose organisation and instruction set are detailed. Swarm is based on the idea of process flow, in which mobile concurrent processes can move and execute asynchronously in a distributed space consisting of data nodes. Each node is capable of permanently storing arbitrary information and references to other nodes, permitting the creation of persistent and distributed data structures in the environment. The main advantage is a flexible programming environment, which combines characteristics of the message-passing and distributed shared-memory approaches. A subset of the Swarm architecture was implemented as a prototype, coded in C language for operation under the Unix environment, to study and evaluate the model. The prototype executed in a single workstation, simulating the Swarm abstract environment and pennitting the validation of the proposed architecture and implemented mechanisms. Both the implementation and the evaluation procedure are explained and discussed. Results suggest that agent-based processing is feasible in moderately-and tightly-coupled environments, and that the Swarm processing model can be successfully applied to local-area networks and massively parallel computing machines. In particular, applications that manipulate irregular and distributed data structures can benefit from the programming environment provided by the Swarm architecture. These comprise: symbolic processing (artificial intelligence and expert systems), distributed simulation, distributed databases, and intelligent networks.

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16

Wang, Dalan. "Parallel architectures for signal processing." Thesis, University of Aberdeen, 1991. http://digitool.abdn.ac.uk/R?func=search-advanced-go&find_code1=WSN&request1=AAIU034219.

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This thesis presents the development of parallel architectures and algorithms for signal processing techniques, particularly for application to ultrasonic surface texture measurement. The background and context of this project is the real need to perform high speed signal processing on ultrasonic echoes used to extract information on texture properties of surfaces. Earlier investigation provided a solution by the nonlinear Maximum Entropy Method (MEM) which needs to be implemented at high speed and high performance. A review of parallel architectures for signal processing and digital signal processors is given. The aim is to introduce ways in which signal processing algorithms can be implemented at high speed. Both hardware and software have been developed in the project, and the signal processing system and parallel implementations of the algorithms are presented in detail. The signal processing system employs a parallel architecture using transputers. A feature of the design is that a floating-point digital signal processor is incorporated into a transputer array so that the performance of the system can be significantly enhanced. The design, testing and construction of the hardware system are discussed in detail. An investigation of some parallel DSP algorithms, including matrix multiplication, the Discrete Fourier Transform (DFT) and the Fast Fourier Transform (FFT), and their implementations based on the transputer array are discussed in order to choose an appropriate FFT implementation for our application. Several implementations of the deconvolution algorithms, including the Wiener-Hopf filter, the Maximum Entropy Method (MEM) and Projection Onto Convex Sets (POCS) are developed, which can benefit from the use of concurrency. A development of the MEM implementation based on the transputer array is to use the DSP as a subsystem for FFT calculations; this dual-system environment provides a significant resourse to be used to process ultrasonic echoes to determine surface roughness. Finally, the performance of the Projection Onto Convex Sets (POCS) algorithm in the field of ultrasonic surface determination and comparison with the Wiener-Hopf filter and the MEM are presented using simulated and real data. It is concluded that the parallel architecture provides a valuable contribution to high speed implementations of signal processing techniques.

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17

Jin, Xiaoming. "A practical realization of parallel disks for a distributed parallel computing system." [Gainesville, Fla.] : University of Florida, 2000. http://etd.fcla.edu/etd/uf/2000/ane5954/master.PDF.

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Thesis (M.S.)--University of Florida, 2000.
Title from first page of PDF file. Document formatted into pages; contains ix, 41 p.; also contains graphics. Vita. Includes bibliographical references (p. 39-40).

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18

Snell, Joshua. "Readers are parallel processors." Thesis, Aix-Marseille, 2018. http://www.theses.fr/2018AIXM0244.

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Une question centrale des recherches sur la lecture concerne la nature séquentielle ou parallèle de l’identification des mots pendant la lecture de phrases. L’hypothèse dominante postule que l’attention spatiale est allouée à un seul mot à la fois, et qu’avec cette contrainte, l’identification des mots doit forcément s’opérer de manière séquentielle. Cependant, un certain nombre de résultats suggèrent, au contraire, que l’attention spatiale peut être allouée à plusieurs mots à la fois, de manière distribuée. Cette attention disbribuée pourrait permettre l’identification en parallèle de plusieurs mots de manière simultanée, et les travaux présentés dans cette thèse cherchent à déterminer la viabilité de cette hypothèse. Notamment, nos travaux visent à préciser le niveau de traitement (visuel, orthographique, lexical, sémantique ou syntaxique) permis par cette attention distribuée
This thesis addresses one of the most hotly debated issues in reading research: Are words processed serially or in parallel during reading? One could argue that this is primarily a question of visuo-spatial attention: is attention distributed across multiple words during reading? The research presented here suggests that attention can indeed be allocated to multiple words at once. It is further established that attention is a key factor driving (sub-lexical) orthographic processing. The next question, then, is whether multiple lexical representations can be activated in parallel. This thesis comprises a wealth of evidence for parallel lexical activation: firstly we have found that readers activate embedded words (e.g., ‘use’ in ‘houses’) alongside the word that is to be recognized, indicating that parallel lexical processing would occur even if readers could effectively focus their attention on single words. Moreover, we have found that semantic and syntactic categorization decisions about foveal target words are influenced by the semantic and syntactic aspects of surrounding words, even when all these words are presented for a duration shorter than the average time needed to recognize a single word. Hence, given that readers’ attention is spread across multiple words and that multiple lexical representations can be activated in parallel, it seems reasonable to claim that the reading system is in principle a parallel processing system

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19

Borlaug, Idar. "Seismic processing using Parallel 3D FMM." Thesis, Norwegian University of Science and Technology, Department of Computer and Information Science, 2007. http://urn.kb.se/resolve?urn=urn:nbn:no:ntnu:diva-8792.

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This thesis develops and tests 3D Fast Marching Method (FMM) algorithm and apply these to seismic simulations. The FMM is a general method for monotonically advancing fronts, originally developed by Sethian. It calculates the first arrival time for an advancing front or wave. FMM methods are used for a variety of applications including, fatigue cracks in materials, lymph node segmentation in CT images, computing skeletons and centerlines in 3D objects and for finding salt formations in seismic data. Finding salt formations in seismic data, is important for the oil industry. Oil often flows towards gaps in the soil below a salt formation. It is therefore, important to map the edges of the salt formation, for this the FMM can be used. This FMM creates a first arrival time map, which makes it easier to see the edges of the salt formation. Herrmann developed a 3D parallel algorithm of the FMM testing waves of constant velocity. We implemented and tested his algorithm, but since seismic data typically causes a large variation of the velocities, optimizations were needed to make this algorithm scale. By optimising the border exchange and eliminating much of the roll backs, we delevoped and implemented a much improved 3D FMM which achieved close to theoretical performance, for up to at least 256 nodes on the current supercomputer at NTNU. Other methods like, different domain decompositions for better load balancing and running more FMM picks simultaneous, will also be discussed.

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20

Yilmaz, Erdal. "Massive Crowd Simulation With Parallel Processing." Phd thesis, METU, 2010. http://etd.lib.metu.edu.tr/upload/12611627/index.pdf.

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This thesis analyzes how parallel processing with Graphics Processing Unit (GPU) could be used for massive crowd simulation, not only in terms of rendering but also the computational power that is required for realistic simulation. The extreme population in massive crowd simulation introduces an extra computational load, which is quite difficult to meet by using Central Processing Unit (CPU) resources only. The thesis shows the specific methods and approaches that maximize the throughput of GPU parallel computing, while using GPU as the main processor for massive crowd simulation. The methodology introduced in this thesis makes it possible to simulate and visualize hundreds of thousands of virtual characters in real-time. In order to achieve two orders of magnitude speedups by using GPU parallel processing, various stream compaction and effective memory access approaches were employed. To simulate crowd behavior, fuzzy logic functionality on the GPU has been implemented from scratch. This implementation is capable of computing more than half billion fuzzy inferences per second.

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21

Boston, Marisa Ferrara, John T. Hale, Shravan Vasishth, and Reinhold Kliegl. "Parallel processing and sentence comprehension difficulty." Universität Potsdam, 2011. http://opus.kobv.de/ubp/volltexte/2011/5715/.

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Eye fixation durations during normal reading correlate with processing difficulty but the specific cognitive mechanisms reflected in these measures are not well understood. This study finds support in German readers’ eyefixations for two distinct difficulty metrics: surprisal, which reflects the change in probabilities across syntactic analyses as new words are integrated, and retrieval, which quantifies comprehension difficulty in terms of working memory constraints. We examine the predictions of both metrics using a family of dependency parsers indexed by an upper limit on the number of candidate syntactic analyses they retain at successive words. Surprisal models all fixation measures and regression probability. By contrast, retrieval does not model any measure in serial processing. As more candidate analyses are considered in parallel at each word, retrieval can account for the same measures as surprisal. This pattern suggests an important role for ranked parallelism in theories of sentence comprehension.

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22

Menich, Ronald Paul. "Resource allocation in parallel processing systems." Diss., Georgia Institute of Technology, 1991. http://hdl.handle.net/1853/28049.

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23

Handley-Schachler, Sybille H. "Applications of parallel processing to optimization." Thesis, University of Oxford, 1994. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.240512.

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24

Nicholas, Julian Jesuratnam. "Information processing in #parallel' visual pathways." Thesis, University of Oxford, 1993. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.386633.

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25

Entwistle, Paul Martin. "Parallel processing for real-time control." Thesis, Bangor University, 1990. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.238434.

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26

Nocetti, Demetrio Fabian Garcia. "Parallel processing in digital flight control." Thesis, Bangor University, 1991. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.278518.

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27

Rozday, Jack. "Parallel processing using Enterprise Java Beans." Thesis, Leeds Beckett University, 2008. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.485770.

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The purpose of this work is to determine whether the Enterprise Java Beans (EJB) distributed computing architecture, that is so widely used for business applications, can serve as a platform for a parallel processing computing cluster suitable for scientific and numerical processing. This paper describes a research project currently being undertaken to implement a parallel processing computing system using EJB and test it to determine what potential usefulness it may have for solving computationally intensive numerical problems. If an enterprise or organization that is already using EJB for its distributed business or scientific applications could also harness this computing power to solve computationally intensive problems, it could dramatically broaden the usefulness of an existing computing infrastructure. An EJB based parallel processing cluster such as this could also be used as the infrastructure for a Grid Computing Environment (GCE). Class libraries would be used to allow application programs to access grid computational resources, while the services provided by the EJB distributed computing environment would be used to provide a foundation for a computational grid.

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28

Hammes, M. R. "A node interface for parallel processing." Thesis, Nottingham Trent University, 1989. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.328205.

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Lidstone, Patrick. "A dynamically reconfigurable parallel processing architecture." Thesis, University of Exeter, 1995. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.307286.

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30

Sun, Wenjun. "Parallel data processing for semistructured data." Thesis, London South Bank University, 2006. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.434394.

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31

Klier, Peter. "A visual language for parallel processing." Thesis, Massachusetts Institute of Technology, 1987. http://hdl.handle.net/1721.1/91316.

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32

Chorão, Ricardo Daniel Domingos. "Parallel programming in biomedical signal processing." Master's thesis, Faculdade de Ciências e Tecnologia, 2012. http://hdl.handle.net/10362/8249.

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Dissertação para obtenção do Grau de Mestre em Engenharia Biomédica
Patients with neuromuscular and cardiorespiratory diseases need to be monitored continuously. This constant monitoring gives rise to huge amounts of multivariate data which need to be processed as soon as possible, so that their most relevant features can be extracted. The field of parallel processing, an area from the computational sciences, comes naturally as a way to provide an answer to this problem. For the parallel processing to succeed it is necessary to adapt the pre-existing signal processing algorithms to the modern architectures of computer systems with several processing units. In this work parallel processing techniques are applied to biosignals, connecting the area of computer science to the biomedical domain. Several considerations are made on how to design parallel algorithms for signal processing, following the data parallel paradigm. The emphasis is given to algorithm design, rather than the computing systems that execute these algorithms. Nonetheless, shared memory systems and distributed memory systems are mentioned in the present work. Two signal processing tools integrating some of the parallel programming concepts mentioned throughout this work were developed. These tools allow a fast and efficient analysis of long-term biosignals. The two kinds of analysis are focused on heart rate variability and breath frequency, and aim to the processing of electrocardiograms and respiratory signals, respectively. The proposed tools make use of the several processing units that most of the actual computers include in their architecture, giving the clinician a fast tool without him having to set up a system specifically meant to run parallel programs.

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Saeedi, Mohammed Hashem. "Parallel processing of frame-based networks." Thesis, Sheffield Hallam University, 1993. http://shura.shu.ac.uk/20308/.

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This Project involved the development of a simulation of a rectangular array of Processing Elements (PE's), with a dedicated frame based knowledge representation language. The main objective of the Project was to analyse and quantify the gain in speed of execution in a parallel environment, as compared with serial processing. The computational model of the language consisted of two main components: the knowledge base, and the replicated/distributed inference engine. The knowledge base was assumed to represent real world knowledge, in that it consisted of a large volume of information, which was divided into domains and hierarchies. When a query is made, appropriate portions of the knowledge base are mapped to the array of PEs on a one-to-one basis (one frame/PE), where each PE is capable of performing any relevant operations itself. The execution of a query is based on the propagation of messages across the array of PEs, where each message is contained in a data packet. Each packet holds the query-frame, created by interacting with the user, together with other relevant information used for knowledge manipulation. The main inference mechanism in the system is based on the parallel inheritance of properties, where each data packet carries inherited data from higher level to lower level frames, within the appropriate hierarchies. As each packet arrives at a PE which contains a relevant frame, a series of matching, and consequently, inheritance operations are performed. An algorithm, superimposed at the highest level of the system, computes time delays in relation to the overall architecture of the machine. There are two main operations for which time penalties are calculated : frame-processing and communication. The frame processing involves matching and inheritance operations, and the communication operation involves message passing and data packet traversal. During each execution cycle, the time penalties for both processing and communication are computed and stored in a file. These files are then used by a graphics package which transforms the numerical data into a set of graphs. These graphs are utilised in the analysis of the behaviour of the simulation. The analysis of the test-runs, and of their associated graphs, has yielded positive and encouraging results, demonstrating that there can be an average of a 35 fold gain in the speed of execution.

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34

Sheen, Timothy M. "Tools for portable parallel image processing." Thesis, University of Aberdeen, 1999. http://digitool.abdn.ac.uk/R?func=search-advanced-go&find_code1=WSN&request1=AAIU112832.

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The computational demands of real-time image processing often dictate the use of techniques such as parallel processing to meet required performance. This thesis considers a range of technology which may be used to accelerate image processing operations. An occam compiler is ported to a PowerPC based parallel computer. A multiprocessor configuration tool and Run Time System is developed, allowing occam programs to be distributed over an arbitrary sized network of PowerPC microprocessors. Code optimization techniques for image processing operations are investigated, with the development of a post-compilation code optimizer. The optimizer provides performance increases between 37% and 450% for a variety of image processing algorithms. The applicability of these tools is demonstrated with two image processing applications, micro-biological rapid imaging and sediment texture analysis. Edge detection, region merging and shape analysis algorithms are discussed in the context of the applications. The image processing algorithms are implemented in occam and performance is compared on serial and parallel platforms. The algorithms are then ported to a hardware implementation in a custom computing device, based on a field programmable gate array (FPGA), using the Handel hardware compilation system. The issues involved with this porting are discussed, including the compromises which must be considered when designing for a size constrained hardware platform. Amongst the issues considered are restricted precision data, low level parallelism and algorithmic simplifications. To provide performance equivalent to the hardware, between 5 and 10 processors would be required on the parallel machine, with considerably greater cost, size and power consumption.

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35

Harrison, Ian. "Locality and parallel optimizations for parallel supercomputing." Diss., Connect to the thesis, 2003. http://hdl.handle.net/10066/1274.

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36

Ferlin, Edson Pedro. "Avaliação de métodos de paralelização automática." Universidade de São Paulo, 1997. http://www.teses.usp.br/teses/disponiveis/76/76132/tde-09102008-111750/.

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Este trabalho aborda alguns conceitos e definições de processamento paralelo, que são aplicados a paralelização automática, e também às análises e condições para as dependências dos dados, de modo a aplicarmos os métodos de paralelização: Hiperplano, Transformação Unimodular, Alocação de Dados Sem Comunicação e Particionamento & Rotulação. Desta forma, transformamos um programa seqüencial em seu equivalente paralelo. Utilizando-os em um sistema de memória distribuída com comunicação através da passagem de mensagem MPI (Message-Passing Interface), e obtemos algumas métricas para efetuarmos as avaliações/comparações entre os métodos.
This work invoke some concepts and definitions about parallel processing, applicable in the automatic parallelization, and also the analysis and conditions for the data dependence, in order to apply the methods for parallelization: Hyperplane, Unimodular Transformation, Communication-Free Data Allocation and Partitioning & Labeling. On this way, transform a sequential program into an equivalent parallel one. Applying these programs on the distributed-memory system with communication through message-passing MPI (Message-Passing Interface), and we obtain some measurements for the evaluations/comparison between those methods.

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37

Nader, Babak. "Parallel solution of sparse linear systems." Full text open access at:, 1987. http://content.ohsu.edu/u?/etd,138.

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38

Gottemukkala, Vibby. "Scalability issues in distributed and parallel databases." Diss., Georgia Institute of Technology, 1996. http://hdl.handle.net/1853/8176.

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39

Hulot, Carlos. "Parallel tracking systems." Thesis, University of Southampton, 1995. https://eprints.soton.ac.uk/264882/.

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Tracking Systems provide an important analysis technique that can be used in many different areas of science. A Tracking System can be defined as the estimation of the dynamic state of moving objects based on `inaccurate’ measurements taken by sensors. The area encompasses a wide range of subjects, although the two most essential elements are estimation and data association. Tracking systems are applicable to relatively simple as well as more complex applications. These include air traffic control, ocean surveillance and control sonar tracking, military surveillance, missile guidance, physics particle experiments, global positioning systems and aerospace. This thesis describes an investigation into state-of-the-art tracking algorithms and distributed memory architectures (Multiple Instructions Multiple Data systems - “MIMD”) for parallel processing of tracking systems. The first algorithm investigated is the Interacting Multiple Model (IMM) which has been shown recently to be one of the most cost-effective in its class. IMM scalability is investigated for tracking single targets in a clean environment. Next, the IMM is coupled with a well-established Bayesian data association technique known as Probabilistic Data Association (PDA) to permit the tracking of a target in different clutter environments (IMMPDA). As in the previous case, IMMPDA scalability is investigated for tracking a single target in different clutter environments. In order to evaluate the effectiveness of these new parallel techniques, standard languages and parallel software systems (to provide message-passing facilities) have been used. The main objective is to demonstrate how these complex algorithms can benefit in the general case from being implemented using parallel architectures.

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40

Kohlberger, Timo. "Variational domain decomposition for parallel image processing." [S.l.] : [s.n.], 2007. http://deposit.ddb.de/cgi-bin/dokserv?idn=985127996.

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41

Wang, Yang. "Distributed parallel processing in networks of workstations." Ohio : Ohio University, 1994. http://www.ohiolink.edu/etd/view.cgi?ohiou1174328416.

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42

Chiang, K. (Kuoning). "Parallel processing approach for crash dynamic analysis." Diss., Georgia Institute of Technology, 1989. http://hdl.handle.net/1853/17917.

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43

Guo, Yan. "Real-time parallel processing for power applications." Thesis, McGill University, 1993. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=41602.

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The thesis describes the design, implementation and applications of two multiprocessor systems. A Multiprocessor Controller and an Extensible Modular Multiprocessor System have been built and have been used to solve problems of real-time digital control and real-time digital simulation in the power electronics and power systems areas.
The Multiprocessor Controller, built around three fixed-point digital signal processors(DSPs), has been used in real-time parallel processing to control a voltage-source type pulse-width-modulated power converter. In a pole-placement control strategy with a state observer, the converter has been stabilized with its dc link capacitance reduced by a factor of as much as 120, thus making the converter a potentially practical device for High Voltage direct current transmission.
The Extensible Modular Multiprocessor System consists of modules which can be easily added in a mesh architecture to provide more computing power. Each module consists of one or two autonomous processing units (PUs) and the supporting control/interface circuits. A prototype of three modules (five floating-point DSPs) has been built and used in parallel processing to simulate a small power system with two turbo-generators operating in real time as a Transient Network Analyzer(TNA).
The power system equations are partitioned by using a new method in which the system is modeled as an interconnection of functional blocks. The power system is simulated by an interconnection of DSP modules, with one module simulating one block. The results of elaborate tests demonstrate the correctness of: (a) the new partitioning method, and (b) the design and operation of the Extensible Modular Multiprocessor System. The results further show that the new partitioning method together with the Extensible Modular Multiprocessor System form a promising approach to digitize the Transient Network Analyzer.

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Tremblay, Pierre P. "Parallel processing in intermediate-level computer vision." Thesis, McGill University, 1992. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=56781.

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The problem investigated in this thesis is that of giving intermediate-level vision researchers adequate parallel processing tools for their work, where data and computational structures do not fit the SIMD execution model, but require a MIMD execution model instead. The contribution of this thesis is a comparison of 3 general-purpose MIMD parallel processing systems as tools for intermediate-level vision, by evaluating them against criteria which capture the essential issues in programming intermediate-level vision algorithms on such machines. According to my criteria, the best-suited of the 3 systems is composed of the Id functional language running on the Massachusetts Institute of Technology's Tagged-Token Dataflow Architecture (M.I.T. TTDA).

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45

Prager, Richard William. "Parallel processing networks for automatic speech recognition." Thesis, University of Cambridge, 1987. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.238443.

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46

Paw, G. F. "Parallel processing procedures for finite element analysis." Thesis, Swansea University, 1995. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.638432.

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The objective of the research is to improve the solution capability of a finite element system by the use of parallel processing techniques. Initial research began with the transputer system at a time when the transputer was considered the ultimate parallel machine. The transputer based parallel program LINSUB was developed to solve linear static stress analysis problems using a modified Cholesky algorithm for substruturing. Further developments in this field were halted when it became clear that other parallel systems, namely, those concerned with workstation clusters, were moving rapidly ahead of the transputer in terms of performance and the transputer was rapidly becoming obsolete. Further work concentrated on parallel processing on workstation clusters in a local area network and the effectiveness of the Parallel Virtual Machine (PVM) used as the supportive parallel environment was investigated. This work was then extended onto a shared memory - MIMD system on the Silicon Graphics Power Challenge workstation. The program PARFEI (PARallel Finite Element Implementation) was developed for large linear static stress analyses and nonlinear analyses of elasto-plastic problems in particular, using a multifrontal approach based on domain decomposition techniques. An implementation based on a specially designed share memory (SM) synchronization concept was incorporated into the same program, so that PARFEI can run sequentially or in parallel using either PVM or SM. Performance tests were carried out on the workstation clusters using PVM and on the shared memory machine using PVM and SM. The results revealed that, in general, PVM performed better for the linear system and SM was the more efficient of the two when an incremental/iterative process was involved.

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Hellier, R. L. "Designing numerical algorithms based on parallel processing." Thesis, University of Kent, 1986. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.375054.

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Martinez, Kirk. "Parallel architectures for real-time image processing." Thesis, University of Essex, 1989. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.238377.

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Tregidgo, R. W. S. "Parallel processing and automatic postal address recognition." Thesis, University of Essex, 1992. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.304946.

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NAZARETH, RENATO JOSE GONCALVES DE. "INTERCONNECTION ELEMENT FOR A PARALLEL PROCESSING SYSTEM." PONTIFÍCIA UNIVERSIDADE CATÓLICA DO RIO DE JANEIRO, 1994. http://www.maxwell.vrac.puc-rio.br/Busca_etds.php?strSecao=resultado&nrSeq=10080@1.

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Este trabalho propõe uma nova estrutura de rede de interconexão para o sistema de processamento paralelo MULTIPLUS em desenvolvimento no NCE/UFRJ. A rede é tolerante a falhas, e trabalha com chaves de 4 entradas e 4 saídas. Inicialmente, discutem-se as formas de interconexão de máquinas paralelas. Descrevem-se sucintamente algumas arquiteturas de sistemas paralelos com ênfase no MULTIPLUS. A seguir, comentam-se alguns conceitos básicos a respeito de redes de interconexão. Apresenta-se a árvore genealógica das redes de interconexão multiestágio, acompanhada de um breve histórico do surgimento das mesmas. Destacam-se algumas redes de percurso único relacionadas com esta dissertação. Após uma introdução aprofundada sobre tolerância a falhas, descrevem-se algumas redes tolerantes a falhas. Uma análise bem estruturada sobre tolerância a falhas lança as bases para a proposta da rede de interconexão. Introduz-se o subsistema de interconexão do MULTIPLUS, focalizando a estrutura e os tipos de mensagens existentes. Discutem-se vários aspectos relativos à rede proposta, tais como a topologia, o algoritmo e tipo de roteamento e, principalmente, o mecanismo de tolerância a falhas. Descreve-se detalhadamente o projeto do elemento de chaveamento 4x4, com destaque nas máquinas de estado controladoras da chave, porém sem detrimento do circuito de prioridade, do circuito de contagem de pacotes, do circuito de comparação de tamanho da mensagem, do circuito de chaveamento, e do circuito de realinhamento de endereço. Inclui-se também uma descrição detalhada do funcionamento do elemento de chaveamento. Por fim, apresentam-se as expectativas de desempenho de uma rede com 16 entradas e 16 saídas, onde calculam-se o atraso para percorrer a rede de uma mensagem de leitura (12 pacotes), o atraso médio por pacote, o throughput médio por porta, e o throughput médio total da rede. Compara-se o desenho de três redes - uma de tamanho mínimo (4x4), outra de tamanho máximo (256x256), e outra de tamanho 16x16 - implementadas com chaves 2x2 e 4x4. apresentam-se os resultados do projeto, incluindo-se as EPLDs selecionadas, o custo aproximado de uma rede de 256x256 implementada com as referidas EPLDs, e os tempos de compilação dos blocos componentes da chave. Propõe-se a implementação da chave em VLSI, bem como a inclusão da capacidade de comunicação multicast, como futuros desenvolvimentos.
This work proposes a new structure of interconnection network for the MULTIPLUS, a parallel processing system under development at NCE/UFRJ. The network is fault tolerant, and works with 4 inputs and 4 outputs switches. Initially, some interconnection forms of parallel machines are discussed. Some parallel systems architecture are briefly described with emphasis on MULTIPLUS. Following, some basic concepts of interconnection networks are commented. A family tree of multistage interconnection networks, and a short history of their appearance in the literature, are presented. Some Single Path Networks, wich are related with this dissertation, are briefly described. After a deep introduction of fault tolerance, some fault- tolerant interconnection network are described. A well- structured analysis on fault tolerance gives the basis for the interconnection network proposal. The MULTIPLUS interconnection subsystem is introduced, focusing the messages´ types and structure. Various aspects regarding the proposed network - such as the topology, routing type and algorithm and, mainly, the fault- tolerance mechanism - are discussed. The design of the 4x4 switch is described in details, with emphasis on switch controllers finite state machines, but also including the priority circuit, packet counting circuit, message size compariong circuit. A detailed description of the seitch operation is given. At last, the expectede performance of a 16 inputs and 16 outpus network, where a reading message (12 packets) delay, the packet mean delay, port mean throughput, and overall mean throughput are calculated. The performance of 3 networks - one with minimum size (4x4), other with maximum size (256x256), and another with 16x16 size, each of which implemented with 2x2 and 4x4 switches - are compared. The design results are presented, including the selected EPLDs, apprximated cost of a 256x256 network implemented with the already mentioned EPLDs, and the compiling times of the switch blocks. The switch implementation in VLSI tecnology, as well the multicast communication capability, are proposed as future developments.

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