Relevant bibliographies by topics / OSCILLATOR CIRCUIT

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  1. Journal articles
  2. Dissertations / Theses
  3. Books
  4. Book chapters
  5. Conference papers
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Academic literature on the topic 'OSCILLATOR CIRCUIT'

Author: Grafiati
Published: 11 September 2023

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Journal articles on the topic "OSCILLATOR CIRCUIT"

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Chien, Hung-Chun. "New Realizations of Single OTRA-Based Sinusoidal Oscillators." Active and Passive Electronic Components 2014 (2014): 1–12. http://dx.doi.org/10.1155/2014/938987.

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This study proposes three new sinusoidal oscillators based on an operational transresistance amplifier (OTRA). Each of the proposed oscillator circuits consists of one OTRA combined with a few passive components. The first circuit is an OTRA-based minimum RC oscillator. The second circuit is capable of providing independent control on the condition of oscillation without affecting the oscillation frequency. The third circuit exhibits independent control of oscillation frequency through a capacitor. This study first introduces the OTRA and the related formulations of the proposed oscillator circuits, and then discusses the nonideal effects, sensitivity analyses, and frequency stability of the presented circuits. The proposed oscillators exhibit low sensitivities and good frequency stability. Because the presented circuits feature low impedance output, they can be connected directly to the next stage without cascading additional voltage buffers. HSPICE simulations and experimental results confirm the feasibility of the new oscillator circuits.
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Horng, Jiun-Wei. "Quadrature Oscillators Using Operational Amplifiers." Active and Passive Electronic Components 2011 (2011): 1–4. http://dx.doi.org/10.1155/2011/320367.

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Two new quadrature oscillator circuits using operational amplifiers are presented. Outputs of two sinusoidal signals with 90° phase difference are available in each circuit configuration. Both proposed quadrature oscillators are based on third-order characteristic equations. The oscillation conditions and oscillation frequencies of the proposed quadrature oscillators are orthogonally controllable. The circuits are implemented using the widely available operational amplifiers which results in low output impedance and high current drive capability. Experimental results are included.
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Abuelma'atti, Muhammad Taher, and Muhammad Haroon Khan. "Grounded Capacitor Oscillators Using A Single Operational Transconductance Amplifier." Active and Passive Electronic Components 19, no. 2 (1996): 91–98. http://dx.doi.org/10.1155/1996/17943.

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New oscillator circuits using operational transconductance amplifiers (OTAs) are presented. Each circuit uses a single OTA and grounded capacitors. The feasibility of obtaining oscillators with independent control of frequency and oscillation is considered. Also, the feasibility of exploiting, to advantage, the frequency dependence of the OTA-transconductance is considered. This may result in OTA-based RC oscillators using only one externally-connected capacitor.
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Abuelmaatti, Muhammad Taher, and Muhammad Ali Al-Qahtani. "Active-Only Sinusoidal Oscillator Circuits." Active and Passive Electronic Components 24, no. 4 (2001): 223–32. http://dx.doi.org/10.1155/2001/69690.

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Two new active-only sinusoidal oscillator circuits are proposed. The first circuit uses one current feedback operational amplifier (CFOA) and four operational transconductance amplifiers (OTAs). The second circuit uses only four OTAs. Without using any external passive elements, voltage (or current) control of the frequency and condition of oscillation, of the two circuits, can be achieved by adjusting the bias currents of the OTAs. The proposed circuits enjoy low sensitivities.
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Pathak, J. K. "Two New Single-Resistor-Controlled Quadrature Sinusoidal Oscillators using Current-Differencing-Buffered-Amplifiers." International Journal of Advance Research and Innovation 5, no. 2 (2017): 87–94. http://dx.doi.org/10.51976/ijari.521716.

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Two new single resistor–controlled quadrature oscillator (SRCQO) circuits using only two current differencing buffered amplifiers (CDBAs) as active elements and only three resistors and two capacitors, are presented. First proposed circuit uses all input terminals of the CDBA to exploit full capacity of the CDBAs, offers better sensitivities with respect to active parameters and has wide frequency range of operation. The second proposed circuit provides very good low frequency performance with respect to total harmonic distortion. Separate single resistors can control both oscillation condition and the oscillation frequency of the proposed quadrature oscillator circuits independently. PSPICE simulation results based upon commercially available AD844 ICs, to construct the CDBAs, are included which confirm the practical workability of the new proposed quadrature oscillator circuits.
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Abuelma'atti, Muhammad Taher. "New Current-Mode Oscillators Using a Single Unity-Gain Current-Follower." Active and Passive Electronic Components 18, no. 3 (1995): 151–57. http://dx.doi.org/10.1155/1995/90218.

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A general circuit for realizing current-mode oscillators using a single negative unity-gain current-follower is presented. Using this circuit new oscillators of this class can be discovered systematically. Simulation results obtained from three new circuits are presented. The feasibility of obtaining a quadrature oscillator is investigated.
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Gan, Kwang Jow, Zheng Jie Jiang, Cher Shiung Tsai, Din Yuen Chan, Jian Syong Huang, Zhen Kai Kao, and Wen Kuan Yeh. "Design of NDR-Based Oscillators Suitable for the Nano-Based BiCMOS Technique." Applied Mechanics and Materials 328 (June 2013): 669–73. http://dx.doi.org/10.4028/www.scientific.net/amm.328.669.

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We present three oscillator designs using the negative-differential-resistance (NDR) circuit which is composed of several Si-based metal-oxide-semiconductor field-effect transistor (MOS) devices and one SiGe-based heterojunction bipolar transistor (HBT) devices. These oscillator circuits are composed of the NDR circuit, resistor, inductor, and capacitor. The oscillation frequencies are about several GHz based on the HSPICE simulation results. The circuits are designed using a standard 0.18 μm BiCMOS technique. Because our circuits are mainly made of a BiCMOS-NDR circuit that is different from a tradition NDR device made by a resonant tunneling diode with a quantum-well structure, we can utilize the nanobased BiCMOS process to implement these circuits by further improving the parameters.
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Abuelma'atti, Muhammad Taher, Abdulrahman Khalaf Al-Ali, Sami Saud Buhalim, and Syed Tauseef Ahmed. "Digitally Programmable Partially Active-R Sinusoidal Oscillators." Active and Passive Electronic Components 17, no. 2 (1994): 83–89. http://dx.doi.org/10.1155/1994/23230.

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New, simple sinusoidal oscillator circuits are proposed. Each circuit uses an internally compensated operational amplifier, a resistor, and a capacitor. The feasibility of obtaining digitally programmable sinusoidal oscillation is studied and a new digitally programmable capacitorless resistorless sinusoidal oscillator is developed.
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Wang, San-Fu, Hua-Pin Chen, Yitsen Ku, and Chia-Ling Lee. "Versatile Voltage-Mode Biquadratic Filter and Quadrature Oscillator Using Four OTAs and Two Grounded Capacitors." Electronics 9, no. 9 (September 11, 2020): 1493. http://dx.doi.org/10.3390/electronics9091493.

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This article presents a versatile voltage-mode (VM) biquad filter with independently electronic tunability. The proposed structure using one dual-output operational transconductance amplifier, three single-output operational transconductance amplifiers (OTAs) and two grounded capacitors was explored to derive a new VM quadrature oscillator with the independent control of the oscillation frequency and the oscillation condition. The proposed versatile VM biquad filter achieves nearly all of the main advantages: (i) simultaneous realizations of band-reject, band-pass, and low-pass from the same architecture, (ii) multiple-input and multiple-output functions, (iii) independent electronic adjustability of quality factor and resonant angular frequency, (iv) no resistor needed, (v) all input terminals with cascade functions, (vi) no additional inverting amplifier for input signals, (vii) using only grounded capacitors, and (viii) easy to implement a VM quadrature oscillator with independent electronically controlled oscillation frequency and oscillation condition. The proposed versatile VM biquad filter employs only four OTAs and two grounded capacitors. The active components of the proposed VM biquad filter are one less than that of recent reports. The proposed circuit also brings versatility and simplicity to the design of VM biquad filters and VM quadrature oscillators. Filters and oscillators with less active and passive components have the advantages of low cost, low power dissipation, low circuit complexity, and low noise. Commercially available integrated circuit LT1228 and discrete components can be used to implement the proposed OTA-based circuits. The simulation and experiment results validated the theoretical analysis.
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I'msaddak, Lobna, Dalenda Ben Issa, Abdennaceur Kachouri, Mounir Samet, and Hekmet Samet. "Infrared Oscillators in Conventional Carbon Nanotube FET Technology." Journal of Circuits, Systems and Computers 24, no. 04 (March 4, 2015): 1550053. http://dx.doi.org/10.1142/s021812661550053x.

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This paper presents the design of C-CNTFET oscillator's arrays for infrared 'IR' technology. These arrays are contained by both of the LC-tank and the voltage control 'coupled N- and P-type C-CNTFET LC-tank' oscillators. In this paper, the analysis of the impact of CNT diameter variations and the nonlinear capacitances (C GD and C GS ) were introduced, especially on propagation time, oscillation frequency and power consumption. The C-CNTFET inverter, ring oscillator, LC-tank and coupled N- and P-type C-CNTFET LC-tank oscillator structures were designed and their speeding and performances have been investigated with the proposed n-type of C-CNTFET model supplied by a 0.5 V power voltage. Simulation results show that the n- and p-types LC-tank oscillator circuit designs achieved an approximately equal oscillation frequency, response time and power consumption. Whereas the coupled N- and P-type C-CNTFET LC-tank oscillator has the lowest power consumption equal to 0.13 μW, the highest oscillation frequency (10.08 THz) and the fastest response time (1.81 ps).
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Dissertations / Theses on the topic "OSCILLATOR CIRCUIT"

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Biswas, Shampa. "Integrated CMOS Doppler Radar : System Specification & Oscillator Design." Thesis, Linköpings universitet, Elektroniska Kretsar och System, 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-129222.

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This thesis report presents system specification, such as frequency and output power level, and selection topology of an oscillator circuit suitable for a CMOS Integrated Doppler radar application, in order to facilitate short range target detection within 5-15 m range, using a 0.35 μm CMOS process. With this selected CMOS process, the frequency band at 2.45 GHz or 5 GHz, with a maximum output power level of 25 mW (e.i.r.p), is found to be appropriate for the whole system to obtain a good performance. In this thesis work, a Ring VCO with pseudo-differential architecture has been designed and optimised for 2.45 GHz application. However, for 5 GHz application, a differential cross-coupled LC VCO oscillator topology has been suggested and it is so designed that it can be further scaled down to operate at a frequency of 2.45 GHz. The performance of the oscillator circuits has been tested at circuit level and has been presented as simulation results in this report.
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Bosley, Ryan Travis. "A VHF/UHF Voltage Controlled Oscillator in 0.5um BiCMOS." Thesis, Virginia Tech, 2003. http://hdl.handle.net/10919/31452.

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The dramatic increase in market demand for wireless products has inspired a trend for new designs. These designs are smaller, less expensive, and consume less power. A natural result of this trend has been the push for components that are more highly integrated and take up less real estate on the printed circuit board (PCB). Major efforts are underway to reduce the number of integrated circuits (ICs) in newer designs by incorporating several functions into a single chip. Availability of newer technologies such as silicon bipolar with complementary metal oxide semiconductor (BiCMOS) has helped facilitate this move toward more complex circuit topologies onto one die. BiCMOS achieves efficient chip area utilization by combining bipolar transistors, suited for higher frequency analog circuits with CMOS transistors that are useful for digital functions and lower frequency analog circuits. A voltage controlled oscillator (VCO) is just one radio frequency (RF) circuit block that can benefit from a more complex semiconductor process like BiCMOS. This thesis presents the design and evaluation of an integrated VCO in the IBM 5S BiCMOS process. IBM 5S is a 0.5 um, single poly, five-metal process with surface channel PFETs and NFETs. The process also features self-aligned extrinsic base NPN bipolar devices exhibiting ft of up to 24 GHz. The objective of this work is to obtain a VCO design that provides a high degree of functionality while maximizing performance over environmental conditions. It is shown that an external feedback and resonator network as well as a bandgap voltage referenced bias circuit help to achieve these goals. An additional objective for this work is to highlight several pragmatic issues associated with designing an integrated VCO capable of high volume production. The Clapp variant of the Colpitts topology is selected for this application for reasons of robust operation, frequency stability, and ease of implementing in integrated form. Design is performed at 560 MHz using the negative resistance concept. Simulation results from Pspice and the Agilent ADS are presented. Implementation related issues such as bondwire inductances and layout details are covered. The VCO characterization is shown over several environmental conditions. The final nominal design is capable of: tuning over 150 MHz (22%) and delivering â 4.2 dBm into a 50 Ohm load while consuming only 9mA from a 3.0V supply. The phase noise at these conditions is -92.5 dBc/Hz at a frequency offset of 10 kHz from the carrier. Finally, the conclusion of this work lists some suggestions for potential future research.
Master of Science
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Yu, Chuanzhao. "STUDY OF NANOSCALE CMOS DEVICE AND CIRCUIT RELIABILITY." Doctoral diss., University of Central Florida, 2006. http://digital.library.ucf.edu/cdm/ref/collection/ETD/id/3551.

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The development of semiconductor technology has led to the significant scaling of the transistor dimensions -The transistor gate length drops down to tens of nanometers and the gate oxide thickness to 1 nm. In the future several years, the deep submicron devices will dominate the semiconductor industry for the high transistor density and the corresponding performance enhancement. For these devices, the reliability issues are the first concern for the commercialization. The major reliability issues caused by voltage and/or temperature stress are gate oxide breakdown (BD), hot carrier effects (HCs), and negative bias temperature instability (NBTI). They become even more important for the nanoscale CMOS devices, because of the high electrical field due to the small device size and high temperature due to the high transistor densities and high-speed performances. This dissertation focuses on the study of voltage and temperature stress-induced reliability issues in nanoscale CMOS devices and circuits. The physical mechanisms for BD, HCs, and NBTI have been presented. A practical and accurate equivalent circuit model for nanoscale devices was employed to simulate the RF performance degradation in circuit level. The parameter measurement and model extraction have been addressed. Furthermore, a methodology was developed to predict the HC, TDDB, and NBTI effects on the RF circuits with the nanoscale CMOS. It provides guidance for the reliability considerations of the RF circuit design. The BD, HC, and NBTI effects on digital gates and RF building blocks with the nanoscale devices – low noise amplifier, oscillator, mixer, and power amplifier, have been investigated systematically. The contributions of this dissertation include: It provides a thorough study of the reliability issues caused by voltage and/or temperature stresses on nanoscale devices – from device level to circuit level; The more real voltage stress case – high frequency (900 MHz) dynamic stress, has been first explored and compared with the traditional DC stress; A simple and practical analytical method to predict RF performance degradation due to voltage stress in the nanoscale devices and RF circuits was given based on the normalized parameter degradations in device models. It provides a quick way for the designers to evaluate the performance degradations; Measurement and model extraction technologies, special for the nanoscale MOSFETs with ultra-thin, ultra-leaky gate oxide, were addressed and employed for the model establishments; Using the present existing computer-aided design tools (Cadence, Agilent ADS) with the developed models for performance degradation evaluation due to voltage or/and temperature stress by simulations provides a potential way that industry could use to save tens of millions of dollars annually in testing costs. The world now stands at the threshold of the age of nanotechnology, and scientists and engineers have been exploring here for years. The reliability is the first challenge for the commercialization of the nanoscale CMOS devices, which will be further downscaling into several tens or ten nanometers. The reliability is no longer the post-design evaluation, but the pre-design consideration. The successful and fruitful results of this dissertation, from device level to circuit level, provide not only an insight on how the voltage and/or temperature stress effects on the performances, but also methods and guidance for the designers to achieve more reliable circuits with nanoscale MOSFETs in the future.
Ph.D.
Department of Electrical and Computer Engineering
Engineering and Computer Science
Electrical Engineering
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Chen, Tingsu. "CMOS High Frequency Circuits for Spin Torque Oscillator Technology." Licentiate thesis, KTH, Integrerade komponenter och kretsar, 2014. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-139588.

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Spin torque oscillator (STO) technology has a unique blend of features, including but not limited to octave tunability, GHz operating frequency, and nanoscaled size, which makes it highly suitable for microwave and radar applications. This thesis studies the fundamentals of STOs, utilizes the state-of-art STO's advantages, and proposes two STO-based microwave systems targeting its microwave applications and measurement setup, respectively. First, based on an investigation of possible STO applications, the magnetic tunnel junction (MTJ) STO shows a great suitability for microwave oscillator in multi-standard multi-band radios. Yet, it also imposes a large challenge due to its low output power, which limits it from being used as a microwave oscillator. In this regard, different power enhancement approaches are investigated to achieve an MTJ STO-based microwave oscillator. The only possible approach is to use a dedicated CMOS wideband amplifier to boost the output power of the MTJ STO. The dedicated wideband amplifier, containing a novel Balun-LNA, an amplification stage and an output buffer, is proposed, analyzed, implemented, measured and used to achieve the MTJ STO-based microwave oscillator. The proposed amplifier core consumes 25.44 mW from a 1.2 V power supply and occupies an area of 0.16 mm2 in a 65 nm CMOS process. The measurement results show a S21 of 35 dB, maximum NF of 5 dB, bandwidth of 2 GHz - 7 GHz. This performance, as well as the measurement results of the proposed MTJ STO-based microwave oscillator, show that this microwave oscillator has a highly-tunable range and is able to drive a PLL. The second aspect of this thesis, firstly identifies the major difficulties in measuring the giant magnetoresistance (GMR) STO, and hence studying its dynamic properties. Thereafter, the system architecture of a reliable GMR STO measurement setup, which integrates the GMR STO with a dedicated CMOS high frequency IC to overcome these difficulties in precise characterization of GMR STOs, is proposed. An analysis of integration methods is given and the integration method based on wire bonding is evaluated and employed, as a first integration attempt of STO and CMOS technologies. Moreover, a dedicated high frequency CMOS IC, which is composed of a dedicated on-chip bias-tee, ESD diodes, input and output networks, and an amplification stage for amplifying the weak signal generated by the GMR STO, is proposed, analyzed, developed, implemented and measured. The proposed dedicated high frequency circuits for GMR STO consumes 14.3 mW from a 1.2 V power supply and takes a total area of 0.329 mm2 in a 65 nm CMOS process. The proposed on-chip bias-tee presents a maximum measured S12 of -20 dB and a current handling of about 25 mA. Additionally, the proposed dedicated IC gives a measured gain of 13 dB with a bandwidth of 12.5 GHz - 14.5 GHz. The first attempt to measure the (GMR STO+IC) pair presents no RF signal at the output. The possible cause and other identified issues are given.

QC 20140114

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Van, der Merwe John. "An experimental investigation into the validity of Leeson's equation for low phase noise oscillator design." Thesis, Stellenbosch : University of Stellenbosch, 2010. http://hdl.handle.net/10019.1/5424.

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Thesis (MScEng (Electrical and Electronic Engineering))--University of Stellenbosch, 2010.
Thesis presented in partial fulfilment of the requirements for the degree Master of Science in Engineering at the University of Stellenbosch
ENGLISH ABSTRACT: In 1966, D.B. Leeson presented his model on phase noise in a letter entitled A Simple Model of Feedback Oscillator Noise Spectrum. This model usually requires an additional e ffective noise figure in order to conform with measured results. (This e ffective noise fi gure has to be determined by means of curve-fi tting Leeson's model with the measured results.) The model is, however, relatively simple to use, compared with other more accurate phase noise models that have since been developed and which can only be solved numerically with the aid of computers. It also gives great insight regarding component choices during the design process. Therefore several experiments were conducted in order to determine conditions under which Leeson's model may be considered valid and accurate. These experiments, as well as the conclusions drawn from their results, are discussed in this document.
AFRIKAANSE OPSOMMING: In 1966 stel D.B. Leeson sy faseruis model bekend in 'n brief getiteld A Simple Model of Feedback Oscillator Noise Spectrum. Hierdie model vereis gewoonlik die gebruik van 'n bykomende e ektiewe ruissyfer, sodat die model ooreenstem met die gemete resultate. (Hierdie e ektiewe ruissyfer kan slegs bepaal word deur middel van krommepassings tussen Leeson se model en die gemete resultate.) Die model is egter relatief eenvoudig om te gebruik in teenstelling met ander, meer akkurate, faseruis modelle wat sedertdien ontwikkel is en slegs met behulp van rekenaars opgelos kan word. Dit bied ook onoortre ike insig ten opsigte van komponent keuses tydens die ontwerpsproses. Om hierdie rede is verskeie eksperimente uitgevoer met die doel om toestande te identi seer waaronder Leeson se model as geldig en akkuraat geag kan word. Hierdie eksperimente, asook die gevolgtrekkings wat van hul resultate gemaak is, word in hierdie dokument behandel.
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Wang, Shen. "Design and Analysis of a Low-Power Low-Voltage Quadrature LO Generation Circuit for Wireless Applications." Diss., Virginia Tech, 2012. http://hdl.handle.net/10919/39301.

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The competitive market of wireless communication devices demands low power and low cost RF solutions. A quadrature local oscillator (LO) is an essential building block for most transceivers. As the CMOS technology scales deeper into the nanometer regime, design of a low-power low-voltage quadrature LO still poses a challenge for RF designers. This dissertation investigates a new quadrature LO topology featuring a transformer-based voltage controlled oscillator (VCO) stacked with a divide-by-two for low-power low-voltage wireless applications. The transformer-based VCO core adopts the Armstrong VCO configuration to mitigate the small voltage headroom and the noise coupling. The LO operating conditions, including the start-up condition, the oscillation frequency, the voltage swing and the current consumption are derived based upon a linearized small-signal model. Both linear time-invariant (LTI) and linear time-variant (LTV) models are utilized to analyze the phase noise of the proposed LO. The results indicate that the quality factor of the primary coil and the mutual inductance between the primary and the secondary coils play an important role in the trade-off between power and noise. The guidelines for determining the parameters of a transformer are developed. The proposed LO was fabricated in 65 nm CMOS technology and its die size is about 0.28 mm2. The measurement results show that the LO can work at 1 V supply voltage, and its operation is robust to process and temperature variations. In high linearity mode, the LO consumes about 2.6 mW of power typically, and the measured phase noise is -140.3 dBc/Hz at 10 MHz offset frequency. The LO frequency is tunable from 1.35 GHz to 1.75 GHz through a combination of a varactor and an 8-bit switched capacitor bank. The proposed LO compares favorably to the existing reported LOs in terms of the figure of merit (FoM). More importantly, high start-up gain, low power consumption and low voltage operation are achieved simultaneously in the proposed topology. However, it also leads to higher design complexity. The contributions of this work can be summarized as 1) proposal of a new quadrature LO topology that is suitable for low-power low-voltage wireless applications, 2) an in-depth circuit analysis as well as design method development, 3) implementation of a fully integrated LO in 65 nm CMOS technology for GPS applications, 4) demonstration of high performance for the design through measurement results. The possible future improvements include the transformer optimization and the method of circuit analysis.
Ph. D.
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Arndt, Grégory. "System architecture and circuit design for micro and nanoresonators-based mass sensing arrays." Thesis, Paris 11, 2011. http://www.theses.fr/2011PA112358/document.

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Le sujet de thèse porte sur des micro/nanorésonateurs ainsi que leurs électroniques de lecture. Les composants mécaniques sont utilisés pour mesurer des masses inférieures à l'attogramme (10-18 g) ou de très faibles concentrations de gaz. Ces composants peuvent ensuite être mis en réseau afin de réaliser des spectromètres de masse ou des détecteurs de gaz. Afin d'atteindre les résolutions nécessaires, il a été choisi d'utiliser une détection harmonique de résonance détectant les variations de la fréquence de résonance d'une nanostructure mécanique. Les dimensions du résonateur sont réduites afin d'augmenter sensibilité en masse, cependant le niveau du signal électrique en sortie du composant est également réduit. Ce faible signal nécessite donc de concevoir de nouvelles transductions électromécaniques ainsi que des architectures électroniques qui minimisent le bruit, les couplages parasites et qui peuvent être mise en réseau
The PhD project focuses on micro or nanomechanical resonators and their surrounding electronics environment. Mechanical components are employed to sense masses in the attogram range (10−18 g) or extremely low gas concentrations. The components can then be implemented in arrays in order to construct cutting-edge mass spectrometers or gas chromatographs. To reach the necessary resolutions, a harmonic detection of resonance technique is employed that measures the shift of the resonant frequency of a tiny mechanical structure due to an added mass or a gas adsorption. The need of shrinking the resonator's dimensions to enhance the sensitivity also reduces the signal delivered by the component. The resonator low output signal requires employing new electromechanical resonator topologies and electronic architectures that minimize the noise, the parasitic couplings and that can be implemented in arrays
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8

Fitzpatrick, Justin Jennings. "Analysis and Design of Low-Jitter Oscillators." Diss., CLICK HERE for online access, 2004. http://contentdm.lib.byu.edu/ETD/image/etd369.pdf.

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Kellum, Reginald 1963. "Analysis and design of a regenerative differential voltage-controlled oscillator for high frequency integrated circuit applications." Thesis, The University of Arizona, 1991. http://hdl.handle.net/10150/278040.

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An investigation into the feasibility of designing a monolithic high frequency voltage controlled oscillator is performed. With design constraints of an oscillator Q between 5 and 10 and minimal chip area, the resonant LC tank and negative resistive cross coupled differential amplifier circuit is analyzed and design guidelines are developed. Analysis of the circuit encompasses both linear and non-linear modes of operation of the circuit, predicts the fundamental frequency of oscillation, and highlights design limitations for the resonant elements in terms of meeting the Q specifications at higher frequencies. Experimental results on a fixed frequency version of the VCO circuit yielded good agreement with theoretical analysis. For the parameters tested, the error was on the order of 10% in most cases.
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Bunch, Ryan Lee. "A Fully Monolithic 2.5 GHz LC Voltage Controlled Oscillator in 0.35 um CMOS Technology." Thesis, Virginia Tech, 2001. http://hdl.handle.net/10919/32287.

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The explosive growth in wireless communications has led to an increased demand for wireless products that are cheaper, smaller, and lower power. Recently there has been an increased interest in using CMOS, a traditional digital and low frequency analog IC technology, to implement RF components such as mixers, voltage controlled oscillators (VCOs), and low noise amplifiers (LNAs). Future mass-market RF links, such as BlueTooth, will require the potentially low-cost single-chip solutions that CMOS can provide. In order for such single-chip solutions to be realized, RF circuits must be designed that can operate in the presence of noisy digital circuitry. The voltage controlled oscillator (VCO), an important building block for RF systems, is particularly sensitive when exposed to an electrically noisy environment. In addition, CMOS implementations of VCOs have been hampered by the lack of high-quality integrated inductors. This thesis focuses on the design of a fully integrated 2.5 GHz LC CMOS VCO. The circuit is intended as a vehicle for future mixed RF/digital noise characterization. The circuit was implemented in a 0.35 um single poly, 4 metal, 3.3 V, CMOS process available through MOSIS. The oscillator uses a complementary negative transconductance topology. This oscillator circuit is analyzed as a negative-resistance oscillator. Monolithic inductors are designed using full-wave electromagnetic field solver software. The design of an "inversion-mode" MOS (I-MOS) tuning varactor is presented, along with a discussion of the effects of varactor nonlinearity on VCO performance. I-MOS varactors are shown to have substantially improved tuning range (and tuning curve linearity) over conventional MOS varactors. Practical issues pertaining to CMOS VCO circuit design, layout, and testing are also discussed. The characterization of the VCO and the integrated passives is presented. The VCO achieves a best-case phase noise of -106.7 dBc/Hz at 100 kHz offset from a center frequency of 2.73 GHz. The tuning range is 425 MHz (17%). The circuit consumes 9 mA from a 3.3 V supply. This represents excellent performance for CMOS oscillator designs reported at this frequency. Finally, several recommendations for improvements in oscillator performance and characterization are discussed.
Master of Science
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Books on the topic "OSCILLATOR CIRCUIT"

1

Graf, Rudolf F. The modern oscillator circuit encyclopedia. Blue Ridge Summit, PA: Tab Books, 1992.

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MIC & MMIC amplifier and oscillator circuit design. Boston: Artech House, 1990.

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A, Miranda F., and United States. National Aeronautics and Space Administration., eds. Space qualified hybrid superconductor/semiconductor planar oscillator circuit. [Washington, DC]: National Aeronautics and Space Administration, 1995.

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Verhoeven, Chris J.M., 1959- and Roermund, Arthur H. M. van., eds. Oscillators and oscillator systems: Classification, analysis, and synthesis. Boston, MA: Kluwer Academic, 1999.

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Oscillator circuits. Boston, Mass: Newnes, 1996.

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Oscillator circuits & projects. Indianapolis, Ind: Prompt Publications, 1997.

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Matthys, Robert J. Crystal oscillator circuits. Malabar, Fla: Krieger Pub. Co., 1992.

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1973-, Rolfes I., and Siweris H. J. 1953-, eds. Noise in high-frequency circuits and oscillators. Hoboken, NJ: John Wiley & Sons, 2006.

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Schiek, B. Noise in High-Frequency Circuits and Oscillators. New York: John Wiley & Sons, Ltd., 2006.

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Carr, Joseph J. Mastering oscillator circuits through projects & experiments. Blue Ridge Summit, PA: TAB Books, 1993.

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Book chapters on the topic "OSCILLATOR CIRCUIT"

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Patrick, Dale R., Stephen W. Fardo, Ray E. Richardson, and Vigyan (Vigs) Chandra. "Oscillator Circuits." In Electronic Devices and Circuit Fundamentals, 819–76. New York: River Publishers, 2023. http://dx.doi.org/10.1201/9781003393139-20.

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Verhoeven, Chris, and Arie van Staveren. "Structured Oscillator Design." In Analog Circuit Design, 3–19. Boston, MA: Springer US, 2002. http://dx.doi.org/10.1007/0-306-47951-6_1.

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Tehranipoor, Mohammad, Hassan Salmani, and Xuehui Zhang. "Design for Hardware Trust: Ring Oscillator Network." In Integrated Circuit Authentication, 91–124. Cham: Springer International Publishing, 2013. http://dx.doi.org/10.1007/978-3-319-00816-5_6.

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Patrick, Dale R., Stephen W. Fardo, Ray E. Richardson, and Vigyan Vigs Chandra. "Oscillator Circuits – Chapter Outline." In Electronic Devices and Circuit Fundamentals, Solution Manual, 120–28. New York: River Publishers, 2023. http://dx.doi.org/10.1201/9781003403272-20.

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Yuan, Jiann-Shiun. "Voltage-Controlled Oscillator Reliability." In CMOS RF Circuit Design for Reliability and Variability, 33–48. Singapore: Springer Singapore, 2016. http://dx.doi.org/10.1007/978-981-10-0884-9_5.

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Yuan, Jiann-Shiun. "Oscillator Design for Variability." In CMOS RF Circuit Design for Reliability and Variability, 89–97. Singapore: Springer Singapore, 2016. http://dx.doi.org/10.1007/978-981-10-0884-9_9.

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Hu, Wenjing. "A New Circuit Design for Chaotic Oscillator." In Lecture Notes in Electrical Engineering, 161–68. Singapore: Springer Singapore, 2017. http://dx.doi.org/10.1007/978-981-10-6445-6_18.

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Senani, Raj, D. R. Bhaskar, V. K. Singh, and R. K. Sharma. "Sinusoidal Oscillator Realizations Using Modern Electronic Circuit Building Blocks." In Sinusoidal Oscillators and Waveform Generators using Modern Electronic Circuit Building Blocks, 269–366. Cham: Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-23712-1_6.

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Drzewiecki, Gary. "Nonlinear Oscillator Circuit Model Lab Exercise (Properties of Self-Excitable Cells)." In Fundamentals of Chaos and Fractals for Cardiology, 127–33. Cham: Springer International Publishing, 2021. http://dx.doi.org/10.1007/978-3-030-88968-5_15.

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Efremova, E. V., and A. S. Dmitriev. "Ultrawideband Microwave 3–7 GHz Chaotic Oscillator Implemented as SiGe Integrated Circuit." In Emergent Complexity from Nonlinearity, in Physics, Engineering and the Life Sciences, 71–80. Cham: Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-47810-4_7.

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Conference papers on the topic "OSCILLATOR CIRCUIT"

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Yeryomka, V. D., O. P. Kulagin, and Jung-Il Kim. "Terahertz M-type oscillator: Optimal geometry of oscillatory circuit." In 2014 24th International Crimean Conference "Microwave & Telecommunication Technology" (CriMiCo). IEEE, 2014. http://dx.doi.org/10.1109/crmico.2014.6959360.

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Giles, C. R., T. H. Wood, Tingye Li, and C. A. Burrus. "Quantum-Well SEED Optical Pulse Generator." In Quantum Wells for Optics and Opto-Electronics. Washington, D.C.: Optica Publishing Group, 1989. http://dx.doi.org/10.1364/qwoe.1989.tub5.

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Some photonic circuits require optical pulse generators to provide clock pulses for optical logic elements. For example, a recently reported all-optical regenerator [1] used an injection-locked self-electro-optic-effect-device (SEED) oscillator [2] to recover optical clock pulses. The SEED oscillator is a simple optical circuit, consisting of only a quantum-well SEED electrically biased through a resonant LC circuit. By illuminating the SEED with cw light, it can exhibit negative conductance, causing the electrical circuit to oscillate. The voltage oscillations modulate the SEED’S-optical absorption so that light is transmitted through the SEED as a train of pulses.
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Li, Bin, Jeong Ho You, and Yong-Joe Kim. "Self-Powered Interface External Circuit for Low-Frequency Acoustic Energy Harvester." In ASME 2013 International Mechanical Engineering Congress and Exposition. American Society of Mechanical Engineers, 2013. http://dx.doi.org/10.1115/imece2013-65824.

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We present a self-powered interface external circuit design for multiple piezoelectric oscillators used in our recently developed low-frequency acoustic energy harvester. A synchronized switch harvesting on inductor (SSHI) interface circuit has exhibited a significant improvement in the energy harvesting efficiency of piezoelectric oscillator, compared with a standard circuit in AC/DC conversion. A self-powered SSHI interface circuit was developed to overcome the difficulties of typical SSHI, such as the requirements for external power and displacement sensor. The previous studies on self-powered SSHI only considered a single piezoelectric oscillator. The electrical response and operation of multiple piezoelectric oscillators in self-powered SSHI interface circuit has not been reported. In our previous study, multiple piezoelectric cantilever plates were installed in a quarter-wavelength tube resonator to harvest acoustic energy. The interface circuit for our acoustic energy harvester was not further discussed. In this study, a self-powered series-SSHI circuit (self-powered S-SSHI) for multiple cantilever piezoelectric plates has been studied by circuit simulation software Multisim. The simulation results indicate the total powers increase linearly with the piezoelectric plate numbers for both standard and self-powered S-SSHI circuits. The harvesting efficiency for multiple piezoelectric plates of self-powered S-SSHI is obviously higher than the standard circuit. The total maximum output power of 5 piezoelectric plates reaches 8.417 mW with the areal power density 0.421 mW/cm2. This is 335.2% better than the standard circuit (1.934 mW with the areal power density 0.0967 mW/cm2). Compared with the standard circuit, self-powered S-SSHI circuit significantly enhances the conversion efficiency by increasing the piezoelectric voltages and reducing the phase shifts between piezoelectric sources currents and voltages.
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Wei, Lianggui, Fan Lu, and Bilong Zhang. "Design of a Crystal Oscillator Circuit." In 2021 IEEE International Workshop on Electromagnetics: Applications and Student Innovation Competition (iWEM). IEEE, 2021. http://dx.doi.org/10.1109/iwem53379.2021.9790707.

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Poddar, Ajay K., Ulrich L. Rohde, Vivek Madhavan, Anisha M. Apte, and Shiban K. Koul. "Ka-Band metamaterial Möbius Oscillator (MMO) circuit." In 2016 IEEE/MTT-S International Microwave Symposium (IMS). IEEE, 2016. http://dx.doi.org/10.1109/mwsym.2016.7539970.

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Roubicek, Tomas, and Stanislav Dado. "Digital oscillator circuit using synchronous pulse driving." In 2008 15th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2008). IEEE, 2008. http://dx.doi.org/10.1109/icecs.2008.4674895.

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Eiroa, Susana, and Iluminada Baturone. "Circuit authentication based on Ring-Oscillator PUFs." In 2011 18th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2011). IEEE, 2011. http://dx.doi.org/10.1109/icecs.2011.6122368.

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Caillet, M., O. Lafond, and M. Himdi. "Active radiating antennas using an oscillator circuit." In 11th International Symposium on Antenna Technology and Applied Electromagnetics [ANTEM 2005]. IEEE, 2005. http://dx.doi.org/10.1109/antem.2005.7852044.

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lan, tao, Shengming Huang, Quanzhen Duan, and Lulu Xun. "Design of an externally adjustable oscillator circuit." In International Conference on Neural Networks, Information, and Communication Engineering (NNICE 2022), edited by Rajeev Tiwari. SPIE, 2022. http://dx.doi.org/10.1117/12.2640492.

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Maheshwari, Sudhanshu, and Jagadish Rajpoot. "Electronically tunable Quadrature Oscillator circuit using DXCCCII." In 2019 International Conference on Electrical, Electronics and Computer Engineering (UPCON). IEEE, 2019. http://dx.doi.org/10.1109/upcon47278.2019.8980065.

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Reports on the topic "OSCILLATOR CIRCUIT"

1

Kung, C. C., G. J. Kramer, E. Johnson, W. Solomon, and R. Nazikian. Circuit Design to Stabilize the Reflectometer Local Oscillator Signals. Office of Scientific and Technical Information (OSTI), October 2005. http://dx.doi.org/10.2172/899525.

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Schwarz, Steven E. Improvements in Oscillators for Planar Millimeter-Wave Circuits. Fort Belvoir, VA: Defense Technical Information Center, April 1995. http://dx.doi.org/10.21236/ada300133.

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Ham, Donhee, Xiaofeng Li, and William Andress. Nanoelectronic Initiative - GHz & THz Amplifier and Oscillator Circuits With ID Nanoscale Devices for Multispectral Heterodyning Detector Arrays. Fort Belvoir, VA: Defense Technical Information Center, October 2009. http://dx.doi.org/10.21236/ada510610.

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