Journal articles: 'Operational amplifier (op-amp)'

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SOLIMAN, AHMED M., and AHMED H. MADIAN. "MOS-C TOW-THOMAS FILTER USING VOLTAGE OP AMP, CURRENT FEEDBACK OP AMP AND OPERATIONAL TRANSRESISTANCE AMPLIFIER." Journal of Circuits, Systems and Computers 18, no. 01 (February 2009): 151–79. http://dx.doi.org/10.1142/s0218126609004995.

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Several MOS-C realizations of the Tow-Thomas circuit using the commercially available voltage operational amplifier and the current feedback operational amplifier are reviewed in this paper. Additional MOS-C Tow-Thomas realizations using the operational transresistance amplifier and the differential current voltage conveyor are also included. MOS-C realizations of the Tow-Thomas circuit using CMOS operational amplifier, CMOS current feedback operational amplifier and CMOS operational transresistance amplifier are also given. Spice simulation results using 0.18 CMOS technology model from MOSIS are included together with detailed comparison tables to demonstrate the differences between MOS-C Tow-Thomas circuits using both of the commercially available active building blocks and CMOS integrated building blocks.

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Liu, Xiao Wei, Liang Liu, Jian Yang, Song Chen, and Wei Ping Chen. "A Low Noise Operational Amplifier Design Using Chopper Stability." Key Engineering Materials 562-565 (July 2013): 1450–54. http://dx.doi.org/10.4028/www.scientific.net/kem.562-565.1450.

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Noise has become a significant bottleneck limiting the performance of the op amp, and chopper stabilization technology [1] is commonly used to reduce the noise of the op amp. The chopper stabilization technology can significantly reduce the low-frequency 1/f noise of op amp, then reducing the total low-frequency noise of op amp. In this paper, we designed a chopper-stabilized low-noise op amp, and used Cadence software for simulation and debugging.

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Kehinde, L. O. "The ‘Dozen-Impedance’ Operational Amplifier Module for Experimentation." International Journal of Electrical Engineering & Education 26, no. 3 (July 1989): 224–32. http://dx.doi.org/10.1177/002072098902600304.

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This paper presents a ‘dozen-impedance’ op. amp. configuration that can be used for a myriad laboratory experiments on op. amps. From the generated transfer function, a new formalized statement is presented from which the transfer function of op. amp. circuits that fall under this class can be obtained without the rigours of earlier well-known matrix techniques. Some experimental configurations are suggested.

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Sahu, Rashmi, Maitraiyee Konar, and Sudip Kundu. "Improvement of Gain Accuracy and CMRR of Low Power Instrumentation Amplifier Using High Gain Operational Amplifiers." Micro and Nanosystems 12, no. 3 (December 1, 2020): 168–74. http://dx.doi.org/10.2174/1876402912666200123153318.

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Background: Sensing of biomedical signals is crucial for monitoring of various health conditions. These signals have a very low amplitude (in μV) and a small frequency range (<500 Hz). In the presence of various common-mode interferences, biomedical signals are difficult to detect. Instrumentation amplifiers (INAs) are usually preferred to detect these signals due to their high commonmode rejection ratio (CMRR). Gain accuracy and CMRR are two important parameters associated with any INA. This article, therefore, focuses on the improvement of the gain accuracy and CMRR of a low power INA topology. Objective: The objective of this article is to achieve high gain accuracy and CMRR of low power INA by having high gain operational amplifiers (Op-Amps), which are the building blocks of the INAs. Methods: For the implementation of the Op-Amps and the INAs, the Cadence Virtuoso tool was used. All the designs and implementation were realized in 0.18 μm CMOS technology. Results: Three different Op-Amp topologies namely single-stage differential Op-Amp, folded cascode Op-Amp, and multi-stage Op-Amp were implemented. Using these Op-Amp topologies separately, three Op-Amp-based INAs were realized and compared. The INA designed using the high gain multistage Op-Amp topology of low-frequency gain of 123.89 dB achieves a CMRR of 164.1 dB, with the INA’s gain accuracy as good as 99%, which is the best when compared to the other two INAs realized using the other two Op-Amp topologies implemented. Conclusion: Using very high gain Op-Amps as the building blocks of the INA improves the gain accuracy of the INA and enhances the CMRR of the INA. The three Op-Amp-based INA designed with the multi-stage Op-Amps shows state-of-the-art characteristics as its gain accuracy is 99% and CMRR is as high as 164.1 dB. The power consumed by this INA is 29.25 μW by operating on a power supply of ±0.9V. This makes this INA highly suitable for low power measurement applications.

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TAMMAM, AMR ABDALLAH, MOHAMED BEN-ESMAEL, and MOHAMMED R. ABAZAB. "CURRENT FEEDBACK OP-AMP UTILIZES NEW CURRENT CELL TO ENHANCE THE CMRR." Journal of Circuits, Systems and Computers 21, no. 05 (August 2012): 1250038. http://dx.doi.org/10.1142/s0218126612500387.

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Despite excellent high frequency and high speed performance, current-feedback operational amplifiers (CFOAs) generally exhibit poor common-mode rejection (CMRR) properties, which limit their utility [Analogue IC design: The current–mode approach, IEE Circuits and Systems Series, Peter peregrinus, 1990]. A novel current feedback operational amplifier (CFOA) with improved performance is presented. The proposed CFOA has a new current-cell [Novel current-feedback operational amplifier Design Based on a floating circuit technique, IEE Colloquium on Analogue Signal Processing, 1998], to bias the entire circuit, which achieves an incremental output resistance twice that of the well-known "Wilson" circuit. Simulation results of this new CFOA architecture indicate that the amplifier exhibits performance characteristics superior to those obtained with an established input architecture: in particular, the CMRR (common-mode rejection ratio) is 91 dB, and the d.c. offset voltage less than 26 μV.

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SOLIMAN, AHMED M., and AHMED H. MADIAN. "MOS-C KHN FILTER USING VOLTAGE OP AMP, CFOA, OTRA AND DCVC." Journal of Circuits, Systems and Computers 18, no. 04 (June 2009): 733–69. http://dx.doi.org/10.1142/s021812660900523x.

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MOS-C realizations of the Kerwin–Huelsman–Newcomb (KHN) circuit using the commercially available Voltage Operational Amplifier (VOA) and the Current Feedback Operational Amplifier (CFOA) are reviewed in this paper. Additional MOS-C KHN realizations using the Operational Transresistance Amplifier (OTRA) and the Differential Current Voltage Conveyor (DCVC) are also included. MOS-C realizations of the KHN circuit using CMOS operational amplifier, CMOS current feedback operational amplifier and CMOS operational transresistance amplifier are also given. Spice simulation results using 0.18 CMOS technology model from MOSIS are included together with detailed comparison tables to demonstrate the differences between MOS-C KHN circuits using both of the commercially available active building blocks and CMOS integrated building blocks. A comparison with the Gm-C KHN circuit is also included.

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Jamal, M. B. K., S. P. Chew, B. I. Khadijah, and S. B. M. Noormiza. "Design Low Voltage FGMOS Operational Amplifier for Power Applications." Advanced Materials Research 433-440 (January 2012): 4189–93. http://dx.doi.org/10.4028/www.scientific.net/amr.433-440.4189.

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Due to the rise in demand for portable electronic device, low power and low voltage circuit design is extremely important for the appliances like computers, laptops, mobile phones and etc. Low power dissipation results in longer battery life and better integration density. This can be achieved by designing a modified low voltage op amp. The design of low voltage op amp in this paper is the combination of several low voltage analog cells. The modified low power op amp in this paper is built based on low voltage basic op amp. In this paper, the design objective is to achieve certain criteria such as supply voltage as low as 1 V, high gain more than 40 dB, low power consumption and high bandwidth. The use of FGMOS would increase the operating range of op amp through programming the threshold voltage of the FGMOS. This project is simulated using Silvaco Gateway and Expert.

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Yuan, Jun, and Wei Wang. "A TDC Based BIST Scheme for Operational Amplifier." Applied Mechanics and Materials 644-650 (September 2014): 3583–87. http://dx.doi.org/10.4028/www.scientific.net/amm.644-650.3583.

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This paper presents a time-to-digital converter (TDC) based built-in self-test (BIST) scheme for operational amplifier (Op Amp). The propagation delay exiting in the transient response of the Op Amp is monitored by the inverter based TDC, and converted into a digital code based on the referenced delay interval of the inverter used in the TDC, as a result, the digital code is finally employed to determine the test rsults. The circuit-level simualtion results of the proposed BIST syetem for a two-stage Op Amp are presented to demonstrated the feasility of the proposed BIST scheme with high fault coverage.

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Safari, Ali, Massoud Dousti, and Mohammad Bagher Tavakoli. "Monolayer Graphene Field Effect Transistor-Based Operational Amplifier." Journal of Circuits, Systems and Computers 28, no. 03 (February 24, 2019): 1950052. http://dx.doi.org/10.1142/s021812661950052x.

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Graphene Field Effect Transistor (GFET) is a promising candidate for future high performance applications in the beyond CMOS roadmap for analog circuit applications. This paper presents a Verilog-A implementation of a monolayer graphene field-effect transistor (mGFET) model. The study of characteristic curves is carried out using advanced design system (ADS) tools. Validation of the model through comparison with measurements from the characteristic curves is carried out using Silvaco TCAD tools. Finally, the mGFET is used to design a GFET-based operational amplifier (Op-Amp). The GFET Op-Amp performances are tuned in term of the graphene channel length in order to obtain a reasonable gain and bandwidth. The main characteristics of the Op-Amp performance are compared with 0.18[Formula: see text][Formula: see text]m CMOS technology.

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Chong, Peng Lean, Silvia Ganesan, Poh Kiat Ng, and Feng Yuan Kong. "A TRIZ-Adopted Development of a Compact Experimental Board for the Teaching and Learning of Operational Amplifier with Multiple Circuit Configurations." Sustainability 14, no. 21 (October 29, 2022): 14115. http://dx.doi.org/10.3390/su142114115.

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Operational amplifiers (op-amps) are generally used for actualizing simple and complex electronic circuits in the subject of analogue electronics. In an effort to improve the teaching of op-amps in electronics engineering curricula, op-amp circuits in various configurations are often used for experiments in laboratory sessions so that students can acquire certain psychomotor and cognitive skills by constructing circuit connections and analyzing input–output waveforms. As a result, multiple configurations of operational amplifier circuits are often needed, requiring multiple sets of experimental boards or circuits for each experiment. This is usually not cost effective, requires more consumable electronic components, requires more maintenance and storage space in facilities, and is less user friendly for the students. Therefore, the aim of this research is to design a single, compact, and easy-to-replicate experimental board that can be converted into multiple configurations of the LM741 operational amplifier, comprising an inverting amplifier, a noninverting amplifier, a voltage follower, a summing amplifier, a differential amplifier, a differentiator, and an integrator, with minimal electronic components at a cost lower than EUR 10. The experimental board was tested with a constant input voltage of 1.0 V AC and a switching frequency of 1.0 kHz. It is capable of producing an output voltage corresponding to the individual operational amplifier configurations and can thus be used as a facilitating module for teaching and learning activities in the field of analogue electronics.

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Liu, Ying Chun, Jian Ming Zhang, De Long Zhang, Yan Yu Wang, Chun Guang Hou, Zi Ping Wang, Hua Xin Liu, and Chun Rui Liu. "30A/60V Electric Car Charger Control Circuit Simulation." Advanced Materials Research 971-973 (June 2014): 950–53. http://dx.doi.org/10.4028/www.scientific.net/amr.971-973.950.

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Through analysis and comparison of existing charging method works , adding more links constant current charging and constant voltage charging on the basis of the three-stage charging mode is proposed to receive more in line with rechargeable batteries five-phase characteristic curve charging mode. By scaling the control circuit and the PI regulator circuits use the charging current value and the constant voltage is sampled , a constant voltage corresponding to the error value to be compared and outputs the PWM control chip SG3525, causing the output current of the front end circuit chip , the regulation voltage , the error is gradually reduced until it reaches the steady-state output . 1 key components - integrated operational amplifier selection Integrated operational amplifier control circuit for the main components , essentially the entire op-amp circuits are designed to carry around , so choose the op amp circuit is particularly important . From the foregoing analysis, the current control and voltage control portion of each part requires three op amp ( both as an amplifier , a PI controller is used ) , the entire control circuit requires access to six integrated amplifier . Out of circuit integration considerations, decided to use a quad op amp manifold and a dual op amp with the completion of the manifold . By screening and the corresponding parameters available on the TI (TEXAS INSTRUMENTS TI ) website , and ultimately determine the use of quad op amp LF347 and dual op amp TLC2272.

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ASTHAN, RHEYUNIARTO SAHLENDAR, DEAN CORIO, MIA MARIA ULFAH, URI ARTA RAMADHANI, and ACHMAD MUNIR. "Penerima Gelombang ELF berbasis Op-Amp untuk Pengolahan Akuisisi Data Gempa Bumi." ELKOMIKA: Jurnal Teknik Energi Elektrik, Teknik Telekomunikasi, & Teknik Elektronika 9, no. 3 (July 9, 2021): 592. http://dx.doi.org/10.26760/elkomika.v9i3.592.

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ABSTRAKPenelitian ini membahas mengenai penerima gelombang extremely low frequency (ELF) untuk pengolahan akuisisi data gempa bumi. Penerima ELF dirancang menggunakan operational amplifier (Op-Amp) dengan masukan takmembalik. Sinyal yang diterima oleh antena diteruskan ke penerima ELF yang terdiri dari preamplifier dan amplifier untuk proses penguatan, serta filter aktif orde 2 untuk menekan sinyal di atas frekuensi cut-off sebesar 50Hz. Karakterisasi penerima ELF dilakukan dengan mengamati perbandingan level tegangan sinyal keluaran terhadap level tegangan sinyal masukan, sensitivitas, serta bentuk sinyal keluaran dari penerima ELF dalam domain waktu. Hasil simulasi menunjukkan bahwa penerima ELF menghasilkan penguatan sebesar 60,8dB dengan sensitifitas tinggi untuk level sinyal masukan di bawah -30dB yang mampu memenuhi level sinyal untuk pengolahan akuisisi data.Kata kunci: extremely low frequency, penerima ELF, operational amplifier, filter aktif, gempa bumi ABSTRACTThis research presents extremely low frequency (ELF) receiver for earthquake data acquisition processing. The ELF receiver is designed based on non-inverting operational amplifier (Op-Amp). The signal received by the antenna is fed into ELF receiver which consists of preamplifier and amplifier for amplification, and second order active filter to suppress unwanted signal above the cut-off frequency of 50Hz. Characterization of ELF receiver is performed by observing the comparison of the level output signal to level input signal, sensitivity, and ELF receiver signal output in time domain. The simulation results show that the ELF receiver has gain of 60.8dB with high sensitivity for low level input signals below -30dB that is able to meet signal level for data acquisition processing.Keywords: extremely low frequency, ELF receiver, operational amplifier, active filter, earthquake

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Gheorghe, Alexandru Gabriel, and Mihai Eugen Marin. "A Two Stage Op-Amp Phase Margin Symbolic Expression." MATEC Web of Conferences 210 (2018): 02040. http://dx.doi.org/10.1051/matecconf/201821002040.

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A phase margin symbolic expression of a two stage Miller compensated operational amplifier is computed in this paper. Using this expression, an analysis to evaluate the influence of the Miller and load capacitance on phase margin is performed. This way, a designer can rapidly choose the optimal set of values to fulfil an imposed phase margin. The phase margin expression is based on poles/zeros symbolic expressions obtained using a symbolic LR algorithm able to compute both the numerical values and the approximate symbolic expressions of poles and zeros of a circuit. The numerical values obtained with this algorithm are compared with those computed by SPECTRE. The example is a two stage Miller compensated operational amplifier designed in a 180nm CMOS technology.

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Tadeus, Dista Yoel, Arkhan Subari, and Saiful Manan. "REALISASI PENGENDALI ON-OFF HISTERISIS DENGAN OPERATIONAL AMPLIFIER (OP-AMP)." Gema Teknologi 19, no. 4 (April 30, 2018): 10. http://dx.doi.org/10.14710/gt.v19i4.19150.

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The realization of the On-Off control system can be built using the comparator principle. The principle has a weakness that is the possibility of chattering due to 'thin' limit of comparator switching. Low immunity to noise increases chances of chattering, if not anticipated it will cause 'fatigue' on actuator thus reducing component’s lifetime. Hysteresis has features to suppress chattering. This article describes how to realize the hysteresis On-Off controller using Operational Amplifier (Op-Amp) which is simple and cheap discrete electronics component, by modifying the Op-Amp comparator circuit so that it has the hysteresis band with minimum and maximum limit variable so that the reference point of the comparator can be shifted.

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Du, Yiheng, Changde He, Guowei Hao, Wendong Zhang, and Chenyang Xue. "Full-Differential Folded-Cascode Front-End Receiver Amplifier Integrated Circuit for Capacitive Micromachined Ultrasonic Transducers." Micromachines 10, no. 2 (January 25, 2019): 88. http://dx.doi.org/10.3390/mi10020088.

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This paper describes the design of a front-end receiver amplifier for capacitive micromachined ultrasonic transducer (CMUT). The proposed operational amplifier (op amp) consists of a full differential folded-cascode amplifier stage followed by a class AB output stage. A feedback resistor is applied between the input and the output of the op amp to make a transimpedance amplifier. We analyzed the equivalent circuit model of the CMUT element operating in the receiving mode and obtained the static output impedance and center frequency characteristics of the CMUT. The op amp gain, bandwidth, noise, and power consumption trade-oﬀs are discussed in detail. The amplifier was fabricated using GlobalFoundries 0.18-μm complementary metal-oxide-semiconductor (CMOS) technology. The open loop gain of the amplifier is approximately 65 dB, and its gain bandwidth product is approximately 29.5 MHz. The measured input reference noise current was 56 nA/√Hz@3 MHz. The amplifier chip area is 325 μm × 150 μm and the op amp is powered by 3.3 V, the static power consumption is 11 mW. We verified the correct operation of our amplifier with CMUT and echo-pulse shown that the CMUT center frequency is 3 MHz with 92% fractional bandwidth.

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Isminarti, Isminarti, Nur Fausiah Inna, Wahyudin Firdaus, and Nanang Roni Wibowo. "Rancang Bangun Media Pembelajaran Elektronika Analog Untuk Memahami Fungsi dan Karakteristik Op-Amp LM741." Jurnal Rekayasa Teknologi Informasi (JURTI) 4, no. 2 (December 6, 2020): 108. http://dx.doi.org/10.30872/jurti.v4i2.4923.

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Dengan adanya modul pembelajaran elektronika analog mahasiswa dapat dengan mudah memahami karakteristik rangkaian op-amp. Karena pada praktikum sebelumnya mahasiswa hanya mengetahui input, output beserta cara kerja dari rangkaian op-amp. Tujuan pembuatan modul pembelajaran elektronika analog menggunakan operational amplifier (op-amp) LM741 adalah memberikan pengetahuan kepada mahasiswa untuk memahami cara merangkai rangkaian elektronika analog pada praktikum elektronika analog dan dapat merancang media pembelajaran yang dapat dipahami oleh mahasiswa. Metode yang digunakan adalah ekperimental untuk membuktikan hasil kebenaran ouput pada rangkaian berdasarkan teori. Penelitian ini menghasilkan 3 modul percobaan, yaitu inverting Amplifier, non inverting Amplifier dan differential Amplifier. Pada percobaan inverting Amplifier rata-rata error untuk = 10KΩ sebesar 0,89%, = 4K7Ω sebesar 1,35%. Percobaan non inverting Amplifier rata-rata error untuk = 10KΩ sebesar 1,91%, = 4K7Ω sebesar 0,79%, pada percobaan differential Amplifier rata-rata error sebesar 9,25%. Berdasarkan hasil tersebut alat ini bekerja dengan baik karena kesalahan rata-rata tidak melebihi 5% dan 10% sebagaimana nilai resistor yang dipergunakan yaitu dengan toleransi 5% (emas) dan 10% (perak).

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Isminarti, Isminarti, Nur Fausiah Inna, Wahyudin Firdaus, and Nanang Roni Wibowo. "Rancang Bangun Media Pembelajaran Elektronika Analog Untuk Memahami Fungsi dan Karakteristik Op-Amp LM741." Jurnal Rekayasa Teknologi Informasi (JURTI) 4, no. 2 (December 6, 2020): 108. http://dx.doi.org/10.30872/jurti.v4i2.4923.

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Dengan adanya modul pembelajaran elektronika analog mahasiswa dapat dengan mudah memahami karakteristik rangkaian op-amp. Karena pada praktikum sebelumnya mahasiswa hanya mengetahui input, output beserta cara kerja dari rangkaian op-amp. Tujuan pembuatan modul pembelajaran elektronika analog menggunakan operational amplifier (op-amp) LM741 adalah memberikan pengetahuan kepada mahasiswa untuk memahami cara merangkai rangkaian elektronika analog pada praktikum elektronika analog dan dapat merancang media pembelajaran yang dapat dipahami oleh mahasiswa. Metode yang digunakan adalah ekperimental untuk membuktikan hasil kebenaran ouput pada rangkaian berdasarkan teori. Penelitian ini menghasilkan 3 modul percobaan, yaitu inverting Amplifier, non inverting Amplifier dan differential Amplifier. Pada percobaan inverting Amplifier rata-rata error untuk = 10KΩ sebesar 0,89%, = 4K7Ω sebesar 1,35%. Percobaan non inverting Amplifier rata-rata error untuk = 10KΩ sebesar 1,91%, = 4K7Ω sebesar 0,79%, pada percobaan differential Amplifier rata-rata error sebesar 9,25%. Berdasarkan hasil tersebut alat ini bekerja dengan baik karena kesalahan rata-rata tidak melebihi 5% dan 10% sebagaimana nilai resistor yang dipergunakan yaitu dengan toleransi 5% (emas) dan 10% (perak).

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AL-Qaysi, Hayder Khaleel, Musaab Mohammed Jasim, and Siraj Manhal Hameed. "Design of very low-voltages and high-performance CMOS gate-driven operational amplifier." Indonesian Journal of Electrical Engineering and Computer Science 20, no. 2 (November 1, 2020): 670. http://dx.doi.org/10.11591/ijeecs.v20.i2.pp670-679.

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This paper presents the description and analysis of the design and HSPICE-based simulation results of very low-voltages (LVs) power supplies and high-performance specifications CMOS gate-driven (GD) operational amplifier (Op-Amp) circuit. The very LVs CMOS GD Op-Amp circuit designed using 90nm CMOS technology parameters and the folded cascode (FC) technique employed in the differential input stage. The HSPICE simulation results demonstrate that the overall gain is 73.1dB, the unity gain bandwidth is 14.9MHz, the phase margin is , the total power dissipation is 0.91mW, the output voltage swing is from 0.95V to 1V, the common-mode rejection ratio is dB, the equivalent input-referred noise voltage is 50.94 at 1MHz, the positive slew rate is 11.37 , the negative slew rate is 11.39 , the settling time is 137 , the positive power-supply rejection ratio is 74.2dB, and the negative power-supply rejection ratio is 80.1dB. The comparisons of simulation results at 1V and 0.814V power supplies’ voltages of the very LVs CMOS GD Op-Amp circuit demonstrate that the circuit functions with perfect performance specifications, and it is suitable for many considerable applications intended for very LVs CMOS Op-Amp circuits.

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Pauzan, Muh. "RANCANGAN ALAT INDIKATOR LEVEL TEGANGAN BATERAI BERBASIS OPERATIONAL AMPLIFIER (OP AMP)." TEKNOKOM 2, no. 1 (March 27, 2019): 11–16. http://dx.doi.org/10.31943/teknokom.v2i1.26.

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Masunaga, Masahiro, Shintaroh Sato, Ryoh Kuwana, Isao Hara, and Akio Shima. "Improved Offset Voltage Stability of 4H-SiC CMOS Operational Amplifier by Increasing Gamma Irradiation Resistance." Materials Science Forum 963 (July 2019): 845–48. http://dx.doi.org/10.4028/www.scientific.net/msf.963.845.

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We modified the active layout of an operational amplifier (op-amp) to exhibit high gamma irradiation resistance of over 100-kGy using our 4H-SiC complementary MOS technology, which can be applied for measuring instruments installed in nuclear power plants. The op-amp with the modified active layout features both a thin gate oxide and newly developed gate-electrode structure for suppressing the leakage current. From an experiment we conducted, the leakage current of the p-channel MOSFET with modified active layout remained unchanged from the initial value after irradiation, although that of it with the conventional layout we previously evaluated increased by about two orders of magnitude. The offset voltage of the improved op-amp was maintained below 2.8 mV up to 100-kGy irradiation. The improved op-amp also showed a healthy amplification characteristic without distortion.

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Heeley, Andrew D., Matthew J. Hobbs, and Jon R. Willmott. "Zero Drift Infrared Radiation Thermometer Using Chopper Stabilised Pre-Amplifier." Applied Sciences 10, no. 14 (July 15, 2020): 4843. http://dx.doi.org/10.3390/app10144843.

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A zero-drift, mid–wave infrared (MWIR) thermometer constructed using a chopper stabilised operational amplifier (op-amp) was compared against an identical thermometer that utilised a precision op-amp. The chopper stabilised op-amp resulted in a zero-drift infrared radiation thermometer (IRT) with approximately 75% lower offset voltage, 50% lower voltage noise and less susceptibility to perturbation by external sources. This was in comparison to the precision op-amp IRT when blanked by a cover at ambient temperature. Significantly, the zero-drift IRT demonstrated improved linearity for the measurement of target temperatures between 20 °C and 70 °C compared to the precision IRT. This eases the IRT calibration procedure, leading to improvement in the tolerance of the temperature measurement of such low target temperatures. The zero-drift IRT was demonstrated to measure a target temperature of 40 °C with a reduction in the root mean square (RMS) noise from 5 K to 1 K compared to the precision IRT.

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Fuada, Syifaul, and Trio Adono. "Noise and Bandwidth in Operational Amplifiers for Conventional TIAs used in Visible Light Communication." International Journal of Recent Contributions from Engineering, Science & IT (iJES) 6, no. 2 (August 29, 2018): 37. http://dx.doi.org/10.3991/ijes.v6i2.8171.

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Trans-impedance amplifiers play an essential role in the physical layer of visible light communication systems. They are applied in the first stage of a visible light communication receiver. This short paper is a follow-up from a previous study about the bandwidth and noise of Op-Amp based trans-impedance amplifier as used in visible light communication systems through two approaches: calculation and simulation. The results of both calculation and simulation are then compared through several scenarios. In this study, the <em>Orozco </em>approach is used as a fundamental reference in calculating the trans-impedance amplifier’s bandwidth and noise. Whereas for simulation, we used TINATM-SPICE®.

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G. Appala, Naidu. "Design of low offset voltage in second stage CMOS operational amplifier using 90nm technology." i-manager's Journal on Circuits and Systems 10, no. 1 (2022): 43. http://dx.doi.org/10.26634/jcir.10.1.18616.

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In this paper a low offset voltage; low power and high gain second stage op-amp of differential amplifier along with common source amplifier with compensated capacitor is proposed. The mathematical analysis of two-stage op-amp is elaborated and this work is compared with exiting similar work. The experimental work carried in CADENCE Virtuoso with 0 gpdk090 process technology is used to obtain 60.994 of Phase Margin, 61 dB DC gain and Offset voltage is 2mV. The M/L ratios are selected accordingly where supply voltage and load voltage are fixed at 1.8V and 12pF respectively. The parametric analysis helps, where the values are fixed to get better response.

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Jiang, Zhan Peng, Rui Xu, Hai Huang, and Chang Chun Dong. "Design of a Rail-to-Rail Operational Amplifier with Low Supply Voltage and Low Power Dissipation." Applied Mechanics and Materials 380-384 (August 2013): 3275–78. http://dx.doi.org/10.4028/www.scientific.net/amm.380-384.3275.

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An rail-to-rail operational amplifier is presented in this paper, which is designed by with two op amp, the first level of the structure is the complementary differential structure which will providing input for the operational amplifier, the second level is designed with the structure of folding cascode to get a high gain. The operational amplifier is designed with the TSMC 0.35u m3.3VCMOS mixed analog-digital technology library. The simulated results show that the operational amplifier has a DC gain of 110dB,a GBW of 9.5MHz,a static power dissipation of 0.95mW,a phase margin of 73°,a voltage slew rate of 8.2V/μS,an input and output range of 0-3.3V,when operating at 3.3V power supply and a 20pF output load.

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Isminarti, Isminarti, and Ulia Ridhani. "Rancang Bangun Media Pembelajaran Praktikum Elektronika Analog Untuk Meningkatkan Pemahaman Mahasiswa Dalam Mengetahui Fungsi Dan Karakteristik Operational Amplifier." JST (Jurnal Sains Terapan) 4, no. 1 (April 16, 2018): 37–42. http://dx.doi.org/10.32487/jst.v4i1.450.

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Elektronika Analog merupakan salah satu mata kuliah keahlian berkarya dalam program studi teknik mekatronika dimana materi mengenai fungsi dan karakteristik dari Operational Amplifier (Op-Amp) sulit dipahami mahasiswa karena pada dasarnya mereka masih bingung membedakan beberapa jenis op-amp. Kesalahan dalam memahami op-amp akan menyebabkan mereka bingung dan bosan, padahal ketika mereka paham mengenai fungsi op-amp, mereka akan sangat tertarik untuk mengembangkannya. Tujuan utama pembuatan media pembelajaran ini adalah memudahkan mahasiswa merangkai, mensimulasikan menggunakan software dan merangkai secara manual rangkaian elektronika analog untuk dapat memahami dengan mudah fungsi dan karakteristik op-amp. Metode yang digunakan dalam penelitian ini adalah eksperimental untuk membuktikan kebenaran output rangkaian berdasarkan teori.Ketertarikan mahasiswa dalam memahami rangkaian elektronika analog dapat dilihat dari rata-rata nilai mahasiswa Politeknik Bosowa tahun ajaran 2013/2014 yaitu 75,56, tahun ajaran 2014/2015 yaitu 78.67, tahun ajaran 2015/2016 yaitu 79,58 dan pada tahun ajaran 2016/2017 telah mencapai 87,06 meningkat pesat dari tahun sebelumnya dan telah melebihi angka 85 sesuai yang diharapkan.

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Ma, Sheng Qian, Yan Ping Ji, Xing Ping Ran, Wei Zhao Zhang, and Yang Yang. "Design of the Voltage-Controlled Bandpass Filter Based on Current Feedback Op Amp." Advanced Materials Research 986-987 (July 2014): 1081–85. http://dx.doi.org/10.4028/www.scientific.net/amr.986-987.1081.

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This paper puts forward structure and realization method of the voltage-controlled band-pass filter based on the current feedback operational amplifier (CFA) which uses bi-quad loop filter circuit model to design the new filter circuit. Input voltage signal is input to voltage-controlled band-pass filter circuit composed by an analog multiplier AD835 and a current feedback operational amplifier AD8001 which are the core. Using the voltage signal to adjust the center frequency of the filter, the filter has wide frequency band and good high-frequency performance. This paper describes the design principles, infers the design formulas and designs the circuit of the voltage-controlled first-order and second-order band-pass filter.Through the simulation, the filter can realize the scope of the center frequency from 200KHz to 10MHz.

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SHARMA, R. K., R. SENANI, D. R. BHASKAR, A. K. SINGH, and S. S. GUPTA. "ELECTRONICALLY-CONTROLLABLE FLOATING INDUCTOR USING OPERATIONAL MIRRORED AMPLIFIER." Journal of Circuits, Systems and Computers 18, no. 01 (February 2009): 59–66. http://dx.doi.org/10.1142/s0218126609004922.

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The operational mirrored amplifiers (OMA) were introduced as useful building blocks for facilitating an easy realization of floating impedances (in conjunction with RC elements) as compared to other approaches of floating impedance simulation. In this paper, we present a new formulation, for realizing a floating inductance (FI) using an OMA which takes into account the dominant pole of the op-amp employed in the OMA and hence, does not require any external capacitor. Moreover, when the only external resistor employed is replaced by an electronically-controlled resistance, the resulting circuit permits an electronically controllable floating inductance. The workability of the proposed FI has been demonstrated by PSPICE simulations.

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Pezeshki, Zahra. "Design and simulation of high-swing fully differential telescopic Op-Amp." Computer Science and Information Technologies 2, no. 2 (July 1, 2021): 49–57. http://dx.doi.org/10.11591/csit.v2i2.p49-57.

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This article describes the process of design and simulation of a high-swing fully differential telescopic Operational Amplifier (Op-Amp). Due to the Common Gate-Common Source (CG and CS) cascode structure, the gain is very high. To maximize this gain, the load must also be selected such as two current sources. This circuit has the higher voltage in output than current Op-Amps in accordance with desirable characteristics. The loss of power of this operating amplifier are very low and in milliwatts. With use of a power supply of 1.8 V, it achieves a high-swing 1.2 V, a differential gain of 76.333 dB, ω_uGB of 412 MHz, and 50 dB CMRR. This new design through the simulations and analytically shows that the high-swing fully differential telescopic Op-Amp retains its high CMRR even at high frequencies.

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Cui, Lin Hai, Rui Xu, Zhan Peng Jiang, and Chang Chun Dong. "Design of a Low-Voltage Low-Power CMOS Operational Amplifier." Applied Mechanics and Materials 380-384 (August 2013): 3283–86. http://dx.doi.org/10.4028/www.scientific.net/amm.380-384.3283.

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A low voltage, low power two-stage operational amplifier (op-amp) was proposed in this paper. A folded-cascode structure is used in the input stage of the amplifier to get high gain. Current mirrors are used in the input stage to make the transconduotance constant. A simple push-pull common source amplifier is adopted as the output stage to take the advantages of its high efficiency. The experimental results show that the unity-gain bandwidth is 12.5MHz, the low-frequency open-loop voltage gain is 100dB,the phase margin is 65°, and power dissipation is 98.8μw.

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Idros, Norhamizah, Zulfiqar Ali Abdul Aziz, and Jagadheswaran Rajendran. "A 1-mm2 CMOS-pipelined ADC with integrated folded cascode operational amplifier." Microelectronics International 37, no. 4 (September 11, 2020): 205–13. http://dx.doi.org/10.1108/mi-05-2020-0030.

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Purpose The purpose of this paper is to demonstrate the acceptable performance by using the limited input range towards lower open-loop DC gain operational amplifier (op-amp) of an 8-bit pipelined analog-to-digital converter (ADC) for mobile communication application. Design/methodology/approach An op-amp with folded cascode configuration is designed to provide the maximum open-loop DC gain without any gain-boosting technique. The impact of low open-loop DC gain is observed and analysed through the results of pre-, post-layout simulations and measurement of the ADC. The fabrication process technology used is Silterra 0.18-µm CMOS process. The silicon area by the ADC is 1.08 mm2. Findings Measured results show the differential non-linearity (DNL) error, integral non-linearity (INL) error, signal-to-noise ratio (SNR) and spurious-free dynamic range (SFDR) are within −0.2 to +0.2 LSB, −0.55 LSB for 0.4 Vpp input range, 22 and 27 dB, respectively, with 2 MHz input signal at the rate of 64 MS/s. The static power consumption is 40 mW with a supply voltage of 1.8 V. Originality/value The experimental results of ADC showed that by limiting the input range to ±0.2 V, this ADC is able to give a good reasonable performance. Open-loop DC gain of op-amp plays a critical role in ADC performance. Low open-loop DC gain results in stage-gain error of residue amplifier and, thus, leads to nonlinearity of output code. Nevertheless, lowering the input range enhances the linearity to ±0.2 LSB.

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Li, Chaochen, Yaru Zhao, Yuqiang Deng, and Tao Xu. "Low-noise amplification of voltage response for thermopile optical detectors." Journal of Physics: Conference Series 2226, no. 1 (March 1, 2022): 012001. http://dx.doi.org/10.1088/1742-6596/2226/1/012001.

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Abstract A technique is presented to amplify the voltage response of thermopile optical detectors. It is based on the parallel combination of multiple operational amplifiers. The background noise of the voltage response has been deceased, which significantly improves the repeatability of the measurement results. Thus, this technique enables the same detector to measure weaker optical power or irradiance at the same precision level. The corresponding amplifying circuit is designed and fabricated. For the same detector, the experimental results show that the standard deviation of the background noise of the combined n op-amps is about 1 / n lower comparing with the conventional single op-amp scheme, which is consistent with the theoretical expectations. Furthermore, the lasers of 10 μW and 1μW were also measured by the specific detector and the amplifier circuit. For a 10 μW response, the measurement repeatability of the 8-combined op-amps is about 1.4%, which is better than the 3.3% of a single op-amp. For 1 μW laser, the measurement result of voltage response of the 8-combined op-amps can be precisely quantified; however, the result of the single op-amp is hardly distinguished. The presented technique based on multiple op-amps is practical and can be potential in many applications. We hope this technique could offer help for expanding the measurement ranges of thermopile optical detectors at weaker optical power and irradiance.

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Asmar, Asmar. "RANCANG BANGUN UNIPOLAR PWM DILENGKAPI DENGAN PENGATURAN FREKUENSI MENGGUNAKAN OPERATIONAL AMPLIFIER." Jurnal Ecotipe (Electronic, Control, Telecommunication, Information, and Power Engineering) 6, no. 1 (April 10, 2019): 20–23. http://dx.doi.org/10.33019/ecotipe.v6i1.942.

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Pulse Width Modulation (PWM) diaplilaksikan pada rangkaian elektronika daya untuk pengendalian rangkaian konverter. Agar diperoleh kinerja yang baik, frekuensi pulsa PWM harus disesuaikan dengan jenis dan parameter konverter. Pada penelitian ini, pulsa PWM yang dihasilkan adalah unipolar PWM. Pulsa tersebut diperoleh dengan menggunakan tiga rangkaian utama, yaitu pembangkit gelombang segitiga, tegangan kontrol dan rangkaian pembanding. Komponen utama yang digunakan adalah Operational Amplifier (Op-Amp). Rangkaian yang dihasilkan dapat membangkitkan pulsa unipolar PWM dengan rentang frekuensi 30 Hz sampai dengan 5 kHz.

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Chandrasekaran, Deepalakshmi. "Static DC Transformer Based on Negative Capacitance and High Voltage Engineering." International Journal for Research in Applied Science and Engineering Technology 10, no. 2 (February 28, 2022): 1077–80. http://dx.doi.org/10.22214/ijraset.2022.40455.

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Abstract: For DC voltage amplification, the operational amplifier is mostly used in the non-inverting configuration. In this case, the DC voltage amplification is done using a negative capacitance converter. Since the feedback capacitor acts as an open circuit for DC signal, it provides isolation between input and output. The amplified voltage level is limited by the breakdown voltage of the transistors used to build the op-amp and further the insulation breakdown limit of the Miller capacitor. By making use of new technologies such as silicon carbide technology, the breakdown voltage of transistors can be made higher even 1.2 KV and combined with high voltage engineering for capacitive insulation such as polymer capacitors, this can become a huge breakthrough in electric power engineering. Additionally, it can be used as a effective DC source for electric vehicles. The nominal voltage used in hybrid vehicles ranges from 100V to 200V.For electric-only vehicles, the required voltage is as high as 800V.The simulations are done using MIT Circuit sandbox, an open source circuit simulation tool. Keywords: DC amplifier, Op-amp, negative capacitance, silicon carbide and high voltage insulation.

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Basu, Joydeep, and Pradip Mandal. "Switched-Capacitor Common-Mode Feedback-Based Fully Differential Operational Amplifiers and its Usage in Implementation of Integrators." Journal of Circuits, Systems and Computers 29, no. 14 (March 20, 2020): 2050223. http://dx.doi.org/10.1142/s0218126620502230.

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For stabilizing the common-mode output voltage of fully differential operational amplifiers, switched-capacitor (SC) type of common-mode feedback (CMFB) is a familiar technique. This is appropriate for implementing high-gain wide-swing low-power op-amps due to its benefits of minimum power consumption, superior linearity across a large amplifier output swing range, and improved feedback loop stability in comparison to continuous-time CMFB. However, the usage of SC-CMFB requires careful attention to some realistic aspects, details of many of which are available in literature. Nonetheless, its adverse effect on the op-amp’s differential-mode gain has not been investigated much. The explanation for this effect is the SC-CMFB-induced equivalent resistive loading, and this is particularly significant in amplifiers like folded cascode which are intended to provide a high gain. This issue of drop in op-amp dc gain because of SC-CMFB, and the consequence on the realization of continuous-time and discrete-time forms of integrators utilizing such amplifiers is the topic of discussion in this paper. Relevant analytical derivations and circuit simulations at the transistor level are provided. A couple of design guidelines and circuit topologies for minimizing the loading-induced gain reduction are also presented.

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Zaidi, Muhaned. "Low-voltage Low-power Bulk-driven CMOS Op-Amp Using Negative Miller Compensation for ECG." Journal of Engineering and Technological Sciences 54, no. 5 (September 15, 2022): 220510. http://dx.doi.org/10.5614/j.eng.technol.sci.2022.54.5.10.

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Two bulk-driven CMOS (Complementary Metal Oxide Semiconductor) operational amplifier (op-amp) designs for electrocardiogram (ECG) application are presented and compared in this paper. Both op-amps are based on two-stage amplification, where bulk-driven differential input is the first stage, while additional DC gain is the second stage. Different compensation techniques were integrated in each op-amp design. Standard Miller compensation was used for the first op-amp parallel with the second stage. The novelty of the second op-amp is that it utilizes negative Miller compensation between the bulk-driven input node and the output node of the first stag, while standard Miller compensation was used in the second stage. The purpose of this work was to compare DC gain, phase margin (PM) and unit gain frequency (UGF) obtained through different simulated compensation strategies and test results. The op-amps were simulated using 0.25 μm CMOS technology. The simulation results are presented using the standard model libraries from Tanner EDA tools, operating on a single rail +0.8V power supply.

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Jee, Dong-Woo, Yunjae Suh, Hong-June Park, and Jae-Yoon Sim. "A Digitally Controlled Op-Amp with Level-Crossing-Based Approximation and its Application to a 10-bit Pipeline ADC." Journal of Circuits, Systems and Computers 25, no. 12 (September 2, 2016): 1650155. http://dx.doi.org/10.1142/s0218126616501553.

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A digitally controlled operational amplifier (op-amp) with level-crossing-based approximation is proposed. A high gain is effectively obtained by means of a damping control without a stability problem occurring in the multiple gain stages. Compared to the previous version of the zero-crossing-based algorithmic approximation, the proposed scheme further improves the settling time with the class AB operation obtained by switching of multiple driving paths. For verification, the designed op-amp is applied to a 10-bit pipeline ADC and implemented in a 0.18[Formula: see text][Formula: see text]m CMOS technology. Measured results show that the designed op-amp successfully operates at 10-bit resolution, 10[Formula: see text]MSample/s pipeline ADC and achieves an effective gain of more than 60[Formula: see text]dB.

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Guang, Yang, Bin Yu, and Huang Hai. "Design of a Low-Power Rail-to-Rail CMOS Operational Amplifier." Applied Mechanics and Materials 380-384 (August 2013): 3304–7. http://dx.doi.org/10.4028/www.scientific.net/amm.380-384.3304.

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In this paper, an operational amplifier with low-power consumption has been designed. Using the complementary differential pair for the input stage and the class AB structure for the output stage, the common-mode input range and output swing of the proposed circuit could achieved rail-to-rail. Based on TSMC 0.18μm CMOS process, using HSPICE 2008 software for circuit simulation, the results showed that the proposed op-amp has more than 100dB open loop gain, meanwhile the static power consumption is less than 300μw. The circuit's phase margin is 68 degrees, CMRR is 135dB and power supply rejection ratio is 63dB.

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Gupta, Pragati, and Shyam Akashe. "Implementation of an Ultra Low Power Process-Insensitive Two Stage Complementary Metal Oxide Semiconductor Operational Amplifier with Enhanced Direct Current Gain at 45 nm Technology Node." Sensor Letters 18, no. 10 (October 1, 2020): 770–75. http://dx.doi.org/10.1166/sl.2020.4277.

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This paper presents an ultra low power process-insensitive two stage CMOS OP-AMP employing bulk-biasing technique realised in a standard 45 nm CMOS technology. Bulk-Biasing technique has been employed to augment the DC gain of two stage CMOS OP-AMP without having any impact on its power dissipation and output swing. In this work, high gain-bandwidth product (GBW) with appropriate phase margin is achieved through pseudo-cascode compensation approach which overcomes the drawbacks of Miller compensation technique also. Furthermore, the effect of width scaling on performance metrics of proposed OP-AMP has been analysed. The designed OP-AMP exhibits enhanced DC gain of 94.2 dB, gain-bandwidth product (GBW) of 460 MHz and adequate phase margin of 80°; with fast settling response. Also, the proposed OP-AMP has power dissipation of 27 μW and leakage current of 6.4 pA only. The design and optimisation of proposed OP-AMP is carried out at a power supply of 0.7 V under room temperature in Cadence Virtuoso tool.

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Elwakil, A. S., and A. M. Soliman. "Two Modified for Chaos Negative Impedance Converter Op Amp Oscillators with Symmetrical and Antisymmetrical Nonlinearities." International Journal of Bifurcation and Chaos 08, no. 06 (June 1998): 1335–46. http://dx.doi.org/10.1142/s0218127498001030.

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Two sinusoidal oscillator circuits, that employ an operational amplifier (op amp) as a current negative impedance converter (CNIC), are modified for chaos using a nonlinear resistor of anti-symmetrical current-voltage characteristics formed by a junction field effect transistor (JFET) operating in the triode region. The internal op amp dominant pole is found to contribute significantly to the chaotic nature of one circuit while the other circuit develops different chaotic attractors when cubic and fifth power odd symmetrical nonlinearities are used. Mathematical models of the two generators are presented. Experimental laboratory results, circuit simulations and numerical simulations of the mathematical models well agree and are included.

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Schmidt, Alexander, Abdel Moneim Marzouk, Holger Kappert, and Rainer Kokozinski. "A Robust SOI Gain-Boosted Operational Amplifier Targeting High Temperature Precision Applications up to 300°C." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2011, HITEN (January 1, 2011): 000238–42. http://dx.doi.org/10.4071/hiten-paper6-aschmidt.

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Data acquisition and signal processing at elevated temperatures are facing various problems due to a wide temperature range operation, affecting the accuracy of the circuits' references and elementary building blocks. As the most commonly used analog building block, the operational amplifier (op-amp) with its various limitations has to be enhanced for wide temperature range operation. Thereby major effort is put into maximizing signal gain and simultaneously reaching high gain-bandwidth also for high temperatures. Future robust design approaches have to consider a growing operating temperature range and increasing device parameter mismatch due to the downsizing of integrated circuits. Addressing one of the major problems in circuit design for the next decades, compensating these effects through new design approaches will have a lasting impact on circuit design. In this paper we present a high gain operational amplifier with a folded-cascode and gain-boosted input stage, fabricated in a 1.0 μm SOI CMOS process. The operational amplifier was designed for an operating temperature range of −40…300°C. Major effort was put into a robust design approach with reduced sensitivity to temperature variations, targeting high precision applications in a high temperature environment. With a supply voltage of 5 V, the maximum simulated current consumption of the op-amp is 210 μA which leads to overall maximum power consumption of 1.05 mW. The open loop DC gain of the amplifier is expected to reach a minimum of 108 dB and a unity-gain-frequency of 1.02 MHz at a temperature of 300°C. For all temperatures the phase margin varies from 55…70 degrees for a 3 pF load.

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Yang, Faming, Wenhai Huang, Guohua Shui, and Yukui Liu. "A Pseudo-Random Signal Generator for Offset Calibration Circuit." Journal of Physics: Conference Series 2356, no. 1 (October 1, 2022): 012013. http://dx.doi.org/10.1088/1742-6596/2356/1/012013.

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A pseudo-random signal generator based on 0.5μm CMOS technology is presented, and it is applied for an auto-zero operational amplifier. The generator circuit includes a linear feedback shift register for generating pseudo-random sequences, and a multi-level counter module for counting the system clock pulses. A group of pseudo-random codes generated by the linear feedback shift register are as the initial value of the counter. When the counter reaches the maximum value, the output of the counter will control the output signal to flip. At the same time, a new group of the pseudo-random code will reset the counter again, and finally generate a square wave signal whose frequency varies randomly. The generator circuit is simulated and verified. The simulation results show that the frequency of the output signal can vary from 2 kHz to 4 kHz with random characteristic. The generated pseudo-random signal can be used for the switching clock control of the auto-zero operational amplifier offset calibration circuit, so that the switching glitch of the auto-zero op-amp is random, which can significantly reduce the harmonics in the output signal of the op-amp.

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Rodgers, Peter W. "Self-noise spectra for 34 common electromagnetic seismometer/preamplifier pairs." Bulletin of the Seismological Society of America 84, no. 1 (February 1, 1994): 222–28. http://dx.doi.org/10.1785/bssa0840010222.

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Abstract Because of a lack of such information, computed self-noise spectra are presented for a total of 34 frequently used electromagnetic-seismometer/preamplifier combinations. For convenience, most of these data are given in three sets of units. Peterson's Low Noise Model is included on each plot for comparison. The self noises of nine frequently employed electromagnetic seismometers properly matched to their operational amplifier (op-amp) preamplifiers are plotted. In terms of amplitude density spectra in (m/sec**2)/Hz**0.5, the values of the self-noise spectra at resonance range from a low of 3 × 10−10 for the GS-13 to a high of 1.3 × 10−8 for the HS-1. Between these two seismometers, in order of increasing noise at resonance, are the SV-1, SL-210V, S-13, SS-1, L-4C, S-6000CD, and the L-22D. To show which seismometers exhibit the lowest noise with which operational amplifier preamplifiers, the self noises of the HS-1, L-22D, L-4C, GS-13, SV-1, and SL-210V are plotted each paired with four commonly used op-amps: the LT1028, OP-227, OP-77, and the LT1012. For the GS-13, the LT1012 was the quietest. For the rest, the OP-227 was the best. For a given seismometer, the differences in self noise between op-amps were frequently a factor of 2 or 3, and as large as 10 in one case. The use of these op-amps in the analog front ends of five current digital seismic recorders is discussed.

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Bendre, Varsha S., A. K. Kureshi, and Saurabh Waykole. "Design of Analog Signal Processing Applications Using Carbon Nanotube Field Effect Transistor-Based Low-Power Folded Cascode Operational Amplifier." Journal of Nanotechnology 2018 (December 4, 2018): 1–15. http://dx.doi.org/10.1155/2018/2301421.

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Carbon nanotube (CNT) is one of the embryonic technologies within recent inventions towards miniaturization of semiconductor devices and is gaining much attention due to very high throughput and very extensive series of applications in various analog/mixed signal applications of today’s high-speed era. The carbon nanotube field effect transistors (CNFETs) have been reconnoitred as the stimulating aspirant for the future generations of integrated circuit (IC) devices. CNFETs are being widely deliberated as probable replacement to silicon MOSFETs also. In this paper, different analog signal processing applications such as inverting amplifier, noninverting amplifier, summer, subtractor, differentiator, integrator, half-wave and full-wave rectifiers, clipper, clamper, inverting and noninverting comparators, peak detector, and zero crossing detector are implemented using low-power folded cascode operational amplifier (op-amp) implemented using CNFET. The proposed CNFET-based analog signal processing applications are instigated at 32 nm technology node. Simulation results show that the proposed applications are properly implemented using novel folded cascode operational amplifier (FCOA) implemented using CNFET.

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Masunaga, Masahiro, Shintaroh Sato, Ryoh Kuwana, Isao Hara, and Akio Shima. "Electrical Characterization of the Operational Amplifier Consisting of 4H-SiC MOSFETs after Gamma Irradiation." Materials Science Forum 924 (June 2018): 984–87. http://dx.doi.org/10.4028/www.scientific.net/msf.924.984.

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The operational amplifier (op-amp) with high gamma irradiation capability of over 30 kGy have been fabricated by 4H-SiC MOSFETs for measuring instruments which are installed in nuclear power plants. The chip size was 0.7 mm x 1.0 mm, and they consisted of five n-channel MOSFETs and three p-channel MOSFETs on the same die. The output waveform after having irradiated 50 kGy at a rate of 60 Gy/hr was amplified without distortion. On the other hand, the offset voltage became unstable when gamma integral dose was beyond 30 kGy and it at 50 kGy increased to +7.2 mV. For reduction of gamma irradiation influence, we proposed the MOSFETs structure which has field plate (FP) electrodes connected to isolation layer electrically. We indicated that the proposal device had the potential of gamma irradiation capability of 100 kGy experimentally.

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Dendouga, Abdelghani, and Slimane Oussalah. "Telescopic Op-Amp Optimization for MDAC Circuit Design." Electronics ETF 20, no. 2 (July 14, 2017): 55. http://dx.doi.org/10.7251/els1620055d.

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An 8-bit 40-MS/s low power Multiplying Digital-to-Analog Converter (MDAC) for a pipelined-to-Analog to Digital converter (ADC) is presented. The conventional dedicated operational amplifier (Op-Amp) is performed by using telescopic architecture that features low power and less-area. Further reduction of power and area is achieved by using multifunction 1.5bit/stage MDAC arch itecture. The design of the Op-Amp is performed by the elaboration of a program based on multi objective genetic algorithms to allow automated optimization. The proposed program is used to find the optimal transistors sizes (length and width) in order to obtain the best Op-Amp performances for the MDAC. In th is study, six performances are considered, direct current gain, unity-gain bandwidth, phase margin, power consumption, area, slew rate, thermal noise, and signal to noise ratio. The Matlab optimization toolbox is used to implement the program. Simulations were performed by using Cadence Virtuoso Spectre circuit simulator in standard AMS 0.18μm CMOS technology. A good agreement is observed between the results obtained by the program optimization and simulation, after that the Op-Amp is introduced in the MDAC circuit to extract its performances.

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Syazmie Bin Sepeeh, Muhamad, Farahiyah Binti Mustafa, Anis Maisarah Binti Mohd Asry, Sy Yi Sim, and Mastura Shafinaz Binti Zainal Abidin. "Development of Op-Amp Based Piezoelectric Rectifier for Low Power Energy Harvesting Applications." MATEC Web of Conferences 150 (2018): 01012. http://dx.doi.org/10.1051/matecconf/201815001012.

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In this study, the development of operational amplifier (op-amp) based rectifier for piezoelectric energy harvesting applications was studied. The two stage op-amp full wave rectifier was used to convert the AC signal to DC signal voltage received by piezoelectric devices. The inverted half wave rectifier integrated with full wave rectifier were designed and simulated using MultiSIM software. The circuit was then fabricated onto a printed circuit board (PCB), using standard fabrication process. The achievement of this rectifier was able to boost up the maximum voltage of 5 V for input voltage of 800 mV. The output of the rectifier was in DC signal after the rectification by the op-amp. In term of power, the power dissipation was reduced consequently the waste power decreases. Future work includes optimization of the rectifying circuit to operate more efficiently can be made to increase the efficiency of the devices.

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Bhargava, Bhanupriya, Pradeep Kumar Sharma, and Shyam Akashe. "High Performance Analysis of CDS Delta-Sigma ADC in 45-Nanometer Regime." International Journal of Nanoscience 13, no. 01 (February 2014): 1450003. http://dx.doi.org/10.1142/s0219581x14500033.

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In this paper, a correlated double sampling (CDS) technique is proposed in the design of a delta sigma analog-to-digital converter (ADC). These CDS techniques are very effective for the compensation of the nonidealities in switched-capacitor (SC) circuits, such as charge injection, clock feed-through, operational amplifier (op-amp) input-referred offset and finite op-amp gain. An improved compensation scheme is proposed to attain continuous compensation of clock feed-through and offset in SC integrators. Both high-speed and low-power operation is achieved without compromising the accuracy requirement. Also this CDS delta sigma ADC is the most promising circuit for analog to digital converter because this circuit reduces noise due to drift and low frequency noise such as flicker noise and offset voltage and also boosts the gain performance of the amplifier. Further, the simulation results of this circuit are verified on using a "cadence virtuoso tool" using spectre at 45 nm technology with supply voltage 0.7 V.

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Misto, Misto, Tri Mulyono, and Alex Alex. "Measurement System of Sugar Content in Liquid Media using Computerized Photodiode Sensor." Jurnal ILMU DASAR 17, no. 1 (January 24, 2017): 13. http://dx.doi.org/10.19184/jid.v17i1.2664.

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It has been made an electronic system for measurement of sugar cane in solution media. This system uses a pin photodiode as a sensor, laser source, optical fiber, an operational amplifier (Op-Amp), analog to digital converter (ADC) of the Arduino, and computers. The main operation of the measurement system is done by the sensor and controlled by computer. The the photodiode sensor sends a signal to a signal processing unit (op-amp) and converted to a digital signal by the ADC. The digital signal is then forwarded for processing and display (computer). We Concluded that the system working well because of the sugar content information can be simultaneously displayed on the monitor .Keywords: sugar content, pin photodiode, computer

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FUADA, SYIFAUL, and AJI WIDHI WIBOWO. "Desain dan Implementasi Virtual Laboratory Materi Osilator Analog berbasis IC OP-AMP." ELKOMIKA: Jurnal Teknik Energi Elektrik, Teknik Telekomunikasi, & Teknik Elektronika 4, no. 2 (March 14, 2018): 134. http://dx.doi.org/10.26760/elkomika.v4i2.134.

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ABSTRAK Laboratorium virtual merupakan salah satu platform laboratorium modern yang dapat mendukung kegiatan praktikum yang berjalan secara tradisional (Hand-on Laboratory).Penelitian ini bertujuan untuk mendesain dan mengimplementasikan Virtual Laboratory pada materi pembangkit sinyal dengan subtopik: Wien Bridge sebagai osilator RC, Hartley dan Colpitts sebagai osilator LC dan Astable Multivibrator sebagai osilator relaksasi,yang dibangun berbasis IC Operational Amplifier (OP-AMP).Jenis penelitian ini merupakan R&Dyang terdiri dari enam tahapan, yaitu:konsep, desain, pengumpulan bahan, pembuatan, pengujian dan pendistribusian. Aplikasi perangkat lunak berbasis dekstop ini telah diuji secara fungsional dengan 6 (enam) aspek parameter yakni:uji polaritas kapastor; uji wiring; uji mode frekuensi dan mode perioda pada alat ukur frequency generator; uji specific decission pada trainer kit osilator hartley dan colpitts; uji kesesuaian antara frekuensi ouput dari masing-masing osilator dengan perhitungan teorema dan hasil percobaan sesungguhnya; dan uji kualitas media. Hasil secara keseluruhan telah sesuai dengan ekspektasi didalam story board. Kata kunci: IC OP-AMP, Osilator analog, Laboratorium virtualABSTRACTThe Virtual Laboratory is as one of modern laboratory platform which able to supportthe hand-on worklab. The goal of this research are for designing and implementing a Virtual Laboratory of signal generator material with subtopics i.e. the Wien Bridge as an RC oscillator, the Hartley and Colpitts as LC oscillator and the astable multivibrator as relaxation oscillator which assembled based on Operational Amplifier Integrated Circuit (OP-AMP).This research is R&D type which consists of six stages, i.e. concept, design, materials collection, assembling, testing and distribution. This desktop-based software application has been functionally tested with six aspect of parameters such as: capacitor polarity testing; wiring testing; testing of frequency mode and period mode in frequency counter instrument; Specific decission test of the hartley and colpitts oscillator; fit-test for comparasion results between output frequency from each of oscillators with theorem calculations and actual experimental results; and quality test of media. The overall results was in line in expectations based on the story board.Keywords: Analog oscillator, IC OP-AMP, Virtual Laboratory

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MAHMOUD, SOLIMAN A. "LOW POWER LOW-PASS FILTER WITH PROGRAMMABLE CUTOFF FREQUENCY BASED ON A TUNABLE UNITY GAIN FREQUENCY OPERATIONAL AMPLIFIER." Journal of Circuits, Systems and Computers 19, no. 08 (December 2010): 1651–63. http://dx.doi.org/10.1142/s0218126610006979.

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In this paper, a sixth-order reconfigurable low pass filter (LPF) is realized using 0.25 μm TSMC CMOS technology. The filter is based on a cascading connection of bi-quadratic active-Gm-RC cells. The active-Gm-RC cells are realized using compensated op-amps with variable transconductance gain and variable compensation capacitors (variable Gm–Cc op-amp). The tuning range of the filter's cutoff frequency is from 77.4 KHz to 37.78 MHz. The filter operates from a single supply of 1.5 V. Simulations results using PSPICE for the proposed reconfigurable LPF are presented.

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Journal articles on the topic 'Operational amplifier (op-amp)'

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