Relevant bibliographies by topics / Operational amplifier (op-amp)

Academic literature on the topic 'Operational amplifier (op-amp)'

Author: Grafiati
Published: 10 December 2022
Last updated: 29 January 2023

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Journal articles on the topic "Operational amplifier (op-amp)"

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SOLIMAN, AHMED M., and AHMED H. MADIAN. "MOS-C TOW-THOMAS FILTER USING VOLTAGE OP AMP, CURRENT FEEDBACK OP AMP AND OPERATIONAL TRANSRESISTANCE AMPLIFIER." Journal of Circuits, Systems and Computers 18, no. 01 (February 2009): 151–79. http://dx.doi.org/10.1142/s0218126609004995.

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Several MOS-C realizations of the Tow-Thomas circuit using the commercially available voltage operational amplifier and the current feedback operational amplifier are reviewed in this paper. Additional MOS-C Tow-Thomas realizations using the operational transresistance amplifier and the differential current voltage conveyor are also included. MOS-C realizations of the Tow-Thomas circuit using CMOS operational amplifier, CMOS current feedback operational amplifier and CMOS operational transresistance amplifier are also given. Spice simulation results using 0.18 CMOS technology model from MOSIS are included together with detailed comparison tables to demonstrate the differences between MOS-C Tow-Thomas circuits using both of the commercially available active building blocks and CMOS integrated building blocks.
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Liu, Xiao Wei, Liang Liu, Jian Yang, Song Chen, and Wei Ping Chen. "A Low Noise Operational Amplifier Design Using Chopper Stability." Key Engineering Materials 562-565 (July 2013): 1450–54. http://dx.doi.org/10.4028/www.scientific.net/kem.562-565.1450.

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Noise has become a significant bottleneck limiting the performance of the op amp, and chopper stabilization technology [1] is commonly used to reduce the noise of the op amp. The chopper stabilization technology can significantly reduce the low-frequency 1/f noise of op amp, then reducing the total low-frequency noise of op amp. In this paper, we designed a chopper-stabilized low-noise op amp, and used Cadence software for simulation and debugging.
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Kehinde, L. O. "The ‘Dozen-Impedance’ Operational Amplifier Module for Experimentation." International Journal of Electrical Engineering & Education 26, no. 3 (July 1989): 224–32. http://dx.doi.org/10.1177/002072098902600304.

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This paper presents a ‘dozen-impedance’ op. amp. configuration that can be used for a myriad laboratory experiments on op. amps. From the generated transfer function, a new formalized statement is presented from which the transfer function of op. amp. circuits that fall under this class can be obtained without the rigours of earlier well-known matrix techniques. Some experimental configurations are suggested.
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Sahu, Rashmi, Maitraiyee Konar, and Sudip Kundu. "Improvement of Gain Accuracy and CMRR of Low Power Instrumentation Amplifier Using High Gain Operational Amplifiers." Micro and Nanosystems 12, no. 3 (December 1, 2020): 168–74. http://dx.doi.org/10.2174/1876402912666200123153318.

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Background: Sensing of biomedical signals is crucial for monitoring of various health conditions. These signals have a very low amplitude (in μV) and a small frequency range (<500 Hz). In the presence of various common-mode interferences, biomedical signals are difficult to detect. Instrumentation amplifiers (INAs) are usually preferred to detect these signals due to their high commonmode rejection ratio (CMRR). Gain accuracy and CMRR are two important parameters associated with any INA. This article, therefore, focuses on the improvement of the gain accuracy and CMRR of a low power INA topology. Objective: The objective of this article is to achieve high gain accuracy and CMRR of low power INA by having high gain operational amplifiers (Op-Amps), which are the building blocks of the INAs. Methods: For the implementation of the Op-Amps and the INAs, the Cadence Virtuoso tool was used. All the designs and implementation were realized in 0.18 μm CMOS technology. Results: Three different Op-Amp topologies namely single-stage differential Op-Amp, folded cascode Op-Amp, and multi-stage Op-Amp were implemented. Using these Op-Amp topologies separately, three Op-Amp-based INAs were realized and compared. The INA designed using the high gain multistage Op-Amp topology of low-frequency gain of 123.89 dB achieves a CMRR of 164.1 dB, with the INA’s gain accuracy as good as 99%, which is the best when compared to the other two INAs realized using the other two Op-Amp topologies implemented. Conclusion: Using very high gain Op-Amps as the building blocks of the INA improves the gain accuracy of the INA and enhances the CMRR of the INA. The three Op-Amp-based INA designed with the multi-stage Op-Amps shows state-of-the-art characteristics as its gain accuracy is 99% and CMRR is as high as 164.1 dB. The power consumed by this INA is 29.25 μW by operating on a power supply of ±0.9V. This makes this INA highly suitable for low power measurement applications.
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TAMMAM, AMR ABDALLAH, MOHAMED BEN-ESMAEL, and MOHAMMED R. ABAZAB. "CURRENT FEEDBACK OP-AMP UTILIZES NEW CURRENT CELL TO ENHANCE THE CMRR." Journal of Circuits, Systems and Computers 21, no. 05 (August 2012): 1250038. http://dx.doi.org/10.1142/s0218126612500387.

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Despite excellent high frequency and high speed performance, current-feedback operational amplifiers (CFOAs) generally exhibit poor common-mode rejection (CMRR) properties, which limit their utility [Analogue IC design: The current–mode approach, IEE Circuits and Systems Series, Peter peregrinus, 1990]. A novel current feedback operational amplifier (CFOA) with improved performance is presented. The proposed CFOA has a new current-cell [Novel current-feedback operational amplifier Design Based on a floating circuit technique, IEE Colloquium on Analogue Signal Processing, 1998], to bias the entire circuit, which achieves an incremental output resistance twice that of the well-known "Wilson" circuit. Simulation results of this new CFOA architecture indicate that the amplifier exhibits performance characteristics superior to those obtained with an established input architecture: in particular, the CMRR (common-mode rejection ratio) is 91 dB, and the d.c. offset voltage less than 26 μV.
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SOLIMAN, AHMED M., and AHMED H. MADIAN. "MOS-C KHN FILTER USING VOLTAGE OP AMP, CFOA, OTRA AND DCVC." Journal of Circuits, Systems and Computers 18, no. 04 (June 2009): 733–69. http://dx.doi.org/10.1142/s021812660900523x.

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MOS-C realizations of the Kerwin–Huelsman–Newcomb (KHN) circuit using the commercially available Voltage Operational Amplifier (VOA) and the Current Feedback Operational Amplifier (CFOA) are reviewed in this paper. Additional MOS-C KHN realizations using the Operational Transresistance Amplifier (OTRA) and the Differential Current Voltage Conveyor (DCVC) are also included. MOS-C realizations of the KHN circuit using CMOS operational amplifier, CMOS current feedback operational amplifier and CMOS operational transresistance amplifier are also given. Spice simulation results using 0.18 CMOS technology model from MOSIS are included together with detailed comparison tables to demonstrate the differences between MOS-C KHN circuits using both of the commercially available active building blocks and CMOS integrated building blocks. A comparison with the Gm-C KHN circuit is also included.
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Jamal, M. B. K., S. P. Chew, B. I. Khadijah, and S. B. M. Noormiza. "Design Low Voltage FGMOS Operational Amplifier for Power Applications." Advanced Materials Research 433-440 (January 2012): 4189–93. http://dx.doi.org/10.4028/www.scientific.net/amr.433-440.4189.

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Due to the rise in demand for portable electronic device, low power and low voltage circuit design is extremely important for the appliances like computers, laptops, mobile phones and etc. Low power dissipation results in longer battery life and better integration density. This can be achieved by designing a modified low voltage op amp. The design of low voltage op amp in this paper is the combination of several low voltage analog cells. The modified low power op amp in this paper is built based on low voltage basic op amp. In this paper, the design objective is to achieve certain criteria such as supply voltage as low as 1 V, high gain more than 40 dB, low power consumption and high bandwidth. The use of FGMOS would increase the operating range of op amp through programming the threshold voltage of the FGMOS. This project is simulated using Silvaco Gateway and Expert.
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Yuan, Jun, and Wei Wang. "A TDC Based BIST Scheme for Operational Amplifier." Applied Mechanics and Materials 644-650 (September 2014): 3583–87. http://dx.doi.org/10.4028/www.scientific.net/amm.644-650.3583.

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This paper presents a time-to-digital converter (TDC) based built-in self-test (BIST) scheme for operational amplifier (Op Amp). The propagation delay exiting in the transient response of the Op Amp is monitored by the inverter based TDC, and converted into a digital code based on the referenced delay interval of the inverter used in the TDC, as a result, the digital code is finally employed to determine the test rsults. The circuit-level simualtion results of the proposed BIST syetem for a two-stage Op Amp are presented to demonstrated the feasility of the proposed BIST scheme with high fault coverage.
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Safari, Ali, Massoud Dousti, and Mohammad Bagher Tavakoli. "Monolayer Graphene Field Effect Transistor-Based Operational Amplifier." Journal of Circuits, Systems and Computers 28, no. 03 (February 24, 2019): 1950052. http://dx.doi.org/10.1142/s021812661950052x.

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Graphene Field Effect Transistor (GFET) is a promising candidate for future high performance applications in the beyond CMOS roadmap for analog circuit applications. This paper presents a Verilog-A implementation of a monolayer graphene field-effect transistor (mGFET) model. The study of characteristic curves is carried out using advanced design system (ADS) tools. Validation of the model through comparison with measurements from the characteristic curves is carried out using Silvaco TCAD tools. Finally, the mGFET is used to design a GFET-based operational amplifier (Op-Amp). The GFET Op-Amp performances are tuned in term of the graphene channel length in order to obtain a reasonable gain and bandwidth. The main characteristics of the Op-Amp performance are compared with 0.18[Formula: see text][Formula: see text]m CMOS technology.
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Chong, Peng Lean, Silvia Ganesan, Poh Kiat Ng, and Feng Yuan Kong. "A TRIZ-Adopted Development of a Compact Experimental Board for the Teaching and Learning of Operational Amplifier with Multiple Circuit Configurations." Sustainability 14, no. 21 (October 29, 2022): 14115. http://dx.doi.org/10.3390/su142114115.

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Operational amplifiers (op-amps) are generally used for actualizing simple and complex electronic circuits in the subject of analogue electronics. In an effort to improve the teaching of op-amps in electronics engineering curricula, op-amp circuits in various configurations are often used for experiments in laboratory sessions so that students can acquire certain psychomotor and cognitive skills by constructing circuit connections and analyzing input–output waveforms. As a result, multiple configurations of operational amplifier circuits are often needed, requiring multiple sets of experimental boards or circuits for each experiment. This is usually not cost effective, requires more consumable electronic components, requires more maintenance and storage space in facilities, and is less user friendly for the students. Therefore, the aim of this research is to design a single, compact, and easy-to-replicate experimental board that can be converted into multiple configurations of the LM741 operational amplifier, comprising an inverting amplifier, a noninverting amplifier, a voltage follower, a summing amplifier, a differential amplifier, a differentiator, and an integrator, with minimal electronic components at a cost lower than EUR 10. The experimental board was tested with a constant input voltage of 1.0 V AC and a switching frequency of 1.0 kHz. It is capable of producing an output voltage corresponding to the individual operational amplifier configurations and can thus be used as a facilitating module for teaching and learning activities in the field of analogue electronics.
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Dissertations / Theses on the topic "Operational amplifier (op-amp)"

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Zhang, Jiayuan. "Two-Stage Operational Amplifier Design by Using Direct and Indirect Feedback Compensations." Thesis, Virginia Tech, 2021. http://hdl.handle.net/10919/103938.

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This paper states the stability requirements of the amplifier system, and then presents, and summarizes, the classic two stage CMOS Op-Amp design by employing several popular frequency compensation techniques including traditional Miller compensation, nulling resistor, voltage buffer, and current buffer. The advantages and disadvantages of all these compensation strategies are evaluated based on a standard performance which has a 70dB DC gain, a 60◦ phase margin, a 25MHz gain bandwidth, and a slew rate of 20 V/us requirements. All the designs and simulation results are based on a 180mm 1.8 V standard TSMC CMOS technology. Ultimately, the traditional Miller compensated Op-Amp (a single compensation capacitor amplifier) cannot meet all the requirements but all other techniques could with also a boost of performance in various aspects.
Master of Science
Two-stage CMOS operational amplifier has two input pins and one output pin. it is used to amplify the differential inputs signal and transfer it to the output side. Usually the input signals are too weak to be processed by the rest of the system units. So the Op-Amp can amplify the weak input signals which then can either be further modified for some specific applications by the rest units of the system or be the final output of this entire system. The role of the Op-Amp in analog and digital systems is as the role of transformers in the power system. So the output signal is required to have fast and stable responses to the inputs. This paper states some standard requirements of the Op-Amp in aspects of gain, stability, and operating frequency. Due to the classic design of two-stage Op-Amp has poor performance of stability and operating frequency, some compensation techniques are applied as the feedback networks to improve its performance. These techniques include traditional Miller compensation, nulling resistor, voltage buffer, and current buffer. The advantages and disadvantages of all these compensation strategies are evaluated based on a 180mm 1.8 V standard TSMC CMOS technology.
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Genz, Adrian P. "Operational Amplifier Bandwidth Extension Using Negative Capacitance Generation." Diss., CLICK HERE for online access, 2006. http://contentdm.lib.byu.edu/ETD/image/etd1383.pdf.

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Zheng, Geng. "Layout-accurate Ultra-fast System-level Design Exploration Through Verilog-ams." Thesis, University of North Texas, 2013. https://digital.library.unt.edu/ark:/67531/metadc271923/.

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This research addresses problems in designing analog and mixed-signal (AMS) systems by bridging the gap between system-level and circuit-level simulation by making simulations fast like system-level and accurate like circuit-level. The tools proposed include metamodel integrated Verilog-AMS based design exploration flows. The research involves design centering, metamodel generation flows for creating efficient behavioral models, and Verilog-AMS integration techniques for model realization. The core of the proposed solution is transistor-level and layout-level metamodeling and their incorporation in Verilog-AMS. Metamodeling is used to construct efficient and layout-accurate surrogate models for AMS system building blocks. Verilog-AMS, an AMS hardware description language, is employed to build surrogate model implementations that can be simulated with industrial standard simulators. The case-study circuits and systems include an operational amplifier (OP-AMP), a voltage-controlled oscillator (VCO), a charge-pump phase-locked loop (PLL), and a continuous-time delta-sigma modulator (DSM). The minimum and maximum error rates of the proposed OP-AMP model are 0.11 % and 2.86 %, respectively. The error rates for the PLL lock time and power estimation are 0.7 % and 3.0 %, respectively. The OP-AMP optimization using the proposed approach is ~17000× faster than the transistor-level model based approach. The optimization achieves a ~4× power reduction for the OP-AMP design. The PLL parasitic-aware optimization achieves a 10× speedup and a 147 µW power reduction. Thus the experimental results validate the effectiveness of the proposed solution.
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Sengupta, Susanta. "Technology-independent CMOS op amp in minimum channel length." Diss., Available online, Georgia Institute of Technology, 2004:, 2004. http://etd.gatech.edu/theses/available/etd-07092004-101204/unrestricted/sengupta%5Fsusanta%5F200407%5Fphd.pdf.

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Thesis (Ph. D.)--School of Electrical and Computer Engineering, Georgia Institute of Technology, 2005. Directed by Phillip Allen.
Morley, Thomas, Committee Member ; Leach, Marshall, Committee Member ; Ayazi, Farrokh, Committee Member ; Rincon-Mora, Gabriel, Committee Member ; Allen, Phillip, Committee Chair. Includes bibliographical references.
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Krishnan, Lakshminarasimhan. "High Performance Class-AB Output Stage Operational Amplifiers for Continuous-time Sigma-delta ADC." Thesis, 2011. http://hdl.handle.net/1969.1/ETD-TAMU-2011-08-9896.

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One of the most critical blocks in a wide-band continuous time sigma delta (CTSD) analog-to-digital converter (ADC) is the loop filter. For most loop filter topologies, the performance of the filter depends largely on the performance of the operational amplifiers (op-amps) used in the filter. The op-amps need to have high linearity, low noise and large gain over a wide bandwidth. In this work, the impact of op-amp parameters like noise and linearity on system level performance of the CTSD ADC is studied, and the design specifications are derived for the op-amps. A new class-AB bias scheme, which is more robust to process variations and has an improved high frequency response over the conventional Monticelli bias scheme, is proposed. A biquadratic filter which forms the input stage of a 5th order low pass CTSD ADC is used as a test bench to characterize the op-amp performance. The proposed class-AB output stage is compared with the class-AB output stage with Monticelli bias scheme and a class-A output stage with bias current reuse. The filter using the new op-amp architecture has lower power consumption than the other two architectures. The proposed class AB bias scheme has better process variation and mismatch tolerance compared to the op-amp that uses conventional bias scheme.
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Master, Ankit. "Design and Implementation of a Signal Conditioning Operational Amplifier for a Reflective Object Sensor." 2010. http://trace.tennessee.edu/utk_gradthes/820.

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Industrial systems often require the acquisition of real-world analog signals for several applications. Various physical phenomena such as displacement, pressure, temperature, light intensity, etc. are measured by sensors, which is a type of transducer, and then converted into a corresponding electrical signal. The electrical signal obtained from the sensor, usually a few tens mV in magnitude, is subsequently conditioned by means of amplification, filtering, range matching, isolation etc., so that the signal can be rendered for further processing and data extraction. This thesis presents the design and implementation of a general purpose op amp used to condition a reflective object sensor’s output. The op amp is used in a non-inverting configuration, as a current-to-voltage converter to transform a phototransistor current into a usable voltage. The op amp has been implemented using CMOS architecture and fabricated in AMI 0.5-µm CMOS process available through MOSIS. The thesis begins with an overview of the various circuits involving op amps used in signal conditioning circuits. Owing to the vast number of applications for sensor signal conditioning circuits, a brief discussion of an industrial sensor circuit is also illustrated. This is followed by the complete design of the op amp and its implementation in the data acquisition circuit. The op amp is then characterized using simulation results. Finally, the test setup and the measurement results are presented. The thesis concludes with an overview of some possible future work on the sensor-op amp data acquisition circuit.
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Rangan, Giri N. K. "High speed buffers for op-amp characterization." Thesis, 1993. http://hdl.handle.net/1957/35884.

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The feasibility of developing test circuits to perform in-circuit testing of analog circuits is investigated in this thesis. A modular approach to analog testing has been adopted. Accordingly, the testing of an operational amplifier, which is a basic building block in analog circuits, is addressed. One convenient technique for measuring the frequency response of an op-amp requires a unity gain buffer to be inserted into its feedback loop. This buffer has to be simple in construction, small and accurate. Two buffer circuits that satisfy these requirements are described in this thesis. Enhanced slewing techniques are devised to achieve increased levels of performance. The buffers were integrated with an op-amp into a test chip. Digital logic is used to provide controllability and accessibility to each of the buffers and the op-amp so that they can characterized separately. The performance of the enhanced slewing buffers was verified with measurements performed on the test chip. The performance of the buffers conformed well with the simulated values. The buffers exhibited excellent settling times even while driving large capacitive loads. Their output swing and distortion performance were good for inputs as large as 2 V peak-to-peak values.
Graduation date: 1994
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Books on the topic "Operational amplifier (op-amp)"

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Graeme, Jerald G. Optimizing op amp performance. New York: McGraw-Hill, 1997.

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Jung, Walter G. IC op-amp cookbook. 3rd ed. Indianapolis, IN, USA: H.W. Sams, 1986.

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Graeme, Jerald G. Photodiode amplifiers: Op amp solutions. Boston, Mass: McGraw Hill, 1996.

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Jung, Walter G. Op Amp applications handbook. Amsterdam: Newnes, 2004.

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Op-amp circuits and principles. Carmel, Ind. USA: Sams, 1991.

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Hughes, Fredrick W. Op-amp handbook. 3rd ed. Englewood Cliffs, N.J: PTR Prentice Hall, 1993.

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Hughes, Fredrick W. Op-amp handbook. 2nd ed. Englewood Cliffs, N.J: Prentice-Hall, 1986.

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Jung, Walter G. Audio IC op-amp applications. 3rd ed. Indianapolis, Ind: H.W. Sams, 1986.

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Engineer's mini-notebook: OP-AMP circuits. [Ft. Worth, Texas: Radio Shack], 1985.

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Hufault, John R. Op amp network design. New York: Wiley, 1986.

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Book chapters on the topic "Operational amplifier (op-amp)"

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Pandey, O. N. "Operational Amplifier (Op-Amp)." In Electronics Engineering, 233–70. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-030-78995-4_5.

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Kay, Art. "Introduction to Op-Amp Noise." In Operational Amplifier Noise, 13–27. Elsevier, 2012. http://dx.doi.org/10.1016/b978-0-7506-8525-2.00002-2.

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Kay, Art. "Op-Amp Noise Example Calculations." In Operational Amplifier Noise, 29–39. Elsevier, 2012. http://dx.doi.org/10.1016/b978-0-7506-8525-2.00003-4.

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Clayton, George, and Steve Winder. "Real op-amp performance parameters." In Operational Amplifiers, 11–62. Elsevier, 2003. http://dx.doi.org/10.1016/b978-075065914-7/50003-3.

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Conference papers on the topic "Operational amplifier (op-amp)"

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Beck, Benjamin, Kenneth A. Cunefare, and Manuel Collet. "Power Output and Dissipation of a Negative Capacitance Shunt Coupled to Piezoelectric Transducers." In ASME 2011 Conference on Smart Materials, Adaptive Structures and Intelligent Systems. ASMEDC, 2011. http://dx.doi.org/10.1115/smasis2011-5099.

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A negative capacitance shunt is a basic, analog, active circuit electrically connected to a piezoelectric transducer to control vibrations of flexural bodies. The electrical impedance of the negative capacitance shunt modifies the effective modulus of the piezoelectric element to reduce the stiffness and increase the damping which causes a decrease in amplitude of the vibrating structure to which the elements are bonded. The negative capacitance circuit is built around a single operational amplifier using passive circuit elements. To gain insight into the electromechanical coupling, the power consumption of the op-amp and the power dissipated in the resistive element are measured. The power output of the op-amp increases for increasing control gain of the negative capacitance. The power characteristics of the shunt are compared to the reactive input power analysis developed in earlier work.
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