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Academic literature on the topic 'NOCs'

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Published: 4 June 2021
Last updated: 9 March 2023

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Journal articles on the topic "NOCs"

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Jermy, Andrew. "Opportunity Nocs." Nature Reviews Microbiology 7, no. 8 (August 2009): 549. http://dx.doi.org/10.1038/nrmicro2189.

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Zhang, Guohua, Xiufeng Lian, Yuzhen Fu, Qinhao Lin, Lei Li, Wei Song, Zhanyong Wang, et al. "High secondary formation of nitrogen-containing organics (NOCs) and its possible link to oxidized organics and ammonium." Atmospheric Chemistry and Physics 20, no. 3 (February 6, 2020): 1469–81. http://dx.doi.org/10.5194/acp-20-1469-2020.

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Abstract. Nitrogen-containing organic compounds (NOCs) substantially contribute to light-absorbing organic aerosols, although the atmospheric processes responsible for the secondary formation of these compounds are poorly understood. In this study, seasonal atmospheric processing of NOCs is investigated using single-particle mass spectrometry in urban Guangzhou from 2013 to 2014. The relative abundance of NOCs is found to be strongly enhanced when they are internally mixed with photochemically produced secondary oxidized organics (i.e., formate, acetate, pyruvate, methylglyoxal, glyoxylate, oxalate, malonate, and succinate) and ammonium (NH4+). Moreover, both the hourly detected particle number and the relative abundance of NOCs are highly correlated with those of secondary oxidized organics and NH4+. Therefore, it is hypothesized that the secondary formation of NOCs is most likely linked to oxidized organics and NH4+. Results from both multiple linear regression analysis and positive matrix factorization analysis further show that the relative abundance of NOCs could be well predicted (R2 > 0.7, p < 0.01) by oxidized organics and NH4+. Interestingly, the relative abundance of NOCs is inversely correlated with NH4+, whereas their number fractions are positively correlated. This result suggests that although the formation of NOCs does require the involvement of NH3/NH4+, the relative amount of NH4+ may have a negative effect. Higher humidity and NOx likely facilitates the conversion of oxidized organics to NOCs. Due to the relatively high oxidized organics and NH3/NH4+, the relative contributions of NOCs in summer and fall were higher than those in spring and winter. To the best of our knowledge, this is the first direct field observation study reporting a close association between NOCs and both oxidized organics and NH4+. These findings have substantial implications for the role of NH4+ in the atmosphere, particularly in models that predict the evolution and deposition of NOCs.Highlights. NOCs were highly internally mixed with photochemically produced secondary oxidized organics NOCs could be well predicted by the variations of these oxidized organics and NH4+ Higher relative humidity and NOx may facilitate the conversion of these oxidized organics to NOCs
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Sabbaghi-Nadooshan, Reza, Mehdi Modarressi, and Hamid Sarbazi-Azad. "The 2D digraph-based NoCs: attractive alternatives to the 2D mesh NoCs." Journal of Supercomputing 59, no. 1 (March 17, 2010): 1–21. http://dx.doi.org/10.1007/s11227-010-0410-6.

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Manzoor, Misbah, Roohie Naaz Mir, and Najeeb-ud-Din Hakim. "A Review of Design Approaches for Enhancing the Performance of NoCs at Communication Centric Level." Scalable Computing: Practice and Experience 22, no. 3 (November 21, 2021): 347–64. http://dx.doi.org/10.12694/scpe.v22i3.1896.

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As the trend of technology shrinking continues a vast amount of processors are being incorporated in a limited space. Due to this almost half of the chip area in Multi-Processor Systems-on-Chips (MPSoCs) is under interconnections, which pose a big problem for communication. Network-on-Chips (NoCs) evolved as a significant scalable solution for removing wiring congestion and communication problem in MPSoCs. NoCs provide the advantage of customized architecture, increased scalability and bandwidth. NoC is a structured framework where communication is the prime concern. In this review paper we present an overview of research and design approaches in the communication centric areas of NoCs. Here we have tried to discuss and iterate most of the available work done for communication in 2D NoCs. This paper gives the insight of different attributes and performance parameters of NoCs. Further it gives a detailed description of how topology, flow control and routing mechanisms can affect the qualitative aspects (performance) of NoCs. It then explains how various attributes of routing can help in increasing the efficacy of NoCs. Subsequently a brief review of different simulators used for NoCs is given. All of this is provided based on the survey of academic, theoretical and experimental approaches presented in the past. Finally some suggestions for future work are also given.
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Shaofeng, Chen. "Has China's Foreign Energy Quest Enhanced Its Energy Security?" China Quarterly 207 (September 2011): 600–625. http://dx.doi.org/10.1017/s0305741011000671.

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AbstractIn recent years China's national oil companies (NOCs) have proactively ventured abroad to look for more fossil fuel supply. Despite the divided views on their foreign energy quest, previous studies tend to consider the Chinese government and its NOCs to be a monolithic organism, and explicitly or implicitly presuppose that the Chinese NOCs' foreign energy quest could enhance China's energy security. This is, however, an untested hypothesis. To fill the gap, this article assesses the impact of Chinese NOCs' foreign energy quest on the country's energy security. Findings show that the Chinese NOCs have made some progress in their foreign energy quest, which contributes to their coffers and reserves, but that does not mean that China's energy security is greatly enhanced; in particular, the diversity and reliability of China's foreign oil sources are questionable.
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Liu, Dong. "China’s Resource Demand and Market Opportunities in the Middle East: Policies and Operations in Iran and Iraq." Perspectives on Global Development and Technology 13, no. 5-6 (October 8, 2014): 564–87. http://dx.doi.org/10.1163/15691497-12341318.

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Following rapid economic development, China’s dependence on imported petroleum has been increasing at a pace. In order to prevent an energy shortage that would impede economic development, the Chinese government has come up with a strategy of nocs ‘going out’; this is as an important measure for securing energy safety at the beginning of twenty-first century. However, at a time when nationalization has become widespread among resource-rich countries, the only opportunities for Chinese nocs to implement the ‘going out’ policy are in politically fragile states. Against this background, Iran and Iraq became important ‘going out’ destinations of Chinese nocs. However, the contracts that Chinese nocs have signed with Iran and Iraq are service contracts. That is to say, by signing this kind of contract, the huge investments made by Chinese nocs in Iran and Iraq are not equal to their oil or gas interests and the Chinese nocs are also incapable of ensuring the oil and gas that they produce in both these resource-rich countries are exported to China. As a result, and due to the fact that the needs of the Chinese government with respect to securing stable energy imports, Chinese nocs’ decisions towards investing in Iran and Iraq, as well as the way they manage their projects in these two countries are driven purely by commercial considerations.
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Al-Fattah, Saud M. "National oil companies: business models, challenges, and emerging trends." Corporate Ownership and Control 11, no. 1 (2013): 713–22. http://dx.doi.org/10.22495/cocv11i1c8art2.

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This paper provides an assessment and a review of the national oil companies’ (NOCs) business models, challenges and opportunities, their strategies and emerging trends. The role of the national oil company (NOC) continues to evolve as the global energy landscape changes to reflect variations in demand, discovery of new ultra-deep water oil deposits, and national and geopolitical developments. NOCs, traditionally viewed as the custodians of their country’s natural resources, have generally owned and managed the complete national oil and gas supply chain from upstream to downstream activities. In recent years, NOCs have emerged not only as joint venture partners globally with the major oil companies, but increasingly as competitors to the International Oil Companies (IOCs). Many NOCs are now more active in mergers and acquisitions (M&A), thereby increasing the number of NOCs seeking international upstream and downstream acquisition and asset targets
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Mosafaie, Razieh, and Reza Sabbaghi-Nadooshan. "Using Dbcupe Topology for NoCs." Applied Mechanics and Materials 229-231 (November 2012): 2741–44. http://dx.doi.org/10.4028/www.scientific.net/amm.229-231.2741.

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In this paper, we introduced dbcube topology for Network-on Chips(NoC). We predicted the dbcube topology has high power and low latency comparing to other topologies, and in particular mesh topology. By using xmulator simulator,we compared power and latency of this topologyto mesh topology. Finally, it is demonstrated that the network has higher power and lower latency than the mesh topology.
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Manevich, Ran, Israel Cidon, avinoam kolodny, and Isask'har Walter. "Centralized Adaptive Routing for NoCs." IEEE Computer Architecture Letters 9, no. 2 (February 2010): 57–60. http://dx.doi.org/10.1109/l-ca.2010.17.

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Pullini, Antonio, Federico Angiolini, Srinivasan Murali, David Atienza, Giovanni De Micheli, and Luca Benini. "Bringing NoCs to 65 nm." IEEE Micro 27, no. 5 (September 2007): 75–85. http://dx.doi.org/10.1109/mm.2007.4378785.

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Dissertations / Theses on the topic "NOCs"

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Vivoda, Vlado, and vlado vivoda@flinders edu au. "THE RETURN OF THE OBSOLESCING BARGAIN AND THE DECLINE OF ‘BIG OIL’: A STUDY OF BARGAINING IN THE CONTEMPORARY OIL INDUSTRY." Flinders University. School of Politics and International Studies, 2008. http://catalogue.flinders.edu.au./local/adt/public/adt-SFU20080305.150535.

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This thesis centres on studying intricate bargaining relationships between the major actors in the highly politicised oil industry. By covering the period between 1998 and early 2007, this study focuses exclusively on contemporary bargaining in the oil industry, as it is unfeasible to cover a longer time-span. In the current decade, which unlike previous two cooperative decades, can be characterised as conflictual, and thus politicised, the structure of the oil industry can best be understood by studying bargaining between numerous actors, the main of which are the international oil companies (IOCs), oil-exporting states, oil-importing states, and the national oil companies (NOCs). The central argument is that due to their weak relative bargaining power, the IOCs have been on the losing side in their bargaining with oil exporting countries and/or their NOCs in the current decade when compared to the late 1990s, and thus, we are witnessing the return of the obsolescing bargain.
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Hervé, Marcos Barcellos. "Métodos de teste de redes-em-chip (NoCs)." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2009. http://hdl.handle.net/10183/25498.

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Este trabalho tem como objetivo estudar e propor métodos de teste funcional visando a detecção e localização de falhas na infra-estrutura das redes-em-chip. Para isso, o trabalho apresenta, inicialmente, uma descrição das principais características das redes-em-chip, explicando o que elas são e para que elas servem. Em seguida são apresentados conceitos de teste de circuitos integrados, bem como trabalhos relacionados ao teste das redes-em-chip. Um método de teste visando a detecção de falhas nas interconexões de dados de uma NoC é apresentado no trabalho, sendo este método posteriormente estendido para incluir as interconexões de controle. Os circuitos de teste necessários para implementar a estratégia de teste proposta também são descritos. A partir do método de teste apresentado, é feito um estudo sobre sua capacidade de localização de falhas, onde alterações visando o aumento dessa capacidade de localização de falhas são propostas. Por fim o método de teste é estendido para detecção de falhas nos roteadores da rede.
The purpose of this work is to study and propose functional test methods that aim the detection and location of faults in the NoC’s infrastructure. In order to do so, this work presents, initially, a description of the main characteristics of networks-on-chip, explaining what are NoCs and what is their purpose. Fallowing this description, some concepts related to the test of integrated circuits are presented as well as related works on NoC testing. A method aiming the detection of data interconnect faults in a NoC is presented in this work. This method is later extended to include faults in the control interconnections as well. The circuits used to implement the proposed strategy are also described here. Based on the proposed test strategy, the method’s capability to locate faults is studied. Changes are proposed to the test method in order to increase this fault location capability. Finally, the test method is extended to include faults inside the router’s logic.
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Alshraiedeh, Juman. "Wear-out Leveling in Network on Chips (NoCs)." Ohio University / OhioLINK, 2017. http://rave.ohiolink.edu/etdc/view?acc_num=ohiou1492677926079357.

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Helmy, Amr. "Mise en œuvre de techniques de démonstration automatique pour la vérification formelle des NoCs." Grenoble INPG, 2010. http://www.theses.fr/2010INPG0035.

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Les technologies actuelles permettent l'intégration sur une même puce de systèmes complexes (SoCs) qui sont composés de blocs préconçus (IPs) pouvant être interconnectés grâce à un réseau sur la puce (NoCs). De manière générale, les IPs sont validés par diverses techniques (simulation, test, vérification formelle) et le problème majeur reste la validation des infrastructures des communications. Cette thèse se concentre sur la vérification formelle des réseaux sur puce à l'aide d'un outil de preuve automatique, le démonstrateur de théorèmes ACL2. Un méta-modèle pour les réseaux sur puce a été développé et implémenté dans ACL2. Il satisfait des propriétés de correction générique, conséquences logiques d'un ensemble d'obligations de preuve sur les constituants principaux du réseau (topologie, routage, technique de commutation,. . . ). La preuve de correction pour une instance spécifique de réseau sur puce est alors réduite à la vérification de ces obligations de preuve. Cette thèse poursuit les travaux entrepris dans ce domaine en étendant ce méta-modèle dans plusieurs directions : prise en compte plus fine de la modélisation temporelle, du contrôle de flux, des mécanismes de priorités,. . . Les résultats sont démontrés sur plusieurs réseaux actuels : Hermes (Université fédérale du Rio Grande do Sul, Brésil et LIRMM) et Nostrum (Royal Institute Of Technology, Suéde)
The current technology allows the integration on a single die of complex systems-on-chip (SoC's) composed of manufactured blocks (IP's) that can be interconnected through specialized networks-on-chip (NoCs). IP's have usually been validated by diverse techniques (simulation, test, formal verification) and the key problem remains the validation of the communication infrastructure. This thesis addresses the formal verification of NoCs by means of a mechanized proof tool, the ACL2 theorem prover. A meta-model for NoCs has been developed and implemented in ACL2. It satisfies generic correctness statements, which are logical consequences of a set of proof obligations for each one of the NoC constituents (topology, routing, switching technique,. . . ). Thus the verification of a particular NoC instance is reduced to discharging this set of proof obligations. The purpose of this thesis is to extend this meta-model in several directions: more accurate timing modeling, flow control, priority mechanisms,. . . The methodology is demonstrated on realistic and state-of-the-art NoC designs: Spidergon (STMicroelectronics), Hermes (The Federal University of Rio Grande do Sul, Brazil, and LIRMM) , and Nostrum (Royal Institute Of Technology, Sweden)
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Santos, Flávia de Oliveira 1986. "MediaBox : uma plataforma baseada em NoCs para aplicações multimídia." [s.n.], 2013. http://repositorio.unicamp.br/jspui/handle/REPOSIP/275649.

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Orientadores: Guido Costa Souza de Araújo, Sandro Rigo
Dissertação (mestrado) - Universidade Estadual de Campinas, Instituto de Computação
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Resumo: Arquiteturas tradicionais para sistemas modernos consistem em SoCs com múltiplos processadores integrados em um único chip conhecidos como MPSoCs. A maioria dos IPs de um MPSoC são altamente configuráveis, cada um com uma complicada relação custo-benefício entre métricas como desempenho, área e consumo de energia, tornando o espaço de projeto de um MPSoC bastante amplo. Aliado a essa complexidade de projeto está o fato de que não é possível realizar a verificação de um MPSoC sem a aplicação em software e muito menos desenvolver o software sem modelos de hardware. Por isso é importante que os projetistas possam começar com modelos do sistema completo nos quais subsistemas possam ser independentemente substituídos por modelos refinados, de forma a haver uma validação contínua do sistema. Neste contexto, o conceito de plataforma virtual tem sido utilizado para desenvolvimento paralelo de hardware e software. Através de plataformas virtuais, projetistas podem analisar antecipadamente muitos problemas de projeto em um MPSoC, obtendo assim estimativas para consumo de energia, tráfego de barramento, uso de memória, eficiência dos periféricos e, principalmente, desempenho do sistema como um todo. Este projeto visa prover uma plataforma virtual em nível ESL chamada MediaBox. A MediaBox tem como mecanismo de interconexão uma NoC (Network-on-Chip) que introduz o conceito de rede na plataforma e possibilita a comunicação simultânea entre seus IPs. A plataforma desenvolvida possibilita a avaliação de desempenho de sistemas multimídia e sua execução facilita a produção de grandes quantidades de informação poupando tempo e esforço ao desenvolvedor. O estudo de caso realizado demonstra que a MediaBox é uma boa solução para simular aplicações multimídia e para análise de desempenho. Devido ao grande tráfego existente entre os IPs, o uso de uma NoC como meio de interconexão mostrou-se eficaz. A MediaBox possibilita o uso de diferentes configurações através de um arquivo de configuração e de um mapa de endereçamento que permitem explorar essas opções. Essa flexibilidade permite aos usuários conceber e testar diferentes arquiteturas através das quais pode ser estudado o comportamento e o desempenho de sistemas multiprocessados em um chip
Abstract: Traditional architectures for modern systems consist on SoCs with multiple processors integrated in a single chip known as MPSoCs. Most of the IPs in a MPSoC are highly configurable, each with a complicated trade-o_ between metrics such as performance, area and energy consumption making the design space of a MPSoC incredibly wide. Allied to this project complexity is the fact that it is not possible to perform verification of a MPSoC without the application in software and much less develop the software without hardware models. For this reason, it is important that designers start with complete system models in which subsystems may be independently replaced by refined models, so that there is a continuous system validation. In this context, the concept of a virtual platform has been used for parallel development of hardware and software. Through virtual platforms, designers are able to analyze in advance many design problems in a MPSoC, thus obtaining estimates for energy consumption, bus trafic, memory usage, peripherals efficiency and mainly performance of the system as a whole. This project aims to provide a virtual platform in ESL called MediaBox. The Media- Box interconnection mechanism is a NoC (Network-on-chip) that introduces the concept of a network inside a platform and enables simultaneous communication between its IPs. The developed platform enables multimedia systems performance evaluation and its execution facilitates the production of a large amount of information saving the developer's time and effort. The case study developed demonstrates that MediaBox is a good solution for simulating multimedia applications and for performance analysis. Due to the amount of traffic between the IPs, the use of a NoC as the interconnection mechanism proved to be effective. MediaBox enables the usage of different configurations through a configuration file and an address map that allows to explore these options. This _exibility allows the users to conceive and test different architectures through which the behavior and the performance of multiprocessor systems in a single chip can be studied
Mestrado
Ciência da Computação
Mestre em Ciência da Computação
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Tedesco, Leonel Pablo. "Monitoração e roteamento adaptativo para fluxos QoS em NoCs." Pontifícia Universidade Católica do Rio Grande do Sul, 2010. http://hdl.handle.net/10923/1475.

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The growing number of applications running on emerging MPSoCs can be characterized by their high demand of computation and communication in different parts of the chip. The processing elements that execute these applications bring a dynamic and unpredictable nature to the on-chip traffic, due to the variability on data injection rates that they can generate. Networks on chip (NoCs) are the communication infrastructure to be used in such systems, due to their performance, reliability and scalability. To deal with the dynamic behavior of the application traffic, several methods are proposed at the system level (at runtime) and at the architecture level (at design time). The subject of this Thesis is the use of techniques for adaptability in NoCs at both system and architecture levels: buffer sizing and adaptive routing. The first technique introduces a decoupling buffer (D-buffer) on the target IP. This buffer receives data from the NoC with jitter, while the target IP consumes data from this buffer at the application rate, without jitter. Two problems must be solved to implement D-buffers: (i) which size must the buffer have? (ii) how much time should pass before data consumption starts (threshold)? A general method to define D-buffer size and threshold, considering the influence of packaging, arbitration, routing and concurrency between flows is presented. The second technique is an adaptive routing algorithm for NoCs, where the path between source and target IPs may be modified due to congestion events. The major part of the state of art proposals have a limited view of congestion, since each NoC router takes decisions based on the status of a few neighbors. Such local decisions may route packets to other congested regions, making the algorithm inefficient. This work presents a new method where congestion analysis considers information of all routers in the source-to-target path. This method relies on a protocol for QoS session establishment, followed by distributed monitoring and re-route to noncongested regions. Experimental results demonstrate the impact on multimedia flows with fixed and variable packet sizes (from real traffic traces) in the buffer sizing, and the percentage of deadline violations as a function of the D-buffer size. In terms of adaptive routing, the obtained results present the influence of different levels of traffic locality on packets latency, NoC occupation and adaptive routing reactivity to congestion events.
O crescente número de aplicações executando em MPSoCs emergentes pode ser caracterizado pela sua alta demanda de computação e comunicação nas diferentes parte do chip. Os elementos de processamento que executam estas aplicações trazem uma natureza dinâmica e imprevisível para o tráfego em chip, devido à variabilidade nas taxas de injeção de dados que eles podem gerar. As redes em chip (NoC – do inglês Network-on-Chip) são as estruturas de comunicação a serem utilizadas em tais sistemas, devido ao seu desempenho, confiabilidade e escalabilidade. Para lidar com o comportamento dinâmico do tráfego de aplicações, vários métodos de adaptação são propostos em nível de sistema (em tempo de execução) e em nível de arquitetura (em tempo de projeto). Esta Tese aborda o uso de técnicas de adaptação em NoCs em nível de sistema e de arquitetura: dimensionamento de buffer e roteamento adaptativo. A primeira técnica introduz um buffer de desacoplamento (D-buffer) no IP destino. Este buffer recebe dados da NoC com jitter, enquanto que o IP destino consome dados deste buffer na taxa da aplicação, sem jitter. Dois problemas devem ser resolvidos para a implementação de D-buffers: (i) qual tamanho este buffer deve possuir? (ii) quanto tempo deve ser esperado antes do início do consumo de dados (threshold)? Propõe-se aqui um método geral para definir o tamanho e threshold de D-buffers, considerando a influência do empacotamento, arbitragem, roteamento e concorrência entre fluxos. A segunda técnica é um algoritmo de roteamento adaptativo para NoCs, onde o caminho entre o IPs origem e destino pode ser modificado devido a eventos de congestionamento. A maior parte das propostas do estado da arte possui uma visão limitada de congestionamento, considerando que cada roteador da NoC toma decisões baseado no estado de seus vizinhos. Esta decisão local pode rotear pacotes a outras regiões congestionadas, o que pode tornar o algoritmo ineficiente. Este trabalho apresenta um novo método onde a análise de congestionamento considera informações de todos os roteadores no caminho entre a origem e destino. Este método é composto por um protocolo para estabelecimento de sessões QoS, seguido de monitoração distribuída e re-roteamento para regiões não congestionadas. Resultados experimentais demonstram o impacto de fluxos multimídia com tamanhos de pacotes fixo e variável (a partir de traces reais de tráfego) no dimensionamento de buffers, e o percentual de violações de prazos em função do tamanho do D-buffer. Em termos de roteamento adaptativo, os resultados obtidos apresentam a influência de diferentes níveis de localidade de tráfego na latência de pacotes, ocupação da NoC e reatividade do roteamento adaptativo a eventos de congestionamento.
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Antunes, Eduardo de Brum. "Particionamento e mapeamento de MPSOCS homogêneos baseados em NOCS." Pontifícia Universidade Católica do Rio Grande do Sul, 2012. http://hdl.handle.net/10923/1660.

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The increasing complexity of the applications demands more processing capacity, which boosts the development of a computational system composed of modules, such as processors, memories and specific hardware cores, called Multi-Processor System-on- Chip (MPSoC). If the modules of this system are connected through a Network-on-Chip (NoC) communication infrastructure and all processors are of the same type, they are known by homogeneous NoC based MPSoC. One of the main problems relating to MPSoCs design is the definition of which processors of the system will be responsible for each application task execution, objecting to meet the design requirements, such as the energy consumption minimization and the application execution time reduction. This work aims to carry out quickly and efficiently partitioning and mapping activities for the design of homogeneous MPSoCs. More specifically, the partitioning application's task into groups, and mapping of tasks or task groups into a target architecture type homogeneous NoC-based MPSoC. These activities are guided by requirements of energy consumption minimization and load balancing, and delimited by constraints of maximum energy consumption, maximum processing load and maxima areas of data and code of each processor. The work shows the complexity of partitioning and mapping activities separately and jointly. It also shows that the mapping is more efficient on energy consumption minimization, when compared to partitioning, yet the effect of partitioning cannot be neglected. Moreover, the joint effect of both activities saves in average 37% of energy. The mapping when performed at runtime may be inefficient, due to the short time and the large number of solutions to be explored. Having an approach that applies a static partition before the dynamic mapping, it is possible to achieve more efficient mappings. It happens due to the fact that static task partition onto groups minimizes the search space of the mapping. Experiments with several synthetic applications and four embedded applications show that the energy consumption is reduced 23. 5%, in average. This paper presents the PALOMA framework that performs the partitioning of tasks onto groups and the CAFES framework to map these ones into tiles of the target architecture, where each position contains a processor. These activities enable planning systems with less energy consumption, faster and in an acceptable design time.
O aumento da complexidade das aplicações demanda maior capacidade de processamento, impulsionando o desenvolvimento de um sistema computacional compostos por módulos como processadores, memórias e núcleos de hardware específicos, chamado de Multi-Processor System-on-Chip (MPSoC). Se os módulos deste sistema forem conectados por uma infraestrutura de comunicação do tipo Network-on- Chip (NoC) e todos os processadores forem de um único tipo, este é chamado de MPSoC homogêneo baseado em NoC. Um dos principais problemas relativo ao projeto de MPSoCs é a definição de qual dos processadores do sistema será responsável pela execução de cada tarefa de uma aplicação, visando atender os requisitos de projeto, tais como a redução do consumo de energia e a redução do tempo de execução da aplicação. Este trabalho tem como objetivo a realização de forma rápida e eficiente das atividades de particionamento e mapeamento para o projeto de MPSoCs homogêneos. Mais especificamente o particionamento de tarefas de uma aplicação em grupos, e o mapeamento de tarefas ou grupos de tarefas em processadores homogêneos de uma arquitetura alvo do tipo MPSoC baseado em NoC. Sendo estas atividades guiadas por requisitos de redução do consumo de energia e balanceamento de carga, e delimitadas por restrições de máximo consumo de energia, máxima carga de processamento e máximas áreas de dados e código associadas a cada processador. O trabalho mostra a complexidade das atividades de particionamento e mapeamento, separadas e conjuntamente. Mostra também que o mapeamento é mais eficiente na redução de consumo de energia, quando comparado com o particionamento, mas mesmo assim o efeito do particionamento não pode ser negligenciado. Além disto, o efeito conjunto de ambas as atividades reduz em média 37% o consumo de energia.O mapeamento, quando realizado em tempo de execução, pode ser pouco eficiente, devido ao tempo exíguo e ao grande número de soluções a serem exploradas. Utilizando uma abordagem que aplica um particionamento estático anterior ao mapeamento dinâmico, permite obter mapeamentos mais eficientes. Isto porque o particionamento estático de tarefas em grupos reduz o espaço de busca que o mapeamento necessita realizar. Experimentos com várias aplicações sintéticas e quatro aplicações embarcadas mostram que a redução média do consumo de energia é de 23,5%. Este trabalho apresenta o framework PALOMA que realiza o particionamento de tarefas em grupos e o framework CAFES para fazer o mapeamento destes em posições da arquitetura alvo, onde cada posição contém um processador. Estas atividades permitem planejar sistemas com menor consumo de energia, mais velozes e em tempo de projeto aceitável.
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Silva, Douglas Roberto Guarani da. "Improving QoS by employing multiple physical NoCs on MPSoCs." Pontifícia Universidade Católica do Rio Grande do Sul, 2016. http://hdl.handle.net/10923/8193.

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Embedded systems adopt NoC-based MPSoCs since a large number of processing elements (PEs) enables the simultaneous execution of several applications, where some of these applications require real-time (RT) constraints. PEs communicate using messages in distributed memory MPSoCs. These messages can be classified as application messages, being the data generated by the applications, and management messages, used to ensure the correct operation of the platform. As the communication has a large impact on the application performance, an important concern in the design of MPSoCs is to improve the performance of the applications’ communication, particularly for RT applications. Two possible methods to optimize the communication performance includes: (i) prioritize the RT application messages over the messages generated by best-effort (BE) applications; (ii) isolate the application messages from the management messages, considering that complex MPSoCs require a large number of management services to meet the performance constraints. The NoC literature contains several works that differentiate traffic classes, proposing the isolation of these traffic classes by the use of multiple physical (MP) NoCs, reducing interferences among the flows belonging to different classes. The main goal of this work is to propose and to evaluate MP NoCs, with one network dedicated to the application messages and a second network for the management messages (MNoC).Based on the evaluation of the impact of the management traffic in the overall NoC communication, two different versions of M-NoCs are implemented and evaluated. Another important consideration for RT applications is to ensure that these applications meet their deadlines. The execution of these applications must have higher priority over the BE applications by dedicating more processing resources using a specialized RT scheduler. This work presents and evaluates an MPSoC platform capable of supporting both communication and computation QoS, being extensible for a large number of management services by to the use of MP NoCs. Results show that M-NoCs may be customized to have a small area overhead. The adoption of M-NoCs improves the communication performance, latency and jitter, even when the network used in the platform has QoS mechanisms (e. g. priority flows and circuit switching), by isolating the management traffic from the application traffic.
Sistemas embarcados adotam MPSoCs baseados em NoCs visto que um número grande de elementos de processamento (PEs) permitem a execução simultânea de várias aplicações, onde algumas dessas aplicações necessitam de restrições de tempo real (RT). PEs comunicam-se utilizando troca de mensagens em MPSoCs com memória distribuída. Essas mensagens podem ser classificadas como mensagens de aplicação, sendo os dados gerados pelas aplicações, e mensagens de gerência, utilizadas para garantir a operação correta da plataforma. Visto que a comunicação possui um forte impacto no desempenho da aplicação, uma preocupação importante no projeto de MPSoCs é de melhorar o desempenho da comunicação das aplicações, especialmente para aplicações RT. Dois métodos possíveis para otimizar o desempenho de comunicação incluem: (i) priorizar as mensagens das aplicações de RT sobre as mensagens geradas por aplicações de melhor esforço (do inglês, best effort, BE); (ii) isolar as mensagens de aplicações das mensagens de gerência, considerando que MPSoCs complexos necessitam de um grande número de serviços de gerência para satisfazer os requisitos de desempenho. Na literatura sobre NoCs há vários trabalhos que diferenciam classes de tráfego, propondo o isolamento dessas classes de tráfego pela utilização de múltiplas NoCs físicas (do inglês, multiple physical NoCs, MP NoCs), reduzindo interferências entre fluxos pertencentes a classes diferentes. O principal objetivo deste trabalho é propor e avaliar MP NoCs, onde uma rede é dedicada para mensagens de aplicação e uma segunda rede é utilizada para mensagens de gerência (M-NoC).Baseado na avaliação do impacto do tráfego de gerência na comunicação da NoC, duas versões da M-NoC são implementadas e avaliadas. Outra consideração importante para aplicações RT é garantir que os deadlines dessas aplicações sejam satisfeitos. A execução dessas aplicações deve ser priorizada sobre as aplicações BE através do fornecimento de mais recursos de processamento utilizando um escalonador RT especializado. Esse trabalho apresenta e avalia uma plataforma MPSoC capaz de suportar QoS de comunicação e de computação, sendo extensível para um número grande de serviços de gerência pelo uso de MP NoCs. Resultados mostram que as M-NoCs podem ser personalizadas para terem um pequeno impacto de área. A utilização de M-NoCs melhora o desempenho de comunicação, latência e jitter, mesmo considerando que a plataforma já possui mecanismos de QoS (como fluxos prioritários e chaveamento de circuitos), pelo isolamento do tráfego de gerência do tráfego de aplicação.
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Frantz, Arthur Pereira. "Designing fault tolerant NoCs to improve reliability on SoCs." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2007. http://hdl.handle.net/10183/11302.

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Com a redução das dimensões dos dispositivos nas tecnologias sub-micrônicas foi possível um grande aumento no número de IP cores integrados em um mesmo chip e consequentemente novas arquiteturas de comunicação são usadas bucando atingir os requisitos de desempenho e potência. As redes intra-chip (Networks-on-Chip) foram propostas como uma plataforma alternativa de comunicação capaz de prover interconexões e comunicação entre os cores de um mesmo chip, tratando questões como desempenho, consumo de energia e reusabilidade para grandes sistemas integrados. Por outro lado, a mesma evolução tecnológica dos processos nanométricos reduziu drasticamente a confiabilidade de circuitos integrados, tornando dispositivos e interconexões mais sensíveis a novos tipos de falhas. Erros podem ser gerados por variações no processo de fabricação ou mesmo pela susceptibilidade do projeto, quando este opera em um ambiente hostil. Na comunicação de NoCs as duas principais fontes de erros são falhas de crosstalk e soft errors. No passado, se assumia que interconexões não poderiam ser afetadas por soft errors, por não possuirem circuitos seqüenciais. Porém, quando NoCs são usadas, buffers e circuitos seqüenciais estão presentes nos roteadores e, consequentemente, podem ocorrer soft errors entre a fonte e o destino da comunicação, provocando erros. Técnicas de tolerância a falhas, que tem sido aplicadas em circuitos em geral, podem ser usadas para proteger roteadores contra bit-flips. Neste cenário, este trabalho inicia com a avaliação dos efeitos de soft errors e falhas de crosstalk em uma arquitetura de NoC, através de simulação de injeção de falhas, analisando detalhadamente o impacto de tais falhas no roteador. Os resultados mostram que os efeitos dessas falhas na comunicação do SoC podem ser desastrosos, levando a perda de pacotes e travamento ou indisponibilidade do sistema. Então é proposta e avaliada a aplicação de um conjunto de técnicas de tolerância a falhas em roteadores, possibilitando diminuir os soft errors e falhas de crosstalk no nível de hardware. Estas técnicas propostas foram baseadas em códigos de correção de erros e redundância de hardware. Resultados experimentais mostram que estas técnicas podem obter zero erros com 50% a menos de overhead de área, quando comparadas com a duplicação simples. Entretanto, algumas dessas técnicas têm um grande consumo de potência, pois toda essas técnicas são baseadas na adição de hardware redundante. Considerando que as técnicas de proteção baseadas em software também impõe um considerável overhead na comunicação devido à retransmissão, é proposto o uso de técnicas mistas de hardware e software, que podem oferecer um nível de proteção satisfatório, baseado na análise do ambiente onde o sistema irá operar (soft error rate), fatores relativos ao projeto e fabricação (variações de atraso em interconexões, pontos susceptíveis a crosstalk), a probabilidade de uma falha gerar um erro em um roteador, a carga de comunicação e os limites de potência e energia suportados.
As the technology scales down into deep sub-micron domain, more IP cores are integrated in the same die and new communication architectures are used to meet performance and power constraints. Networks-on-Chip have been proposed as an alternative communication platform capable of providing interconnections and communication among onchip cores, handling performance, energy consumption and reusability issues for large integrated systems. However, the same advances to nanometric technologies have significantly reduced reliability in mass-produced integrated circuits, increasing the sensitivity of devices and interconnects to new types of failures. Variations at the fabrication process or even the susceptibility of a design under a hostile environment might generate errors. In NoC communications the two major sources of errors are crosstalk faults and soft errors. In the past, it was assumed that connections cannot be affected by soft errors because there was no sequential circuit involved. However, when NoCs are used, buffers and sequential circuits are present in the routers, consequently, soft errors can occur between the communication source and destination provoking errors. Fault tolerant techniques that once have been applied in integrated circuits in general can be used to protect routers against bit-flips. In this scenario, this work starts evaluating the effects of soft errors and crosstalk faults in a NoC architecture by performing fault injection simulations, where it has been accurate analyzed the impact of such faults over the switch service. The results show that the effect of those faults in the SoC communication can be disastrous, leading to loss of packets and system crash or unavailability. Then it proposes and evaluates a set of fault tolerant techniques applied at routers able to mitigate soft errors and crosstalk faults at the hardware level. Such proposed techniques were based on error correcting codes and hardware redundancy. Experimental results show that using the proposed techniques one can obtain zero errors with up to 50% of savings in the area overhead when compared to simple duplication. However some of these techniques are very power consuming because all the tolerance is based on adding redundant hardware. Considering that softwarebased mitigation techniques also impose a considerable communication overhead due to retransmission, we then propose the use of mixed hardware-software techniques, that can develop a suitable protection scheme driven by the analysis of the environment that the system will operate in (soft error rate), the design and fabrication factors (delay variations in interconnects, crosstalk enabling points), the probability of a fault generating an error in the router, the communication load and the allowed power or energy budget.
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Zhang, Yixuan. "High-Performance Crossbar Designs for Network-on-Chips (NoCs)." Ohio University / OhioLINK, 2010. http://rave.ohiolink.edu/etdc/view?acc_num=ohiou1282056856.

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Books on the topic "NOCs"

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Bulawayo, NoViolet. Il nous faut de nouveaux noms. Paris: Gallimard, 2014.

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Rudčenková, Kateřina. Noci, noci. Praha: Torst, 2004.

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Jacques, Attali, ed. Avec nous, après nous... Paris]: Baker Street, 2013.

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Nous nous aimions: Roman. Paris VI: Sabine Wespieser éditeur, 2022.

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Clark, Mary Higgins. Et nous nous reverrons. Paris: Ed. France loisirs, 2000.

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Lambert, Michel. Quand nous reverrons-nous?: Nouvelles. Paris: Pierre-Guillaume de Roux, 2015.

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Nous nous sommes tant malmenés! Paris: In Press, 2009.

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1946-, Glogowski Christophe, ed. Nous n'irons plus chez nous. [Paris]: R. Laffont, 1997.

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Berger, Miguel. PAPA, NOUS NOUS SOMMES APPRIVOISÉS. Paris: Editions L'Harmattan, 2004.

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Saint-Cyprien, Collections de. Nous nous sommes tant aimés. Paris: Paris musées, 2006.

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Book chapters on the topic "NOCs"

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Matos, Débora, Caroline Concatto, and Luigi Carro. "Reconfigurable Intercommunication Infrastructure: NoCs." In Adaptable Embedded Systems, 119–61. New York, NY: Springer New York, 2012. http://dx.doi.org/10.1007/978-1-4614-1746-0_5.

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Golubcovs, Stanislavs, and Alex Yakovlev. "Asynchronous Communications for NoCs." In Low Power Networks-on-Chip, 71–109. Boston, MA: Springer US, 2010. http://dx.doi.org/10.1007/978-1-4419-6911-8_4.

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Bamberg, Lennart, Jan Moritz Joseph, Alberto García-Ortiz, and Thilo Pionteck. "Heterogeneous Virtualisation for 3D NoCs." In 3D Interconnect Architectures for Heterogeneous Technologies, 313–22. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-030-98229-4_14.

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Bamberg, Lennart, Jan Moritz Joseph, Alberto García-Ortiz, and Thilo Pionteck. "Heterogeneous Routing for 3D NoCs." In 3D Interconnect Architectures for Heterogeneous Technologies, 281–311. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-030-98229-4_13.

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Kamali, Maryam, Luigia Petre, Kaisa Sere, and Masoud Daneshtalab. "Refinement-Based Modeling of 3D NoCs." In Fundamentals of Software Engineering, 236–52. Berlin, Heidelberg: Springer Berlin Heidelberg, 2012. http://dx.doi.org/10.1007/978-3-642-29320-7_16.

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Bertozzi, Davide, Luca Benini, and Giovanni De Micheli. "Energy-Reliability trade-Off for NoCs." In Networks on Chip, 107–29. Boston, MA: Springer US, 2003. http://dx.doi.org/10.1007/0-306-48727-6_6.

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Sabbaghi-Nadooshan, Reza, Abolfazl Malekmohammadi, and Mohammad Ayoub Khan. "Multicast Algorithm for 2D de Bruijn NoCs." In Embedded and Real Time System Development: A Software Engineering Perspective, 235–49. Berlin, Heidelberg: Springer Berlin Heidelberg, 2013. http://dx.doi.org/10.1007/978-3-642-40888-5_9.

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Kale, Prachi, Pallabi Hazarika, Sajal Jain, and Biswajit Bhowmik. "Performance Evaluation in 2D NoCs Using ANN." In Advanced Information Networking and Applications, 360–69. Cham: Springer International Publishing, 2022. http://dx.doi.org/10.1007/978-3-030-99619-2_34.

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Thakkar, Ishan G., Sai Vineel Reddy Chittamuru, Varun Bhat, Sairam Sri Vatsavai, and Sudeep Pasricha. "Securing Silicon Photonic NoCs Against Hardware Attacks." In Network-on-Chip Security and Privacy, 399–421. Cham: Springer International Publishing, 2021. http://dx.doi.org/10.1007/978-3-030-69131-8_15.

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Raparti, Venkata Yaswanth, and Sudeep Pasricha. "Securing 3D NoCs from Hardware Trojan Attacks." In Network-on-Chip Security and Privacy, 461–79. Cham: Springer International Publishing, 2021. http://dx.doi.org/10.1007/978-3-030-69131-8_17.

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Conference papers on the topic "NOCs"

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Tsinaraki, Chrisa, Giannis Skevakis, Ioanna Trochatou, and Stavros Christodoulakis. "MoM-NOCS." In International Conference. New York, New York, USA: ACM Press, 2013. http://dx.doi.org/10.1145/2536853.2536887.

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Ancajas, Dean Michael, Koushik Chakraborty, and Sanghamitra Roy. "Fort-NoCs." In the The 51st Annual Design Automation Conference. New York, New York, USA: ACM Press, 2014. http://dx.doi.org/10.1145/2593069.2593144.

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"NOCS organization." In 2014 Eighth IEEE/ACM International Symposium on Networks-on-Chip (NoCS). IEEE, 2014. http://dx.doi.org/10.1109/nocs.2014.7008750.

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"NOCS 2020 Committees." In 2020 14th IEEE/ACM International Symposium on Networks-on-Chip (NOCS). IEEE, 2020. http://dx.doi.org/10.1109/nocs50636.2020.9241582.

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"NOCS 2010 Sponsors." In 2010 ACM/IEEE International Symposium on Networks-on-Chip (NOCS). IEEE, 2010. http://dx.doi.org/10.1109/nocs.2010.44.

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"ASYNC-NOCS 2010 Keynotes." In 2010 16th IEEE International Symposium on Asynchronous Circuits and Systems - ASYNC. IEEE, 2010. http://dx.doi.org/10.1109/async.2010.10.

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Kumar, Vinay B. Y., Deval Shah, Mandar Datar, and Sachin B. Patkar. "Lightweight Forth Programmable NoCs." In 2018 31st International Conference on VLSI Design and 2018 17th International Conference on Embedded Systems (VLSID). IEEE, 2018. http://dx.doi.org/10.1109/vlsid.2018.92.

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"NOCS 2020 Abstract Page." In 2020 14th IEEE/ACM International Symposium on Networks-on-Chip (NOCS). IEEE, 2020. http://dx.doi.org/10.1109/nocs50636.2020.9241576.

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"NOCS 2020 Abstract Page." In 2020 14th IEEE/ACM International Symposium on Networks-on-Chip (NOCS). IEEE, 2020. http://dx.doi.org/10.1109/nocs50636.2020.9241577.

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"NOCS 2020 Abstract Page." In 2020 14th IEEE/ACM International Symposium on Networks-on-Chip (NOCS). IEEE, 2020. http://dx.doi.org/10.1109/nocs50636.2020.9241578.

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Reports on the topic "NOCs"

1

HILL, J. S. Volume 1: Calculating potential to emit releases and doses for FEMP's and NOCs. Office of Scientific and Technical Information (OSTI), July 1999. http://dx.doi.org/10.2172/797483.

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Dugas, J. Y. Ces noms qui nous fascinent : typologie des noms d'habitats collectifs au Québec. Natural Resources Canada/ESS/Scientific and Technical Publishing Services, 1987. http://dx.doi.org/10.4095/298246.

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Pena, Pere. ... qui nous ressemble. Edicions de la Universitat de Lleida, 2019. http://dx.doi.org/10.21001/scriptura.2019.27.44.

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Fisher, Fred H. NOSC Optical Propagation Experiment. Fort Belvoir, VA: Defense Technical Information Center, May 1991. http://dx.doi.org/10.21236/ada239186.

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García Zaballos, Antonio, Maribel Dalio, Jesús Garran, Enrique Iglesias Rodriguez, Pau Puig Gabarró, and Ricardo Martínez Garza Fernández. Estructuración de un centro de operación de redes (NOC). Banco Interamericano de Desarrollo, October 2022. http://dx.doi.org/10.18235/0004520.

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El desarrollo de la tecnología 5G nos permitirá descubrir cosas que hasta ahora no podíamos hacer tecnológicamente. Y habilitará la fusión del mundo físico (operational technology, OT) con el mundo digital (information technology, IT), abriendo nuevos mundos como son internet de las cosas (Internet of Things, IoT), metaverso, digital twin, entre otros. El centro de operaciones de red (Network Operations Center, NOC) es la herramienta que nos permite garantizar la disponibilidad y el rendimiento de las redes. En particular, el NOC será responsable de monitorizar, identificar, investigar, priorizar, resolver o escalar incidentes en la red, que pueden afectar o que están afectando su disponibilidad o rendimiento. Esta publicación presenta y desarrolla la hoja de ruta para diseñar y poner en marcha un NOC que contribuya al éxito de la implementación de la estrategia nacional de conectividad y garantice el funcionamiento correcto de la infraestructura digital, facilitando la conectividad de comunidades e instituciones.
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Vultur, Mircea, Lucie Enel, Louis-Pierre Barette, and Simon Viviers. Les travailleurs des plateformes numériques de transport de personnes et de livraison de repas au Québec : profil et motivations. CIRANO, June 2022. http://dx.doi.org/10.54932/xpzk8254.

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Cette étude vise deux objectifs : a) établir un profil des travailleurs qui utilisent une plateforme numérique de transport de personne et/ou de livraison de repas au Québec et b) d’analyser les motifs sous-jacents à leur engagement dans le travail sur une plateforme numérique. La structure des analyses se décline comme suit : dans une première partie, sur la base d’une revue de la littérature, nous présentons les caractéristiques des travailleurs des plateformes et divers types de motivations pour s’engager dans l’emploi sur les plateformes. Nous y exposons également le protocole méthodologique et les données à la source de nos analyses. Dans une deuxième partie, en utilisant des données statistiques secondaires et inédites, nous dressons un portrait des travailleurs engagés sur les plateformes de transport de personnes et de livraison de repas au Québec en faisant ressortir notamment les spécificités de la population des jeunes travailleurs. Dans une troisième partie, en analysant des données d’entrevues, nous exposons une typologie des motivations invoquées par les jeunes québécois de 18 à 34 ans pour travailler sur les plateformes Uber et Uber Eats. En conclusion, nous ferons une synthèse des constats significatifs issus des analyses.
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Albert, T. R. Adaptive Signal Processing at NOSC. Fort Belvoir, VA: Defense Technical Information Center, March 1992. http://dx.doi.org/10.21236/ada250245.

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NAVAL OCEAN SYSTEMS CENTER SAN DIEGO CA. NOSC Program Managers Handbook. Revision 1. Fort Belvoir, VA: Defense Technical Information Center, February 1988. http://dx.doi.org/10.21236/ada190215.

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Kaiser, Lisa-Maria. Gilt der Grundsatz «Einerlei Verfassungsrecht» (noch)? Fribourg (Switzerland): IFF, 2016. http://dx.doi.org/10.51363/unifr.diff.2015.13.

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Kaiser, Lisa-Maria. Gilt der Grundsatz «Einerlei Verfassungsrecht» (noch)? Fribourg (Switzerland): IFF, 2016. http://dx.doi.org/10.51363/unifr.diff.2016.13.

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